From patchwork Thu Jul 12 06:18:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 141786 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp1131940ljj; Wed, 11 Jul 2018 23:19:22 -0700 (PDT) X-Google-Smtp-Source: AAOMgper0IdY6PLnt3y381Ia/16w28R44gQNTXcXtRUhOuf+9evefQpapIwFRXKYWtnMXiTpiktq X-Received: by 2002:a63:7847:: with SMTP id t68-v6mr855998pgc.329.1531376362799; Wed, 11 Jul 2018 23:19:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531376362; cv=none; d=google.com; s=arc-20160816; b=rM2D/rscVWn4KMz+TyHoAJFHQkE5ctZzy+qAhmXwdmqy6LtV0TBj+DDt0sItAmw3V6 2DBZRTC9u4U1bPb53mwT8pvV2g3NI/QybHpLkPZPgekOtjtGctSFMzrD54Iw1HIM1uZ5 hFY6u3ZDfHcYSkNtySiCuxW5qvVS6XH6xevPwwngYiJ5R7B0VOYde/4V9mRvRmZWP04I LXgbBP+g10CqSg7d6bvMM0ntLBQFJp0CceLe9my5qqSdi01TONdvamv4khnwr/VrMjp/ 4enbpxdf2aD51b1fNxG1wbbJyBAKR2W3UgggxWqce5MY9noP5HleB/0DjkmDSMBMC6GY xIlQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=I/2axhcNhjsdRlubO+OmbKAV1yFMjMZQpt9UX5MkvFk=; b=tdjFkUtW2LItdPFm5i1Igu18IbVB92ubQkbHbwH6xISqKi948Q9kfH2F1xp5+N9dyf VGjc6yC5oWsYYEKNPpLz5cs56dBnAHomsJkoqqzUKqFseWGgEiP/XYIjd7NnbG6SttAr BqkviHbJOwTg1rT3O/V8eZ4sAdHHJkYeqiGsgu+14zh6j1ciT9nLrt9Ak9jpEsVqDpxP y5tln6e0ckKDivEl5/8yn7NOozUzclG0po9vLNxTdGRnQjc2+8uYc+rMeHd9WdGkc4/m 3QYYRfpj7Jzsaft2UJtgFojp+dTSOLmSHRyLT4IPP9Yi4P+x/rZ9gR7UIG9HhVjDAbCT RcrQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id j129-v6si21810955pfc.191.2018.07.11.23.19.22; Wed, 11 Jul 2018 23:19:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732347AbeGLG1Y (ORCPT + 27 others); Thu, 12 Jul 2018 02:27:24 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:9174 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1732198AbeGLG1X (ORCPT ); Thu, 12 Jul 2018 02:27:23 -0400 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 8798CC2886F1C; Thu, 12 Jul 2018 14:19:06 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.382.0; Thu, 12 Jul 2018 14:19:00 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH v3 1/6] iommu/arm-smmu-v3: fix the implementation of flush_iotlb_all hook Date: Thu, 12 Jul 2018 14:18:27 +0800 Message-ID: <1531376312-2192-2-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> References: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org .flush_iotlb_all can not just wait for previous tlbi operations to be completed, but should also invalid all TLBs of the related domain. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 1d64710..4402187 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1770,6 +1770,14 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova, return ops->unmap(ops, iova, size); } +static void arm_smmu_flush_iotlb_all(struct iommu_domain *domain) +{ + struct arm_smmu_domain *smmu_domain = to_smmu_domain(domain); + + if (smmu_domain->smmu) + arm_smmu_tlb_inv_context(smmu_domain); +} + static void arm_smmu_iotlb_sync(struct iommu_domain *domain) { struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; @@ -1998,7 +2006,7 @@ static void arm_smmu_put_resv_regions(struct device *dev, .map = arm_smmu_map, .unmap = arm_smmu_unmap, .map_sg = default_iommu_map_sg, - .flush_iotlb_all = arm_smmu_iotlb_sync, + .flush_iotlb_all = arm_smmu_flush_iotlb_all, .iotlb_sync = arm_smmu_iotlb_sync, .iova_to_phys = arm_smmu_iova_to_phys, .add_device = arm_smmu_add_device, From patchwork Thu Jul 12 06:18:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 141788 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp1131990ljj; Wed, 11 Jul 2018 23:19:25 -0700 (PDT) X-Google-Smtp-Source: AAOMgpd32ku/LIGQLRdYuGjC5OdI9BvysZZJOi10LmJto9d51+xv/YK83YA/Ydb95Jeb+h3bA4uo X-Received: by 2002:a17:902:aa46:: with SMTP id c6-v6mr873408plr.313.1531376365675; Wed, 11 Jul 2018 23:19:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531376365; cv=none; d=google.com; s=arc-20160816; b=LoaeKLBFyOxFGBJWDerkO92ZqsqNDTMmm3H8KfxYxNZID7hdknckTnu3Z97fGfaVKw A+ijriPw9F6/9LVpnwrne/Onh+KKXrCC/WfOFxHptqQGRVQEL19PeSOiw1iij7QvDvAn +khq4gxkrHz9aPysOA7CA5VZAN6y+WBNJH0MGgJD7I1f0FBjTcNmT8g1VtJ0zK+eIYwr EyDTVroJ9MTd843DvMovQyIbmUZaJBk1Bh8mZtF876d6M4d/TXxWl9n72SWFXE/3yyv9 cKv4sOScTDReswRvs7W6iePNlGiEgx42NjigcUYspv4SyYU6XzMv8kj43xdB2HYEA4Ll 7wlA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=SQEPjNAL1wrnxESpn8g8Uz57dtH825joF34k+kCA8UA=; b=RxXvxcMavQLyoh4G8eSRXUe/vhts2soXvDKtDgu8D9dg+69PUBeJgy71zFIdyyHcaW VUEn9/2SqJaGSH/KdL+eCSdfvVIju4dusFFCSPpInT6a7YlSdPup8TZmZTri5k86tXHG n6t6a/jVmdqqop/eWqcPwvnOO3DODv+qcXHHmpTb6bDfo3J/WUNznhjAey5SolNfUHB6 DrJFEwMVexchclqKYsqSK/K5R4P8mBMbu4Jl/eCPWv2YkPvCPgX1ho5sbgpTcyB20UzR Ndp8vnsxACrbIOCFNe6u1zxs8yIVVE2T/b8DvdFIjBa0x6iOdlldRUMQPgroDdepCtx0 1I1A== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 6-v6si12114446pgv.508.2018.07.11.23.19.25; Wed, 11 Jul 2018 23:19:25 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732399AbeGLG1Z (ORCPT + 27 others); Thu, 12 Jul 2018 02:27:25 -0400 Received: from szxga04-in.huawei.com ([45.249.212.190]:9175 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1732191AbeGLG1Z (ORCPT ); Thu, 12 Jul 2018 02:27:25 -0400 Received: from DGGEMS408-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id F10276C0C5DCF; Thu, 12 Jul 2018 14:19:07 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS408-HUB.china.huawei.com (10.3.19.208) with Microsoft SMTP Server id 14.3.382.0; Thu, 12 Jul 2018 14:19:02 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH v3 2/6] iommu/dma: add support for non-strict mode Date: Thu, 12 Jul 2018 14:18:28 +0800 Message-ID: <1531376312-2192-3-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> References: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 1. Save the related domain pointer in struct iommu_dma_cookie, make iovad capable call domain->ops->flush_iotlb_all to flush TLB. 2. Add a new iommu capability: IOMMU_CAP_NON_STRICT, which used to indicate that the iommu domain support non-strict mode. 3. During the iommu domain initialization phase, call capable() to check whether it support non-strcit mode. If so, call init_iova_flush_queue to register iovad->flush_cb callback. 4. All unmap(contains iova-free) APIs will finally invoke __iommu_dma_unmap -->iommu_dma_free_iova. If the domain is non-strict, call queue_iova to put off iova freeing. Signed-off-by: Zhen Lei --- drivers/iommu/dma-iommu.c | 25 +++++++++++++++++++++++++ include/linux/iommu.h | 7 +++++++ 2 files changed, 32 insertions(+) -- 1.8.3 diff --git a/drivers/iommu/dma-iommu.c b/drivers/iommu/dma-iommu.c index ddcbbdb..9f0c77a 100644 --- a/drivers/iommu/dma-iommu.c +++ b/drivers/iommu/dma-iommu.c @@ -55,6 +55,7 @@ struct iommu_dma_cookie { }; struct list_head msi_page_list; spinlock_t msi_lock; + struct iommu_domain *domain_non_strict; }; static inline size_t cookie_msi_granule(struct iommu_dma_cookie *cookie) @@ -257,6 +258,17 @@ static int iova_reserve_iommu_regions(struct device *dev, return ret; } +static void iommu_dma_flush_iotlb_all(struct iova_domain *iovad) +{ + struct iommu_dma_cookie *cookie; + struct iommu_domain *domain; + + cookie = container_of(iovad, struct iommu_dma_cookie, iovad); + domain = cookie->domain_non_strict; + + domain->ops->flush_iotlb_all(domain); +} + /** * iommu_dma_init_domain - Initialise a DMA mapping domain * @domain: IOMMU domain previously prepared by iommu_get_dma_cookie() @@ -272,6 +284,7 @@ static int iova_reserve_iommu_regions(struct device *dev, int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, u64 size, struct device *dev) { + const struct iommu_ops *ops = domain->ops; struct iommu_dma_cookie *cookie = domain->iova_cookie; struct iova_domain *iovad = &cookie->iovad; unsigned long order, base_pfn, end_pfn; @@ -308,6 +321,15 @@ int iommu_dma_init_domain(struct iommu_domain *domain, dma_addr_t base, } init_iova_domain(iovad, 1UL << order, base_pfn); + + if ((ops->capable && ops->capable(IOMMU_CAP_NON_STRICT)) && + (IOMMU_DOMAIN_STRICT_MODE(domain) == IOMMU_NON_STRICT)) { + BUG_ON(!ops->flush_iotlb_all); + + cookie->domain_non_strict = domain; + init_iova_flush_queue(iovad, iommu_dma_flush_iotlb_all, NULL); + } + if (!dev) return 0; @@ -390,6 +412,9 @@ static void iommu_dma_free_iova(struct iommu_dma_cookie *cookie, /* The MSI case is only ever cleaning up its most recent allocation */ if (cookie->type == IOMMU_DMA_MSI_COOKIE) cookie->msi_iova -= size; + else if (cookie->domain_non_strict) + queue_iova(iovad, iova_pfn(iovad, iova), + size >> iova_shift(iovad), 0); else free_iova_fast(iovad, iova_pfn(iovad, iova), size >> iova_shift(iovad)); diff --git a/include/linux/iommu.h b/include/linux/iommu.h index 19938ee..82ed979 100644 --- a/include/linux/iommu.h +++ b/include/linux/iommu.h @@ -86,6 +86,12 @@ struct iommu_domain_geometry { #define IOMMU_DOMAIN_DMA (__IOMMU_DOMAIN_PAGING | \ __IOMMU_DOMAIN_DMA_API) +#define IOMMU_STRICT 0 +#define IOMMU_NON_STRICT 1 +#define IOMMU_STRICT_MODE_MASK 1UL +#define IOMMU_DOMAIN_STRICT_MODE(domain) \ + (domain->type != IOMMU_DOMAIN_UNMANAGED) + struct iommu_domain { unsigned type; const struct iommu_ops *ops; @@ -101,6 +107,7 @@ enum iommu_cap { transactions */ IOMMU_CAP_INTR_REMAP, /* IOMMU supports interrupt isolation */ IOMMU_CAP_NOEXEC, /* IOMMU_NOEXEC flag */ + IOMMU_CAP_NON_STRICT, /* IOMMU supports non-strict mode */ }; /* From patchwork Thu Jul 12 06:18:29 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 141790 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp1132307ljj; Wed, 11 Jul 2018 23:19:51 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdd/rkQcMmmA3kMF+B4+kSESGxkbLptKknDoOu0sXQ5n1F6LzeDN1Npr9HTGH9c0QUnq8xc X-Received: by 2002:a65:4107:: with SMTP id w7-v6mr876168pgp.90.1531376391413; Wed, 11 Jul 2018 23:19:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531376391; cv=none; d=google.com; s=arc-20160816; b=e088BHgUPGu2twk4J95c2JtBNmAYY9dYWiDo9eQrs29Ypp4uTh9oy5drrGQOnqQOcj 6l37wZGCqg4fhOMQf/0kDdN0y5WryIOwNI38po2UoXiYEW9lY085LicxC7NH1PaIhDp7 TvO1vjqt3dJ0aGLOCbzXUi2I1HyyDO7SQ96ZBVkjqQvqXm/uCTVm2kvrL9piQZH2pHK/ dXiuGswaaBY8ksuGTkbIJScxOkd9qtEij+wfnxTPo6yK9wLc+p5EELfIraCKdTLoCqD/ 4BvLXNJo5g16XrOQ1bV6z9q/9fY8SYmit1SQhUH/f3TUJt0k6jN8uVNyybzkafxKSucr p+tQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=IXXi3wsEOzbC4gCpVqEHHHx6gY+RfW5uMWB8CuZr+zQ=; b=PUxTP5lpQX569TP/VkJDHr4BWe2vW0Qo+BlNh5BKU8qsERoLN9hr9M94G3nkwClusP ekdJswNzdaaAvcjUXeuA4i4Uk/fZlAWMIvw2xejRTDOPZoyEZgGOaaw4kDh07v3RZw05 pn1XxS/iqyBuIk2WJkJmFVWO1uZh7ZKNP27WcRTqXxRqWM9s130o2HAwle/YTR7JOAkz bhp0dJKgPxprfK99MMJpS49iQXUxynDajqDBh+S6O2vppMtDssiuJ95wsMmVpGVzEEKl rU/qv+xScg7Tp2cWhp9vAuf1S9P0FANWMZLXI3uVY3ZepOY7UJRrO1Ry6CzdEALXMSBW dieQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 184-v6si20832965pgj.421.2018.07.11.23.19.51; Wed, 11 Jul 2018 23:19:51 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727368AbeGLG1T (ORCPT + 27 others); Thu, 12 Jul 2018 02:27:19 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:38888 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726819AbeGLG1T (ORCPT ); Thu, 12 Jul 2018 02:27:19 -0400 Received: from DGGEMS403-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id CE53C83162187; Thu, 12 Jul 2018 14:19:10 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS403-HUB.china.huawei.com (10.3.19.203) with Microsoft SMTP Server id 14.3.382.0; Thu, 12 Jul 2018 14:19:03 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH v3 3/6] iommu/amd: use default branch to deal with all non-supported capabilities Date: Thu, 12 Jul 2018 14:18:29 +0800 Message-ID: <1531376312-2192-4-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> References: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Avoid below warning when new capabilities added: drivers/iommu/amd_iommu.c: In function 'amd_iommu_capable': drivers/iommu/amd_iommu.c:3053:2: warning: enumeration value 'IOMMU_CAP_NON_STRICT' not handled in switch [-Wswitch] switch (cap) { Signed-off-by: Zhen Lei --- drivers/iommu/amd_iommu.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c index 596b95c..b619e5c 100644 --- a/drivers/iommu/amd_iommu.c +++ b/drivers/iommu/amd_iommu.c @@ -3085,11 +3085,9 @@ static bool amd_iommu_capable(enum iommu_cap cap) return true; case IOMMU_CAP_INTR_REMAP: return (irq_remapping_enabled == 1); - case IOMMU_CAP_NOEXEC: + default: return false; } - - return false; } static void amd_iommu_get_resv_regions(struct device *dev, From patchwork Thu Jul 12 06:18:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 141784 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp1131867ljj; Wed, 11 Jul 2018 23:19:17 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfqjS2MLA5KWEeQHxOUon5Xb4BfLG8ePzPlMIgGPxZfsU35WAoo75OTncE6oXgc9Nkpjq5K X-Received: by 2002:a65:630e:: with SMTP id g14-v6mr884589pgv.153.1531376357396; Wed, 11 Jul 2018 23:19:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531376357; cv=none; d=google.com; s=arc-20160816; b=A5jozX9e4CycXU/VTVJSPe9/pUrV2Huq+GU2Vh4jc+9GGOWwmaWnLDOLSNIPrPm3gT gFsYBKgrOSizMm8qG68f3ZyqvUkrTsYr0IvOn59Apq1IpZhTQX+hbgLVRHpV3F3oQSZr ctv97bWmV7n2aYudhNpccE+RcdgGFkQ7oFJAxWGHYXavkJx45jV7SkTlKg5EaE9XZTvp xi4VKthZrIE+MG0EtPJixNtfLErMzSjTVhzvnnAl6ABXOl2NRobNP15V/hQtCtYVtuUC rla/K2T1q6omd3sDKoCZS74l+guXpTgYV0qMp2cX3Mcgw5RPuJmoko0I8WW+NN8BC839 sX3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=EgczgummaNhPjXxM1mizWwsgShTS8qOJqqRBLaV5ZZI=; b=oQPw/waXcob9U9QM28KjYreqECMop+oMK6szKAtv32vJPFsM26QF4G4ULURqP+5STV wqWbDz7vo39O8B1s4gBHlareHYglg2//6O4qUM+L98TO3+Dzqnc5D+CHC2WuQJOt2m25 rkdf8Vpgsq4K5uGqknGoEgpE9vfNetpSbwmr07wV6b90Y7E/yW3Kj96BaYtt8/YBCHtM liGXSO9oPKBfAYvJNxuwH3ts1uEWUBZnJ7GVQeh7RQXq1UzCraThrYhtr75hbsHDmU8P SUSG0iK40WsCCghMW/w9zKVEfA8NukhsswNDCMj0l+RB7vXRgqko6g+udi1V7yBU5pRj cPzQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z68-v6si4271391pfz.163.2018.07.11.23.19.17; Wed, 11 Jul 2018 23:19:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727063AbeGLG1S (ORCPT + 27 others); Thu, 12 Jul 2018 02:27:18 -0400 Received: from szxga07-in.huawei.com ([45.249.212.35]:38874 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726584AbeGLG1R (ORCPT ); Thu, 12 Jul 2018 02:27:17 -0400 Received: from DGGEMS412-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 9006C525065D2; Thu, 12 Jul 2018 14:19:10 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS412-HUB.china.huawei.com (10.3.19.212) with Microsoft SMTP Server id 14.3.382.0; Thu, 12 Jul 2018 14:19:04 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH v3 4/6] iommu/io-pgtable-arm: add support for non-strict mode Date: Thu, 12 Jul 2018 14:18:30 +0800 Message-ID: <1531376312-2192-5-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> References: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To support the non-strict mode, now we only tlbi and sync for the strict mode. But for the non-leaf case, always follow strict mode. Use the lowest bit of the iova parameter to pass the strict mode: 0, IOMMU_STRICT; 1, IOMMU_NON_STRICT; Treat 0 as IOMMU_STRICT, so that the unmap operation can compatible with other IOMMUs which still use strict mode. Signed-off-by: Zhen Lei --- drivers/iommu/io-pgtable-arm.c | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c index 010a254..9234db3 100644 --- a/drivers/iommu/io-pgtable-arm.c +++ b/drivers/iommu/io-pgtable-arm.c @@ -292,7 +292,7 @@ static void __arm_lpae_set_pte(arm_lpae_iopte *ptep, arm_lpae_iopte pte, static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, unsigned long iova, size_t size, int lvl, - arm_lpae_iopte *ptep); + arm_lpae_iopte *ptep, int strict); static void __arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, phys_addr_t paddr, arm_lpae_iopte prot, @@ -334,7 +334,7 @@ static int arm_lpae_init_pte(struct arm_lpae_io_pgtable *data, size_t sz = ARM_LPAE_BLOCK_SIZE(lvl, data); tblp = ptep - ARM_LPAE_LVL_IDX(iova, lvl, data); - if (WARN_ON(__arm_lpae_unmap(data, iova, sz, lvl, tblp) != sz)) + if (WARN_ON(__arm_lpae_unmap(data, iova, sz, lvl, tblp, IOMMU_STRICT) != sz)) return -EINVAL; } @@ -531,7 +531,7 @@ static void arm_lpae_free_pgtable(struct io_pgtable *iop) static size_t arm_lpae_split_blk_unmap(struct arm_lpae_io_pgtable *data, unsigned long iova, size_t size, arm_lpae_iopte blk_pte, int lvl, - arm_lpae_iopte *ptep) + arm_lpae_iopte *ptep, int strict) { struct io_pgtable_cfg *cfg = &data->iop.cfg; arm_lpae_iopte pte, *tablep; @@ -576,15 +576,18 @@ static size_t arm_lpae_split_blk_unmap(struct arm_lpae_io_pgtable *data, } if (unmap_idx < 0) - return __arm_lpae_unmap(data, iova, size, lvl, tablep); + return __arm_lpae_unmap(data, iova, size, lvl, tablep, strict); io_pgtable_tlb_add_flush(&data->iop, iova, size, size, true); + if (!strict) + io_pgtable_tlb_sync(&data->iop); + return size; } static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, unsigned long iova, size_t size, int lvl, - arm_lpae_iopte *ptep) + arm_lpae_iopte *ptep, int strict) { arm_lpae_iopte pte; struct io_pgtable *iop = &data->iop; @@ -609,7 +612,7 @@ static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, io_pgtable_tlb_sync(iop); ptep = iopte_deref(pte, data); __arm_lpae_free_pgtable(data, lvl + 1, ptep); - } else { + } else if (strict) { io_pgtable_tlb_add_flush(iop, iova, size, size, true); } @@ -620,25 +623,27 @@ static size_t __arm_lpae_unmap(struct arm_lpae_io_pgtable *data, * minus the part we want to unmap */ return arm_lpae_split_blk_unmap(data, iova, size, pte, - lvl + 1, ptep); + lvl + 1, ptep, strict); } /* Keep on walkin' */ ptep = iopte_deref(pte, data); - return __arm_lpae_unmap(data, iova, size, lvl + 1, ptep); + return __arm_lpae_unmap(data, iova, size, lvl + 1, ptep, strict); } static size_t arm_lpae_unmap(struct io_pgtable_ops *ops, unsigned long iova, size_t size) { + int strict = ((iova & IOMMU_STRICT_MODE_MASK) == IOMMU_STRICT); struct arm_lpae_io_pgtable *data = io_pgtable_ops_to_data(ops); arm_lpae_iopte *ptep = data->pgd; int lvl = ARM_LPAE_START_LVL(data); + iova &= ~IOMMU_STRICT_MODE_MASK; if (WARN_ON(iova >= (1ULL << data->iop.cfg.ias))) return 0; - return __arm_lpae_unmap(data, iova, size, lvl, ptep); + return __arm_lpae_unmap(data, iova, size, lvl, ptep, strict); } static phys_addr_t arm_lpae_iova_to_phys(struct io_pgtable_ops *ops, From patchwork Thu Jul 12 06:18:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 141785 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp1131900ljj; Wed, 11 Jul 2018 23:19:19 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcsqbnW1uWTkepg912y4PvMv7MApeKJIwUPYEgbCYHuR67f9jvsYwn18rwdDzodBkakXBmL X-Received: by 2002:aa7:88d3:: with SMTP id p19-v6mr992540pfo.160.1531376359680; Wed, 11 Jul 2018 23:19:19 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531376359; cv=none; d=google.com; s=arc-20160816; b=cKZHRPsfPYQu7Roa/rvhPZFjJ3t7Yz9aqfpWG9oh9S4G8fXQ8o3LRdjsdDh4P8mz78 FGVk7t5bjs0oMakUKuYEsHwv2+GMdEj2Wij10xaAvYEHQg4X0hig46Gew5qfK93O51k+ BH7EOFUyHWvfkfFGa/rEBbivoybNhea13wABAMJykTWPz4X2q4GDPmIFDA87jwWtTo1w oO8mNc1rSwbvLPjEaZOr4cyRjm5lfU7Hk39jm0vJjmP34mJ2WWHuTpxxzCPI7sBUfkJk v749I4MyHf0ExYxdbpud33iSC1PFW6y0uq+Jq04BpXlt0D8agPXYeyEWeD8mW+iP5ZyS 6qUw== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id e10-v6si21178286pge.48.2018.07.11.23.19.19; Wed, 11 Jul 2018 23:19:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728250AbeGLG1U (ORCPT + 27 others); Thu, 12 Jul 2018 02:27:20 -0400 Received: from szxga06-in.huawei.com ([45.249.212.32]:48763 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1726584AbeGLG1S (ORCPT ); Thu, 12 Jul 2018 02:27:18 -0400 Received: from DGGEMS402-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 8D210874C7C9A; Thu, 12 Jul 2018 14:19:12 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS402-HUB.china.huawei.com (10.3.19.202) with Microsoft SMTP Server id 14.3.382.0; Thu, 12 Jul 2018 14:19:06 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH v3 5/6] iommu/arm-smmu-v3: add support for non-strict mode Date: Thu, 12 Jul 2018 14:18:31 +0800 Message-ID: <1531376312-2192-6-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> References: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org 1. Add IOMMU_CAP_NON_STRICT capability. 2. Dynamic choose strict or non-strict mode base on the iommu domain type. Signed-off-by: Zhen Lei --- drivers/iommu/arm-smmu-v3.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) -- 1.8.3 diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 4402187..4a198a0 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -1440,6 +1440,8 @@ static bool arm_smmu_capable(enum iommu_cap cap) return true; case IOMMU_CAP_NOEXEC: return true; + case IOMMU_CAP_NON_STRICT: + return true; default: return false; } @@ -1767,7 +1769,7 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova, if (!ops) return 0; - return ops->unmap(ops, iova, size); + return ops->unmap(ops, iova | IOMMU_DOMAIN_STRICT_MODE(domain), size); } static void arm_smmu_flush_iotlb_all(struct iommu_domain *domain) @@ -1782,7 +1784,7 @@ static void arm_smmu_iotlb_sync(struct iommu_domain *domain) { struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; - if (smmu) + if (smmu && (IOMMU_DOMAIN_STRICT_MODE(domain) == IOMMU_STRICT)) __arm_smmu_tlb_sync(smmu); } From patchwork Thu Jul 12 06:18:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Leizhen \(ThunderTown\)" X-Patchwork-Id: 141789 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp1132092ljj; Wed, 11 Jul 2018 23:19:33 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcy4bdOb2KYr6xfY7i7oGZS8Dnmy8I63j/jgaAXGIdpnW2I7h8IvxLv0MvVnJuBxFWsF4t6 X-Received: by 2002:a17:902:8541:: with SMTP id d1-v6mr908227plo.81.1531376373314; Wed, 11 Jul 2018 23:19:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531376373; cv=none; d=google.com; s=arc-20160816; b=UGeifi9VxOykY8MLmpeG2HGWl5pt2oxB9gJ5HnztYwPyeCDNr3MTO+TNC2XCSeu0Ne g7H5ULPAfPZD7axFFe8DfxCcauu4RK/J4uc4HUY+pO+s8kkeLn0f7a3cVny3ly0vdOsV f7xQechu9BhqNH3+xz1RQbIKUvaBHpNNHDzkj9vdwuMjX0fY5etBLJNogXut0SumoQkY BOkQ/nF3XtPDEK6wX1FQs1hI4Qp4Rh9UXaxQyLNH5OYcHOklg//enxiqnbYcjci48lki 350CQ1OvnupC5VoKB7Q5mz/1XNjR60SBzxzRuQdzxQPcRPK+TiRad+3NxAMd/VfOqsvk uyVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:arc-authentication-results; bh=iajp0XZqi3J8ihp9dsR987Kg2T7NautWR9C3S4c+B6A=; b=UvS36uxgCdu/Phc2zjQnssrUlwa9LUbUAw5zmsJFSOG0H3jVH28cYCwLjhNdk0lmzM d88JRbwWfHeD8Xj+A2x+x0iqsgkzeZWzoDrldCrPTOqAQBHPivcYGa87WIHFzkEII83r I45Joo27gYGK5ZQTSilX7NCyFP8d3458FBsIUdj+20KaHASVbFryaVmWn3bOcshTccUT 111VkGhYTqdIv+sKOvK/zvtHtWCeukiRjj9b0QZrFK3d6k27v7P3ZTCmkEY4qXho8e0J AVWGtWBpi2iN9laRyDk+LnB5035+UbBXa8Rw+a3sH25yTkds15m255wafJpsfDukJFmy gDSA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id x11-v6si8521579pgv.669.2018.07.11.23.19.33; Wed, 11 Jul 2018 23:19:33 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732425AbeGLG1e (ORCPT + 27 others); Thu, 12 Jul 2018 02:27:34 -0400 Received: from szxga05-in.huawei.com ([45.249.212.191]:9223 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1732191AbeGLG1d (ORCPT ); Thu, 12 Jul 2018 02:27:33 -0400 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id 7AB07ACFC0DCF; Thu, 12 Jul 2018 14:19:15 +0800 (CST) Received: from localhost (10.177.23.164) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.382.0; Thu, 12 Jul 2018 14:19:07 +0800 From: Zhen Lei To: Jean-Philippe Brucker , Robin Murphy , Will Deacon , Joerg Roedel , linux-arm-kernel , iommu , linux-kernel CC: Zhen Lei Subject: [PATCH v3 6/6] iommu/arm-smmu-v3: add bootup option "iommu_strict_mode" Date: Thu, 12 Jul 2018 14:18:32 +0800 Message-ID: <1531376312-2192-7-git-send-email-thunder.leizhen@huawei.com> X-Mailer: git-send-email 1.9.5.msysgit.0 In-Reply-To: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> References: <1531376312-2192-1-git-send-email-thunder.leizhen@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.177.23.164] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Because the non-strict mode introduces a vulnerability window, so add a bootup option to make the manager can choose which mode to be used. The default mode is IOMMU_STRICT. Signed-off-by: Zhen Lei --- Documentation/admin-guide/kernel-parameters.txt | 12 ++++++++++ drivers/iommu/arm-smmu-v3.c | 32 ++++++++++++++++++++++--- 2 files changed, 41 insertions(+), 3 deletions(-) -- 1.8.3 diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index efc7aa7..0cc80bc 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -1720,6 +1720,18 @@ nobypass [PPC/POWERNV] Disable IOMMU bypass, using IOMMU for PCI devices. + iommu_strict_mode= [arm-smmu-v3] + 0 - strict mode + Make sure all related TLBs to be invalidated before the + memory released. + 1 - non-strict mode + Put off TLBs invalidation and release memory first. This mode + introduces a vlunerability window, an untrusted device can + access the reused memory because the TLBs may still valid. + Please take full consideration before choosing this mode. + Note that, VFIO is always use strict mode. + others - strict mode + iommu.passthrough= [ARM64] Configure DMA to bypass the IOMMU by default. Format: { "0" | "1" } diff --git a/drivers/iommu/arm-smmu-v3.c b/drivers/iommu/arm-smmu-v3.c index 4a198a0..9b72fc4 100644 --- a/drivers/iommu/arm-smmu-v3.c +++ b/drivers/iommu/arm-smmu-v3.c @@ -631,6 +631,24 @@ struct arm_smmu_option_prop { { 0, NULL}, }; +static u32 iommu_strict_mode __read_mostly = IOMMU_STRICT; + +static int __init setup_iommu_strict_mode(char *str) +{ + u32 strict_mode = IOMMU_STRICT; + + get_option(&str, &strict_mode); + if (strict_mode == IOMMU_NON_STRICT) { + iommu_strict_mode = strict_mode; + pr_warn("WARNING: iommu non-strict mode is chose.\n" + "It's good for scatter-gather performance but lacks full isolation\n"); + add_taint(TAINT_WARN, LOCKDEP_STILL_OK); + } + + return 0; +} +early_param("iommu_strict_mode", setup_iommu_strict_mode); + static inline void __iomem *arm_smmu_page1_fixup(unsigned long offset, struct arm_smmu_device *smmu) { @@ -1441,7 +1459,7 @@ static bool arm_smmu_capable(enum iommu_cap cap) case IOMMU_CAP_NOEXEC: return true; case IOMMU_CAP_NON_STRICT: - return true; + return (iommu_strict_mode == IOMMU_NON_STRICT) ? true : false; default: return false; } @@ -1750,6 +1768,14 @@ static int arm_smmu_attach_dev(struct iommu_domain *domain, struct device *dev) return ret; } +static u32 arm_smmu_strict_mode(struct iommu_domain *domain) +{ + if (iommu_strict_mode == IOMMU_NON_STRICT) + return IOMMU_DOMAIN_STRICT_MODE(domain); + + return IOMMU_STRICT; +} + static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova, phys_addr_t paddr, size_t size, int prot) { @@ -1769,7 +1795,7 @@ static int arm_smmu_map(struct iommu_domain *domain, unsigned long iova, if (!ops) return 0; - return ops->unmap(ops, iova | IOMMU_DOMAIN_STRICT_MODE(domain), size); + return ops->unmap(ops, iova | arm_smmu_strict_mode(domain), size); } static void arm_smmu_flush_iotlb_all(struct iommu_domain *domain) @@ -1784,7 +1810,7 @@ static void arm_smmu_iotlb_sync(struct iommu_domain *domain) { struct arm_smmu_device *smmu = to_smmu_domain(domain)->smmu; - if (smmu && (IOMMU_DOMAIN_STRICT_MODE(domain) == IOMMU_STRICT)) + if (smmu && (arm_smmu_strict_mode(domain) == IOMMU_STRICT)) __arm_smmu_tlb_sync(smmu); }