From patchwork Fri Jul 13 11:15:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 141860 Delivered-To: patches@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp670423ljj; Fri, 13 Jul 2018 04:15:30 -0700 (PDT) X-Received: by 2002:a2e:5012:: with SMTP id e18-v6mr3184306ljb.22.1531480529981; Fri, 13 Jul 2018 04:15:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531480529; cv=none; d=google.com; s=arc-20160816; b=p8Vkl3BXbry7xNC4fEI0tXAknGz6YvcueYUrL0Yq/OBnr0sXY7Rga7bOdL+rdFLIjx nzELGwVHPrsEARts/MADe60og3yi++yr7gHJTGT/YVJQrU8r7jFDqAnSCrxBAocidXKd 9INXYV3WRGsmNC3PVUEh8BONgqSuA+Z9WiLej11GeNpbbgMJLG/HMR/KAGFW53SMeoed QtLyr9d2GQAu+u2XvdPXruYrmdAj1vGTnmb6dWJ21Wn+EZHryYD9AavJ5o3WuBd2dT+l pdeGvtT/J2nKW/2AUKXPVx0atn+UXI6BZOBmmxOHHvIRHoIOgzMIMBJ2hyUnCx5ZGfF2 n86w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=VAlUea/V9j/QpitQ88UMHhtryy0rOfcfUsXz3WvcdTg=; b=cieEjschdgruey+m13teIVpKGR6ph9kbr7Wb61/4NDUSwfLIheVo0pzPhQes8OA16e MDYaJ9VhYWcXlksaCrlGeIcBWGtG8dUV2bdUd0fC9h0+7Qo07X8zkDgxaSjZKc4sVcN0 VS1HKqCZB+BgI4nU1GHQciGUW6CTe5bln5HOvHyqkcTrGc511M8yTZiHz8euBBoX1TPJ z4Q/zg6mmlbLoDXHhYyDsNSL0C5Bo204qtflPuUwuU2v5qEAoDJwKZF968nypVMp32q/ FSGRFvQ6lwriGLX9DAaIHQBzcyiRj3a15bYvQhTc2PjCu9CRQTXQIwJ+aQugI4CHD9HP wGqA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iuNnHGJW; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id q14-v6sor1637051lfi.74.2018.07.13.04.15.29 for (Google Transport Security); Fri, 13 Jul 2018 04:15:29 -0700 (PDT) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iuNnHGJW; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=VAlUea/V9j/QpitQ88UMHhtryy0rOfcfUsXz3WvcdTg=; b=iuNnHGJWimBBpwfzh/1lZyzr7TtAaa7ceOnirAsNGQhC2UCCKO/5Fmvr6xVqDNjpnN KzFjXe+jZIMDD/O/AbfqJkLlijVXaAVGWqp8LrDXIwnEoCjJtbbEd9ZQrXyHUALQXmhw 3A8jTN43pliMGXJRCAXI7FdZ7S0bDry+ejDhQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=VAlUea/V9j/QpitQ88UMHhtryy0rOfcfUsXz3WvcdTg=; b=ZSgSTWZJY703ZMKTqzP/9HfeovJZWZfIemod/RYZtChUeUcgU6xooB67bdko7bZbGP /AnDX+apE4ExxWoBs4YsX3vO6p6PGA6CfTBvF4u3X/mNRfLS5LaXl+MLXdG2Fyvc3Ojt wCmoqoRP09f2v9rJCKDwK8DApy2ZJ99h0m2vdUWh6E+/83i/CLzOEtv25Cnd9AAQ5JSg IfzwJUjulJiNxMeYI+YDy23PITIBjaRWyk3bzNu6S8Q3k9YO7M8q+uQiJiaVMOoefp1X IidtsIximvOy1Rzgm14CqdOXDMYigawyyrhsY8waMjL/Ra4pVQ4bTX3wIOrJP0OI386C U1qw== X-Gm-Message-State: AOUpUlG/qkWXemlcxAUD5bb7KigrFAz3BeUC8BR8u/lkbApaUUFsYspg yGFllObpCLeLrDEiBo+5AePkpAjJ X-Google-Smtp-Source: AAOMgpesFX26YsuH+N5Sajs2hSWWfgKd8gvW+OYT1u9NEZxu+SPVy9e4q7EaER8Ac5W+6y56HmJc0g== X-Received: by 2002:a19:de4e:: with SMTP id v75-v6mr4497502lfg.14.1531480529498; Fri, 13 Jul 2018 04:15:29 -0700 (PDT) Return-Path: Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id u20-v6sm6788784lfk.91.2018.07.13.04.15.28 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Jul 2018 04:15:28 -0700 (PDT) From: Ulf Hansson To: linux-mmc@vger.kernel.org, Ulf Hansson , Ludovic Barre Cc: Russell King , Linus Walleij , Srinivas Kandagatla Subject: [PATCH 1/2] mmc: mmci: Initial support to manage variant specific callbacks Date: Fri, 13 Jul 2018 13:15:23 +0200 Message-Id: <20180713111523.25962-1-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 To be able to better support different mmci variants, we need to be able to use variant specific callbacks, rather than continue to sprinkle the code with additional variant data. To move in this direction, let's add an optional ->init() callback to the variant data struct, which variants shall use to assign the mmci_host_ops pointer. Using an ->init() callback enables us to partition the code between different files. To allow separate mmci variant files to implement the variant specifics, let's also move the definition of the struct variant_data to the common mmci header file. Signed-off-by: Ulf Hansson --- drivers/mmc/host/mmci.c | 75 ++------------------------------------ drivers/mmc/host/mmci.h | 80 ++++++++++++++++++++++++++++++++++++++++- 2 files changed, 82 insertions(+), 73 deletions(-) -- 2.17.1 Reviewed-by: Ludovic Barre Acked-by: Linus Walleij diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index f1849775e47e..e907a0a866da 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -48,78 +48,6 @@ static unsigned int fmax = 515633; -/** - * struct variant_data - MMCI variant-specific quirks - * @clkreg: default value for MCICLOCK register - * @clkreg_enable: enable value for MMCICLOCK register - * @clkreg_8bit_bus_enable: enable value for 8 bit bus - * @clkreg_neg_edge_enable: enable value for inverted data/cmd output - * @datalength_bits: number of bits in the MMCIDATALENGTH register - * @fifosize: number of bytes that can be written when MMCI_TXFIFOEMPTY - * is asserted (likewise for RX) - * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY - * is asserted (likewise for RX) - * @data_cmd_enable: enable value for data commands. - * @st_sdio: enable ST specific SDIO logic - * @st_clkdiv: true if using a ST-specific clock divider algorithm - * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. - * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register - * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl - * register - * @datactrl_mask_sdio: SDIO enable mask in datactrl register - * @pwrreg_powerup: power up value for MMCIPOWER register - * @f_max: maximum clk frequency supported by the controller. - * @signal_direction: input/out direction of bus signals can be indicated - * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock - * @busy_detect: true if the variant supports busy detection on DAT0. - * @busy_dpsm_flag: bitmask enabling busy detection in the DPSM - * @busy_detect_flag: bitmask identifying the bit in the MMCISTATUS register - * indicating that the card is busy - * @busy_detect_mask: bitmask identifying the bit in the MMCIMASK0 to mask for - * getting busy end detection interrupts - * @pwrreg_nopower: bits in MMCIPOWER don't controls ext. power supply - * @explicit_mclk_control: enable explicit mclk control in driver. - * @qcom_fifo: enables qcom specific fifo pio read logic. - * @qcom_dml: enables qcom specific dma glue for dma transfers. - * @reversed_irq_handling: handle data irq before cmd irq. - * @mmcimask1: true if variant have a MMCIMASK1 register. - * @start_err: bitmask identifying the STARTBITERR bit inside MMCISTATUS - * register. - * @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register - */ -struct variant_data { - unsigned int clkreg; - unsigned int clkreg_enable; - unsigned int clkreg_8bit_bus_enable; - unsigned int clkreg_neg_edge_enable; - unsigned int datalength_bits; - unsigned int fifosize; - unsigned int fifohalfsize; - unsigned int data_cmd_enable; - unsigned int datactrl_mask_ddrmode; - unsigned int datactrl_mask_sdio; - bool st_sdio; - bool st_clkdiv; - bool blksz_datactrl16; - bool blksz_datactrl4; - u32 pwrreg_powerup; - u32 f_max; - bool signal_direction; - bool pwrreg_clkgate; - bool busy_detect; - u32 busy_dpsm_flag; - u32 busy_detect_flag; - u32 busy_detect_mask; - bool pwrreg_nopower; - bool explicit_mclk_control; - bool qcom_fifo; - bool qcom_dml; - bool reversed_irq_handling; - bool mmcimask1; - u32 start_err; - u32 opendrain; -}; - static struct variant_data variant_arm = { .fifosize = 16 * 4, .fifohalfsize = 8 * 4, @@ -1706,6 +1634,9 @@ static int mmci_probe(struct amba_device *dev, goto clk_disable; } + if (variant->init) + variant->init(host); + /* * The ARM and ST versions of the block have slightly different * clock divider equations which means that the minimum divider diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index f91cdf7f6dae..f2eff0cc6934 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -195,8 +195,85 @@ #define MMCI_PINCTRL_STATE_OPENDRAIN "opendrain" struct clk; -struct variant_data; struct dma_chan; +struct mmci_host; + +/** + * struct variant_data - MMCI variant-specific quirks + * @clkreg: default value for MCICLOCK register + * @clkreg_enable: enable value for MMCICLOCK register + * @clkreg_8bit_bus_enable: enable value for 8 bit bus + * @clkreg_neg_edge_enable: enable value for inverted data/cmd output + * @datalength_bits: number of bits in the MMCIDATALENGTH register + * @fifosize: number of bytes that can be written when MMCI_TXFIFOEMPTY + * is asserted (likewise for RX) + * @fifohalfsize: number of bytes that can be written when MCI_TXFIFOHALFEMPTY + * is asserted (likewise for RX) + * @data_cmd_enable: enable value for data commands. + * @st_sdio: enable ST specific SDIO logic + * @st_clkdiv: true if using a ST-specific clock divider algorithm + * @datactrl_mask_ddrmode: ddr mode mask in datactrl register. + * @blksz_datactrl16: true if Block size is at b16..b30 position in datactrl register + * @blksz_datactrl4: true if Block size is at b4..b16 position in datactrl + * register + * @datactrl_mask_sdio: SDIO enable mask in datactrl register + * @pwrreg_powerup: power up value for MMCIPOWER register + * @f_max: maximum clk frequency supported by the controller. + * @signal_direction: input/out direction of bus signals can be indicated + * @pwrreg_clkgate: MMCIPOWER register must be used to gate the clock + * @busy_detect: true if the variant supports busy detection on DAT0. + * @busy_dpsm_flag: bitmask enabling busy detection in the DPSM + * @busy_detect_flag: bitmask identifying the bit in the MMCISTATUS register + * indicating that the card is busy + * @busy_detect_mask: bitmask identifying the bit in the MMCIMASK0 to mask for + * getting busy end detection interrupts + * @pwrreg_nopower: bits in MMCIPOWER don't controls ext. power supply + * @explicit_mclk_control: enable explicit mclk control in driver. + * @qcom_fifo: enables qcom specific fifo pio read logic. + * @qcom_dml: enables qcom specific dma glue for dma transfers. + * @reversed_irq_handling: handle data irq before cmd irq. + * @mmcimask1: true if variant have a MMCIMASK1 register. + * @start_err: bitmask identifying the STARTBITERR bit inside MMCISTATUS + * register. + * @opendrain: bitmask identifying the OPENDRAIN bit inside MMCIPOWER register + */ +struct variant_data { + unsigned int clkreg; + unsigned int clkreg_enable; + unsigned int clkreg_8bit_bus_enable; + unsigned int clkreg_neg_edge_enable; + unsigned int datalength_bits; + unsigned int fifosize; + unsigned int fifohalfsize; + unsigned int data_cmd_enable; + unsigned int datactrl_mask_ddrmode; + unsigned int datactrl_mask_sdio; + bool st_sdio; + bool st_clkdiv; + bool blksz_datactrl16; + bool blksz_datactrl4; + u32 pwrreg_powerup; + u32 f_max; + bool signal_direction; + bool pwrreg_clkgate; + bool busy_detect; + u32 busy_dpsm_flag; + u32 busy_detect_flag; + u32 busy_detect_mask; + bool pwrreg_nopower; + bool explicit_mclk_control; + bool qcom_fifo; + bool qcom_dml; + bool reversed_irq_handling; + bool mmcimask1; + u32 start_err; + u32 opendrain; + void (*init)(struct mmci_host *host); +}; + +/* mmci variant callbacks */ +struct mmci_host_ops { +}; struct mmci_host_next { struct dma_async_tx_descriptor *dma_desc; @@ -228,6 +305,7 @@ struct mmci_host { u32 mask1_reg; bool vqmmc_enabled; struct mmci_platform_data *plat; + struct mmci_host_ops *ops; struct variant_data *variant; struct pinctrl *pinctrl; struct pinctrl_state *pins_default; From patchwork Fri Jul 13 11:15:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 141861 Delivered-To: patches@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp670583ljj; Fri, 13 Jul 2018 04:15:39 -0700 (PDT) X-Received: by 2002:a2e:5759:: with SMTP id r25-v6mr2906377ljd.125.1531480539859; Fri, 13 Jul 2018 04:15:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1531480539; cv=none; d=google.com; s=arc-20160816; b=zDB4KaNaUMQmZEQTfANBqk04QqxLdLl5jKgToyC/gCYvPNyJwV/A8LBEpTY6g4CTAc BG9rbrJ8vIDP6ojkCT05CdSx7oN+pF3TkFhvGCdNZ7LIL6P9YqELdMdO2JHNnQB+5DVi qR0ADN/HI3at/nP+v5G3pzKUHxdVUsyzuvieTA6+j5ACRk3PiEZ/4jkrEMvXZD4skM2B m0zMlSnSvfs/7kfKghjtiNmnTv5JswloNOXoVFEYG8agtxzA/+ii+zVrsCMlI+L7xmQ+ k4bCR8HDOPikgfAhvldlFixA6h0zHP3VxUe2rrcCiMpVaKNmByf+ezEk0j4o4a0a5y9G HHfQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=aJGs2qdWzocNzT6BPKYJJ2cJ0MZ809mN2OzN3sHLuVY=; b=naMq/FqJH9QGg1XR2XMnmtnc/Fw08mR4VxlJR+YaG6IFbpnOZx7F/gcn3Wh804Acd/ Af3yJaNZaisxjgK5VVoTUtdrW5o6DrTdX1iG0ndqC0mrhgPPL6lbS9YZxnu34ESiJ9de Eko9RUVmNMOjwZ32zQpYIYTxnEX/HP8flc52rEARaW48szIO2XTU83Mx9JJ3F5rMN7hi OGRAldg9EWWhwWAmWu0rRy0R9LjjAOzDR0fMees/+YRZe0H/c5uAb48/xXQRqn6eVyrB JvchGKGSiHate3X3MD2l8arRcA6OaOqQcREctrf7nzgiTo0Vqhh4eYRQFlheGgTa75QG YCSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bfTwYtCb; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id q8-v6sor3564079lji.40.2018.07.13.04.15.39 for (Google Transport Security); Fri, 13 Jul 2018 04:15:39 -0700 (PDT) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bfTwYtCb; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id; bh=aJGs2qdWzocNzT6BPKYJJ2cJ0MZ809mN2OzN3sHLuVY=; b=bfTwYtCbdaQQ7m6ku2aZ62J8mdsqSxQTaoQaeNKUPC3bdKlNXQEqr6TGqWbHeD+vkx P+Jv0y07+GZ03fa0CcKkPK10iiZQ/EaTCuCywd+Sz3VL39p2Qpb54gK/+1gYYuwEcEpS upl1cnuHOThnR0Oo4TqDJIICm+gLs5G6Bo+f0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=aJGs2qdWzocNzT6BPKYJJ2cJ0MZ809mN2OzN3sHLuVY=; b=f5CCdPO6F1i79PXOWZXiEts96GheLxa5kYcBAIbHacjAm2dbUQmRGFtfSZ5HdrTGyQ pPZxPtHwsysmdDmkGkVb4F1JPeSZ+AoqYHlOPJTwgX3VzAt3Zo3eqxs9vJgspgXS1U1H K8/s+go5QbVpo+y6xN5Wft36bWNHLThtw/Uk5lvkYX332PTBMMzT7QvJfKtsZtSG9atb 7H3BFK7mK4lU0Z1YfhLIimkEvQid+uhv/4l/JApKwwMCKLDm7290mavLyZ34mdMsxvQC 9G+mabS1uxPPnfv8HFiN2VdYMPp0xKnRKU5t6dzR0C4IeFCxMnCvtZg8gQeYKvWjxc6Z ygDw== X-Gm-Message-State: AOUpUlHvoR7ijeKu4Vyo0cxDs8g7UtipRr7ohgWoL/9ZNVAOpaPSt8AM /toDaRF9z27MHp9Gri7/j3gRW6bk X-Google-Smtp-Source: AAOMgpdPsNOs7BAcaL5xvjAOPi7DPMwSBf/r/i5VRZZty01TGNJFevR0VuJKfFBFqECOeNjZ/Rqovw== X-Received: by 2002:a2e:63c5:: with SMTP id s66-v6mr3314062lje.23.1531480539598; Fri, 13 Jul 2018 04:15:39 -0700 (PDT) Return-Path: Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id q72-v6sm541290lja.6.2018.07.13.04.15.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 13 Jul 2018 04:15:38 -0700 (PDT) From: Ulf Hansson To: linux-mmc@vger.kernel.org, Ulf Hansson , Ludovic Barre Cc: Russell King , Linus Walleij , Srinivas Kandagatla Subject: [PATCH 2/2] mmc: mmci: Add and implement a ->dma_setup() callback for qcom dml Date: Fri, 13 Jul 2018 13:15:36 +0200 Message-Id: <20180713111536.26013-1-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 As a first step to improve the variant specific code for mmci, add a ->dma_setup() callback to the struct mmci_host_ops. To show its use, let's deploy the callback for the qcom dml, which involves also to the assign the mmci_host_ops pointer from the variant ->init() callback. Signed-off-by: Ulf Hansson --- These two patches came out of a diuscussion with Ludovic, who are trying to add support for a new ST variant. I consider this as potentiall being the first steps of how we could move forward to better support variants. If we think this makes sense, a third step is to figure out if for example, mmci_dma_setup(), should be turned into a library function, which means the qcom dml ->dma_setup() callback should call it, rather than the opposite as of now. --- drivers/mmc/host/mmci.c | 6 ++---- drivers/mmc/host/mmci.h | 1 + drivers/mmc/host/mmci_qcom_dml.c | 18 ++++++++++++++---- drivers/mmc/host/mmci_qcom_dml.h | 5 ++--- 4 files changed, 19 insertions(+), 11 deletions(-) -- 2.17.1 diff --git a/drivers/mmc/host/mmci.c b/drivers/mmc/host/mmci.c index e907a0a866da..e3e8b2336cf2 100644 --- a/drivers/mmc/host/mmci.c +++ b/drivers/mmc/host/mmci.c @@ -417,7 +417,6 @@ static void mmci_init_sg(struct mmci_host *host, struct mmc_data *data) static void mmci_dma_setup(struct mmci_host *host) { const char *rxname, *txname; - struct variant_data *variant = host->variant; host->dma_rx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "rx"); host->dma_tx_channel = dma_request_slave_channel(mmc_dev(host->mmc), "tx"); @@ -465,9 +464,8 @@ static void mmci_dma_setup(struct mmci_host *host) host->mmc->max_seg_size = max_seg_size; } - if (variant->qcom_dml && host->dma_rx_channel && host->dma_tx_channel) - if (dml_hw_init(host, host->mmc->parent->of_node)) - variant->qcom_dml = false; + if (host->ops && host->ops->setup_dma) + host->ops->setup_dma(host); } /* diff --git a/drivers/mmc/host/mmci.h b/drivers/mmc/host/mmci.h index f2eff0cc6934..634ef65cd881 100644 --- a/drivers/mmc/host/mmci.h +++ b/drivers/mmc/host/mmci.h @@ -273,6 +273,7 @@ struct variant_data { /* mmci variant callbacks */ struct mmci_host_ops { + void (*setup_dma)(struct mmci_host *host); }; struct mmci_host_next { diff --git a/drivers/mmc/host/mmci_qcom_dml.c b/drivers/mmc/host/mmci_qcom_dml.c index 00750c9d3514..d8059ce1a17c 100644 --- a/drivers/mmc/host/mmci_qcom_dml.c +++ b/drivers/mmc/host/mmci_qcom_dml.c @@ -119,17 +119,20 @@ static int of_get_dml_pipe_index(struct device_node *np, const char *name) } /* Initialize the dml hardware connected to SD Card controller */ -int dml_hw_init(struct mmci_host *host, struct device_node *np) +static void qcom_dma_setup(struct mmci_host *host) { u32 config; void __iomem *base; int consumer_id, producer_id; + struct device_node *np = host->mmc->parent->of_node; consumer_id = of_get_dml_pipe_index(np, "tx"); producer_id = of_get_dml_pipe_index(np, "rx"); - if (producer_id < 0 || consumer_id < 0) - return -ENODEV; + if (producer_id < 0 || consumer_id < 0) { + variant->qcom_dml = false; + return; + } base = host->base + DML_OFFSET; @@ -172,6 +175,13 @@ int dml_hw_init(struct mmci_host *host, struct device_node *np) /* Make sure dml initialization is finished */ mb(); +} - return 0; +static const struct mmci_host_ops qcom_variant_ops = { + .dma_setup = qcom_dma_setup, +}; + +void qcom_variant_init(struct mmci_host *host) +{ + host->ops = qcom_variant_ops; } diff --git a/drivers/mmc/host/mmci_qcom_dml.h b/drivers/mmc/host/mmci_qcom_dml.h index 6e405d09d534..fa16f6f4d4ad 100644 --- a/drivers/mmc/host/mmci_qcom_dml.h +++ b/drivers/mmc/host/mmci_qcom_dml.h @@ -16,12 +16,11 @@ #define __MMC_QCOM_DML_H__ #ifdef CONFIG_MMC_QCOM_DML -int dml_hw_init(struct mmci_host *host, struct device_node *np); +void qcom_variant_init(struct mmci_host *host); void dml_start_xfer(struct mmci_host *host, struct mmc_data *data); #else -static inline int dml_hw_init(struct mmci_host *host, struct device_node *np) +static inline void qcom_variant_init(struct mmci_host *host) { - return -ENOSYS; } static inline void dml_start_xfer(struct mmci_host *host, struct mmc_data *data) {