From patchwork Wed Jun 2 12:03:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 452814 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id AEEF1C47093 for ; Wed, 2 Jun 2021 12:04:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 96C7B61361 for ; Wed, 2 Jun 2021 12:04:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229665AbhFBMFu (ORCPT ); Wed, 2 Jun 2021 08:05:50 -0400 Received: from mout.gmx.net ([212.227.17.20]:40551 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229620AbhFBMFt (ORCPT ); Wed, 2 Jun 2021 08:05:49 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1622635441; bh=UF4oW0j3C0UfuvEjFkldudNhDCIgYlLwBeW1fCc59U8=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=Vu/c0Q1jEq9mvmdEVuB62V2tyhqqTqPiKlmAAqFoqUsVPcRgeb0COHeJf7Z/x7wlJ LkysuI2THlyzWOR/wxIZZkwtkjOkOvbaBGFiw2DzGTs2WlpbWkNhyaMxlDkLvGfhfn +/mXK2U2WOam9hcuyzG6Vu41ucq6915sbnqdv5Fo= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([37.201.214.247]) by mail.gmx.net (mrgmx104 [212.227.17.168]) with ESMTPSA (Nemesis) id 1MmULx-1l6F0r39px-00iTnv; Wed, 02 Jun 2021 14:04:00 +0200 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH 2/8] MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture Date: Wed, 2 Jun 2021 14:03:23 +0200 Message-Id: <20210602120329.2444672-3-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210602120329.2444672-1-j.neuschaefer@gmx.net> References: <20210602120329.2444672-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:pj/CAwCpQfjiqJUIRfxtRexDjyawbqBoG1pzwcUmblWyiF1GJF8 VOkUSCbeMuJ3GvXWqH+/U630vfzhMbRvktMv7XAbWeEFTCIdjw+z9+U4/seMg4zyx8j/Sdb ofHNkyR+Wx7ARPFOgix4UPL0vJzKKhCYBmGs+rI2bfAOeAsFnbZgb7GQ98l/ViUodx/rMnm BobamMkegklHiS3ZbSq/Q== X-UI-Out-Filterresults: notjunk:1; V03:K0:m5wUD4NWZjU=:wJrbsrF1KVy38/aR2Yf5XW Bmpuw7Y9s3OJPT9BnLE/c08gZDRYLo60hnUPUwFrcPu6gdSwtfrsc8KtqMfAgF3hi0qaG4xQx gl9cRVcVGp8BtnZFaFmdHNpWAb0i+PA0Ix4HBM8qfnFUyyoo+wz1iPErSYP9XgubGBj8uX8qe OJIor/UQrccUrqpWw3GfgPRBj38oCrIvkRVsfhAQ0Oe96Zzw5hqOB6l9xpHVpRVCZsJysRotJ f1ZzEZcHmZraJweGkVpjVqfSOzGrOcQV+mFRGsXtGdQqyB/PaQZxzxceLp/g0mUAUVuxUA84a 2FEFj1a9JRr1UMDzLhO32bONaaxolvPivbZrO8uwa2b/sPkXQUh6iZ8Nk6FPQFLg808Epm1+q rdXoqU/vln8wbz2/cDEn3AvpFWgJv81m6TGcGnnfwH94FZq4dDu4602aQQQo+S6u/40LQEWNY /w5nyNDdA9KzpI9UpiCWvJihGn8cODg3bP6bLBE4r+HAfU9MUaeJUlY+Vo3h8E4CsNfIzluMF FuUXmTs2ygZwlQ0/8Pi/kze9DyunXPN+KyV1+vM/LblDsv0eii8mYtNYD3QapWgALL8kVZoXP Xeggv5Z7wqd0OEY9MUv0G2cJZp1u0+Vo3JdR44bgqBToPwfcspkqEgVJfcNY9aOP0jcrKngeY 53Lavzrh1o8yH3EyVkiJMebTfreED58WMm1ejA5x4Cfw2Ltm95Y17JPHlwRBNBL99j4pzTDLC 5dA5btQWbw/txARQ5rsN/rWgyYPxhkdVkj5Upkp9d6AuNRndi2bz6eNjsnJJRSM6CFYJlXT/R m5+9WoHpy/VdREHx7bRIwZaesEpUbNz/hUNk4KPphll/exb5tDuH2WBnKA1Uaz7iWu2gaeRr4 3QsqgVFktlTVzB0fuUifC2gvJ6NIBHpIGv2y3vxHhiVtHwg7a8ufFCawUOXrpskddhR11TbNL fAXh9WoGHkHvIQ3WcfNasgrLa+6OnNRXASZUP6LL21YszhZU35w34pERYP9tfrkOGxTd6dG/W /neDy5Dd1q2AGGSBoHM9PtrTu3oU7lNaKhJb3z7pNzHEerALsp6i9CgdSlTX89xXcNeQ2yuQi lMCRQMogNJlbHLzRh9pf9AVNiSW9rW8kj5TA6Nn2e4IYorQTyA4LchNuA== Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org All files in Documentation/devicetree/bindings/arm/npcm/ belong to the Nuvoton NPCM architecture, even when their names might not spell it out explicitly. Signed-off-by: Jonathan Neuschäfer --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) -- 2.30.2 diff --git a/MAINTAINERS b/MAINTAINERS index 79fb23f576218..288d6a1f2bb1f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2220,6 +2220,7 @@ L: openbmc@lists.ozlabs.org (moderated for non-subscribers) S: Supported F: Documentation/devicetree/bindings/*/*/*npcm* F: Documentation/devicetree/bindings/*/*npcm* +F: Documentation/devicetree/bindings/arm/npcm/* F: arch/arm/boot/dts/nuvoton-npcm* F: arch/arm/mach-npcm/ F: drivers/*/*npcm* From patchwork Wed Jun 2 12:03:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 452813 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 88286C4708F for ; Wed, 2 Jun 2021 12:04:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 72F70613D2 for ; Wed, 2 Jun 2021 12:04:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229791AbhFBMF4 (ORCPT ); Wed, 2 Jun 2021 08:05:56 -0400 Received: from mout.gmx.net ([212.227.15.19]:55387 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229746AbhFBMFz (ORCPT ); Wed, 2 Jun 2021 08:05:55 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1622635447; bh=2ut7fjvCRXp1vUUCh5jcJNV1bWQfWdPByri+EnaApG4=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=XEpTcTJKIpUmN+jRuMfsthO1SugHY9sL+kIJZWtp+JUGmd5BVuB9nqyW9WzrGlKzB jiruRmE73d3tzDqcA68xNJ6S2GSuqrzIFzJcArEYPnKV3/CvbNnChW7guzOSLJlciQ pV+nHz+yVNqQqFaEG9QMWLylQNf8BKOfoF0n38ME= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([37.201.214.247]) by mail.gmx.net (mrgmx004 [212.227.17.190]) with ESMTPSA (Nemesis) id 1M5fIW-1lleRh0AGI-007Eso; Wed, 02 Jun 2021 14:04:07 +0200 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH 4/8] dt-bindings: pinctrl: Add Nuvoton WPCM450 Date: Wed, 2 Jun 2021 14:03:25 +0200 Message-Id: <20210602120329.2444672-5-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210602120329.2444672-1-j.neuschaefer@gmx.net> References: <20210602120329.2444672-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:E6+ZEj70X9yV7fiuKCDzxr1LhJdKjksAzp/xm8VL+BUlNTseNAy okeguoiss3CzSzhZbxUI/g8cehAHeD7BYclX1esdvc/7SzljFeMilw82uESa2irNjwShC6Q +ga7VcY3dY3MetH3iuAhMK8bWENWkzICY+Gglqp5UWPQ1qs5H/lemP4T9TStx+g0Oqy9QPw WhabaSlPxi7wEN+qX+qbw== X-UI-Out-Filterresults: notjunk:1; V03:K0:l4v+Hockw6I=:sOCxMcqqcQryI1ft9be5w1 JYsHx3jlluDR2PiCP7kBlHApH55MTdTHpTgE/+5RrRTb6JVeSL+Jp4pfRzlc7w8IJ1xj1KqGc RyKzrHax0LTh5qyf5qaM9fmwbjk0J1oO1ZnoZO8BdULLZYnZUte6RkifQtos1+qThbpzLpn7e UIQqUiIFRi+QqRUOeRsNuBqKgmZRtDNleM8P9KriRfsdsOJN+BWA0GFvUjdIASn9EAAWvtmjS FauoUBzK1Wh0Y85GC/4uLg7QonpojwChodBI5wW7XzKwMxhj7j5hV3vIoebP8H+S5BL0PzIcP 4lMJO0Lr+XlUGrAiCkjNl4odHDweti/2B56O9T3WV8klgPuaCfc+Q+HCePVKeIREQy7AA6WyX NeA5iTyVYcBcsZ+yRVtd9ZDVIAf5P4MRrxF+dc2bQwRfUNhtef9eDmH44HNid9jNkFE39XWyM 7aJybtk2rc3y/TceTbOIWUHriypazDKwZKP1zigqsguajAzzTGJyM68luKZ9PNXlXHHzfY2Gl sB37k7bMm6RidcaeqyE5IuGvX30ZRs/visWcYp6djR9Ukc5Nltdgn5ToHsihRXZIWZz0PV+zP GhBvTxpwIoQlM18YczB5ZUNsnKGYVqH231qfT/hEsvAGfeuZWd+nhK3cvK0QVvu7BQbjwXcSs MDfMhPSkDaHUzIip+1q5vk/krtu9j32+0rwjkvrL4IagrzcVf7bBYf396cJxZsi2c26sRdbAK Tl6x33itHEJuwNW4iyfwLxrvTaGWUWnzadcwnW7WIsG5IxWqzBn/rLMzrcPM84Xnicb1ZoTJq pxZJ9+2N/bNjxCT8qOvJJMgREOFfCHE+3mffre+XfPnc33wA0yphDsu0pMgFOtuDZlRDFHL6l B+kTUiwfU2pfIaFRn2CUPx6883svpHQxJKoAXLKC6ggyefvjZKw+2UipuppqASeUW0wtYBMOk d5Z8HPxwh0jTQjD6/VHOxEYvHHy4mAkdqKudExmYssz4JjhPIFYtg/k0+trb34FofblfbQWdx mE9wNCNMa3h37GjVSTh1lKdxr5/9lkciOMcq7PYBRwa/0DFDc4siZAfPr5WEfwWDq8Oo0Sl3Z Yh/OnC9cU5KIiBsTASd8G/0i0cLNXwf0t31bYGp9H1ygXMX+TSaGBFKRw== Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This binding is heavily based on the one for NPCM7xx, because the hardware is similar. One notable difference is that there are no sub-nodes for GPIO banks, because the GPIO registers are arranged differently. Certain pins support blink patterns in hardware. This is currently not modelled in the DT binding. Signed-off-by: Jonathan Neuschäfer --- .../pinctrl/nuvoton,wpcm450-pinctrl.yaml | 142 ++++++++++++++++++ 1 file changed, 142 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml -- 2.30.2 diff --git a/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml new file mode 100644 index 0000000000000..0664fe2b90db6 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml @@ -0,0 +1,142 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/nuvoton,wpcm450-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton WPCM450 pin control and GPIO + +maintainers: + - Jonathan Neuschäfer + +properties: + compatible: + const: "nuvoton,wpcm450-pinctrl" + + reg: + maxItems: 1 + + gpio-controller: true + + '#gpio-cells': + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: true + +patternProperties: + # There are two kinds of subnodes: + # 1. a pinmux node configures pin muxing for a group of pins (e.g. rmii2) + # 2. a pinctrl node configures properties of a single pin + "^.*$": + if: + type: object + then: + allOf: + - $ref: pincfg-node.yaml# + - $ref: pinmux-node.yaml# + properties: + groups: + description: + One or more groups of pins to mux to a certain function + minItems: 1 + items: + enum: [ smb3, smb4, smb5, scs1, scs2, scs3, smb0, smb1, smb2, bsp, + hsp1, hsp2, r1err, r1md, rmii2, r2err, r2md, kbcc, dvo, + clko, smi, uinc, gspi, mben, xcs2, xcs1, sdio, sspi, fi0, + fi1, fi2, fi3, fi4, fi5, fi6, fi7, fi8, fi9, fi10, fi11, + fi12, fi13, fi14, fi15, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, + pwm6, pwm7, hg0, hg1, hg2, hg3, hg4, hg5, hg6, hg7 ] + function: + description: + The function that a group of pins is muxed to + enum: [ smb3, smb4, smb5, scs1, scs2, scs3, smb0, smb1, smb2, bsp, + hsp1, hsp2, r1err, r1md, rmii2, r2err, r2md, kbcc, dvo0, + dvo1, dvo2, dvo3, dvo4, dvo5, dvo6, dvo7, clko, smi, uinc, + gspi, mben, xcs2, xcs1, sdio, sspi, fi0, fi1, fi2, fi3, fi4, + fi5, fi6, fi7, fi8, fi9, fi10, fi11, fi12, fi13, fi14, fi15, + pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, pwm6, pwm7, hg0, hg1, + hg2, hg3, hg4, hg5, hg6, hg7 ] + + pins: + description: + A list of pins to configure in certain ways, such as enabling + debouncing + minItems: 1 + items: + enum: [ gpio0, gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7, + gpio8, gpio9, gpio10, gpio11, gpio12, gpio13, gpio14, + gpio15, gpio16, gpio17, gpio18, gpio19, gpio20, gpio21, + gpio22, gpio23, gpio24, gpio25, gpio26, gpio27, gpio28, + gpio29, gpio30, gpio31, gpio32, gpio33, gpio34, gpio35, + gpio36, gpio37, gpio38, gpio39, gpio40, gpio41, gpio42, + gpio43, gpio44, gpio45, gpio46, gpio47, gpio48, gpio49, + gpio50, gpio51, gpio52, gpio53, gpio54, gpio55, gpio56, + gpio57, gpio58, gpio59, gpio60, gpio61, gpio62, gpio63, + gpio64, gpio65, gpio66, gpio67, gpio68, gpio69, gpio70, + gpio71, gpio72, gpio73, gpio74, gpio75, gpio76, gpio77, + gpio78, gpio79, gpio80, gpio81, gpio82, gpio83, gpio84, + gpio85, gpio86, gpio87, gpio88, gpio89, gpio90, gpio91, + gpio92, gpio93, gpio94, gpio95, gpio96, gpio97, gpio98, + gpio99, gpio100, gpio101, gpio102, gpio103, gpio104, + gpio105, gpio106, gpio107, gpio108, gpio109, gpio110, + gpio111, gpio112, gpio113, gpio114, gpio115, gpio116, + gpio117, gpio118, gpio119, gpio120, gpio121, gpio122, + gpio123, gpio124, gpio125, gpio126, gpio127 ] + + input-debounce: true + phandle: true + + dependencies: + groups: [ function ] + function: [ groups ] + + additionalProperties: false + +required: + - compatible + - reg + - gpio-controller + - '#gpio-cells' + +additionalProperties: false + +examples: + - | + #include + #include + pinctrl: pinctrl@b8003000 { + compatible = "nuvoton,wpcm450-pinctrl"; + reg = <0xb8003000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH + 3 IRQ_TYPE_LEVEL_HIGH + 4 IRQ_TYPE_LEVEL_HIGH + 5 IRQ_TYPE_LEVEL_HIGH>; + rmii2 { + groups = "rmii2"; + function = "rmii2"; + }; + + pinctrl_uid: uid { + pins = "gpio14"; + input-debounce = <1>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uid>; + + uid { + label = "UID"; + linux,code = <102>; + gpios = <&pinctrl 14 GPIO_ACTIVE_HIGH>; + }; + }; From patchwork Wed Jun 2 12:03:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 452812 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9C301C47092 for ; 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Wed, 02 Jun 2021 14:04:22 +0200 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH 6/8] ARM: dts: wpcm450: Add pinctrl node Date: Wed, 2 Jun 2021 14:03:27 +0200 Message-Id: <20210602120329.2444672-7-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210602120329.2444672-1-j.neuschaefer@gmx.net> References: <20210602120329.2444672-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:1UGScVg0xqr81vwdwouXKQGzWBRBp3MdBmFKGst0MpYLBkwVMXU 96JQqmvL9cRVL6AAtOZ03z5/vXa+astucPlWv18S2rG2t9avTbU7gWZwpzHbEVJd9T63lyq 0eCfIWnX5M5U8e+kz3WvR913eAOTubj7PRGbraJnB7B4ADf2WMGVsUPKTInMW4qZpQlqK6Z xUiT7J8UTyIljDbNYtdIw== X-UI-Out-Filterresults: notjunk:1; V03:K0:tBgVAy7xyO4=:tWhbERiSrcXlimCpzEEA3+ O49wbDSYAkS4zoDRbCSBpDVIDmKXyjjW0dDPngd0fN4n2gPyRpa5PY6Mo7sOnSiInDEgrUVHu i5DnCKXzEl6tuAyJnP6FfKfe+AKW+8ceT+/7OHKnW6izgMXpZUpjdjk6SYVK7KFEvp4zb1Ctf feax2wljpSEFFnVBdp80sGGIzAojhKgIpBsqK1+F4MXYFSi/h1RNn92YDBXZQSBdxUvIF2NHf SeCF/Op5T1hwQacochuTkC0y6suNF/brCqkYjsA31X7E5C5aaK2IqsQeWTQoJ9tL8hsUz11a8 HMiGgDLXpqgIpo5CT/6ZszXucCxiDSOlxRXnXEBFB6OIn4HlHrJoekLWf+vDbfI248A8NpA4j JKOstoL40Bo62MoMF/bPaIgzL6E3cCHCqP5jsP+Ydxv5hUAmyuKRObq7Q/AGe7Q9bUgIpFERH qfuOC3DyU5cYyPH6hle8eKsVBSEvBfCIgds+4PA5kOrvV1wihQ/jnB/PiRWwctYeo/VcDNj7N ENn5dvJ2alKIH7eoV9mwSUVWoBVylNUVLsS0hRVXQ13SCdkVsbLvgp7lIz+Dl8V0ruY/+3s+z TQnNCPVVsRMGJxN+5LxnnY60zYBszYXz1DTU0hQ+VwUjZkhusUaSKf7FyUttrKC2oueGwldJP pYCbqN/1VBn/DLh0rQNjmlc1h6ccEgBhOtGddhlgl0e4F9NBWRBuhZt9Aw/PgmpcvQGi5mFSn TdsZ68KVAayX750p9QjZlBl1r1q00l+1CZCnHcriCanh94ffqhtifocryg/319HzZigm2KkK7 1mbqn6OoyLGFMESik/19N0fJrnm9YBBGe7fVIQOOCJVbpIw0EEDdHqYBVP/xpisLSphMm2r3p W5eqjCj/3g63S6Lvt6wwbp/l4qhsUNdoSSwgVcEXNBSPTqpGI1Fz2zolMe0BK5ojxDfpRdDBd NWjwOCCaDPZXwq+mWAs6jxlZAVllj8tsu1M0VS9fMZvFh8iHoFBL05LwcXleN2xObcjFcLDdo nIn7pnuYGLn90ROjE2bOw4Q6/QtmEtj5Cv0LBMcUI2q5QcUaRzrBO+W+VzTMhK+3tsQ2RCzve qq9Rlfu7BXtS2MTAvxo/E7kVyK9Ox+fVRKFqXZZej/1hMi6l/SVvr8ReQ== Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This patch adds the GPIO and pin controller to the devicetree for the WPCM450 SoC. Signed-off-by: Jonathan Neuschäfer --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 11 +++++++++++ 1 file changed, 11 insertions(+) -- 2.30.2 diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index 8eba4897b41bc..1b63943b2a42b 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -77,5 +77,16 @@ aic: interrupt-controller@b8002000 { interrupt-controller; #interrupt-cells = <2>; }; + + pinctrl: pinctrl@b8003000 { + compatible = "nuvoton,wpcm450-pinctrl"; + reg = <0xb8003000 0x1000>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH + 3 IRQ_TYPE_LEVEL_HIGH + 4 IRQ_TYPE_LEVEL_HIGH + 5 IRQ_TYPE_LEVEL_HIGH>; + }; }; }; From patchwork Wed Jun 2 12:03:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 452811 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 12430C47092 for ; Wed, 2 Jun 2021 12:04:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DF489613BA for ; Wed, 2 Jun 2021 12:04:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229818AbhFBMGX (ORCPT ); Wed, 2 Jun 2021 08:06:23 -0400 Received: from mout.gmx.net ([212.227.15.19]:34647 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229871AbhFBMGS (ORCPT ); Wed, 2 Jun 2021 08:06:18 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1622635470; bh=P4/CfhOzE9qRlABqP08JDSxbRq009BHSNhR9z95OX2w=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=lgQKeGjRVV6tsRoM8dHKW++3Uf3CpH6WhKM1AT4f1qaapS9x6dn9fS/sg/wZ4uAGJ uLMVc9flkSrAz0qMZHFH06d1wqMUJTfpB52VIXTii3qg4tAEiDLpINRmLQ4t7RN1br BfDrHqc5auxijmpSZYGz0rA7bgQ5NR3HASU5B/iY= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([37.201.214.247]) by mail.gmx.net (mrgmx004 [212.227.17.190]) with ESMTPSA (Nemesis) id 1MFKKh-1ld5st2CCn-00FmqE; Wed, 02 Jun 2021 14:04:30 +0200 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH 8/8] ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons Date: Wed, 2 Jun 2021 14:03:29 +0200 Message-Id: <20210602120329.2444672-9-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210602120329.2444672-1-j.neuschaefer@gmx.net> References: <20210602120329.2444672-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:yAIGTz3cD7aDJ3+2ETP6l+xFmX749yXxCxe42nbjAlS00V6VR85 6vyW3FtqEUrdgJuACoVtyPMbP8wR1VBJCDJVkqP0qa7lv+VasFSyn7CYEUQ0s0kt9YpQw1v 9UPEgaqUuOwvmfl5HpUMHkdFbvMfOxaL6Idqx8PNe9m4Q/wQJblQ2Z5mdqypNAj30FiYW1k oXSMU/CzqHfMiNOum7H/A== X-UI-Out-Filterresults: notjunk:1; V03:K0:CopH+5nNWnI=:noLlRC8oYJ46PYECr24XOz kZcl4CxGxpi/L6w3Jp39hM5bIoo4rAa94qKCWCehQW23sFQdUKGnlsu1eW4blVOOGOIhinxqY eS7kYrTaVFmG5PJGrTZB3w/hxdTHsOsg3uGTDtvCJv9AfmJm/eROAh8Fi3JNkok1tK78HXBpP 4g5tjIHPyvijXFoO8ncloC2kgd3RD2KMHAYp8jr9KDV/7O5A+S9mcYbJIYMiGnQO9D/h3Wq2X XOLIgBVaVzA4d1gEPQQ400EJ2sUjyr5UMRMRJf2ySiOov3jQe+MbixFhu8a7TiWejLW9qVnIV 5pjmBFy0s1zoCPVoAytvlp/BO4MbRQJVsjKEUSb61aUDEqx1YJr47BrDBsvIlFNybYy7CWlQc 6FDdWIPJNco7PabJODHN/Ls6iJZnVlfbcTrBflVeW34fLcDG+Qav119Yn+L5GL8GTdcq9+fqc uc5nKx8vmV3FYfobJnB0fepFGqpKiGHuj5zX69z1WkfB+dWeQjaYL40t5I1ktjEtABx8BVZPy kC5sG83PgMawaPOsKcRrfzskAUmDM6d/wrKCKrEIyIsKNAVYClVNtnNJxiVG2XZXf1t40+K1G X1oTUJxy77uLUF3Bqf6bGFZBkJuk/5b2007gVPMDJWpJX752n3iEmzB3dgDhZSf/brNZoME0H 1fB9uf2lFIKOdS0uaMBfKAAdfjfbyuzS1g2PTuO9+jozDCIyQiMKITo6/81Ryl3RX5JF95x1B BkFQr4wkv7DGmljY8gNbt+xXZZyUcm/zaZPRTGsxfrk7t2d7h6DncJyJfti9TWY6hTkrRZC2t iRBjzr5RaFlHr5aVqP9FOOyudnvblXQOlxnj3JNGT2Z1evaSdrNLCth23ei7OHLLCc+w+aH5Z 6auUkCihSsL4SawvnbWGwi+Gl8wkfbFWlg+Kf8ZFCOGJp4jFPzJMHc+WVdJwHYI4hqsR1lrP9 GDMtz2ZQthNcUVQ1P2T//KOxAeHrFBqGNLQesFynjYe4Lbi+ioKFv1NUj4NLACm+ejkD8enUC D8W4OPUlxFxprmACq0jb7CnngzyKwbtDENuoIE91ey8LMWtgEIi/tY9jj8BfOIR9GQOkCX9eQ 52kA1jtON+8Prtpo64ppNdK6lF5wadOqHbUZktJe2tDFPgRQpdUhE4Lqw== Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Supermicro X9SCi-LN4F server mainboard has a two LEDs and a button under the control of the BMC. This patch makes them accessible under Linux running on the BMC. Signed-off-by: Jonathan Neuschäfer --- .../nuvoton-wpcm450-supermicro-x9sci-ln4f.dts | 27 +++++++++++++++++++ 1 file changed, 27 insertions(+) -- 2.30.2 diff --git a/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts b/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts index 83f27fbf4e939..176e22216a75e 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts +++ b/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts @@ -8,6 +8,9 @@ #include "nuvoton-wpcm450.dtsi" +#include +#include + / { model = "Supermicro X9SCi-LN4F BMC"; compatible = "supermicro,x9sci-ln4f-bmc", "nuvoton,wpcm450"; @@ -20,6 +23,30 @@ memory@0 { device_type = "memory"; reg = <0 0x08000000>; /* 128 MiB */ }; + + gpio-keys { + compatible = "gpio-keys"; + + uid { + label = "UID button"; + linux,code = ; + gpios = <&pinctrl 14 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + + uid { + label = "UID"; + gpios = <&pinctrl 23 GPIO_ACTIVE_HIGH>; + }; + + heartbeat { + label = "heartbeat"; + gpios = <&pinctrl 20 GPIO_ACTIVE_LOW>; + }; + }; }; &serial0 {