From patchwork Fri Jun 4 20:57:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 454171 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp750815jae; Fri, 4 Jun 2021 13:57:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJziipuUyzQE+ePbxRsX4zxklTSFSoMjLc9HTevkHi/nCy0V8fcKe+d6/6SFmALm6c+Ll3kE X-Received: by 2002:a05:6402:311c:: with SMTP id dc28mr6750236edb.291.1622840253196; Fri, 04 Jun 2021 13:57:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622840253; cv=none; d=google.com; s=arc-20160816; b=MyuFZy8mkuIsY0BzFSqkDgt3WvV1c8MVH74Q/07MGwXFwSeNh/pMscdyMan+G1y5rK Xa3uzm5r2Y6Cagc9Na7htvmEBATfJgfQ8n4SIOAnkLnYEW0OEDXVT07DVI6qUvq6peVz K4fVQcqslc5m/s9iWLEkVEk0MqhaCrwEmpPb2+UXoHmvpKzm0vhv+G4fpBtxanm0gzkd N1k//BQjj0I+Tr4csIQ3eMAX8PWst6a5SovxV1o2h5iMzN5Apf6pPvxePa36G1eJRiAw AUpH3u1TbaLF9Zgd9XQEEmSW+rMA1oXxP7OTpYlwtSOYm4rb0ciMCYZg9s0PcVoDuFtD ZOlQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=O2TaGQeY2TCbVCfmhem/hAZbP/bo6axQne6K+adcdKo=; b=oG/dQxVCdIP6ee/0GK+bkzTg8QOuqX/mhZViXG5CmrKlu5aLFaxNMvFqvNylkbek0l gCINSNz/a4G4xKiU7tlnONQVHRGrxOh4SnUQ+p41c67Hwsmx0QYyZco+Hhumf+Efvcrb pB4lHd7i0Q+YOYcl0NjshPLSQ8oY40Jb/vummj1tgP5SL0SlPNl/3yz446Cm7JW+3Gta G7ileN6qzyQb5zT2JsrXbTD6zskQH3KKl5JjBtcPtcjvunFPTHbmkt4rhVKebUYEF7Kd 38cQjzcPxCKbH7zoowPm7JZdFVQ1nRuBo6orJiRE+zGThrw9FT2PxitZEUVNJb9iLdKr tHTA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ho33si4947029ejc.1.2021.06.04.13.57.33; Fri, 04 Jun 2021 13:57:33 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229982AbhFDU7F (ORCPT + 7 others); Fri, 4 Jun 2021 16:59:05 -0400 Received: from foss.arm.com ([217.140.110.172]:48014 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230177AbhFDU7E (ORCPT ); Fri, 4 Jun 2021 16:59:04 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E731412FC; Fri, 4 Jun 2021 13:57:17 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 0BA873F719; Fri, 4 Jun 2021 13:57:16 -0700 (PDT) From: Sudeep Holla To: devicetree@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Rob Herring , Cristian Marussi , Viresh Kumar Subject: [PATCH v3 1/6] dt-bindings: mailbox : arm, mhu: Fix arm, scpi example used here Date: Fri, 4 Jun 2021 21:57:05 +0100 Message-Id: <20210604205710.1944363-2-sudeep.holla@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210604205710.1944363-1-sudeep.holla@arm.com> References: <20210604205710.1944363-1-sudeep.holla@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Once the arm,scpi binding is converted to YAML format, the following errors will be seen when doing `make DT_CHECKER_FLAGS=-m dt_binding_check` >From schema: Documentation/devicetree/bindings/firmware/arm,scpi.yaml Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml: scpi@2f000000: $nodename:0: 'scpi' was expected Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml: scpi@2f000000: reg: [[0, 788529152, 0, 512]] is not of type 'object' Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml: scpi@2f000000: 'shmem' is a required property Fix those error following the SCPI bindings. Cc: Rob Herring Cc: Viresh Kumar Signed-off-by: Sudeep Holla --- Documentation/devicetree/bindings/mailbox/arm,mhu.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml index d07eb00b97c8..496308d91a86 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml @@ -126,9 +126,15 @@ additionalProperties: false clock-names = "apb_pclk"; }; - mhu_client_scpi: scpi@2f000000 { + scpi { compatible = "arm,scpi"; - reg = <0 0x2f000000 0 0x200>; mboxes = <&mhuB 1 4>; /* HP-NonSecure, 5th doorbell */ + shmem = <&cpu_scp_hpri>; /* HP-NonSecure */ + + scpi_devpd: power-controller { + compatible = "arm,scpi-power-domains"; + num-domains = <2>; + #power-domain-cells = <1>; + }; }; }; From patchwork Fri Jun 4 20:57:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 454173 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp750823jae; Fri, 4 Jun 2021 13:57:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJweJdv9RydFl+n/IdysylMLhX+8iPZWWOrghgiYxqe44CCJXDIynNXWcF2ULs77chmW1ILU X-Received: by 2002:a17:906:a3cc:: with SMTP id ca12mr6048212ejb.534.1622840253612; Fri, 04 Jun 2021 13:57:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622840253; cv=none; d=google.com; s=arc-20160816; b=TkHMwie8wCaaRxlTlALThcEXMD/5SaIyjejmokfEiNbae7kE4KUEIWh5B0e5Lr0Qvg ZD4gwyLAWpsJF099H65z+S5QXsnG6edPELzrTa7iV0yvazETmLUKO9TbXSpaQA79c7gC thgRwEGXYY4elDCYc8WgQZyURanev0xsW3NCoLi2rFUL5/pGDxu8JKABRW+6CLPm5NUH ILr8HHreP0mAfGz05brvTAt1kE7oV9fbqe1DU6G37jfKj1SXal+1wZvn672BuwyDxWdH d3VCDjvkFCAykpo6JKliNJ7lm3mYgbhL9I8+ITO35+JZ81dbrekINtbtfeKxEp897r8y upyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=XIx4xI3y3ziyT90PgIVJD4xSHvpW/LrUfyPutcd9NC8=; b=DVTahxxKyld0Q9RFybmXjBSwc6q01/x+wmg8XeIREaG3MlD0B3RCXqqCFDVU98c+vz kYw6UhGkaUFyhyhDdTJZf30XPSvTZgdRTA0SaJGplxRdhRbN3SQs2yqUnTsDmuFJzwEq rRKO1Fog4VXTeCv0RSjeDJoQNP8OU4cFnNH8eWPFx/Avktu80UtLucLK9t+eTg5InIy5 u+eSoLzkNwJwPE4glV4HNYYmeyIUNynFwyRu7bRmRmEQQkavXNJH2bHrzT66v3jlZZNq F6Eupn7mmwZ7mK9IVjt1hzX6LrCv6n3FGbTYmKloOHqjBbkHw3bnsoZTgOwpvbVZ62E0 KR3g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ho33si4947029ejc.1.2021.06.04.13.57.33; Fri, 04 Jun 2021 13:57:33 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230451AbhFDU7G (ORCPT + 7 others); Fri, 4 Jun 2021 16:59:06 -0400 Received: from foss.arm.com ([217.140.110.172]:48024 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230177AbhFDU7G (ORCPT ); Fri, 4 Jun 2021 16:59:06 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 78DA41477; Fri, 4 Jun 2021 13:57:19 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 26FB83F719; Fri, 4 Jun 2021 13:57:18 -0700 (PDT) From: Sudeep Holla To: devicetree@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Rob Herring , Cristian Marussi , Kevin Hilman , Neil Armstrong , Jerome Brunet , Viresh Kumar Subject: [PATCH v3 2/6] dt-bindings: firmware: arm, scpi: Convert to json schema Date: Fri, 4 Jun 2021 21:57:06 +0100 Message-Id: <20210604205710.1944363-3-sudeep.holla@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210604205710.1944363-1-sudeep.holla@arm.com> References: <20210604205710.1944363-1-sudeep.holla@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the old text format binding for System Control and Power Interface (SCPI) Message Protocol into the new and shiny YAML format. Cc: Rob Herring Cc: Kevin Hilman Cc: Neil Armstrong Cc: Jerome Brunet Cc: Viresh Kumar Signed-off-by: Sudeep Holla --- .../devicetree/bindings/arm/arm,scpi.txt | 204 ---------------- .../bindings/firmware/arm,scpi.yaml | 227 ++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 228 insertions(+), 205 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/arm,scpi.txt create mode 100644 Documentation/devicetree/bindings/firmware/arm,scpi.yaml -- 2.25.1 diff --git a/Documentation/devicetree/bindings/arm/arm,scpi.txt b/Documentation/devicetree/bindings/arm/arm,scpi.txt deleted file mode 100644 index bcb8b3d61e68..000000000000 --- a/Documentation/devicetree/bindings/arm/arm,scpi.txt +++ /dev/null @@ -1,204 +0,0 @@ -System Control and Power Interface (SCPI) Message Protocol ----------------------------------------------------------- - -Firmware implementing the SCPI described in ARM document number ARM DUI 0922B -("ARM Compute Subsystem SCP: Message Interface Protocols")[0] can be used -by Linux to initiate various system control and power operations. - -Required properties: - -- compatible : should be - * "arm,scpi" : For implementations complying to SCPI v1.0 or above - * "arm,scpi-pre-1.0" : For implementations complying to all - unversioned releases prior to SCPI v1.0 -- mboxes: List of phandle and mailbox channel specifiers - All the channels reserved by remote SCP firmware for use by - SCPI message protocol should be specified in any order -- shmem : List of phandle pointing to the shared memory(SHM) area between the - processors using these mailboxes for IPC, one for each mailbox - SHM can be any memory reserved for the purpose of this communication - between the processors. - -See Documentation/devicetree/bindings/mailbox/mailbox.txt -for more details about the generic mailbox controller and -client driver bindings. - -Clock bindings for the clocks based on SCPI Message Protocol ------------------------------------------------------------- - -This binding uses the common clock binding[1]. - -Container Node -============== -Required properties: -- compatible : should be "arm,scpi-clocks" - All the clocks provided by SCP firmware via SCPI message - protocol much be listed as sub-nodes under this node. - -Sub-nodes -========= -Required properties: -- compatible : shall include one of the following - "arm,scpi-dvfs-clocks" - all the clocks that are variable and index based. - These clocks don't provide an entire range of values between the - limits but only discrete points within the range. The firmware - provides the mapping for each such operating frequency and the - index associated with it. The firmware also manages the - voltage scaling appropriately with the clock scaling. - "arm,scpi-variable-clocks" - all the clocks that are variable and provide full - range within the specified range. The firmware provides the - range of values within a specified range. - -Other required properties for all clocks(all from common clock binding): -- #clock-cells : Should be 1. Contains the Clock ID value used by SCPI commands. -- clock-output-names : shall be the corresponding names of the outputs. -- clock-indices: The identifying number for the clocks(i.e.clock_id) in the - node. It can be non linear and hence provide the mapping of identifiers - into the clock-output-names array. - -Sensor bindings for the sensors based on SCPI Message Protocol --------------------------------------------------------------- -SCPI provides an API to access the various sensors on the SoC. - -Required properties: -- compatible : should be "arm,scpi-sensors". -- #thermal-sensor-cells: should be set to 1. This property follows the - thermal device tree bindings[2]. - - Valid cell values are raw identifiers (Sensor ID) - as used by the firmware. Refer to platform details - for your implementation for the IDs to use. - -Power domain bindings for the power domains based on SCPI Message Protocol ------------------------------------------------------------- - -This binding uses the generic power domain binding[4]. - -PM domain providers -=================== - -Required properties: - - #power-domain-cells : Should be 1. Contains the device or the power - domain ID value used by SCPI commands. - - num-domains: Total number of power domains provided by SCPI. This is - needed as the SCPI message protocol lacks a mechanism to - query this information at runtime. - -PM domain consumers -=================== - -Required properties: - - power-domains : A phandle and PM domain specifier as defined by bindings of - the power controller specified by phandle. - -[0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/thermal/thermal*.yaml -[3] Documentation/devicetree/bindings/sram/sram.yaml -[4] Documentation/devicetree/bindings/power/power-domain.yaml - -Example: - -sram: sram@50000000 { - compatible = "arm,juno-sram-ns", "mmio-sram"; - reg = <0x0 0x50000000 0x0 0x10000>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0x50000000 0x10000>; - - cpu_scp_lpri: scp-shmem@0 { - compatible = "arm,juno-scp-shmem"; - reg = <0x0 0x200>; - }; - - cpu_scp_hpri: scp-shmem@200 { - compatible = "arm,juno-scp-shmem"; - reg = <0x200 0x200>; - }; -}; - -mailbox: mailbox0@40000000 { - .... - #mbox-cells = <1>; -}; - -scpi_protocol: scpi@2e000000 { - compatible = "arm,scpi"; - mboxes = <&mailbox 0 &mailbox 1>; - shmem = <&cpu_scp_lpri &cpu_scp_hpri>; - - clocks { - compatible = "arm,scpi-clocks"; - - scpi_dvfs: scpi_clocks@0 { - compatible = "arm,scpi-dvfs-clocks"; - #clock-cells = <1>; - clock-indices = <0>, <1>, <2>; - clock-output-names = "atlclk", "aplclk","gpuclk"; - }; - scpi_clk: scpi_clocks@3 { - compatible = "arm,scpi-variable-clocks"; - #clock-cells = <1>; - clock-indices = <3>, <4>; - clock-output-names = "pxlclk0", "pxlclk1"; - }; - }; - - scpi_sensors0: sensors { - compatible = "arm,scpi-sensors"; - #thermal-sensor-cells = <1>; - }; - - scpi_devpd: scpi-power-domains { - compatible = "arm,scpi-power-domains"; - num-domains = <2>; - #power-domain-cells = <1>; - }; -}; - -cpu@0 { - ... - reg = <0 0>; - clocks = <&scpi_dvfs 0>; -}; - -hdlcd@7ff60000 { - ... - reg = <0 0x7ff60000 0 0x1000>; - clocks = <&scpi_clk 4>; - power-domains = <&scpi_devpd 1>; -}; - -thermal-zones { - soc_thermal { - polling-delay-passive = <100>; - polling-delay = <1000>; - - /* sensor ID */ - thermal-sensors = <&scpi_sensors0 3>; - ... - }; -}; - -In the above example, the #clock-cells is set to 1 as required. -scpi_dvfs has 3 output clocks namely: atlclk, aplclk, and gpuclk with 0, -1 and 2 as clock-indices. scpi_clk has 2 output clocks namely: pxlclk0 -and pxlclk1 with 3 and 4 as clock-indices. - -The first consumer in the example is cpu@0 and it has '0' as the clock -specifier which points to the first entry in the output clocks of -scpi_dvfs i.e. "atlclk". - -Similarly the second example is hdlcd@7ff60000 and it has pxlclk1 as input -clock. '4' in the clock specifier here points to the second entry -in the output clocks of scpi_clocks i.e. "pxlclk1" - -The thermal-sensors property in the soc_thermal node uses the -temperature sensor provided by SCP firmware to setup a thermal -zone. The ID "3" is the sensor identifier for the temperature sensor -as used by the firmware. - -The num-domains property in scpi-power-domains domain specifies that -SCPI provides 2 power domains. The hdlcd node uses the power domain with -domain ID 1. diff --git a/Documentation/devicetree/bindings/firmware/arm,scpi.yaml b/Documentation/devicetree/bindings/firmware/arm,scpi.yaml new file mode 100644 index 000000000000..6cb70e2008fc --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/arm,scpi.yaml @@ -0,0 +1,227 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2021 ARM Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/arm,scpi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: System Control and Power Interface (SCPI) Message Protocol bindings + +maintainers: + - Sudeep Holla + +description: | + Firmware implementing the SCPI described in ARM document number ARM DUI + 0922B ("ARM Compute Subsystem SCP: Message Interface Protocols")[0] can be + used by Linux to initiate various system control and power operations. + + This binding is intended to define the interface the firmware implementing + the SCPI provide for OSPM in the device tree. + + [0] http://infocenter.arm.com/help/topic/com.arm.doc.dui0922b/index.html + +properties: + $nodename: + const: scpi + + compatible: + description: | + SCPI compliant firmware complying to SCPI v1.0 and above OR + SCPI compliant firmware complying to all unversioned releases + prior to SCPI v1.0 + oneOf: + - const: arm,scpi # SCPI v1.0 and above + - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0 + + mboxes: + description: | + List of phandle and mailbox channel specifiers. All the channels reserved + by remote SCP firmware for use by SCPI message protocol should be + specified in any order. + minItems: 1 + + shmem: + description: | + List of phandle pointing to the shared memory(SHM) area between the + processors using these mailboxes for IPC, one for each mailbox SHM can + be any memory reserved for the purpose of this communication between the + processors. + minItems: 1 + +additionalProperties: false + +patternProperties: + "^power-controller$": + type: object + description: | + This sub-node represents SCPI power domain controller. + + properties: + compatible: + const: arm,scpi-power-domains + + '#power-domain-cells': + const: 1 + + num-domains: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Total number of power domains provided by SCPI. This is needed as + the SCPI message protocol lacks a mechanism to query this + information at runtime. + + required: + - compatible + - '#power-domain-cells' + - num-domains + + additionalProperties: false + + "^sensors$": + type: object + description: | + This sub-node represents SCPI sensors controller. + + properties: + compatible: + const: arm,scpi-sensors + + '#thermal-sensor-cells': + const: 1 + + required: + - compatible + - '#thermal-sensor-cells' + + additionalProperties: false + + "^clocks$": + type: object + description: | + This is the container node. Each sub-node represents one of the types + of clock controller - indexed or full range. + + properties: + compatible: + const: arm,scpi-clocks + + patternProperties: + "^clocks-[0-9a-f]+$": + type: object + description: | + This sub-node represents one of the types of clock controller + - indexed or full range. + + "arm,scpi-dvfs-clocks" - all the clocks that are variable and index + based. These clocks don't provide an entire range of values between + the limits but only discrete points within the range. The firmware + provides the mapping for each such operating frequency and the index + associated with it. The firmware also manages the voltage scaling + appropriately with the clock scaling. + + "arm,scpi-variable-clocks" - all the clocks that are variable and + provide full range within the specified range. The firmware provides + the range of values within a specified range. + + properties: + compatible: + oneOf: + - const: arm,scpi-dvfs-clocks + - const: arm,scpi-variable-clocks + + '#clock-cells': + const: 1 + + clock-output-names: + $ref: /schemas/types.yaml#/definitions/string-array + + clock-indices: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: | + The identifying number for the clocks(i.e.clock_id) in the node. + It can be non linear and hence provide the mapping of identifiers + into the clock-output-names array. + + required: + - compatible + - '#clock-cells' + - clock-output-names + - clock-indices + + additionalProperties: false + + required: + - compatible + + additionalProperties: false + +required: + - compatible + - mboxes + - shmem + +examples: + - | + firmware { + scpi { + compatible = "arm,scpi"; + mboxes = <&mhuA 1>; + shmem = <&cpu_scp_hpri>; /* HP-NonSecure */ + + scpi_devpd: power-controller { + compatible = "arm,scpi-power-domains"; + num-domains = <2>; + #power-domain-cells = <1>; + }; + + clocks { + compatible = "arm,scpi-clocks"; + + scpi_dvfs: clocks-0 { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>, <1>, <2>; + clock-output-names = "atlclk", "aplclk","gpuclk"; + }; + + scpi_clk: clocks-1 { + compatible = "arm,scpi-variable-clocks"; + #clock-cells = <1>; + clock-indices = <3>, <4>; + clock-output-names = "pxlclk0", "pxlclk1"; + }; + }; + + scpi_sensors: sensors { + compatible = "arm,scpi-sensors"; + #thermal-sensor-cells = <1>; + }; + + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + + sram@50000000 { + compatible = "mmio-sram"; + reg = <0x0 0x50000000 0x0 0x10000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x50000000 0x10000>; + + cpu_scp_lpri: scp-sram-section@0 { + compatible = "arm,scp-shmem"; + reg = <0x0 0x200>; + }; + + cpu_scp_hpri: scp-sram-section@200 { + compatible = "arm,scp-shmem"; + reg = <0x200 0x200>; + }; + }; + }; + +... diff --git a/MAINTAINERS b/MAINTAINERS index f13605f5d9b0..c0ba9154925a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -17711,7 +17711,7 @@ M: Sudeep Holla R: Cristian Marussi L: linux-arm-kernel@lists.infradead.org S: Maintained -F: Documentation/devicetree/bindings/arm/arm,sc[mp]i.txt +F: Documentation/devicetree/bindings/firmware/arm,sc[mp]i.yaml F: drivers/clk/clk-sc[mp]i.c F: drivers/cpufreq/sc[mp]i-cpufreq.c F: drivers/firmware/arm_scmi/ From patchwork Fri Jun 4 20:57:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 454174 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp750829jae; Fri, 4 Jun 2021 13:57:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwGPw0SAiqzNYCCX0eBMumjJSiLEWaavVT10yQF8t0o5qC3S4LiLcc/OUumgRRq5NBl5y8Y X-Received: by 2002:a17:906:d1ce:: with SMTP id bs14mr6188205ejb.183.1622840254028; Fri, 04 Jun 2021 13:57:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622840254; cv=none; d=google.com; s=arc-20160816; b=weX8bi7QRZL1ruQxjhrKNdpvstG9zF55afhwnYomfuxdQP825oibd/Nef/EEHsO64t 6uNmJdAbKAtzedkDpXIQWfFQBRqBLnED+9XLYYWr9CHo61YDel7l0zutUonyIT1r+UDB 3jTRzmhbfP/ajnpI0IWny59uXDFGqgCx6X/7EfuYyBNH6eN96B+zFJRUVLzZsUks3up3 hym7RLPCnGapXwe+1VAtY2whxhDfLL2kxp+qoY5thfjRMu+x3BFewHddsIZ2LQ2dVF2I WP9xagSM++DhQQ+wuHbAGqW0tAMv6h7bUXWnUVtsrT0Ygq6ppxK/gfbjFtt52ivA2UKl bs0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=PtuDjHXHivPy3l4kj1bXEdUMfyrEdc4VzcBHxdPARLE=; b=kRju/kXnhOF7PzUliAQmslvR8IROnrBLC53gou2Vn9jJIAsLJ5IcNYqv8HNeFLLW+L 1EtXKM9Utr6+ysIXm2hCM8cv9eNvEu2/1c2jf4BG8LBwhARWWW9phngHXfsjq90qKQqL 57D4emfMMrBfGkvhOxF+7gMsYda1nugGWnaQ/EYvpiL536sBY28qFRg7ERAc3/SGkl/f vMLIoA3NaSsHeegmKuP5jFNOzOUEML2UJ+SOvbv9Yo5V4CVRZ//Yd3LifqogrxYkv8l7 qZtpkoYfcB+TaaAYxsgvfqqyhlj5DSEeViW/V8ixXK1/1B4SRPyZkscqzt0FSsR4ghdX dBOA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ho33si4947029ejc.1.2021.06.04.13.57.33; Fri, 04 Jun 2021 13:57:34 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231245AbhFDU7H (ORCPT + 7 others); Fri, 4 Jun 2021 16:59:07 -0400 Received: from foss.arm.com ([217.140.110.172]:48038 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230177AbhFDU7H (ORCPT ); Fri, 4 Jun 2021 16:59:07 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C77141478; Fri, 4 Jun 2021 13:57:20 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id AAFBF3F719; Fri, 4 Jun 2021 13:57:19 -0700 (PDT) From: Sudeep Holla To: devicetree@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Rob Herring , Cristian Marussi , Kevin Hilman , Neil Armstrong , Jerome Brunet Subject: [PATCH v3 3/6] dt-bindings: firmware: amlogic, scpi: Convert to json schema Date: Fri, 4 Jun 2021 21:57:07 +0100 Message-Id: <20210604205710.1944363-4-sudeep.holla@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210604205710.1944363-1-sudeep.holla@arm.com> References: <20210604205710.1944363-1-sudeep.holla@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert/merge the existing text format SCPI binding additions for amlogic,scpi into the common arm,scpi json scheme. Couple of things to note: "amlogic,meson-gxbb-scpi" is always used with "arm,scpi-pre-1.0" and "amlogic,meson-gxbb-scpi-sensors" is used always with "arm,scpi-sensors" Cc: Rob Herring Cc: Kevin Hilman Cc: Neil Armstrong Cc: Jerome Brunet Signed-off-by: Sudeep Holla --- .../devicetree/bindings/arm/amlogic,scpi.txt | 15 ------------ .../bindings/firmware/arm,scpi.yaml | 24 ++++++++++++++++++- 2 files changed, 23 insertions(+), 16 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/amlogic,scpi.txt -- 2.25.1 diff --git a/Documentation/devicetree/bindings/arm/amlogic,scpi.txt b/Documentation/devicetree/bindings/arm/amlogic,scpi.txt deleted file mode 100644 index ebfe302fb747..000000000000 --- a/Documentation/devicetree/bindings/arm/amlogic,scpi.txt +++ /dev/null @@ -1,15 +0,0 @@ -System Control and Power Interface (SCPI) Message Protocol -(in addition to the standard binding in [0]) ----------------------------------------------------------- -Required properties - -- compatible : should be "amlogic,meson-gxbb-scpi" - -Sensor bindings for the sensors based on SCPI Message Protocol --------------------------------------------------------------- -SCPI provides an API to access the various sensors on the SoC. - -Required properties: -- compatible : should be "amlogic,meson-gxbb-scpi-sensors". - -[0] Documentation/devicetree/bindings/arm/arm,scpi.txt diff --git a/Documentation/devicetree/bindings/firmware/arm,scpi.yaml b/Documentation/devicetree/bindings/firmware/arm,scpi.yaml index 6cb70e2008fc..ce429cf2bdc0 100644 --- a/Documentation/devicetree/bindings/firmware/arm,scpi.yaml +++ b/Documentation/devicetree/bindings/firmware/arm,scpi.yaml @@ -32,6 +32,10 @@ description: | oneOf: - const: arm,scpi # SCPI v1.0 and above - const: arm,scpi-pre-1.0 # Unversioned SCPI before v1.0 + - items: + - enum: + - amlogic,meson-gxbb-scpi + - const: arm,scpi-pre-1.0 mboxes: description: | @@ -84,7 +88,12 @@ additionalProperties: false properties: compatible: - const: arm,scpi-sensors + oneOf: + - const: arm,scpi-sensors + - items: + - enum: + - amlogic,meson-gxbb-scpi-sensors + - const: arm,scpi-sensors '#thermal-sensor-cells': const: 1 @@ -224,4 +233,17 @@ additionalProperties: false }; }; + - | + firmware { + scpi { + compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0"; + mboxes = <&mailbox 1 &mailbox 2>; + shmem = <&cpu_scp_lpri &cpu_scp_hpri>; + + scpi_sensors1: sensors { + compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors"; + #thermal-sensor-cells = <1>; + }; + }; + }; ... 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[23.128.96.18]) by mx.google.com with ESMTP id ho33si4947029ejc.1.2021.06.04.13.57.34; Fri, 04 Jun 2021 13:57:34 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231512AbhFDU7L (ORCPT + 7 others); Fri, 4 Jun 2021 16:59:11 -0400 Received: from foss.arm.com ([217.140.110.172]:48048 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230177AbhFDU7J (ORCPT ); Fri, 4 Jun 2021 16:59:09 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3F6DB2B; Fri, 4 Jun 2021 13:57:22 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 07AF03F719; Fri, 4 Jun 2021 13:57:20 -0700 (PDT) From: Sudeep Holla To: devicetree@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Rob Herring , Cristian Marussi , Florian Fainelli , Jim Quinlan , Etienne Carriere , Peter Hilber Subject: [PATCH v3 4/6] dt-bindings: firmware: arm, scmi: Convert to json schema Date: Fri, 4 Jun 2021 21:57:08 +0100 Message-Id: <20210604205710.1944363-5-sudeep.holla@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210604205710.1944363-1-sudeep.holla@arm.com> References: <20210604205710.1944363-1-sudeep.holla@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Convert the old text format binding for System Control and Management Interface (SCMI) Message Protocol into the new and shiny YAML format. Cc: Rob Herring Cc: Cristian Marussi Cc: Florian Fainelli Cc: Jim Quinlan Cc: Etienne Carriere Cc: Peter Hilber Signed-off-by: Sudeep Holla --- .../devicetree/bindings/arm/arm,scmi.txt | 224 ------------ .../bindings/firmware/arm,scmi.yaml | 338 ++++++++++++++++++ 2 files changed, 338 insertions(+), 224 deletions(-) delete mode 100644 Documentation/devicetree/bindings/arm/arm,scmi.txt create mode 100644 Documentation/devicetree/bindings/firmware/arm,scmi.yaml -- 2.25.1 diff --git a/Documentation/devicetree/bindings/arm/arm,scmi.txt b/Documentation/devicetree/bindings/arm/arm,scmi.txt deleted file mode 100644 index b7be2000afcb..000000000000 --- a/Documentation/devicetree/bindings/arm/arm,scmi.txt +++ /dev/null @@ -1,224 +0,0 @@ -System Control and Management Interface (SCMI) Message Protocol ----------------------------------------------------------- - -The SCMI is intended to allow agents such as OSPM to manage various functions -that are provided by the hardware platform it is running on, including power -and performance functions. - -This binding is intended to define the interface the firmware implementing -the SCMI as described in ARM document number ARM DEN 0056A ("ARM System Control -and Management Interface Platform Design Document")[0] provide for OSPM in -the device tree. - -Required properties: - -The scmi node with the following properties shall be under the /firmware/ node. - -- compatible : shall be "arm,scmi" or "arm,scmi-smc" for smc/hvc transports -- mboxes: List of phandle and mailbox channel specifiers. It should contain - exactly one or two mailboxes, one for transmitting messages("tx") - and another optional for receiving the notifications("rx") if - supported. -- shmem : List of phandle pointing to the shared memory(SHM) area as per - generic mailbox client binding. -- #address-cells : should be '1' if the device has sub-nodes, maps to - protocol identifier for a given sub-node. -- #size-cells : should be '0' as 'reg' property doesn't have any size - associated with it. -- arm,smc-id : SMC id required when using smc or hvc transports - -Optional properties: - -- mbox-names: shall be "tx" or "rx" depending on mboxes entries. - -- interrupts : when using smc or hvc transports, this optional - property indicates that msg completion by the platform is indicated - by an interrupt rather than by the return of the smc call. This - should not be used except when the platform requires such behavior. - -- interrupt-names : if "interrupts" is present, interrupt-names must also - be present and have the value "a2p". - -See Documentation/devicetree/bindings/mailbox/mailbox.txt for more details -about the generic mailbox controller and client driver bindings. - -The mailbox is the only permitted method of calling the SCMI firmware. -Mailbox doorbell is used as a mechanism to alert the presence of a -messages and/or notification. - -Each protocol supported shall have a sub-node with corresponding compatible -as described in the following sections. If the platform supports dedicated -communication channel for a particular protocol, the 3 properties namely: -mboxes, mbox-names and shmem shall be present in the sub-node corresponding -to that protocol. - -Clock/Performance bindings for the clocks/OPPs based on SCMI Message Protocol ------------------------------------------------------------- - -This binding uses the common clock binding[1]. - -Required properties: -- #clock-cells : Should be 1. Contains the Clock ID value used by SCMI commands. - -Power domain bindings for the power domains based on SCMI Message Protocol ------------------------------------------------------------- - -This binding for the SCMI power domain providers uses the generic power -domain binding[2]. - -Required properties: - - #power-domain-cells : Should be 1. Contains the device or the power - domain ID value used by SCMI commands. - -Regulator bindings for the SCMI Regulator based on SCMI Message Protocol ------------------------------------------------------------- -An SCMI Regulator is permanently bound to a well defined SCMI Voltage Domain, -and should be always positioned as a root regulator. -It does not support any current operation. - -SCMI Regulators are grouped under a 'regulators' node which in turn is a child -of the SCMI Voltage protocol node inside the desired SCMI instance node. - -This binding uses the common regulator binding[6]. - -Required properties: - - reg : shall identify an existent SCMI Voltage Domain. - -Sensor bindings for the sensors based on SCMI Message Protocol --------------------------------------------------------------- -SCMI provides an API to access the various sensors on the SoC. - -Required properties: -- #thermal-sensor-cells: should be set to 1. This property follows the - thermal device tree bindings[3]. - - Valid cell values are raw identifiers (Sensor ID) - as used by the firmware. Refer to platform details - for your implementation for the IDs to use. - -Reset signal bindings for the reset domains based on SCMI Message Protocol ------------------------------------------------------------- - -This binding for the SCMI reset domain providers uses the generic reset -signal binding[5]. - -Required properties: - - #reset-cells : Should be 1. Contains the reset domain ID value used - by SCMI commands. - -[0] http://infocenter.arm.com/help/topic/com.arm.doc.den0056a/index.html -[1] Documentation/devicetree/bindings/clock/clock-bindings.txt -[2] Documentation/devicetree/bindings/power/power-domain.yaml -[3] Documentation/devicetree/bindings/thermal/thermal*.yaml -[4] Documentation/devicetree/bindings/sram/sram.yaml -[5] Documentation/devicetree/bindings/reset/reset.txt -[6] Documentation/devicetree/bindings/regulator/regulator.yaml - -Example: - -sram@50000000 { - compatible = "mmio-sram"; - reg = <0x0 0x50000000 0x0 0x10000>; - - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x0 0x50000000 0x10000>; - - cpu_scp_lpri: scp-shmem@0 { - compatible = "arm,scmi-shmem"; - reg = <0x0 0x200>; - }; - - cpu_scp_hpri: scp-shmem@200 { - compatible = "arm,scmi-shmem"; - reg = <0x200 0x200>; - }; -}; - -mailbox@40000000 { - .... - #mbox-cells = <1>; - reg = <0x0 0x40000000 0x0 0x10000>; -}; - -firmware { - - ... - - scmi { - compatible = "arm,scmi"; - mboxes = <&mailbox 0 &mailbox 1>; - mbox-names = "tx", "rx"; - shmem = <&cpu_scp_lpri &cpu_scp_hpri>; - #address-cells = <1>; - #size-cells = <0>; - - scmi_devpd: protocol@11 { - reg = <0x11>; - #power-domain-cells = <1>; - }; - - scmi_dvfs: protocol@13 { - reg = <0x13>; - #clock-cells = <1>; - }; - - scmi_clk: protocol@14 { - reg = <0x14>; - #clock-cells = <1>; - }; - - scmi_sensors0: protocol@15 { - reg = <0x15>; - #thermal-sensor-cells = <1>; - }; - - scmi_reset: protocol@16 { - reg = <0x16>; - #reset-cells = <1>; - }; - - scmi_voltage: protocol@17 { - reg = <0x17>; - - regulators { - regulator_devX: regulator@0 { - reg = <0x0>; - regulator-max-microvolt = <3300000>; - }; - - regulator_devY: regulator@9 { - reg = <0x9>; - regulator-min-microvolt = <500000>; - regulator-max-microvolt = <4200000>; - }; - - ... - }; - }; - }; -}; - -cpu@0 { - ... - reg = <0 0>; - clocks = <&scmi_dvfs 0>; -}; - -hdlcd@7ff60000 { - ... - reg = <0 0x7ff60000 0 0x1000>; - clocks = <&scmi_clk 4>; - power-domains = <&scmi_devpd 1>; - resets = <&scmi_reset 10>; -}; - -thermal-zones { - soc_thermal { - polling-delay-passive = <100>; - polling-delay = <1000>; - /* sensor ID */ - thermal-sensors = <&scmi_sensors0 3>; - ... - }; -}; diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml new file mode 100644 index 000000000000..165d713fd0cd --- /dev/null +++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml @@ -0,0 +1,338 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2021 ARM Ltd. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/firmware/arm,scmi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: System Control and Management Interface (SCMI) Message Protocol bindings + +maintainers: + - Sudeep Holla + +description: | + The SCMI is intended to allow agents such as OSPM to manage various functions + that are provided by the hardware platform it is running on, including power + and performance functions. + + This binding is intended to define the interface the firmware implementing + the SCMI as described in ARM document number ARM DEN 0056 ("ARM System Control + and Management Interface Platform Design Document")[0] provide for OSPM in + the device tree. + + [0] https://developer.arm.com/documentation/den0056/latest + +properties: + $nodename: + const: scmi + + compatible: + oneOf: + - description: SCMI compliant firmware with mailbox transport + items: + - const: arm,scmi + - description: SCMI compliant firmware with ARM SMC/HVC transport + items: + - const: arm,scmi-smc + + mbox-names: + description: | + Specifies the mailboxes used to communicate with SCMI compliant + firmware. + items: + - const: tx + - const: rx + + mboxes: + description: | + List of phandle and mailbox channel specifiers. It should contain + exactly one or two mailboxes, one for transmitting messages("tx") + and another optional for receiving the notifications("rx") if supported. + minItems: 1 + maxItems: 2 + + shmem: + description: | + List of phandle pointing to the shared memory(SHM) area, for each + transport channel specified. + minItems: 1 + maxItems: 2 + + '#address-cells': + description: | + The address cells map to the protocol identifier for a given sub-node. + const: 1 + + '#size-cells': + description: | + The size cells are not present as 'reg' property doesn't have any + size associated with it. + const: 0 + + arm,smc-id: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + SMC id required when using smc or hvc transports + + protocol@11: + type: object + properties: + reg: + const: 0x11 + + '#power-domain-cells': + const: 1 + + required: + - '#power-domain-cells' + + protocol@13: + type: object + properties: + reg: + const: 0x13 + + '#clock-cells': + const: 1 + + required: + - '#clock-cells' + + protocol@14: + type: object + properties: + reg: + const: 0x14 + + '#clock-cells': + const: 1 + + required: + - '#clock-cells' + + protocol@15: + type: object + properties: + reg: + const: 0x15 + + '#thermal-sensor-cells': + const: 1 + + required: + - '#thermal-sensor-cells' + + protocol@16: + type: object + properties: + reg: + const: 0x16 + + '#reset-cells': + const: 1 + + required: + - '#reset-cells' + + protocol@17: + type: object + properties: + reg: + const: 0x17 + + regulators: + type: object + description: | + The list of all regulators provided by this SCMI controller. + patternProperties: + '^regulators@[0-9a-f]+$': + type: object + $ref: "../regulator/regulator.yaml#" + properties: + reg: + maxItems: 1 + description: Identifier for the voltage regulator. + required: + - reg + +additionalProperties: false + +patternProperties: + '^protocol@[0-9a-f]+$': + type: object + description: | + Each sub-node represents a protocol supported. If the platform + supports a dedicated communication channel for a particular protocol, + then the corresponding transport properties must be present. + + properties: + reg: + maxItems: 1 + + mbox-names: + items: + - const: tx + - const: rx + + mboxes: + minItems: 1 + maxItems: 2 + + shmem: + minItems: 1 + maxItems: 2 + + required: + - reg + +required: + - compatible + - shmem + +if: + properties: + compatible: + contains: + const: arm,scmi + required: + - mboxes + +else: + if: + properties: + compatible: + contains: + const: arm,scmi-smc + then: + properties: + interrupts: + description: | + The interrupt that indicates message completion by the platform + rather than by the return of the smc call. This should not be used + except when the platform requires such behavior. + + interrupt-names: + const: a2p + + required: + - arm,smc-id + +examples: + - | + firmware { + scmi { + compatible = "arm,scmi"; + mboxes = <&mhuB 0 0>, + <&mhuB 0 1>; + mbox-names = "tx", "rx"; + shmem = <&cpu_scp_lpri0>, + <&cpu_scp_lpri1>; + + #address-cells = <1>; + #size-cells = <0>; + + scmi_devpd: protocol@11 { + reg = <0x11>; + #power-domain-cells = <1>; + }; + + scmi_dvfs: protocol@13 { + reg = <0x13>; + #clock-cells = <1>; + + mboxes = <&mhuB 1 0>, + <&mhuB 1 1>; + mbox-names = "tx", "rx"; + shmem = <&cpu_scp_hpri0>, + <&cpu_scp_hpri1>; + }; + + scmi_clk: protocol@14 { + reg = <0x14>; + #clock-cells = <1>; + }; + + scmi_sensors: protocol@15 { + reg = <0x15>; + #thermal-sensor-cells = <1>; + }; + + scmi_reset: protocol@16 { + reg = <0x16>; + #reset-cells = <1>; + }; + + scmi_voltage: protocol@17 { + reg = <0x17>; + regulators { + #address-cells = <1>; + #size-cells = <0>; + + regulator_devX: regulator@0 { + reg = <0x0>; + regulator-max-microvolt = <3300000>; + }; + + regulator_devY: regulator@9 { + reg = <0x9>; + regulator-min-microvolt = <500000>; + regulator-max-microvolt = <4200000>; + }; + }; + }; + }; + }; + + soc { + #address-cells = <2>; + #size-cells = <2>; + + sram@50000000 { + compatible = "mmio-sram"; + reg = <0x0 0x50000000 0x0 0x10000>; + + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x0 0x50000000 0x10000>; + + cpu_scp_lpri0: scp-sram-section@0 { + compatible = "arm,scmi-shmem"; + reg = <0x0 0x80>; + }; + + cpu_scp_lpri1: scp-sram-section@80 { + compatible = "arm,scmi-shmem"; + reg = <0x80 0x80>; + }; + + cpu_scp_hpri0: scp-sram-section@100 { + compatible = "arm,scmi-shmem"; + reg = <0x100 0x80>; + }; + + cpu_scp_hpri2: scp-sram-section@180 { + compatible = "arm,scmi-shmem"; + reg = <0x180 0x80>; + }; + }; + }; + + - | + firmware { + scmi { + compatible = "arm,scmi-smc"; + shmem = <&cpu_scp_lpri0 &cpu_scp_lpri1>; + arm,smc-id = <0xc3000001>; + + #address-cells = <1>; + #size-cells = <0>; + + scmi_devpd1: protocol@11 { + reg = <0x11>; + #power-domain-cells = <1>; + }; + + }; + }; + +... From patchwork Fri Jun 4 20:57:09 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 454175 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp750846jae; Fri, 4 Jun 2021 13:57:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwrIflMP702b66zrSTU6w7scUivyenHIPgOmF3k8vb9fCD8oSA+rOzVVJPGyG1FqlNzS6WK X-Received: by 2002:a17:906:4e81:: with SMTP id v1mr5959281eju.125.1622840255231; Fri, 04 Jun 2021 13:57:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622840255; cv=none; d=google.com; s=arc-20160816; b=RylMll5JoZBd2QzuRDwyofN8vPHrsSbdDsRtYTroB6Ix8wvXSP4RO22qsLj0TH/VT4 7tO4cH2zPFEZ++N7ZpO8PVhMLPPO6VaxZzrwON55//uDeoc/y89dkiq2GXd75+OgH+4/ rGgpySK33qogOGueODUjbVqZcLyl/OTii8oo3v0tQa9Mnpju8Gc3M3PAucIFSfBtKxF5 JLhLwlulY4xMQynHZAxRdN6vb2iEhnsjbvqMwY42jLRI0V3HISpBkfDoNOfeHCXIKjxz VZmuyqSqHrgxd+T8w7d7dn49ypd0j5yp/gFSawyRHAzF0Xy1s2LaU48VMkd98RVi4Smz 0rCA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=/bXd9PhPQbC8+13VpiVOvWMc2ldt6UpM15wLyLD1lqM=; b=OV9HMS6lWshLDcXx8uMexne1ck26mSYHgil19PWpmViaSjGDdVQmf6ij1F/z3Ic6AN dA/RnBlJ3ZWv9kC4OgR6//CqzFBTON9K9JG6em8/4N8OukDa0Qj/9S4wdqVRbnrttWU0 6C7ONGuTY1UoN+x8Swwu5pC4inE4cGDxgq8SB4VKyaFyCv6BtE4uBvCAX+yjwRdo+k4u yXh/8W1BiBK9zkBY9Fiyqw5FmIDhjdELGldo0HoDNT4GHEY8OhtgO2BddH5J91AntToN mPe6RpfdyEhkj7GMa1gaN6MxDPb26DEPz9PtioGz4rCD0D6RD/e6QwAfOZGbycGhQuy4 ML4Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ho33si4947029ejc.1.2021.06.04.13.57.34; Fri, 04 Jun 2021 13:57:35 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231462AbhFDU7L (ORCPT + 7 others); Fri, 4 Jun 2021 16:59:11 -0400 Received: from foss.arm.com ([217.140.110.172]:48060 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231406AbhFDU7K (ORCPT ); Fri, 4 Jun 2021 16:59:10 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 5C9D312FC; Fri, 4 Jun 2021 13:57:23 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 729263F719; Fri, 4 Jun 2021 13:57:22 -0700 (PDT) From: Sudeep Holla To: devicetree@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Rob Herring , Cristian Marussi , Viresh Kumar Subject: [PATCH v3 5/6] dt-bindings: mailbox : arm, mhu: Use examples with matching schema Date: Fri, 4 Jun 2021 21:57:09 +0100 Message-Id: <20210604205710.1944363-6-sudeep.holla@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210604205710.1944363-1-sudeep.holla@arm.com> References: <20210604205710.1944363-1-sudeep.holla@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently the example provided in arm,mhu schema complains as below: Documentation/devicetree/bindings/mailbox/arm,mhu.example.dt.yaml :0:0: /example-0/soc/scb@2e000000: failed to match any schema with compatible: ['fujitsu,mb86s70-scb-1.0'] Fix the same using examples based on Juno platform. The old SCPI firmware used MHU with standard 32-bit data transfer protocol while the new SCMI firmware uses MHU and expects to be used in doorbell mode. Update example with SCPI and SCMI firmware nodes to demonstrate both 32-bit data transfer and doorbell mode of MHU operations Cc: Rob Herring Cc: Viresh Kumar Signed-off-by: Sudeep Holla --- .../devicetree/bindings/mailbox/arm,mhu.yaml | 48 +++++++++++++++---- 1 file changed, 38 insertions(+), 10 deletions(-) -- 2.25.1 diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml index 496308d91a86..bd49c201477d 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhu.yaml @@ -101,11 +101,19 @@ additionalProperties: false clocks = <&clock 0 2 1>; clock-names = "apb_pclk"; }; + }; - mhu_client_scb: scb@2e000000 { - compatible = "fujitsu,mb86s70-scb-1.0"; - reg = <0 0x2e000000 0 0x4000>; + firmware { + scpi { + compatible = "arm,scpi"; mboxes = <&mhuA 1>; /* HP-NonSecure */ + shmem = <&cpu_scp_hpri>; /* HP-NonSecure */ + + scpi_devpd: power-controller { + compatible = "arm,scpi-power-domains"; + num-domains = <2>; + #power-domain-cells = <1>; + }; }; }; @@ -125,16 +133,36 @@ additionalProperties: false clocks = <&clock 0 2 1>; clock-names = "apb_pclk"; }; + }; - scpi { - compatible = "arm,scpi"; - mboxes = <&mhuB 1 4>; /* HP-NonSecure, 5th doorbell */ - shmem = <&cpu_scp_hpri>; /* HP-NonSecure */ + firmware { + scmi { + compatible = "arm,scmi"; + mboxes = <&mhuB 0 0>, /* LP-NonSecure, 1st doorbell */ + <&mhuB 0 1>; /* LP-NonSecure, 2nd doorbell */ + mbox-names = "tx", "rx"; + shmem = <&cpu_scp_lpri0>, + <&cpu_scp_lpri1>; - scpi_devpd: power-controller { - compatible = "arm,scpi-power-domains"; - num-domains = <2>; + #address-cells = <1>; + #size-cells = <0>; + + scmi_devpd: protocol@11 { + reg = <0x11>; #power-domain-cells = <1>; }; + + scmi_dvfs: protocol@13 { + reg = <0x13>; + #clock-cells = <1>; + + mboxes = <&mhuB 1 2>, /* HP-NonSecure, 3rd doorbell */ + <&mhuB 1 3>; /* HP-NonSecure, 4th doorbell */ + mbox-names = "tx", "rx"; + shmem = <&cpu_scp_hpri0>, + <&cpu_scp_hpri1>; + }; }; }; + +... From patchwork Fri Jun 4 20:57:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sudeep Holla X-Patchwork-Id: 454177 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp750854jae; Fri, 4 Jun 2021 13:57:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzBiPY9QqQKWDWXmR1jzHwzOYuX0OERhvnt/eE4OeieIa++MweXUj8pDlgJ4ySkJXhngYGM X-Received: by 2002:a17:906:e10d:: with SMTP id gj13mr6017074ejb.150.1622840255675; Fri, 04 Jun 2021 13:57:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622840255; cv=none; d=google.com; s=arc-20160816; b=JIKSEMNF6LwGcyYFdskigZGQe1PdTBu4IWpkHBLO9G12Faz5rQxbtxDcDPTM2fqm8n KY4LAu2GaTNn2wVW/ygOG3FnahYNH8yvU179qUffMuyRq3k9JSXpCD2yv3T5XYO8kCyz jOipyY/3ZR/KwGoAa1o8IAJOSz4eNes8FnQPZoQg4vhcZx3uGtXqCQhw+0KMmmhsELlN 3v8bmltnwUrncANhOiEd3vQBcuwB11pWBRG41qZzGiqxY/yuZxX99/SU+FlIwPevkYWZ G83Y5dr3vN4sW8+j3zx+cSoljQ7EgKm9MLO8spEYtSIzw7CI9QbD0n3GHTpe2teNUOBK /cTg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from; bh=htKplSQmxyAU+kgVTA0DEVUO/eq20aYrTFQclOKOpB8=; b=ahij8EHbU8c9VymwxyGwS+D4AMwsysUEPhByhCKMpG3vjD7C3n+agZNsWKvEbYGbw9 EX/TP422VCLVAxRbhL4S1hBHbq67ljAJn2SAOa/qJXQ37bCgaFJHHZaToVCjNm/mAPTp G1qDbpp52bfpE+vkqBxo5sF2X2GNleGvx8WPi09OhHqIr5QRSWz4Pn+JhsFbMJWnFB4t rNl4EqTEDVPryHVObi7sDBKnobAdI2OzU0DncbNTB57tGmehBXhB4Ev2jvndmz8mY8fs 6zbqVzCo6xIlIW/xexgMcKYiFpx/caQI444fB1fupCb4hlMnHKySVCTL/mXBznyadohX djdg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ho33si4947029ejc.1.2021.06.04.13.57.35; Fri, 04 Jun 2021 13:57:35 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=arm.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231286AbhFDU7L (ORCPT + 7 others); Fri, 4 Jun 2021 16:59:11 -0400 Received: from foss.arm.com ([217.140.110.172]:48070 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230177AbhFDU7L (ORCPT ); Fri, 4 Jun 2021 16:59:11 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 7612F1478; Fri, 4 Jun 2021 13:57:24 -0700 (PDT) Received: from usa.arm.com (e103737-lin.cambridge.arm.com [10.1.197.49]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 8F7283F719; Fri, 4 Jun 2021 13:57:23 -0700 (PDT) From: Sudeep Holla To: devicetree@vger.kernel.org Cc: Sudeep Holla , linux-arm-kernel@lists.infradead.org, Rob Herring , Cristian Marussi , Viresh Kumar Subject: [PATCH v3 6/6] dt-bindings: mailbox : arm, mhuv2: Use example with matching schema Date: Fri, 4 Jun 2021 21:57:10 +0100 Message-Id: <20210604205710.1944363-7-sudeep.holla@arm.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210604205710.1944363-1-sudeep.holla@arm.com> References: <20210604205710.1944363-1-sudeep.holla@arm.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Currently the example provided in arm,mhuv2 schema complains as below: Documentation/devicetree/bindings/mailbox/arm,mhuv2.example.dt.yaml :0:0: /example-0/soc/scb@2e000000: failed to match any schema with compatible: ['fujitsu,mb86s70-scb-1.0'] Fix it by using an example with a matching schema that makes use of 4 mailboxes that is well suited to demonstrate Rx and Tx channels with both doorbell and data transfer protocols. Cc: Rob Herring Cc: Viresh Kumar Signed-off-by: Sudeep Holla --- .../bindings/mailbox/arm,mhuv2.yaml | 25 +++++++++---------- 1 file changed, 12 insertions(+), 13 deletions(-) -- 2.25.1 diff --git a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml index 6608545ea66f..a4f1fe63659a 100644 --- a/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml +++ b/Documentation/devicetree/bindings/mailbox/arm,mhuv2.yaml @@ -192,18 +192,17 @@ additionalProperties: false arm,mhuv2-protocols = <1 1>, <1 7>, <0 2>; }; - mhu_client: scb@2e000000 { - compatible = "fujitsu,mb86s70-scb-1.0"; - reg = <0 0x2e000000 0 0x4000>; - - mboxes = - //data-transfer protocol with 5 windows, mhu-tx - <&mhu_tx 2 0>, - //data-transfer protocol with 7 windows, mhu-tx - <&mhu_tx 3 0>, - //doorbell protocol channel 4, doorbell 27, mhu-tx - <&mhu_tx 4 27>, - //data-transfer protocol with 1 window, mhu-rx - <&mhu_rx 0 0>; + mhu_client: dsp@596e8000 { + compatible = "fsl,imx8qxp-dsp"; + reg = <0 0x596e8000 0 0x88000>; + clocks = <&adma_lpcg 0>, <&adma_lpcg 1>, <&adma_lpcg 2>; + clock-names = "ipg", "ocram", "core"; + power-domains = <&pd 0>, <&pd 1>, <&pd 2>, <&pd 3>; + mbox-names = "txdb0", "txdb1", "rxdb0", "rxdb1"; + mboxes = <&mhu_tx 2 0>, //data-transfer protocol with 5 windows, mhu-tx + <&mhu_tx 3 0>, //data-transfer protocol with 7 windows, mhu-tx + <&mhu_rx 2 27>, //doorbell protocol channel 2, doorbell 27, mhu-rx + <&mhu_rx 0 0>; //data-transfer protocol with 1 window, mhu-rx + memory-region = <&dsp_reserved>; }; };