From patchwork Sat Jun 5 17:04:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 455120 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5AD13C4743D for ; Sat, 5 Jun 2021 17:05:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3670561418 for ; Sat, 5 Jun 2021 17:05:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230050AbhFERGs (ORCPT ); Sat, 5 Jun 2021 13:06:48 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56092 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230035AbhFERGr (ORCPT ); Sat, 5 Jun 2021 13:06:47 -0400 Received: from mail-wm1-x332.google.com (mail-wm1-x332.google.com [IPv6:2a00:1450:4864:20::332]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 4C27AC061766; Sat, 5 Jun 2021 10:04:49 -0700 (PDT) Received: by mail-wm1-x332.google.com with SMTP id r13so7211085wmq.1; Sat, 05 Jun 2021 10:04:49 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kMAviFGUdQ730F6Q+HNCqv4PBNG+qYb32j7SS7VdG80=; b=T4YcfwlFx/bNv2XRve4QVU+8Px8MmC85/qLW6/NqgmyEGAU0J+csP45R1Az+wZBqKc nsz+ouuW2wnmh09bcst7pLFZDVn2CYrZ/N2wkWzgoi1HjMhKfPnDvmBehUFEro1jgFMu ldWvHYGqq7tITc1kncdLMD12khzerRMpJmr9bU4QlzTjNFudcxkLV4zgLZ8DEQime1lS acD5DAy3m5+QTsI2KZn0dhY76zN3CZS00N0MT+bzIH+3jOOUzGq0VYhKurmjqLXQZ7l6 i80TN+wkBDCNx4z/b+jVMzUF6M0n3ivvmc7nrYhUx0AYkziVjL8lQCbZIm1kD3rX/o+0 Bcqg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kMAviFGUdQ730F6Q+HNCqv4PBNG+qYb32j7SS7VdG80=; b=pSsKByLDjKxnKeqRajs8IxSWRHT0V6DLMyODc/lEFOYHgVZ+b74neysosePMikrt4u j8zNQYxCh7F7+m7qpMSG3+tKwSwY+/T6r/dXGpheGstrCT40jCEB1X0WsJJC2jeoQBHG hV2+OTohYdvQvw1p7eTEotXolPFFpjfQsjQNvXNG86wuhn/B9TD5aXmlM5OcbI8gOlIu +dxAOybAp7OH9HW6FGsehtxe9Ov29Z+08q8Tv+RzPCSfmow9Uo4UUtu9dttWqwtKWkIz sK2Z+2Ky8K6o3egCPR/m/ZHigcqFdzMCW/8/EyeOVgDIFVv79mrTCpguF+mcMVo8chit UOaA== X-Gm-Message-State: AOAM531zKynon7GhWyYrg4w84ScRy5BY8tX6aB986JbjBp+Gy05DiUgs UJWH92IuWBjrgx34QpTiLqrFBocjrb0= X-Google-Smtp-Source: ABdhPJz9ttxsRiszpElW2T+klCpdvZGzurgBYu4mcaVfbcjKn2K576/AGqoxjsy3M7WG51sOXPLruw== X-Received: by 2002:a1c:6a0b:: with SMTP id f11mr9111010wmc.114.1622912687664; Sat, 05 Jun 2021 10:04:47 -0700 (PDT) Received: from debby (176-141-241-253.abo.bbox.fr. [176.141.241.253]) by smtp.gmail.com with ESMTPSA id w13sm9053230wmi.4.2021.06.05.10.04.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Jun 2021 10:04:47 -0700 (PDT) From: Romain Perier To: Wim Van Sebroeck , Guenter Roeck , Rob Herring Cc: Daniel Palmer , Mohammed Billoo , linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 1/3] dt-bindings: watchdog: Add Mstar MSC313e WDT devicetree bindings documentation Date: Sat, 5 Jun 2021 19:04:39 +0200 Message-Id: <20210605170441.33667-2-romain.perier@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210605170441.33667-1-romain.perier@gmail.com> References: <20210605170441.33667-1-romain.perier@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the documentation for the devicetree bindings of the Mstar MSC313e watchdog driver, found from MSC313e SoCs and newer. Signed-off-by: Romain Perier Reviewed-by: Rob Herring --- .../bindings/watchdog/mstar,msc313e-wdt.yaml | 40 +++++++++++++++++++ 1 file changed, 40 insertions(+) create mode 100644 Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml diff --git a/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml b/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml new file mode 100644 index 000000000000..e3e8b86dbf63 --- /dev/null +++ b/Documentation/devicetree/bindings/watchdog/mstar,msc313e-wdt.yaml @@ -0,0 +1,40 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/watchdog/mstar,msc313e-wdt.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: MStar Watchdog Device Tree Bindings + +maintainers: + - Daniel Palmer + - Romain Perier + +allOf: + - $ref: watchdog.yaml# + +properties: + compatible: + enum: + - mstar,msc313e-wdt + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + +required: + - compatible + - clocks + - reg + +unevaluatedProperties: false + +examples: + - | + watchdog@6000 { + compatible = "mstar,msc313e-wdt"; + reg = <0x6000 0x1f>; + clocks = <&xtal_div2>; + }; From patchwork Sat Jun 5 17:04:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 455119 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 814ABC4743D for ; Sat, 5 Jun 2021 17:05:08 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 6B3316140F for ; Sat, 5 Jun 2021 17:05:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230127AbhFERGz (ORCPT ); Sat, 5 Jun 2021 13:06:55 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56100 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230035AbhFERGx (ORCPT ); Sat, 5 Jun 2021 13:06:53 -0400 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 62C12C061767; Sat, 5 Jun 2021 10:04:51 -0700 (PDT) Received: by mail-wm1-x331.google.com with SMTP id o2-20020a05600c4fc2b029019a0a8f959dso7363395wmq.1; Sat, 05 Jun 2021 10:04:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=H2dzrTPACWoZhzeY23oXIHHW8jaNglvRmp0sLx+7uaE=; b=RvHhUST1c9V/Hq4YRWWSSpxBpO2CQGYWJZ6EY0zglLToQUk31Y8bXcOEZiFBgWiDGm 5hMTYhwfd6TGPLnUYfB2CbSUabFVu1JVwhjwFBdM2PUPsno/8/bj7gTl3Tget648Vcv2 WvZj/5KRrNuu+Vb7gQu0AasoozLQTJAOPLZCLSutW/YFYMyUU5ESY81EgzFnzODCkoFp BjnAFYvhDOg4n6wMQWtyONabZS2ggVyIrZExgmQjGYYjOcPMEzwUVILdbF0jwX46DTP7 gccXZA7OBHRFSOlfjn4SQ8Lz32Gu2RJ5qgq52FqnOx6yegYQYVIM7mZa2TMqWlnLH0Bu S4QQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H2dzrTPACWoZhzeY23oXIHHW8jaNglvRmp0sLx+7uaE=; b=uLdYBraca74B6QIKkqYTD0Pg8WHkaeDZ5QacvskLwgo1QVtBjbYsNh9EI5KyUl2u3w 7V0nFbZNz6OBro1oE9lIYDxNRMmddIjqR8jWnccosB66NV78uFdNWE3IB2KjYQZsppG2 Y5gvpFEzRuw77+KRzZsvFbJgfXII1cP6Vb3V+M4o5ngsAlB7o9Se3yU0k3w3uKhuqbp1 u62TM3cnHTAR+Ya7nEX/7pWkf23GFeIiMkIP6UO9QKYrV3TepM7eRBUSGrPEuenOinzm p2wQ7tFEI0RBo1k14UP5knHCxc4zxdJrvIUXNGt9iRYyZ2QGmJFgF58Wp6WZN7HY3GK4 p2RQ== X-Gm-Message-State: AOAM5300CpaGisBMxLMLeTjX8Fui0FKrrk0GZo4eM/z0z6TbY1MSjX6R 8EP80rKnX/QqYKNkBzzjGc3lyUA67ZU= X-Google-Smtp-Source: ABdhPJxVITFMwtnxbKoXKbqd6xgvCq2LvQqyTpSno3zIcPl+G8y2RnfzvVvxOmP0tnH8Btn3U/8cxQ== X-Received: by 2002:a05:600c:410c:: with SMTP id j12mr8808203wmi.117.1622912688870; Sat, 05 Jun 2021 10:04:48 -0700 (PDT) Received: from debby (176-141-241-253.abo.bbox.fr. [176.141.241.253]) by smtp.gmail.com with ESMTPSA id l16sm12214214wmj.47.2021.06.05.10.04.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Jun 2021 10:04:48 -0700 (PDT) From: Romain Perier To: Wim Van Sebroeck , Guenter Roeck , Rob Herring Cc: Daniel Palmer , Mohammed Billoo , linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 2/3] watchdog: Add Mstar MSC313e WDT driver Date: Sat, 5 Jun 2021 19:04:40 +0200 Message-Id: <20210605170441.33667-3-romain.perier@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210605170441.33667-1-romain.perier@gmail.com> References: <20210605170441.33667-1-romain.perier@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Daniel Palmer It adds a driver for the IP block handling the watchdog timer found for Mstar MSC313e SoCs and newer. Signed-off-by: Daniel Palmer Co-developed-by: Romain Perier Signed-off-by: Romain Perier --- MAINTAINERS | 1 + drivers/watchdog/Kconfig | 12 +++ drivers/watchdog/Makefile | 1 + drivers/watchdog/msc313e_wdt.c | 166 +++++++++++++++++++++++++++++++++ 4 files changed, 180 insertions(+) create mode 100644 drivers/watchdog/msc313e_wdt.c diff --git a/MAINTAINERS b/MAINTAINERS index a0f37adb9e64..fcc10c57298c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2177,6 +2177,7 @@ F: arch/arm/mach-mstar/ F: drivers/clk/mstar/ F: drivers/gpio/gpio-msc313.c F: drivers/pinctrl/pinctrl-msc313.c +F: drivers/watchdog/msc313e_wdt.c F: include/dt-bindings/clock/mstar-* F: include/dt-bindings/gpio/msc313-gpio.h F: include/soc/mstar/ diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index 355100dad60a..4af84df1ce22 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -980,6 +980,18 @@ config VISCONTI_WATCHDOG Say Y here to include support for the watchdog timer in Toshiba Visconti SoCs. +config MSC313E_WATCHDOG + tristate "MStar MSC313e watchdog" + depends on ARCH_MSTARV7 || COMPILE_TEST + select WATCHDOG_CORE + help + Say Y here to include support for the Watchdog timer embedded + into MStar MSC313e chips. This will reboot your system when the + timeout is reached. + + To compile this driver as a module, choose M here: the + module will be called msc313e_wdt. + # X86 (i386 + ia64 + x86_64) Architecture config ACQUIRE_WDT diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index a7eade8b4d45..7fa392ae3000 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -92,6 +92,7 @@ obj-$(CONFIG_SPRD_WATCHDOG) += sprd_wdt.o obj-$(CONFIG_PM8916_WATCHDOG) += pm8916_wdt.o obj-$(CONFIG_ARM_SMC_WATCHDOG) += arm_smc_wdt.o obj-$(CONFIG_VISCONTI_WATCHDOG) += visconti_wdt.o +obj-$(CONFIG_MSC313E_WATCHDOG) += msc313e_wdt.o # X86 (i386 + ia64 + x86_64) Architecture obj-$(CONFIG_ACQUIRE_WDT) += acquirewdt.o diff --git a/drivers/watchdog/msc313e_wdt.c b/drivers/watchdog/msc313e_wdt.c new file mode 100644 index 000000000000..0d497aa0fb7d --- /dev/null +++ b/drivers/watchdog/msc313e_wdt.c @@ -0,0 +1,166 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * MStar WDT driver + * + * Copyright (C) 2019 - 2021 Daniel Palmer + * Copyright (C) 2021 Romain Perier + * + */ + +#include +#include +#include +#include +#include +#include + +#define REG_WDT_CLR 0x0 +#define REG_WDT_MAX_PRD_L 0x10 +#define REG_WDT_MAX_PRD_H 0x14 + +#define MSC313E_WDT_MIN_TIMEOUT 1 +#define MSC313E_WDT_DEFAULT_TIMEOUT 30 + +static unsigned int timeout; + +module_param(timeout, int, 0); +MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds"); + +struct msc313e_wdt_priv { + void __iomem *base; + struct watchdog_device wdev; + struct clk *clk; +}; + +static int msc313e_wdt_start(struct watchdog_device *wdev) +{ + struct msc313e_wdt_priv *priv = watchdog_get_drvdata(wdev); + u32 timeout; + int err; + + err = clk_prepare_enable(priv->clk); + if (err) + return err; + + timeout = wdev->timeout * clk_get_rate(priv->clk); + writew(timeout & 0xffff, priv->base + REG_WDT_MAX_PRD_L); + writew((timeout >> 16) & 0xffff, priv->base + REG_WDT_MAX_PRD_H); + writew(1, priv->base + REG_WDT_CLR); + return 0; +} + +static int msc313e_wdt_ping(struct watchdog_device *wdev) +{ + struct msc313e_wdt_priv *priv = watchdog_get_drvdata(wdev); + + writew(1, priv->base + REG_WDT_CLR); + return 0; +} + +static int msc313e_wdt_stop(struct watchdog_device *wdev) +{ + struct msc313e_wdt_priv *priv = watchdog_get_drvdata(wdev); + + writew(0, priv->base + REG_WDT_MAX_PRD_L); + writew(0, priv->base + REG_WDT_MAX_PRD_H); + writew(0, priv->base + REG_WDT_CLR); + clk_disable_unprepare(priv->clk); + return 0; +} + +static int msc313e_wdt_settimeout(struct watchdog_device *wdev, unsigned int new_time) +{ + wdev->timeout = new_time; + + return msc313e_wdt_start(wdev); +} + +static const struct watchdog_info msc313e_wdt_ident = { + .identity = "MSC313e watchdog", + .options = WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING | WDIOF_SETTIMEOUT, +}; + +static const struct watchdog_ops msc313e_wdt_ops = { + .owner = THIS_MODULE, + .start = msc313e_wdt_start, + .stop = msc313e_wdt_stop, + .ping = msc313e_wdt_ping, + .set_timeout = msc313e_wdt_settimeout, +}; + +static const struct of_device_id msc313e_wdt_of_match[] = { + { .compatible = "mstar,msc313e-wdt", }, + { /* sentinel */ } +}; +MODULE_DEVICE_TABLE(of, msc313e_wdt_of_match); + +static int msc313e_wdt_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct msc313e_wdt_priv *priv; + + priv = devm_kzalloc(&pdev->dev, sizeof(*priv), GFP_KERNEL); + if (!priv) + return -ENOMEM; + + priv->base = devm_platform_ioremap_resource(pdev, 0); + if (IS_ERR(priv->base)) + return PTR_ERR(priv->base); + + priv->clk = devm_clk_get(dev, NULL); + if (IS_ERR(priv->clk)) { + dev_err(dev, "No input clock\n"); + return PTR_ERR(priv->clk); + } + + priv->wdev.info = &msc313e_wdt_ident, + priv->wdev.ops = &msc313e_wdt_ops, + priv->wdev.parent = dev; + priv->wdev.min_timeout = MSC313E_WDT_MIN_TIMEOUT; + priv->wdev.max_timeout = U32_MAX / clk_get_rate(priv->clk); + priv->wdev.timeout = MSC313E_WDT_DEFAULT_TIMEOUT; + + watchdog_set_drvdata(&priv->wdev, priv); + + watchdog_init_timeout(&priv->wdev, timeout, dev); + watchdog_stop_on_reboot(&priv->wdev); + watchdog_stop_on_unregister(&priv->wdev); + + return devm_watchdog_register_device(dev, &priv->wdev); +} + +static int __maybe_unused msc313e_wdt_suspend(struct device *dev) +{ + struct msc313e_wdt_priv *priv = dev_get_drvdata(dev); + + if (watchdog_active(&priv->wdev)) + msc313e_wdt_stop(&priv->wdev); + + return 0; +} + +static int __maybe_unused msc313e_wdt_resume(struct device *dev) +{ + struct msc313e_wdt_priv *priv = dev_get_drvdata(dev); + + if (watchdog_active(&priv->wdev)) + msc313e_wdt_start(&priv->wdev); + + return 0; +} + +static SIMPLE_DEV_PM_OPS(msc313e_wdt_pm_ops, msc313e_wdt_suspend, msc313e_wdt_resume); + +static struct platform_driver msc313e_wdt_driver = { + .driver = { + .name = "msc313e-wdt", + .of_match_table = msc313e_wdt_of_match, + .pm = &msc313e_wdt_pm_ops, + }, + .probe = msc313e_wdt_probe, +}; +module_platform_driver(msc313e_wdt_driver); + +MODULE_AUTHOR("Daniel Palmer "); +MODULE_DESCRIPTION("Watchdog driver for MStar MSC313e"); +MODULE_LICENSE("GPL v2"); From patchwork Sat Jun 5 17:04:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Romain Perier X-Patchwork-Id: 454753 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,FREEMAIL_FORGED_FROMDOMAIN,FREEMAIL_FROM, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EB6DC4743E for ; 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[176.141.241.253]) by smtp.gmail.com with ESMTPSA id z19sm11201170wmf.31.2021.06.05.10.04.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 05 Jun 2021 10:04:49 -0700 (PDT) From: Romain Perier To: Wim Van Sebroeck , Guenter Roeck , Rob Herring Cc: Daniel Palmer , Mohammed Billoo , linux-watchdog@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v3 3/3] ARM: dts: mstar: Add watchdog device_node definition Date: Sat, 5 Jun 2021 19:04:41 +0200 Message-Id: <20210605170441.33667-4-romain.perier@gmail.com> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20210605170441.33667-1-romain.perier@gmail.com> References: <20210605170441.33667-1-romain.perier@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds the definition of both an oscillator at 12Mhz required by the the watchdog and the watchdog device_node. Signed-off-by: Romain Perier --- arch/arm/boot/dts/mstar-v7.dtsi | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index 3d5d8c634de3..471d005e2e62 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -62,6 +62,14 @@ rtc_xtal: rtc_xtal { clock-frequency = <32768>; status = "disabled"; }; + + xtal_div2: xtal_div2 { + #clock-cells = <0>; + compatible = "fixed-factor-clock"; + clocks = <&xtal>; + clock-div = <2>; + clock-mult = <1>; + }; }; soc: soc { @@ -119,6 +127,12 @@ pm_irin_pins: pm_irin { }; }; + watchdog@6000 { + compatible = "mstar,msc313e-wdt"; + reg = <0x6000 0x1f>; + clocks = <&xtal_div2>; + }; + intc_fiq: interrupt-controller@201310 { compatible = "mstar,mst-intc"; reg = <0x201310 0x40>;