From patchwork Mon Jul 23 10:08:22 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 142558 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5862389ljj; Mon, 23 Jul 2018 03:09:16 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfjqjg/tufih8iFpUxbsHSagfa49e8aDeRhw03OA6PVnoAARaOzQJWTlMBWK2BMIlNDrR6u X-Received: by 2002:a17:902:7688:: with SMTP id m8-v6mr12230056pll.338.1532340556419; Mon, 23 Jul 2018 03:09:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532340556; cv=none; d=google.com; s=arc-20160816; b=pkl1+95Q0J7gO4TiumAtb6aepiG4/GbW/HvUMI8Ecx3Bwjh8VRZO9Tfa0eu/Qu6Qyq I9dUh9/j1XBOGYVxqYYHzccqVS89ge36wyqc6oQcnfsDAOLDUPb0Gi/mCNbgfAe0mp+U yttYz5JSXhLLlFuEZnYzOH0NlUanXr49ba5m4UkJ3WK1WO2eu1/el6Ul7qjKmO/idaNi wJE2prtooEMaTZQepnPHmJH3pTR3AhSe0je4bwy0ld3PKp4dOl8tl34P8iFXYoT7DV28 rvWBJfDcNS4kMr0y41Dy1GomVveuC2KF2rn+au5SEzMzckvOthUC469tejy/nCaRHZZl aatw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=pXtHcthF1Aq4t5hDmvnE87mFop3sUmCPDU1eY3bcuq4=; b=kN7fvFT4Te25TzD7rFtp6ED6LKpT6tfRDULo2c3nEOvI431JuC9CeJw3XUhskeBO1X d0dttZ66rHQVS4LzP5cEdYjfpftT8mn1U4mku8Ak2TI8DO6wliYewtEk3PFq7HELCGL9 ZN4c2cy7zByS4eNBLTGznl9niZObli+8XRuv2d5MYQW/j658MR5abCCjatEsMot8sHYM g4thr1IyMWRUydQmEG7TbXEAx1W/seOvbLb8nn6h62OaGIzQEzWanzyKQSzobaK5MKDF APxzmG3+yy/OUygrPfZTh84R2HjwYE+3JOzj2sQL+O0lrwH5pehsFVDSaXM11tOpbvRZ 9SkA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=GzGfZSyD; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i2-v6si8310691pgh.565.2018.07.23.03.09.16; Mon, 23 Jul 2018 03:09:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=GzGfZSyD; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388137AbeGWLJl (ORCPT + 5 others); Mon, 23 Jul 2018 07:09:41 -0400 Received: from mail-pl0-f68.google.com ([209.85.160.68]:33364 "EHLO mail-pl0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388263AbeGWLJk (ORCPT ); Mon, 23 Jul 2018 07:09:40 -0400 Received: by mail-pl0-f68.google.com with SMTP id 6-v6so35275plb.0 for ; Mon, 23 Jul 2018 03:09:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=M7vCwreaGTb+OgwtgSaE5FF7B3FBPIGjJoxy7kBg1p8=; b=GzGfZSyDMO7pnTpQYplG/G3gF4dCd7uTJK/VLknFdGTrdXP+mJpzqfCpRHgonVzvQh lJTAxiO2nVHdbSB6RZZLwlbkINaaeP/FgS0xue+QX2mnBpQ2mEaGAh7b+LQ2GHy0JAuF DVRCCAohrNKYpT5+7fAi0GNaJGyne2QbJmul8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=M7vCwreaGTb+OgwtgSaE5FF7B3FBPIGjJoxy7kBg1p8=; b=p4yURTurRqAPl919iauBlqwS5o5qQzZJM/NzAdDYGxv8Ik5e0oA4MauplLpF7zQ5ah YKMkDU9SX5dh+BKhFQs4G3dFmN+GvQuJYfFbckPMTdmQTKvOt/Y+mC6/D7ABqa8Ou8tN cc1RG1Ir/gyDB2Fdq8irblx3EZQCPm5MAvnGAYOaGkMDhpRUa3m6KUejyBeWLMqU0XIT 4nAL4AxYupxEcq4ANZHBnI2S1AAaLWXlIlrqQ2+1elJIzdTcjrKgG0OHSCRga+YbXU8W VcGBHzAqm9ra+6GtKwu3QZbsTxbXEDQIrlAOB7ynL9yo4kZIYK81hgNM1x9dQtqFuRGl 4uLg== X-Gm-Message-State: AOUpUlEjGPo83aDBiSvSly74Lem0DYfm9V+eV43p5XyNjDXAdTBBhLBe v6sYi9GYrugTzqBxVBC9mPs7GQ== X-Received: by 2002:a17:902:900b:: with SMTP id a11-v6mr12347410plp.143.1532340554034; Mon, 23 Jul 2018 03:09:14 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id e82-v6sm13470698pfk.87.2018.07.23.03.09.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Jul 2018 03:09:13 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , Jason Wu , zhang.lyra@gmail.com Subject: [PATCH V4 1/7] mmc: sdhci: add sd host v4 mode Date: Mon, 23 Jul 2018 18:08:22 +0800 Message-Id: <1532340508-8749-2-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532340508-8749-1-git-send-email-zhang.chunyan@linaro.org> References: <1532340508-8749-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org For SD host controller version 4.00 or later ones, there're two modes of implementation - Version 3.00 compatible mode or Version 4 mode. This patch introduced an interface to enable v4 mode. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 28 ++++++++++++++++++++++++++++ drivers/mmc/host/sdhci.h | 5 +++++ 2 files changed, 33 insertions(+) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 1c828e0..cab5350 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -123,6 +123,30 @@ EXPORT_SYMBOL_GPL(sdhci_dumpregs); * * \*****************************************************************************/ +static void sdhci_do_enable_v4_mode(struct sdhci_host *host) +{ + u16 ctrl2; + + ctrl2 = sdhci_readb(host, SDHCI_HOST_CONTROL2); + if (ctrl2 & SDHCI_CTRL_V4_MODE) + return; + + ctrl2 |= SDHCI_CTRL_V4_MODE; + sdhci_writeb(host, ctrl2, SDHCI_HOST_CONTROL); +} + +/* + * Vendor's Host Controller which supports v4 mode can call + * this function to enable v4 mode before calling + * __sdhci_add_host(). + */ +void sdhci_enable_v4_mode(struct sdhci_host *host) +{ + host->v4_mode = true; + sdhci_do_enable_v4_mode(host); +} +EXPORT_SYMBOL_GPL(sdhci_enable_v4_mode); + static inline bool sdhci_data_line_cmd(struct mmc_command *cmd) { return cmd->data || cmd->flags & MMC_RSP_BUSY; @@ -224,6 +248,10 @@ static void sdhci_do_reset(struct sdhci_host *host, u8 mask) /* Resetting the controller clears many */ host->preset_enabled = false; + + if (host->v4_mode) + sdhci_do_enable_v4_mode(host); + } } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index 23966f8..519d939 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -184,6 +184,7 @@ #define SDHCI_CTRL_DRV_TYPE_D 0x0030 #define SDHCI_CTRL_EXEC_TUNING 0x0040 #define SDHCI_CTRL_TUNED_CLK 0x0080 +#define SDHCI_CTRL_V4_MODE 0x1000 #define SDHCI_CTRL_PRESET_VAL_ENABLE 0x8000 #define SDHCI_CAPABILITIES 0x40 @@ -565,6 +566,9 @@ struct sdhci_host { u64 data_timeout; + /* Host Version 4 Enable */ + bool v4_mode; + unsigned long private[0] ____cacheline_aligned; }; @@ -747,5 +751,6 @@ bool sdhci_cqe_irq(struct sdhci_host *host, u32 intmask, int *cmd_error, int *data_error); void sdhci_dumpregs(struct sdhci_host *host); +void sdhci_enable_v4_mode(struct sdhci_host *host); #endif /* __SDHCI_HW_H */ From patchwork Mon Jul 23 10:08:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 142559 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5862458ljj; Mon, 23 Jul 2018 03:09:20 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfFoTcELEWoPrRpoRWoa+alrmjHQi7sxL9K/kjUfLfNXf7XHQAwujhUNxSbHBNIwAsDQvV0 X-Received: by 2002:a17:902:bf06:: with SMTP id bi6-v6mr6480460plb.76.1532340560854; Mon, 23 Jul 2018 03:09:20 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532340560; cv=none; d=google.com; s=arc-20160816; b=BvfcN+KXsw9FlmiyEkwIQ/Pg37Kl3f3RcQz7WtQd307vBfZ5mSZlyblcgB/1XUCoIU gjkugnJZOGiO0Xsc6yW7IN4++H0NaeofDHP8ITJAcab0w8abdBWUaPXBl0p+He2pfgF6 5m6ffCHkj6LDeo8aO0F1i2t9LBBg2uO2xubwqQy2E97GmGErCaNLFdmylURVvz3cjwjO 7BaFPOj6NhSpfwXI5K41kGXOAr7UnTt1S3rXCNiTA+dhQUzCtLE4atSlh18zbnGM7jbL bhSAyjK/6J2o4chfltY+oAo5Y9fAuBZuaocU3KWIDejjuBwnPtkoJmOAKD1H2nJ1H+Bt jd+Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=r3bq5nEKMFMRh5i3hUlIDjJKG4aq/jFWMjz+PBnglkk=; b=jnebdk2TXV5RD+tXrNlRGrso5eo0qNa965jt/iL6zYdh8Xln2UI6vT9rPAMVeH+uY0 15v7/T69C0GkVpvGSa5tmcQoatQsyMONL70x1o1JNk3tCmdIy6oWsV3bE/2QBx9+e5k/ F6T4U7MZZcvLxYTPj8N59jablYqSsGLvt/+hjzXqxfhWxxenSdI/COf5cc2BpaURPtkV hyaUwcaQutZobYJemXvldyIo1ohPLdlIYWv2YixbS8ERLzt+0Og1buq1il9t0ZHxf/60 heMTCTMc6V5gUDtaO+/AFVaBh1NMfXJr28tlkqTmvVrCdkDH1wC5X75Ac6t5o8QYpVJJ Z0nA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=DFJDOtVX; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 1-v6si7722547plj.411.2018.07.23.03.09.20; Mon, 23 Jul 2018 03:09:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=DFJDOtVX; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388358AbeGWLJq (ORCPT + 5 others); Mon, 23 Jul 2018 07:09:46 -0400 Received: from mail-pg1-f195.google.com ([209.85.215.195]:41939 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388357AbeGWLJp (ORCPT ); Mon, 23 Jul 2018 07:09:45 -0400 Received: by mail-pg1-f195.google.com with SMTP id z8-v6so44720pgu.8 for ; Mon, 23 Jul 2018 03:09:19 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=6U0oFcYatVgQm3/eP8KlsQEUgCN13nFxxwM/5+0rxN4=; b=DFJDOtVXyhlEZdjc+WhJtSMgDZYQ+etpTgSIkgvz7Iy9gCFUxFT8ZKbLv6yWnnVG7g OwO7zp+PVVwv6iiP/m+2f7U3U4b2tYQEEp2VsYDueahuhtBjiSwjXCOy21Sp3ONGtc4X Dgd/8sOiW4a3S+9338g3StHq1WZ87dvBhzrJM= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=6U0oFcYatVgQm3/eP8KlsQEUgCN13nFxxwM/5+0rxN4=; b=sExjvZC+sEa9q6/DoHzLaqivh6Uqv0iIKvMY4/Zd0EI03cboUWUKra+Gs0zLYPpXyD 7BMSVkTq1xW0njpVvIlz6TQRL88qULbadFvXl5cWQx0YTzn+xm0ezYfXg3SgX1NLQrn/ NBOi2IihPkR8I6p0pY9i44ZulEul3m1NpmjUhOkm1jWIeXnsD9g9AWpEhnt7fzLIBkhb S0mJVZfiU4weQKygJ78bvLKXvJyayH1eY8APIj8zGijMSjupon0jFwBFr6bcyOWmvI/M hAB9lTbUl9aGefQbBdStpd90cD2mzELAcd53CTFFV+TVC/IjMa6ND4SFscWello5M08m CH3Q== X-Gm-Message-State: AOUpUlEgRUEFAzD6yWtntk9in/9BPfFRRQBQA4BVwSK2d+mYzeURssox N1p5SGMIlnYkUsG6ZjyBGL7LFg== X-Received: by 2002:a63:5350:: with SMTP id t16-v6mr11450113pgl.196.1532340558854; Mon, 23 Jul 2018 03:09:18 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id e82-v6sm13470698pfk.87.2018.07.23.03.09.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Jul 2018 03:09:18 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , Jason Wu , zhang.lyra@gmail.com Subject: [PATCH V4 2/7] mmc: sdhci: Change SDMA address register for v4 mode Date: Mon, 23 Jul 2018 18:08:23 +0800 Message-Id: <1532340508-8749-3-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532340508-8749-1-git-send-email-zhang.chunyan@linaro.org> References: <1532340508-8749-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org According to the SD host controller specification version 4.10, when Host Version 4 is enabled, SDMA uses ADMA System Address register (05Fh-058h) instead of using SDMA System Address register to support both 32-bit and 64-bit addressing. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci.c | 29 ++++++++++++++++++++--------- 1 file changed, 20 insertions(+), 9 deletions(-) -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index cab5350..9cb17c0 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -729,7 +729,7 @@ static void sdhci_adma_table_post(struct sdhci_host *host, } } -static u32 sdhci_sdma_address(struct sdhci_host *host) +static dma_addr_t sdhci_sdma_address(struct sdhci_host *host) { if (host->bounce_buffer) return host->bounce_addr; @@ -737,6 +737,18 @@ static u32 sdhci_sdma_address(struct sdhci_host *host) return sg_dma_address(host->data->sg); } +static void sdhci_set_sdma_addr(struct sdhci_host *host, dma_addr_t addr) +{ + if (host->v4_mode) { + sdhci_writel(host, addr, SDHCI_ADMA_ADDRESS); + if (host->flags & SDHCI_USE_64_BIT_DMA) + sdhci_writel(host, (u64)addr >> 32, SDHCI_ADMA_ADDRESS_HI); + } else { + sdhci_writel(host, addr, SDHCI_DMA_ADDRESS); + } + +} + static unsigned int sdhci_target_timeout(struct sdhci_host *host, struct mmc_command *cmd, struct mmc_data *data) @@ -996,8 +1008,7 @@ static void sdhci_prepare_data(struct sdhci_host *host, struct mmc_command *cmd) SDHCI_ADMA_ADDRESS_HI); } else { WARN_ON(sg_cnt != 1); - sdhci_writel(host, sdhci_sdma_address(host), - SDHCI_DMA_ADDRESS); + sdhci_set_sdma_addr(host, sdhci_sdma_address(host)); } } @@ -2824,7 +2835,7 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) * some controllers are faulty, don't trust them. */ if (intmask & SDHCI_INT_DMA_END) { - u32 dmastart, dmanow; + dma_addr_t dmastart, dmanow; dmastart = sdhci_sdma_address(host); dmanow = dmastart + host->data->bytes_xfered; @@ -2832,12 +2843,12 @@ static void sdhci_data_irq(struct sdhci_host *host, u32 intmask) * Force update to the next DMA block boundary. */ dmanow = (dmanow & - ~(SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + + ~((dma_addr_t)SDHCI_DEFAULT_BOUNDARY_SIZE - 1)) + SDHCI_DEFAULT_BOUNDARY_SIZE; host->data->bytes_xfered = dmanow - dmastart; - DBG("DMA base 0x%08x, transferred 0x%06x bytes, next 0x%08x\n", + DBG("DMA base %pad, transferred 0x%06x bytes, next %pad\n", dmastart, host->data->bytes_xfered, dmanow); - sdhci_writel(host, dmanow, SDHCI_DMA_ADDRESS); + sdhci_set_sdma_addr(host, dmanow); } if (intmask & SDHCI_INT_DATA_END) { @@ -3581,8 +3592,8 @@ int sdhci_setup_host(struct sdhci_host *host) } } - /* SDMA does not support 64-bit DMA */ - if (host->flags & SDHCI_USE_64_BIT_DMA) + /* SDMA does not support 64-bit DMA if v4 mode not set */ + if ((host->flags & SDHCI_USE_64_BIT_DMA) && !host->v4_mode) host->flags &= ~SDHCI_USE_SDMA; if (host->flags & SDHCI_USE_ADMA) { From patchwork Mon Jul 23 10:08:27 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 142563 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5862694ljj; Mon, 23 Jul 2018 03:09:39 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdO51nEupSHC4yRV8iDjy0imjpJzgSvlxHQ+njJ7EqNHsmm+Zl4Q8GtimnRnb9SuiRmQMSx X-Received: by 2002:a63:d80f:: with SMTP id b15-v6mr11776817pgh.347.1532340579145; Mon, 23 Jul 2018 03:09:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532340579; cv=none; d=google.com; s=arc-20160816; b=cb4UgqQZomZHthZhkHa8zEKHeLynMoaab/tpPyXfV2wvjqs7Uv2xUd+ryEb60fq1qM VbOGJupDpA0SwoYMUAAFGyUh9iGBtlE0nFDMnG5Udj1at58RlRZ60/TBjkAnuj2/c0aX Htx8kmyH5Nxu9iethaNNoA0OpkdsQgMjYSDxYGSrY9AfCoN6fsaNr/niTnIaOp1Q8dFK z7KFm9CTCgCvAwP88Sk4oSyzpPapF+NvSfGUVAipiyFDpSwRy2zPGbAGJFqjPzRkvEJq cy4FU4NNQpb4lkdGd5e7cojjjIDrAgRqb6Kzf4hgIr0sepFNz9oCQhzaJoCPAP64I57n DIZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=cODzsPnf0OMJVaMY00mwKh37qBnPinUdc6PQop2/4gA=; b=nW0iUgv3OQgJoh8QJ8ViyFYA5fleU45J0ceXFE3PApJqxu/l9fz1jO98TieO52iHkP CpJkSjYNlAgW5WngxlP2IOLoIyFcj5K9W/OJQCGO2h+CDLcef7kxUGlsXJTf1SZG9l8t Ob5TbR3hIca9m+ojR6hsYP+RUJRQk3HkXDR1CBCIbmmZ1KfuynRVThh0Si3BUNIUTpZZ nQtDbFoKK8Vs2MKL7UNkwAC3gQuEwnJ0vtJlRYbnKk5bIYGgT2Zuy+hFhswFBQdTYdYD E7mr7gMyo/Vz9gC2JN4IeZo607vEc9KAw9mlm4D+13Or5Eaaw2KA0XqLPi+PRobZY3ei c8EA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=FzA1Qlmr; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w6-v6si8640385pgb.61.2018.07.23.03.09.38; Mon, 23 Jul 2018 03:09:39 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=FzA1Qlmr; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388428AbeGWLKE (ORCPT + 5 others); Mon, 23 Jul 2018 07:10:04 -0400 Received: from mail-pg1-f194.google.com ([209.85.215.194]:43294 "EHLO mail-pg1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388332AbeGWLKD (ORCPT ); Mon, 23 Jul 2018 07:10:03 -0400 Received: by mail-pg1-f194.google.com with SMTP id v13-v6so40696pgr.10 for ; Mon, 23 Jul 2018 03:09:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=0AYsQVVvkAudhQ8W3erJsSjPpr4BhaYyQ4yH9RJW23w=; b=FzA1Qlmry4SX600KVhNjuN7WnRTv/4lxBwYnDV3Ch7QBU4HPEvpAjnMx2akv3DY+BB WIfzoVs7rK8xUrEUHg7SdZXJ6K2suFRZWPQ+cYfQu/Q5wFpbgPDtt0pe402HL5luBAWD prkxw5t3nRCUsWPn2PtfD3MRFSStb+TKlXirQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=0AYsQVVvkAudhQ8W3erJsSjPpr4BhaYyQ4yH9RJW23w=; b=etwH9JqqCB6Sw/rNtFJD8HYTVrwtLiocmES+LTR91ObEP++orjuSQAPEa5WtjyrvT2 5h3f2Tx3PNOVLI/R3/2iHe2ixAZW4hJY8wahIRye8s/GuvkVbd7K1AzG1YYO+frlBUtp wQW/jpwtonSD9MuB4Yz9Pt4COlsT1Wb5CbF/qBvYK4WaUeqAEuW5XV1/vOrUknz9Ztpm EIl5/0Zfbz5YAlzhX9sg5TDrSY239vupduq5/3NHWMsCqD2yNN83mAn8PoWbsA3/Gitj ikW8Q84wn/PhaFBoDjZsIIrWiTygzIFGUe4FTvujSUcSjcWf0PpBkDV23dnOTeKsMNWy shkg== X-Gm-Message-State: AOUpUlHur5OMQm2yABEVTHiYhq1CyZen31CTBC+8sUnHuws9TlT/RFyH aZg8UXThHjw8Hhl9vM/Deacq/Q== X-Received: by 2002:a65:538e:: with SMTP id x14-v6mr11432439pgq.388.1532340576918; Mon, 23 Jul 2018 03:09:36 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id e82-v6sm13470698pfk.87.2018.07.23.03.09.32 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Jul 2018 03:09:35 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , Jason Wu , zhang.lyra@gmail.com Subject: [PATCH V4 6/7] mmc: sdhci-sprd: added Spreadtrum's initial host controller Date: Mon, 23 Jul 2018 18:08:27 +0800 Message-Id: <1532340508-8749-7-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532340508-8749-1-git-send-email-zhang.chunyan@linaro.org> References: <1532340508-8749-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Chunyan Zhang This patch adds the initial support of Secure Digital Host Controller Interface compliant controller found in some latest Spreadtrum chipsets. This patch has been tested on the version of SPRD-R11 controller. R11 is a variant based on SD v4.0 specification. With this driver, R11 mmc can be initialized, can be mounted, read and written. Original-by: Billows Wu Signed-off-by: Chunyan Zhang --- drivers/mmc/host/Kconfig | 13 ++ drivers/mmc/host/Makefile | 1 + drivers/mmc/host/sdhci-sprd.c | 455 ++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 469 insertions(+) create mode 100644 drivers/mmc/host/sdhci-sprd.c -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 0581c19..c5424dc 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -581,6 +581,19 @@ config MMC_SDRICOH_CS To compile this driver as a module, choose M here: the module will be called sdricoh_cs. +config MMC_SDHCI_SPRD + tristate "Spreadtrum SDIO host Controller" + depends on ARCH_SPRD + depends on MMC_SDHCI_PLTFM + select MMC_SDHCI_IO_ACCESSORS + help + This selects the SDIO Host Controller in Spreadtrum + SoCs, this driver supports R11(IP version: R11P0). + + If you have a controller with this interface, say Y or M here. + + If unsure, say N. + config MMC_TMIO_CORE tristate diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index 85dc132..b0b6802 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -89,6 +89,7 @@ obj-$(CONFIG_MMC_SDHCI_ST) += sdhci-st.o obj-$(CONFIG_MMC_SDHCI_MICROCHIP_PIC32) += sdhci-pic32.o obj-$(CONFIG_MMC_SDHCI_BRCMSTB) += sdhci-brcmstb.o obj-$(CONFIG_MMC_SDHCI_OMAP) += sdhci-omap.o +obj-$(CONFIG_MMC_SDHCI_SPRD) += sdhci-sprd.o obj-$(CONFIG_MMC_CQHCI) += cqhci.o ifeq ($(CONFIG_CB710_DEBUG),y) diff --git a/drivers/mmc/host/sdhci-sprd.c b/drivers/mmc/host/sdhci-sprd.c new file mode 100644 index 0000000..b467ed5 --- /dev/null +++ b/drivers/mmc/host/sdhci-sprd.c @@ -0,0 +1,455 @@ +// SPDX-License-Identifier: GPL-2.0 +// +// Secure Digital Host Controller +// +// Copyright (C) 2018 Spreadtrum, Inc. +// Author: Chunyan Zhang + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include "sdhci-pltfm.h" + +#define SDHCI_SPRD_REG_32_DLL_DLY_OFFSET 0x208 +#define SDHCIBSPRD_IT_WR_DLY_INV BIT(5) +#define SDHCI_SPRD_BIT_CMD_DLY_INV BIT(13) +#define SDHCI_SPRD_BIT_POSRD_DLY_INV BIT(21) +#define SDHCI_SPRD_BIT_NEGRD_DLY_INV BIT(29) + +#define SDHCI_SPRD_REG_32_BUSY_POSI 0x250 +#define SDHCI_SPRD_BIT_OUTR_CLK_AUTO_EN BIT(25) +#define SDHCI_SPRD_BIT_INNR_CLK_AUTO_EN BIT(24) + +#define SDHCI_SPRD_REG_DEBOUNCE 0x28C +#define SDHCI_SPRD_BIT_DLL_BAK BIT(0) +#define SDHCI_SPRD_BIT_DLL_VAL BIT(1) + +#define SDHCI_SPRD_INT_SIGNAL_MASK 0x1B7F410B + +/* SDHCI_HOST_CONTROL2 */ +#define SDHCI_SPRD_CTRL_HS200 0x0005 +#define SDHCI_SPRD_CTRL_HS400 0x0006 + +/* + * According to the standard specification, BIT(3) of SDHCI_SOFTWARE_RESET is + * reserved, and only used on Spreadtrum's design, the hardware cannot work + * if this bit is cleared. + * 1 : normal work + * 0 : hardware reset + */ +#define SDHCI_HW_RESET_CARD BIT(3) + +#define SDHCI_SPRD_MAX_CUR 0xFFFFFF +#define SDHCI_SPRD_CLK_MAX_DIV 1023 + +#define SDHCI_SPRD_CLK_DEF_RATE 26000000 + +struct sdhci_sprd_host { + u32 version; + struct clk *clk_sdio; + struct clk *clk_enable; + u32 base_rate; +}; + +#define TO_SPRD_HOST(host) sdhci_pltfm_priv(sdhci_priv(host)) + +static void sdhci_sprd_init_config(struct sdhci_host *host) +{ + u16 val; + + /* set dll backup mode */ + val = sdhci_readl(host, SDHCI_SPRD_REG_DEBOUNCE); + val |= SDHCI_SPRD_BIT_DLL_BAK | SDHCI_SPRD_BIT_DLL_VAL; + sdhci_writel(host, val, SDHCI_SPRD_REG_DEBOUNCE); +} + +static inline u32 sdhci_sprd_readl(struct sdhci_host *host, int reg) +{ + if (unlikely(reg == SDHCI_MAX_CURRENT)) + return SDHCI_SPRD_MAX_CUR; + + return readl_relaxed(host->ioaddr + reg); +} + +static inline void sdhci_sprd_writel(struct sdhci_host *host, u32 val, int reg) +{ + /* SDHCI_MAX_CURRENT is reserved on Spreadtrum's platform */ + if (unlikely(reg == SDHCI_MAX_CURRENT)) + return; + + if (unlikely(reg == SDHCI_SIGNAL_ENABLE || reg == SDHCI_INT_ENABLE)) + val = val & SDHCI_SPRD_INT_SIGNAL_MASK; + + writel_relaxed(val, host->ioaddr + reg); +} + +static inline void sdhci_sprd_writeb(struct sdhci_host *host, u8 val, int reg) +{ + /* + * Since BIT(3) of SDHCI_SOFTWARE_RESET is reserved according to the + * standard specification, sdhci_reset() write this register directly + * without checking other reserved bits, that will clear BIT(3) which + * is defined as hardware reset on Spreadtrum's platform and clearing + * it by mistake will lead the card not work. So here we need to work + * around it. + */ + if (unlikely(reg == SDHCI_SOFTWARE_RESET)) { + if (readb_relaxed(host->ioaddr + reg) & SDHCI_HW_RESET_CARD) + val |= SDHCI_HW_RESET_CARD; + } + + writeb_relaxed(val, host->ioaddr + reg); +} + +static inline void sdhci_sprd_sd_clk_off(struct sdhci_host *host) +{ + u16 ctrl = sdhci_readw(host, SDHCI_CLOCK_CONTROL); + + ctrl &= ~SDHCI_CLOCK_CARD_EN; + sdhci_writew(host, ctrl, SDHCI_CLOCK_CONTROL); +} + +static inline void +sdhci_sprd_set_dll_invert(struct sdhci_host *host, u32 mask, bool en) +{ + u32 dll_dly_offset; + + dll_dly_offset = sdhci_readl(host, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET); + if (en) + dll_dly_offset |= mask; + else + dll_dly_offset &= ~mask; + sdhci_writel(host, dll_dly_offset, SDHCI_SPRD_REG_32_DLL_DLY_OFFSET); +} + +static inline u32 sdhci_sprd_calc_div(u32 base_clk, u32 clk) +{ + u32 div; + + /* select 2x clock source */ + if (base_clk <= clk * 2) + return 0; + + div = (u32) (base_clk / (clk * 2)); + + if ((base_clk / div) > (clk * 2)) + div++; + + if (div > SDHCI_SPRD_CLK_MAX_DIV) + div = SDHCI_SPRD_CLK_MAX_DIV; + + if (div % 2) + div = (div + 1) / 2; + else + div = div / 2; + + return div; +} + +static inline void _sdhci_sprd_set_clock(struct sdhci_host *host, + unsigned int clk) +{ + struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); + u32 div, val, mask; + + div = sdhci_sprd_calc_div(sprd_host->base_rate, clk); + + clk |= ((div & 0x300) >> 2) | ((div & 0xFF) << 8); + sdhci_enable_clk(host, clk); + + /* enable auto gate sdhc_enable_auto_gate */ + val = sdhci_readl(host, SDHCI_SPRD_REG_32_BUSY_POSI); + mask = SDHCI_SPRD_BIT_OUTR_CLK_AUTO_EN | + SDHCI_SPRD_BIT_INNR_CLK_AUTO_EN; + if (mask != (val & mask)) { + val |= mask; + sdhci_writel(host, val, SDHCI_SPRD_REG_32_BUSY_POSI); + } +} + +static void sdhci_sprd_set_clock(struct sdhci_host *host, unsigned int clock) +{ + bool en = false; + + if (clock == 0) { + sdhci_writew(host, 0, SDHCI_CLOCK_CONTROL); + } else if (clock != host->clock) { + sdhci_sprd_sd_clk_off(host); + _sdhci_sprd_set_clock(host, clock); + + if (clock <= 400000) + en = true; + sdhci_sprd_set_dll_invert(host, SDHCI_SPRD_BIT_CMD_DLY_INV | + SDHCI_SPRD_BIT_POSRD_DLY_INV, en); + } else { + _sdhci_sprd_set_clock(host, clock); + } +} + +static unsigned int sdhci_sprd_get_max_clock(struct sdhci_host *host) +{ + struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); + + return clk_round_rate(sprd_host->clk_sdio, ULONG_MAX); +} + +static unsigned int sdhci_sprd_get_min_clock(struct sdhci_host *host) +{ + return 400000; +} + +static void sdhci_sprd_set_uhs_signaling(struct sdhci_host *host, + unsigned int timing) +{ + u16 ctrl_2; + + if (timing == host->timing) + return; + + ctrl_2 = sdhci_readw(host, SDHCI_HOST_CONTROL2); + /* Select Bus Speed Mode for host */ + ctrl_2 &= ~SDHCI_CTRL_UHS_MASK; + switch (timing) { + case MMC_TIMING_UHS_SDR12: + ctrl_2 |= SDHCI_CTRL_UHS_SDR12; + break; + case MMC_TIMING_MMC_HS: + case MMC_TIMING_SD_HS: + case MMC_TIMING_UHS_SDR25: + ctrl_2 |= SDHCI_CTRL_UHS_SDR25; + break; + case MMC_TIMING_UHS_SDR50: + ctrl_2 |= SDHCI_CTRL_UHS_SDR50; + break; + case MMC_TIMING_UHS_SDR104: + ctrl_2 |= SDHCI_CTRL_UHS_SDR104; + break; + case MMC_TIMING_UHS_DDR50: + case MMC_TIMING_MMC_DDR52: + ctrl_2 |= SDHCI_CTRL_UHS_DDR50; + break; + case MMC_TIMING_MMC_HS200: + ctrl_2 |= SDHCI_SPRD_CTRL_HS200; + break; + case MMC_TIMING_MMC_HS400: + ctrl_2 |= SDHCI_SPRD_CTRL_HS400; + break; + default: + break; + } + + sdhci_writew(host, ctrl_2, SDHCI_HOST_CONTROL2); +} + +static void sdhci_sprd_hw_reset(struct sdhci_host *host) +{ + int val; + + /* + * Note: don't use sdhci_writeb() API here since it is redirected to + * sdhci_sprd_writeb() in which we have a workaround for + * SDHCI_SOFTWARE_RESET which would make bit SDHCI_HW_RESET_CARD can + * not be cleared. + */ + val = readb_relaxed(host->ioaddr + SDHCI_SOFTWARE_RESET); + val &= ~SDHCI_HW_RESET_CARD; + writeb_relaxed(val, host->ioaddr + SDHCI_SOFTWARE_RESET); + /* wait for 10 us */ + usleep_range(10, 20); + + val |= SDHCI_HW_RESET_CARD; + writeb_relaxed(val, host->ioaddr + SDHCI_SOFTWARE_RESET); + usleep_range(300, 500); +} + +static struct sdhci_ops sdhci_sprd_ops = { + .read_l = sdhci_sprd_readl, + .write_l = sdhci_sprd_writel, + .write_b = sdhci_sprd_writeb, + .set_clock = sdhci_sprd_set_clock, + .get_max_clock = sdhci_sprd_get_max_clock, + .get_min_clock = sdhci_sprd_get_min_clock, + .set_bus_width = sdhci_set_bus_width, + .reset = sdhci_reset, + .set_uhs_signaling = sdhci_sprd_set_uhs_signaling, + .hw_reset = sdhci_sprd_hw_reset, +}; + +static const struct sdhci_pltfm_data sdhci_sprd_pdata = { + .quirks = SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK, + .quirks2 = SDHCI_QUIRK2_BROKEN_HS200, + .ops = &sdhci_sprd_ops, +}; + +static int sdhci_sprd_probe(struct platform_device *pdev) +{ + struct sdhci_host *host; + struct sdhci_sprd_host *sprd_host; + struct clk *clk; + int ret = 0; + + host = sdhci_pltfm_init(pdev, &sdhci_sprd_pdata, sizeof(*sprd_host)); + if (IS_ERR(host)) + return PTR_ERR(host); + + host->dma_mask = DMA_BIT_MASK(64); + pdev->dev.dma_mask = &host->dma_mask; + + host->mmc->caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED | + MMC_CAP_ERASE | MMC_CAP_CMD23; + ret = mmc_of_parse(host->mmc); + if (ret) + goto pltfm_free; + + sprd_host = TO_SPRD_HOST(host); + + clk = devm_clk_get(&pdev->dev, "sdio"); + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + goto pltfm_free; + } + sprd_host->clk_sdio = clk; + sprd_host->base_rate = clk_get_rate(sprd_host->clk_sdio); + if (!sprd_host->base_rate) + sprd_host->base_rate = SDHCI_SPRD_CLK_DEF_RATE; + + clk = devm_clk_get(&pdev->dev, "enable"); + if (IS_ERR(clk)) { + ret = PTR_ERR(clk); + goto pltfm_free; + } + sprd_host->clk_enable = clk; + + ret = clk_prepare_enable(sprd_host->clk_sdio); + if (ret) + goto pltfm_free; + + clk_prepare_enable(sprd_host->clk_enable); + if (ret) + goto clk_disable; + + sdhci_sprd_init_config(host); + host->version = sdhci_readw(host, SDHCI_HOST_VERSION); + sprd_host->version = ((host->version & SDHCI_VENDOR_VER_MASK) >> + SDHCI_VENDOR_VER_SHIFT); + + pm_runtime_get_noresume(&pdev->dev); + pm_runtime_set_active(&pdev->dev); + pm_runtime_enable(&pdev->dev); + pm_runtime_set_autosuspend_delay(&pdev->dev, 50); + pm_runtime_use_autosuspend(&pdev->dev); + pm_suspend_ignore_children(&pdev->dev, 1); + + sdhci_enable_v4_mode(host); + ret = sdhci_add_host(host); + if (ret) { + dev_err(&pdev->dev, "failed to add mmc host: %d\n", ret); + goto pm_runtime_disable; + } + + pm_runtime_mark_last_busy(&pdev->dev); + pm_runtime_put_autosuspend(&pdev->dev); + + return 0; + +pm_runtime_disable: + pm_runtime_disable(&pdev->dev); + pm_runtime_set_suspended(&pdev->dev); + + clk_disable_unprepare(sprd_host->clk_enable); + +clk_disable: + clk_disable_unprepare(sprd_host->clk_sdio); + +pltfm_free: + sdhci_pltfm_free(pdev); + return ret; +} + +static int sdhci_sprd_remove(struct platform_device *pdev) +{ + struct sdhci_host *host = platform_get_drvdata(pdev); + struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); + struct mmc_host *mmc = host->mmc; + + mmc_remove_host(mmc); + clk_disable_unprepare(sprd_host->clk_sdio); + clk_disable_unprepare(sprd_host->clk_enable); + + mmc_free_host(mmc); + + return 0; +} + +static const struct of_device_id sdhci_sprd_of_match[] = { + { .compatible = "sprd,sdhci-r11", }, + { } +}; +MODULE_DEVICE_TABLE(of, sdhci_sprd_of_match); + +#ifdef CONFIG_PM +static int sdhci_sprd_runtime_suspend(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); + + sdhci_runtime_suspend_host(host); + + clk_disable_unprepare(sprd_host->clk_sdio); + clk_disable_unprepare(sprd_host->clk_enable); + + return 0; +} + +static int sdhci_sprd_runtime_resume(struct device *dev) +{ + struct sdhci_host *host = dev_get_drvdata(dev); + struct sdhci_sprd_host *sprd_host = TO_SPRD_HOST(host); + int ret; + + ret = clk_prepare_enable(sprd_host->clk_enable); + if (ret) + return ret; + + ret = clk_prepare_enable(sprd_host->clk_sdio); + if (ret) { + clk_disable_unprepare(sprd_host->clk_enable); + return ret; + } + + sdhci_runtime_resume_host(host); + + return 0; +} +#endif + +static const struct dev_pm_ops sdhci_sprd_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, + pm_runtime_force_resume) + SET_RUNTIME_PM_OPS(sdhci_sprd_runtime_suspend, + sdhci_sprd_runtime_resume, NULL) +}; + +static struct platform_driver sdhci_sprd_driver = { + .probe = sdhci_sprd_probe, + .remove = sdhci_sprd_remove, + .driver = { + .name = "sdhci_sprd_r11", + .of_match_table = of_match_ptr(sdhci_sprd_of_match), + .pm = &sdhci_sprd_pm_ops, + }, +}; +module_platform_driver(sdhci_sprd_driver); + +MODULE_DESCRIPTION("Spreadtrum sdio host controller r11 driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:sdhci-sprd-r11"); From patchwork Mon Jul 23 10:08:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 142564 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp5862848ljj; Mon, 23 Jul 2018 03:09:48 -0700 (PDT) X-Google-Smtp-Source: AAOMgpfQS5gysbgRyi1TFBdYxRW9bAEp7/92MPIiPosd0KpuqJ87nN3iThTRuNeLLHu8mMM5TmJU X-Received: by 2002:a62:5486:: with SMTP id i128-v6mr12452873pfb.166.1532340588739; Mon, 23 Jul 2018 03:09:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532340588; cv=none; d=google.com; s=arc-20160816; b=YqsCmSHzGnTrJ/ji8Lo46lmdX/8gY3Lz87q12DGc/b8jwqxEcjCMh0J+Llvb4D/st3 LmxuBa7E/75MWmw6LLExuZVl6PWLLZbwdyog5wuEi8AydGQAUGZSBnhTi9a+JcUVLY2x TFhbXO+Yp1WV44ZilWnjGOydfyIq6A2vSRQJ1IU/cfmU5urjCjDtsXzUg6vv4b5NirPG Huqr4PKjRjc7jrcqirRMevJcpfrbOo4P4msqztoA8u2xMq6gAr32bSqYfL/3/VeMoWBB A1TqC1Hs9mYpg5pbASmDdeRTHWxrtQzEJTQcPCLe0F9I4VfYL6foiQ0Mx7zmwSXdV29f Pngg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=8pONV0lCI2C6iIohlfSctuw+fvJ6a70OGrdIyjlTXOQ=; b=Mq2t0Liem3HMhddtmKIkPEnePnbGsHCv7fHF4OiCYMs8ji27O2mjj5+rFzi+UeN5WJ TyoK49/elwE/si6o4zAVWIm5P58sULiMNdMPgp73M8yp5LQC7wSH2fO42MUmB1TbtU/0 zw2Bgg41doxq2fZ+xDAOJBcnWJ29EQQ2H4/a3wjHfTcP7QyDwqr9aWJR4uTpdOgdgL5q kqtdQPL/aOe92QsX9R1nahvTPdFhfVjWbK5R9vearY1C1vc+5N/hvy1LwffILAroHfMQ dpdnFrljW7JuXRMVyQqG6cE7UOoCDbj1kG67Tz2f2Si5cNySioTWNBqiXzXh5ese7hbs TWUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=CffCcna6; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b66-v6si7782537plb.212.2018.07.23.03.09.48; Mon, 23 Jul 2018 03:09:48 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=CffCcna6; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388445AbeGWLKI (ORCPT + 5 others); Mon, 23 Jul 2018 07:10:08 -0400 Received: from mail-pf1-f195.google.com ([209.85.210.195]:40935 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388444AbeGWLKI (ORCPT ); Mon, 23 Jul 2018 07:10:08 -0400 Received: by mail-pf1-f195.google.com with SMTP id e13-v6so10808pff.7 for ; Mon, 23 Jul 2018 03:09:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=iMrql5pChvk0l0OVuaoPU9zdtIybInbwoq7vsafDp1A=; b=CffCcna69M9mIBu8F3DaqT/aURH/Z9hNxoiO8RCU5b5PMlhWLQQv9L7Gj/38sQQDOk vV0cJJd9U86FHXvtVXrGW2SYs+E2vSneAIVEt3861zJg7ZDoOBdocwrX/WO3CdALndK2 rDut3rYidECFgGwUPm3FDxbIXlz9eD+W/+dWY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=iMrql5pChvk0l0OVuaoPU9zdtIybInbwoq7vsafDp1A=; b=VYPNmCqQPycqtrYqYfvG6CxaSnE+qhyPn71nv1S4plHy9cZM/1Afhc0YwV/rXpEO3R 9/XpjjCzeifM7LW9MrKDFkffZhKr3/hbmsc1D3/u431cXIDdmbUTBVgIIz7HTpJ/b6/E iRKAZZJgTChl5kp+ndcHGP3ExC3tjlLOY3INFcT0EaBLaro7lidJjmsJkm+f2tSs6UZe AAPHdksnt9MSw/bSaHTAdHZhqneBgBnNFEuksdrLS4sWahbjnvDoFPfE7RNmUMALyPAh WXMXX5jjYCSw7WJqQBXqmtN3hjsfa2z0O1rkVtOEXDxxxZPGHWYO4UEfkmRRVfhAmcoS lqwQ== X-Gm-Message-State: AOUpUlGhRsyfEQKUklaIq+mSlTw1t3PdPjwov+oxSdo2drjFsqiwDOVn 793jnYkkjPwJ3o0bX+4dRGdUpw== X-Received: by 2002:a62:3545:: with SMTP id c66-v6mr12569338pfa.63.1532340580981; Mon, 23 Jul 2018 03:09:40 -0700 (PDT) Received: from ubt.spreadtrum.com ([117.18.48.102]) by smtp.gmail.com with ESMTPSA id e82-v6sm13470698pfk.87.2018.07.23.03.09.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 23 Jul 2018 03:09:40 -0700 (PDT) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Orson Zhai , Baolin Wang , Billows Wu , Jason Wu , zhang.lyra@gmail.com Subject: [PATCH V4 7/7] dt-bindings: sdhci-sprd: Add bindings for the sdhci-sprd controller Date: Mon, 23 Jul 2018 18:08:28 +0800 Message-Id: <1532340508-8749-8-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1532340508-8749-1-git-send-email-zhang.chunyan@linaro.org> References: <1532340508-8749-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org From: Chunyan Zhang This patch adds the device-tree binding documentation for Spreadtrum SDHCI driver. Signed-off-by: Chunyan Zhang --- .../devicetree/bindings/mmc/sdhci-sprd.txt | 41 ++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 Documentation/devicetree/bindings/mmc/sdhci-sprd.txt -- 2.7.4 -- To unsubscribe from this list: send the line "unsubscribe linux-mmc" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt new file mode 100644 index 0000000..45c9978 --- /dev/null +++ b/Documentation/devicetree/bindings/mmc/sdhci-sprd.txt @@ -0,0 +1,41 @@ +* Spreadtrum SDHCI controller (sdhci-sprd) + +The Secure Digital (SD) Host controller on Spreadtrum SoCs provides an interface +for MMC, SD and SDIO types of cards. + +This file documents differences between the core properties in mmc.txt +and the properties used by the sdhci-sprd driver. + +Required properties: +- compatible: Should contain "sprd,sdhci-r11". +- reg: physical base address of the controller and length. +- interrupts: Interrupts used by the SDHCI controller. +- clocks: Should contain phandle for the clock feeding the SDHCI controller +- clock-names: Should contain the following: + "sdio" - SDIO source clock (required) + "enable" - gate clock which used for enabling/disabling the device (required) + +Optional properties: +- assigned-clocks: the same with "sdio" clock +- assigned-clock-parents: the default parent of "sdio" clock + +Examples: + +sdio0: sdio@20600000 { + compatible = "sprd,sdhci-r11"; + reg = <0 0x20600000 0 0x1000>; + interrupts = ; + + clock-names = "sdio", "enable"; + clocks = <&ap_clk CLK_EMMC_2X>, + <&apahb_gate CLK_EMMC_EB>; + assigned-clocks = <&ap_clk CLK_EMMC_2X>; + assigned-clock-parents = <&rpll CLK_RPLL_390M>; + + bus-width = <8>; + non-removable; + no-sdio; + no-sd; + cap-mmc-hw-reset; + status = "okay"; +};