From patchwork Sun Jun 6 15:37:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 455067 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp2074723jae; Sun, 6 Jun 2021 08:39:27 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx0RccjHOGp0NsX1vuivwH8FxzuPnpPHulBAiiPaSipi1s15Gkvap0gu2RbM+7tR+724lIQ X-Received: by 2002:a17:906:2a8e:: with SMTP id l14mr13873055eje.549.1622993967693; Sun, 06 Jun 2021 08:39:27 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622993967; cv=none; d=google.com; s=arc-20160816; b=TKFNdHzRm7wzex4mWalGEviRZPKCyNTxH9deBtZuwizDvELCfpBtmQ84FIHvOD78D4 VYpBNUYm6LPwjEvNBDicWDqxCK+7NBKUPzvMCOhoRgUC8HKDOSK8R32mA3pTIC/sCjEl v24HgegIR16P+xqkGScEhGLTjxTJnifqWO52Pb6se5mi16mV7dRWGC2uEYH71GvQgGMw 0jkfmoiciwn7DPcGmvdRTD2c0EqeTusYDOI14rQg80bieM40O51g2QeXSvBS4a0wdPs2 U7C44D44ghkbaFhhMSFh/sXnslmn9lg7IvDj+zaKe9EgTdN5/kTdbaTJGFoenZGMDi+H lRgg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=vnKyon0BcZHjnZrJ0xlKombfXzk4vzVJpJjJjwKlCw0=; b=ShsSKux8JrwWr508XKra4dqOOyjEEyrH1zGTlpFhZCG0JobyNyffCeJPWzIqDkOfT2 XzTM2I83MmTc5BS1eg+CueevBDSRvR/kJzyGOQ9eoeRyqmKhwaxkgbHAXKZJ86fWSfbp ecZCpDi6N+oz619Kot0u97CjdB3EtsQX1dja7brAjHZfAwsTz5w+kN0+tg1rh4VSPFI9 jwegXT08u0zp7OWDv8dIxdYMtShFv7UV4BrTUIaznqhjtUTnVG7jI1Rkty1pqaRm3wTt 53NANPlvuC4Q660rfONumBFYfnMJggkuBtjkldmmekQ0Y1MbuFSYBJ6SK3WcmM3jEDrN 05Lg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=S4qqQCV8; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Sun, 06 Jun 2021 08:37:51 -0700 (PDT) Received: from localhost.localdomain ([120.138.12.59]) by smtp.gmail.com with ESMTPSA id g29sm6497919pgm.11.2021.06.06.08.37.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Jun 2021 08:37:51 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, jarvis.w.jiang@gmail.com, loic.poulain@linaro.org, Manivannan Sadhasivam Subject: [PATCH 1/3] bus: mhi: pci_generic: T99W175: update channel name from AT to DUN Date: Sun, 6 Jun 2021 21:07:39 +0530 Message-Id: <20210606153741.20725-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210606153741.20725-1-manivannan.sadhasivam@linaro.org> References: <20210606153741.20725-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Jarvis Jiang According to MHI v1.1 specification, change the channel name of T99W175 from "AT" to "DUN" (Dial-up networking) for both channel 32 and 33, so that the channels can be bound to the Qcom WWAN control driver, and device node such as /dev/wwan0p3DUN will be generated, which is very useful for debugging modem Fixes: aac426562f56 ("bus: mhi: pci_generic: Introduce Foxconn T99W175 support") Signed-off-by: Jarvis Jiang Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20210429014226.21017-1-jarvis.w.jiang@gmail.com [mani: changed the dev node to /dev/wwan0p3DUN] Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.25.1 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 7c810f02a2ef..8c7f6576e421 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -311,8 +311,8 @@ static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = { MHI_CHANNEL_CONFIG_DL(5, "DIAG", 32, 1), MHI_CHANNEL_CONFIG_UL(12, "MBIM", 32, 0), MHI_CHANNEL_CONFIG_DL(13, "MBIM", 32, 0), - MHI_CHANNEL_CONFIG_UL(32, "AT", 32, 0), - MHI_CHANNEL_CONFIG_DL(33, "AT", 32, 0), + MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0), + MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0), MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 128, 2), MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 128, 3), }; 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However, that function does not wait until the timer handler finishes. This means that the timer handler may still be running after the driver's remove function has finished, which would result in a use-after-free. Fix by calling del_timer_sync(), which makes sure the timer handler has finished, and unable to re-schedule itself. Fixes: 8562d4fe34a3 ("mhi: pci_generic: Add health-check") Reported-by: Hulk Robot Signed-off-by: Wei Yongjun Reviewed-by: Hemant kumar Reviewed-by: Manivannan Sadhasivam Reviewed-by: Loic Poulain Link: https://lore.kernel.org/r/20210413160318.2003699-1-weiyongjun1@huawei.com Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.25.1 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 8c7f6576e421..0a6619ad292c 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -708,7 +708,7 @@ static void mhi_pci_remove(struct pci_dev *pdev) struct mhi_pci_device *mhi_pdev = pci_get_drvdata(pdev); struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; - del_timer(&mhi_pdev->health_check_timer); + del_timer_sync(&mhi_pdev->health_check_timer); cancel_work_sync(&mhi_pdev->recovery_work); if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { From patchwork Sun Jun 6 15:37:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 455065 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp2074155jae; Sun, 6 Jun 2021 08:38:18 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyEIqyjPTAwb6jsY1iiXdOC0ynFAHnCYNmLTvc0Gz/4vv/W6kKVmcNN0rMoBd2Rdtr0T0Aa X-Received: by 2002:aa7:d304:: with SMTP id p4mr15538279edq.29.1622993898431; Sun, 06 Jun 2021 08:38:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1622993898; cv=none; d=google.com; s=arc-20160816; b=YV0niPnRakyjVH2IDM5KtbVGaJFP6Zshffg94S8+Zgb9RjviadO3s8dyjB3a3zPGc6 6DONyV1Sw+6BG6aHTySMMJbhiFk80k7J9C3twU7SVIz9MOXZqf0WaWFfrvaw396/jret U/IqFkkW42Q50ZqZiLIrVfbudjA4G5CkK76Xl0wVZ1YAiqOrKWttyHWTBuBJIw0kTrOJ TWHLzaJhQUFfXbO4IMk4GIXTebpfjXfEJWQ9lyl60MDIUR5VIPKt5swhi8HZZVDTLaMj KFTiMXxl9TWjdKhlxNL/53bq/XjafJvLYiDTQH5M3u48VUP6JuImsISXFIX3aI78ulTH Oe0w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=6+x2D/lxfvdpb/kRO1O/4x7Jx1x5bjZzwFIZplCL9AU=; b=K9F1evQhMTWekwWGRo96Qt44KZORqWbybn4xAHmWto1pkbLz430V8SlP2QNZTZ/iRY P1QODbkxLkMg+hPGLwn74A52/DI4PhMfAsTiLqCbGJrMtzM5PnU3DRbV0HD5oF8iPIeR RHlb0R3QeY5AhS166djkCctVooZgWSCo2W8EEGxKZpQS0S7CWIgU3+FseC+phNK/OfGr +ocezwwVrrmOWjMmbIuovKMobZNNVWUdN3mh5ekETSW6dYxbAy7qdCsH87815Vs66wMi IjLns1Dy6ARE0Sl8vc8X7b7iGZXBEn9DgwWOMJt/G0uQWUccZFak10V0KhQ552Dx26L5 P2Lw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PhmIyidj; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id e1si4336156ejm.185.2021.06.06.08.38.18; Sun, 06 Jun 2021 08:38:18 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=PhmIyidj; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230099AbhFFPkG (ORCPT + 17 others); Sun, 6 Jun 2021 11:40:06 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:36680 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S230091AbhFFPkF (ORCPT ); Sun, 6 Jun 2021 11:40:05 -0400 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B872BC061766 for ; Sun, 6 Jun 2021 08:37:59 -0700 (PDT) Received: by mail-pj1-x102f.google.com with SMTP id pi6-20020a17090b1e46b029015cec51d7cdso8799116pjb.5 for ; Sun, 06 Jun 2021 08:37:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=6+x2D/lxfvdpb/kRO1O/4x7Jx1x5bjZzwFIZplCL9AU=; b=PhmIyidjuBJ3qAKsas3qnNHe7fOIFgvmz/lxjZn6KC+AbOCO7dgpxdNBuCgkhAuB6Y LcQKy66RF75wZxLiljYoxlZ7IMeiOEuzu7D+dRRM61wH3luJ2+wk8ppKmjq5Z7KiAZzn reuvRFeikj2powqHxqns9L5Ip3ZpyTa0VAju0DopDQ/D6CByK/6mbHRjNW+iE+JVwTpR XtYRvHAC5XKaDwyMslEuH0i62whd/IwUo1zELedlpHKZjsdMZkYvA6bZVpEO3N4Zutqp snm7RQrxRKvioADyTUbludTFW7+AHagyAHpp7jOW6WPRon17BdWME0p1lfpvhbMQkWiG 6Ukw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=6+x2D/lxfvdpb/kRO1O/4x7Jx1x5bjZzwFIZplCL9AU=; b=Lr1z/1Dh3Ae4EKa8v2n8mAKt1tHBMt2U5uBO7N6h4nWWOBG/+zP5roOUcJGByqwRag 8RNoCpX8pXwAPlevKldGi500W6mfmxYtvvpf7HYAGhO3UZ+hwhTTtVQbV93d1rnxj228 Ot5of3FA4JGuwrLPHC0uo9n43nYYzGloGg2lMyNpxWTwItPzoHgfpafq6+Eu1R5RxfAo NgiXJVxDboK7XvWMp5+w4ASRUQH4asBo4v7errf7NqbxG0JGtpFkB43I1Bch6DkZPbYi 6LH3kVChstvJXKI5Nsyjg8s6idr7fI0Bkdi3lfjF7dmE7CBlXnlfO+h0D4Yag5m7LnAz BuOA== X-Gm-Message-State: AOAM531naeTSSb25MRWyU7NcPGcYibVRBoJPF1K9SiZvx7mrBXdTU37r GV2GyyudhAaFZc/jAMlPzWTt X-Received: by 2002:a17:90a:130a:: with SMTP id h10mr1834979pja.188.1622993879272; Sun, 06 Jun 2021 08:37:59 -0700 (PDT) Received: from localhost.localdomain ([120.138.12.59]) by smtp.gmail.com with ESMTPSA id g29sm6497919pgm.11.2021.06.06.08.37.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 06 Jun 2021 08:37:58 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, jarvis.w.jiang@gmail.com, loic.poulain@linaro.org, Shujun Wang , Manivannan Sadhasivam Subject: [PATCH 3/3] bus: mhi: pci-generic: Fix hibernation Date: Sun, 6 Jun 2021 21:07:41 +0530 Message-Id: <20210606153741.20725-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210606153741.20725-1-manivannan.sadhasivam@linaro.org> References: <20210606153741.20725-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Loic Poulain This patch fixes crash after resuming from hibernation. The issue occurs when mhi stack is builtin and so part of the 'restore-kernel', causing the device to be resumed from 'restored kernel' with a no more valid context (memory mappings etc...) and leading to spurious crashes. This patch fixes the issue by implementing proper freeze/restore callbacks. Reported-by: Shujun Wang Signed-off-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1622571445-4505-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 36 ++++++++++++++++++++++++++++++++++- 1 file changed, 35 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 0a6619ad292c..b3357a8a2fdb 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -935,9 +935,43 @@ static int __maybe_unused mhi_pci_resume(struct device *dev) return ret; } +static int __maybe_unused mhi_pci_freeze(struct device *dev) +{ + struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); + struct mhi_controller *mhi_cntrl = &mhi_pdev->mhi_cntrl; + + /* We want to stop all operations, hibernation does not guarantee that + * device will be in the same state as before freezing, especially if + * the intermediate restore kernel reinitializes MHI device with new + * context. + */ + if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { + mhi_power_down(mhi_cntrl, false); + mhi_unprepare_after_power_down(mhi_cntrl); + } + + return 0; +} + +static int __maybe_unused mhi_pci_restore(struct device *dev) +{ + struct mhi_pci_device *mhi_pdev = dev_get_drvdata(dev); + + /* Reinitialize the device */ + queue_work(system_long_wq, &mhi_pdev->recovery_work); + + return 0; +} + static const struct dev_pm_ops mhi_pci_pm_ops = { SET_RUNTIME_PM_OPS(mhi_pci_runtime_suspend, mhi_pci_runtime_resume, NULL) - SET_SYSTEM_SLEEP_PM_OPS(mhi_pci_suspend, mhi_pci_resume) +#ifdef CONFIG_PM_SLEEP + .suspend = mhi_pci_suspend, + .resume = mhi_pci_resume, + .freeze = mhi_pci_freeze, + .thaw = mhi_pci_restore, + .restore = mhi_pci_restore, +#endif }; static struct pci_driver mhi_pci_driver = {