From patchwork Mon Jul 23 21:26:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ivan Khoronzhuk X-Patchwork-Id: 142657 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp6513316ljj; Mon, 23 Jul 2018 14:27:23 -0700 (PDT) X-Google-Smtp-Source: AAOMgpdM35iPw7UJIgLPSAqFBpfhsDmzAtTtvvX0+HmnKwne7bIr6jz56XySDS4+G8HWqzBlvOBU X-Received: by 2002:a63:82c7:: with SMTP id w190-v6mr13701759pgd.253.1532381243474; Mon, 23 Jul 2018 14:27:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532381243; cv=none; d=google.com; s=arc-20160816; b=wR4GQZuCqF3hOBFkHtN0jm2lifVVKcV3tZwOf1ycvA/WKuzKokg/IJH+cMYEaPwZF6 Sx0/WpD7v6peryQdojtsH+L3ASUT9WPcoS4OQEgGA5bBYGlNyAqjW377CwAMaaUv8mmD PbljhSY7ZZEFD22aY9vrsyqVBEDqgLu/w5LC6AIxobG6TnawrnzRrh+4ZFcLRHoIM5+U +5B8cJitoAjZbTM6u6aS/JiWB7Z7ZgKkOeF6Edp6EmZBXjNDM7b8Rk6e7uW7vas9Cg2P xomK3A1u5kFHGdzfTrxbEF/j+OVjIQQO06Jdt4FxQ5NaxsIl95eyTYmU5l0d5EXP+ytZ JE/w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=d6SxujkB7i/NOWSEmFn7FILLzZO3VffxZbLkIMwnwbU=; b=B2IAqF+jrlBu0Hse7fZZy7xOFHcgvwuLuJj48YqS28Nb98I3FIVyGvrxXhLz2j78V9 lncGFRehoDtwOCWeM7r0mrgFgSXhDFrcbLX1T2Biu7cTvd6FAAfNgqhizzJCdDmJXoro 92tugtlvwtWsFox4pJ2at4OLyo0TTynBbi3aK4HCTdwMWS0T5WzA9crKE45tXuxgKrXZ QlUTSrtb0PYWPnxuIq4WUfDuLO5zfUYKnProPrKftBZsl3KkvumcOhoU/nd2Ls4lM8Q8 GcXZ1U/nV/nPp7gikj428VBmCFqxDrkNtkSDx9xOe7gs3to/QIpW9SDu+n6dXeW9CpGw YACw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SWhHNAwL; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i130-v6si9207008pgd.691.2018.07.23.14.27.23; Mon, 23 Jul 2018 14:27:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=SWhHNAwL; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388293AbeGWWaC (ORCPT + 10 others); Mon, 23 Jul 2018 18:30:02 -0400 Received: from mail-lj1-f195.google.com ([209.85.208.195]:42394 "EHLO mail-lj1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388239AbeGWWaB (ORCPT ); Mon, 23 Jul 2018 18:30:01 -0400 Received: by mail-lj1-f195.google.com with SMTP id f1-v6so1765060ljc.9 for ; Mon, 23 Jul 2018 14:26:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d6SxujkB7i/NOWSEmFn7FILLzZO3VffxZbLkIMwnwbU=; b=SWhHNAwLgWGbfrmqJEdZfMSZ0PEQC78FeGL1FkUurnJPCHnG6IVV9Uqrcu9mvQPiZt 3MZYOLNVIIRVpghDSME3KVWqIztPYgSguKZZRq90kOmOC8QzxXfXgfhldxonTWnNHwOy Z5LV6CnuEexgZIlgl+oeO+BJC75f9Xa4rW3pQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d6SxujkB7i/NOWSEmFn7FILLzZO3VffxZbLkIMwnwbU=; b=NIb6WS1Z+iCW44yTy8VkPbhcxq5OcRxQZwVLsge3FwtU8+L3i4ccgHNOiq90irBAAa VnW68Rno+FlR1C0I3fozyUdr97r4QzN+bpQHrBkGYrUzvGKSGiL+LO+tnYnQaISZA9B6 I/42HLLsOyJX7uab59Q8cAvAPhi+6I0RPyiBonovxqYjRdU8YUNcSfJyirStDuTywoGW OMiinxnpvO89eSgeEqWcsRZybMZZ4pJwmoc+we1k7dtFQXFX7H+l7x5VwBnVx/MiLHR8 ihrXUcBLM/IeoXy6aioDgZF0YMkRzZcc2ia5FmWbN22DgmagGUSsWRFNfrfy3JgTytFx 6iCQ== X-Gm-Message-State: AOUpUlHq1ZC8NkewTZXUkUr71RnQ8B1v/jpCz2B1qt/JD+7G1yOX1WR/ /l2JE8CtpSyaKTBfRXez5LN2SA== X-Received: by 2002:a2e:4d9d:: with SMTP id c29-v6mr9548349ljd.132.1532381212537; Mon, 23 Jul 2018 14:26:52 -0700 (PDT) Received: from localhost.localdomain (59-201-94-178.pool.ukrtel.net. [178.94.201.59]) by smtp.gmail.com with ESMTPSA id q4-v6sm1990435ljh.36.2018.07.23.14.26.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Jul 2018 14:26:51 -0700 (PDT) From: Ivan Khoronzhuk To: davem@davemloft.net, grygorii.strashko@ti.com Cc: corbet@lwn.net, akpm@linux-foundation.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, vinicius.gomes@intel.com, henrik@austad.us, jesus.sanchez-palencia@intel.com, ilias.apalodimas@linaro.org, p-varis@ti.com, spatton@ti.com, francois.ozog@linaro.org, yogeshs@ti.com, nsekhar@ti.com, andrew@lunn.ch, Ivan Khoronzhuk Subject: [PATCH v5 net-next 3/6] net: ethernet: ti: cpsw: add MQPRIO Qdisc offload Date: Tue, 24 Jul 2018 00:26:31 +0300 Message-Id: <20180723212634.3219-4-ivan.khoronzhuk@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180723212634.3219-1-ivan.khoronzhuk@linaro.org> References: <20180723212634.3219-1-ivan.khoronzhuk@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org That's possible to offload vlan to tc priority mapping with assumption sk_prio == L2 prio. Example: $ ethtool -L eth0 rx 1 tx 4 $ qdisc replace dev eth0 handle 100: parent root mqprio num_tc 3 \ map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@1 2@2 hw 1 $ tc -g class show dev eth0 +---(100:ffe2) mqprio |    +---(100:3) mqprio |    +---(100:4) mqprio |     +---(100:ffe1) mqprio |    +---(100:2) mqprio |     +---(100:ffe0) mqprio     +---(100:1) mqprio Here, 100:1 is txq0, 100:2 is txq1, 100:3 is txq2, 100:4 is txq3 txq0 belongs to tc0, txq1 to tc1, txq2 and txq3 to tc2 The offload part only maps L2 prio to classes of traffic, but not to transmit queues, so to direct traffic to traffic class vlan has to be created with appropriate egress map. Reviewed-by: Ilias Apalodimas Reviewed-by: Grygorii Strashko Signed-off-by: Ivan Khoronzhuk --- drivers/net/ethernet/ti/cpsw.c | 82 ++++++++++++++++++++++++++++++++++ 1 file changed, 82 insertions(+) -- 2.17.1 diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 4425b537b9dd..f099e0ed138d 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -39,6 +39,7 @@ #include #include +#include #include "cpsw.h" #include "cpsw_ale.h" @@ -153,6 +154,8 @@ do { \ #define IRQ_NUM 2 #define CPSW_MAX_QUEUES 8 #define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256 +#define CPSW_TC_NUM 4 +#define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1) #define CPSW_RX_VLAN_ENCAP_HDR_PRIO_SHIFT 29 #define CPSW_RX_VLAN_ENCAP_HDR_PRIO_MSK GENMASK(2, 0) @@ -454,6 +457,7 @@ struct cpsw_priv { u8 mac_addr[ETH_ALEN]; bool rx_pause; bool tx_pause; + bool mqprio_hw; u32 emac_port; struct cpsw_common *cpsw; }; @@ -1578,6 +1582,14 @@ static void cpsw_slave_stop(struct cpsw_slave *slave, struct cpsw_common *cpsw) soft_reset_slave(slave); } +static int cpsw_tc_to_fifo(int tc, int num_tc) +{ + if (tc == num_tc - 1) + return 0; + + return CPSW_FIFO_SHAPERS_NUM - tc; +} + static int cpsw_ndo_open(struct net_device *ndev) { struct cpsw_priv *priv = netdev_priv(ndev); @@ -2191,6 +2203,75 @@ static int cpsw_ndo_set_tx_maxrate(struct net_device *ndev, int queue, u32 rate) return ret; } +static int cpsw_set_mqprio(struct net_device *ndev, void *type_data) +{ + struct tc_mqprio_qopt_offload *mqprio = type_data; + struct cpsw_priv *priv = netdev_priv(ndev); + struct cpsw_common *cpsw = priv->cpsw; + int fifo, num_tc, count, offset; + struct cpsw_slave *slave; + u32 tx_prio_map = 0; + int i, tc, ret; + + num_tc = mqprio->qopt.num_tc; + if (num_tc > CPSW_TC_NUM) + return -EINVAL; + + if (mqprio->mode != TC_MQPRIO_MODE_DCB) + return -EINVAL; + + ret = pm_runtime_get_sync(cpsw->dev); + if (ret < 0) { + pm_runtime_put_noidle(cpsw->dev); + return ret; + } + + if (num_tc) { + for (i = 0; i < 8; i++) { + tc = mqprio->qopt.prio_tc_map[i]; + fifo = cpsw_tc_to_fifo(tc, num_tc); + tx_prio_map |= fifo << (4 * i); + } + + netdev_set_num_tc(ndev, num_tc); + for (i = 0; i < num_tc; i++) { + count = mqprio->qopt.count[i]; + offset = mqprio->qopt.offset[i]; + netdev_set_tc_queue(ndev, i, count, offset); + } + } + + if (!mqprio->qopt.hw) { + /* restore default configuration */ + netdev_reset_tc(ndev); + tx_prio_map = TX_PRIORITY_MAPPING; + } + + priv->mqprio_hw = mqprio->qopt.hw; + + offset = cpsw->version == CPSW_VERSION_1 ? + CPSW1_TX_PRI_MAP : CPSW2_TX_PRI_MAP; + + slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; + slave_write(slave, tx_prio_map, offset); + + pm_runtime_put_sync(cpsw->dev); + + return 0; +} + +static int cpsw_ndo_setup_tc(struct net_device *ndev, enum tc_setup_type type, + void *type_data) +{ + switch (type) { + case TC_SETUP_QDISC_MQPRIO: + return cpsw_set_mqprio(ndev, type_data); + + default: + return -EOPNOTSUPP; + } +} + static const struct net_device_ops cpsw_netdev_ops = { .ndo_open = cpsw_ndo_open, .ndo_stop = cpsw_ndo_stop, @@ -2206,6 +2287,7 @@ static const struct net_device_ops cpsw_netdev_ops = { #endif .ndo_vlan_rx_add_vid = cpsw_ndo_vlan_rx_add_vid, .ndo_vlan_rx_kill_vid = cpsw_ndo_vlan_rx_kill_vid, + .ndo_setup_tc = cpsw_ndo_setup_tc, }; static int cpsw_get_regs_len(struct net_device *ndev) From patchwork Mon Jul 23 21:26:32 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Ivan Khoronzhuk X-Patchwork-Id: 142654 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp6512955ljj; Mon, 23 Jul 2018 14:26:58 -0700 (PDT) X-Google-Smtp-Source: AAOMgpcwTBl4TXbSVrkzxogiqfx3m0lsKlQ1eVwfUjWeX2q+VRGeK2bCruR9z7fcSrCo7BqbsMrd X-Received: by 2002:a62:a119:: with SMTP id b25-v6mr14674153pff.163.1532381218220; Mon, 23 Jul 2018 14:26:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532381218; cv=none; d=google.com; s=arc-20160816; b=aKh9G0m3tDVBYGkvY+80FwU+60GFviKzcyJ8LqWp33o5UogENiO1LZxTp10ti0YbEB Wnlf2AOtlaeQyCAvQ3z51rNj4ZhBySbd/YOkTmLD98RHe7CSAiZL+j1/xtbJQJdabU1T 3SLYnANmTAH8TgKOawS4WMkHbm+hYhrU00CBEKGeeQhr5Gxs2YPm64zd2oBA6eXhtUhJ 0PE8IZLEy8Nx3w4vwv6AJsBkw0p8EAe1eAfGKeDOUuvzoj7c84KNjOHzC5lynCYs6eQI LzZt4Ei5oTnq0R05tUAj0KZVb0BGVSxQ573pGYP6aPbTB0GTc2wwIChUduzqUVMbwIQJ 8bNw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature:arc-authentication-results; bh=ItgUR9xadtqTwmNJEE1gSK7+SYYvHRNJaBFF7PlulGI=; b=yH/cg9CPZt/bLPaGUGCjory5RGXlHhCkI3hgrOkNGZA+zrmoUkT4aPlTxsTDaojmr7 4+x6kII2P/cqZ2N/KzlFwQPVnK6CDSJIlW7hjnLhQtxwqO29xTxXtqWoxJLG0dlN3jz7 us2wy2TOZ5lqxXSi8tlGn7OqxPVCJ2G69My2udf1VYg36OiD7BbRsy131N5v0wB7Bbdp rbGU9IAVp5lGeeCexryIotGh+H7/xgBiX/DTluc+d/LMP0IZftQ8Xny+yda5BDMhLR9i tyhqRxKi7CmKxwxStOQZknghp8x0KS0a0i5GDcs3F82CbLdIPV2qc/pOKB/H4/iU5EwY GtSA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AP32TueT; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c9-v6si1156233pgj.654.2018.07.23.14.26.58; Mon, 23 Jul 2018 14:26:58 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AP32TueT; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388288AbeGWWaC (ORCPT + 10 others); Mon, 23 Jul 2018 18:30:02 -0400 Received: from mail-lj1-f194.google.com ([209.85.208.194]:32810 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388262AbeGWWaB (ORCPT ); Mon, 23 Jul 2018 18:30:01 -0400 Received: by mail-lj1-f194.google.com with SMTP id s12-v6so1779264ljj.0 for ; Mon, 23 Jul 2018 14:26:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ItgUR9xadtqTwmNJEE1gSK7+SYYvHRNJaBFF7PlulGI=; b=AP32TueTfbKtYvblngpRsnbInOUOTSiOvaxu87n3juQ5dIcU3SO6tGIi/TJRuhBker McP5cpfTKGTRfAOSstuuvh8VMDOMqmhFoKJmyMn7syRxpm1g4msdJyzhJ16SLXYVWui3 Ils5LlPl0FnBQSqgZEGS31TxXtu7HgZYgG1wk= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ItgUR9xadtqTwmNJEE1gSK7+SYYvHRNJaBFF7PlulGI=; b=YhixdgF//e609+kzO6nKHEU+xGsSZI/g9+QzDfSwlOpw0D3Ro2E67AjPUclh3gdU10 5xKEEM1z9rl8xsNkbR5Hw9s2vGph9ulO0l5Ya+0zpTwShkJ8vov3yM3rZC0SJ4iOl3yj H4dcX7I4dXt8Y5PtQOCwTq4Zz+hNUYxH1nhcxR5vd1vd7HpbqGZ7t/LaY2elzgS0sT9h MrJKKsQGx/7luBY5aJ7HVRynWHQgKKWDI4j+QRU5V/TClSCwZ9soBb6TchaFEq9ngIns H2CeQbuNzPNzig2RUXnFu27M5OX0/svuKgzQ1gLApP9AEUb4mVEsiqIuer18SD6ULQLB xltg== X-Gm-Message-State: AOUpUlGy/1nrx7mCmQHMUlKmn+79PMfZYaXCFrxFvJT2gtuFyiDHoeOH AYuRt7DLLYo20+vxWFsvcMCXMA== X-Received: by 2002:a2e:8147:: with SMTP id t7-v6mr2099309ljg.32.1532381214115; Mon, 23 Jul 2018 14:26:54 -0700 (PDT) Received: from localhost.localdomain (59-201-94-178.pool.ukrtel.net. [178.94.201.59]) by smtp.gmail.com with ESMTPSA id q4-v6sm1990435ljh.36.2018.07.23.14.26.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Jul 2018 14:26:53 -0700 (PDT) From: Ivan Khoronzhuk To: davem@davemloft.net, grygorii.strashko@ti.com Cc: corbet@lwn.net, akpm@linux-foundation.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, vinicius.gomes@intel.com, henrik@austad.us, jesus.sanchez-palencia@intel.com, ilias.apalodimas@linaro.org, p-varis@ti.com, spatton@ti.com, francois.ozog@linaro.org, yogeshs@ti.com, nsekhar@ti.com, andrew@lunn.ch, Ivan Khoronzhuk Subject: [PATCH v5 net-next 4/6] net: ethernet: ti: cpsw: add CBS Qdisc offload Date: Tue, 24 Jul 2018 00:26:32 +0300 Message-Id: <20180723212634.3219-5-ivan.khoronzhuk@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180723212634.3219-1-ivan.khoronzhuk@linaro.org> References: <20180723212634.3219-1-ivan.khoronzhuk@linaro.org> MIME-Version: 1.0 Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The cpsw has up to 4 FIFOs per port and upper 3 FIFOs can feed rate limited queue with shaping. In order to set and enable shaping for those 3 FIFOs queues the network device with CBS qdisc attached is needed. The CBS configuration is added for dual-emac/single port mode only, but potentially can be used in switch mode also, based on switchdev for instance. Despite the FIFO shapers can work w/o cpdma level shapers the base usage must be in combine with cpdma level shapers as described in TRM, that are set as maximum rates for interface queues with sysfs. One of the possible configuration with txq shapers and CBS shapers: Configured with echo RATE > /sys/class/net/eth0/queues/tx-0/tx_maxrate /--------------------------------------------------- / / cpdma level shapers +----+ +----+ +----+ +----+ +----+ +----+ +----+ +----+ | c7 | | c6 | | c5 | | c4 | | c3 | | c2 | | c1 | | c0 | \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \ / \/ \/ \/ \/ \/ \/ \/ \/ +---------|------|------|------|-------------------------------------+ | +----+ | | +---+ | | | +----+ | | | | v v v v | | +----+ +----+ +----+ +----+ p p+----+ +----+ +----+ +----+ | | | | | | | | | | o o| | | | | | | | | | | f3 | | f2 | | f1 | | f0 | r CPSW r| f3 | | f2 | | f1 | | f0 | | | | | | | | | | | t t| | | | | | | | | | \ / \ / \ / \ / 0 1\ / \ / \ / \ / | | \ X \ / \ / \ / \ / \ / \ / \ / | | \/ \ \/ \/ \/ \/ \/ \/ \/ | +-------\------------------------------------------------------------+ \ \ FIFO shaper, set with CBS offload added in this patch, \ FIFO0 cannot be rate limited ------------------------------------------------------ CBS shaper configuration is supposed to be used with root MQPRIO Qdisc offload allowing to add sk_prio->tc->txq maps that direct traffic to appropriate tx queue and maps L2 priority to FIFO shaper. The CBS shaper is intended to be used for AVB where L2 priority (pcp field) is used to differentiate class of traffic. So additionally vlan needs to be created with appropriate egress sk_prio->l2 prio map. If CBS has several tx queues assigned to it, the sum of their bandwidth has not overlap bandwidth set for CBS. It's recomended the CBS bandwidth to be a little bit more. The CBS shaper is configured with CBS qdisc offload interface using tc tool from iproute2 packet. For instance: $ tc qdisc replace dev eth0 handle 100: parent root mqprio num_tc 3 \ map 2 2 1 0 2 2 2 2 2 2 2 2 2 2 2 2 queues 1@0 1@1 2@2 hw 1 $ tc -g class show dev eth0 +---(100:ffe2) mqprio |    +---(100:3) mqprio |    +---(100:4) mqprio |     +---(100:ffe1) mqprio |    +---(100:2) mqprio |     +---(100:ffe0) mqprio     +---(100:1) mqprio $ tc qdisc add dev eth0 parent 100:1 cbs locredit -1440 \ hicredit 60 sendslope -960000 idleslope 40000 offload 1 $ tc qdisc add dev eth0 parent 100:2 cbs locredit -1470 \ hicredit 62 sendslope -980000 idleslope 20000 offload 1 The above code set CBS shapers for tc0 and tc1, for that txq0 and txq1 is used. Pay attention, the real set bandwidth can differ a bit due to discreteness of configuration parameters. Here parameters like locredit, hicredit and sendslope are ignored internally and are supposed to be set with assumption that maximum frame size for frame - 1500. It's supposed that interface speed is not changed while reconnection, not always is true, so inform user in case speed of interface was changed, as it can impact on dependent shapers configuration. For more examples see Documentation. Reviewed-by: Ilias Apalodimas Reviewed-by: Grygorii Strashko Signed-off-by: Ivan Khoronzhuk --- drivers/net/ethernet/ti/cpsw.c | 221 +++++++++++++++++++++++++++++++++ 1 file changed, 221 insertions(+) -- 2.17.1 diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index f099e0ed138d..449dc7f1e5f8 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -46,6 +46,8 @@ #include "cpts.h" #include "davinci_cpdma.h" +#include + #define CPSW_DEBUG (NETIF_MSG_HW | NETIF_MSG_WOL | \ NETIF_MSG_DRV | NETIF_MSG_LINK | \ NETIF_MSG_IFUP | NETIF_MSG_INTR | \ @@ -154,8 +156,12 @@ do { \ #define IRQ_NUM 2 #define CPSW_MAX_QUEUES 8 #define CPSW_CPDMA_DESCS_POOL_SIZE_DEFAULT 256 +#define CPSW_FIFO_QUEUE_TYPE_SHIFT 16 +#define CPSW_FIFO_SHAPE_EN_SHIFT 16 +#define CPSW_FIFO_RATE_EN_SHIFT 20 #define CPSW_TC_NUM 4 #define CPSW_FIFO_SHAPERS_NUM (CPSW_TC_NUM - 1) +#define CPSW_PCT_MASK 0x7f #define CPSW_RX_VLAN_ENCAP_HDR_PRIO_SHIFT 29 #define CPSW_RX_VLAN_ENCAP_HDR_PRIO_MSK GENMASK(2, 0) @@ -458,6 +464,8 @@ struct cpsw_priv { bool rx_pause; bool tx_pause; bool mqprio_hw; + int fifo_bw[CPSW_TC_NUM]; + int shp_cfg_speed; u32 emac_port; struct cpsw_common *cpsw; }; @@ -1082,6 +1090,38 @@ static void cpsw_set_slave_mac(struct cpsw_slave *slave, slave_write(slave, mac_lo(priv->mac_addr), SA_LO); } +static bool cpsw_shp_is_off(struct cpsw_priv *priv) +{ + struct cpsw_common *cpsw = priv->cpsw; + struct cpsw_slave *slave; + u32 shift, mask, val; + + val = readl_relaxed(&cpsw->regs->ptype); + + slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; + shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num; + mask = 7 << shift; + val = val & mask; + + return !val; +} + +static void cpsw_fifo_shp_on(struct cpsw_priv *priv, int fifo, int on) +{ + struct cpsw_common *cpsw = priv->cpsw; + struct cpsw_slave *slave; + u32 shift, mask, val; + + val = readl_relaxed(&cpsw->regs->ptype); + + slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; + shift = CPSW_FIFO_SHAPE_EN_SHIFT + 3 * slave->slave_num; + mask = (1 << --fifo) << shift; + val = on ? val | mask : val & ~mask; + + writel_relaxed(val, &cpsw->regs->ptype); +} + static void _cpsw_adjust_link(struct cpsw_slave *slave, struct cpsw_priv *priv, bool *link) { @@ -1121,6 +1161,12 @@ static void _cpsw_adjust_link(struct cpsw_slave *slave, mac_control |= BIT(4); *link = true; + + if (priv->shp_cfg_speed && + priv->shp_cfg_speed != slave->phy->speed && + !cpsw_shp_is_off(priv)) + dev_warn(priv->dev, + "Speed was changed, CBS shaper speeds are changed!"); } else { mac_control = 0; /* disable forwarding */ @@ -1590,6 +1636,178 @@ static int cpsw_tc_to_fifo(int tc, int num_tc) return CPSW_FIFO_SHAPERS_NUM - tc; } +static int cpsw_set_fifo_bw(struct cpsw_priv *priv, int fifo, int bw) +{ + struct cpsw_common *cpsw = priv->cpsw; + u32 val = 0, send_pct, shift; + struct cpsw_slave *slave; + int pct = 0, i; + + if (bw > priv->shp_cfg_speed * 1000) + goto err; + + /* shaping has to stay enabled for highest fifos linearly + * and fifo bw no more then interface can allow + */ + slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; + send_pct = slave_read(slave, SEND_PERCENT); + for (i = CPSW_FIFO_SHAPERS_NUM; i > 0; i--) { + if (!bw) { + if (i >= fifo || !priv->fifo_bw[i]) + continue; + + dev_warn(priv->dev, "Prev FIFO%d is shaped", i); + continue; + } + + if (!priv->fifo_bw[i] && i > fifo) { + dev_err(priv->dev, "Upper FIFO%d is not shaped", i); + return -EINVAL; + } + + shift = (i - 1) * 8; + if (i == fifo) { + send_pct &= ~(CPSW_PCT_MASK << shift); + val = DIV_ROUND_UP(bw, priv->shp_cfg_speed * 10); + if (!val) + val = 1; + + send_pct |= val << shift; + pct += val; + continue; + } + + if (priv->fifo_bw[i]) + pct += (send_pct >> shift) & CPSW_PCT_MASK; + } + + if (pct >= 100) + goto err; + + slave_write(slave, send_pct, SEND_PERCENT); + priv->fifo_bw[fifo] = bw; + + dev_warn(priv->dev, "set FIFO%d bw = %d\n", fifo, + DIV_ROUND_CLOSEST(val * priv->shp_cfg_speed, 100)); + + return 0; +err: + dev_err(priv->dev, "Bandwidth doesn't fit in tc configuration"); + return -EINVAL; +} + +static int cpsw_set_fifo_rlimit(struct cpsw_priv *priv, int fifo, int bw) +{ + struct cpsw_common *cpsw = priv->cpsw; + struct cpsw_slave *slave; + u32 tx_in_ctl_rg, val; + int ret; + + ret = cpsw_set_fifo_bw(priv, fifo, bw); + if (ret) + return ret; + + slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; + tx_in_ctl_rg = cpsw->version == CPSW_VERSION_1 ? + CPSW1_TX_IN_CTL : CPSW2_TX_IN_CTL; + + if (!bw) + cpsw_fifo_shp_on(priv, fifo, bw); + + val = slave_read(slave, tx_in_ctl_rg); + if (cpsw_shp_is_off(priv)) { + /* disable FIFOs rate limited queues */ + val &= ~(0xf << CPSW_FIFO_RATE_EN_SHIFT); + + /* set type of FIFO queues to normal priority mode */ + val &= ~(3 << CPSW_FIFO_QUEUE_TYPE_SHIFT); + + /* set type of FIFO queues to be rate limited */ + if (bw) + val |= 2 << CPSW_FIFO_QUEUE_TYPE_SHIFT; + else + priv->shp_cfg_speed = 0; + } + + /* toggle a FIFO rate limited queue */ + if (bw) + val |= BIT(fifo + CPSW_FIFO_RATE_EN_SHIFT); + else + val &= ~BIT(fifo + CPSW_FIFO_RATE_EN_SHIFT); + slave_write(slave, val, tx_in_ctl_rg); + + /* FIFO transmit shape enable */ + cpsw_fifo_shp_on(priv, fifo, bw); + return 0; +} + +/* Defaults: + * class A - prio 3 + * class B - prio 2 + * shaping for class A should be set first + */ +static int cpsw_set_cbs(struct net_device *ndev, + struct tc_cbs_qopt_offload *qopt) +{ + struct cpsw_priv *priv = netdev_priv(ndev); + struct cpsw_common *cpsw = priv->cpsw; + struct cpsw_slave *slave; + int prev_speed = 0; + int tc, ret, fifo; + u32 bw = 0; + + tc = netdev_txq_to_tc(priv->ndev, qopt->queue); + + /* enable channels in backward order, as highest FIFOs must be rate + * limited first and for compliance with CPDMA rate limited channels + * that also used in bacward order. FIFO0 cannot be rate limited. + */ + fifo = cpsw_tc_to_fifo(tc, ndev->num_tc); + if (!fifo) { + dev_err(priv->dev, "Last tc%d can't be rate limited", tc); + return -EINVAL; + } + + /* do nothing, it's disabled anyway */ + if (!qopt->enable && !priv->fifo_bw[fifo]) + return 0; + + /* shapers can be set if link speed is known */ + slave = &cpsw->slaves[cpsw_slave_index(cpsw, priv)]; + if (slave->phy && slave->phy->link) { + if (priv->shp_cfg_speed && + priv->shp_cfg_speed != slave->phy->speed) + prev_speed = priv->shp_cfg_speed; + + priv->shp_cfg_speed = slave->phy->speed; + } + + if (!priv->shp_cfg_speed) { + dev_err(priv->dev, "Link speed is not known"); + return -1; + } + + ret = pm_runtime_get_sync(cpsw->dev); + if (ret < 0) { + pm_runtime_put_noidle(cpsw->dev); + return ret; + } + + bw = qopt->enable ? qopt->idleslope : 0; + ret = cpsw_set_fifo_rlimit(priv, fifo, bw); + if (ret) { + priv->shp_cfg_speed = prev_speed; + prev_speed = 0; + } + + if (bw && prev_speed) + dev_warn(priv->dev, + "Speed was changed, CBS shaper speeds are changed!"); + + pm_runtime_put_sync(cpsw->dev); + return ret; +} + static int cpsw_ndo_open(struct net_device *ndev) { struct cpsw_priv *priv = netdev_priv(ndev); @@ -2264,6 +2482,9 @@ static int cpsw_ndo_setup_tc(struct net_device *ndev, enum tc_setup_type type, void *type_data) { switch (type) { + case TC_SETUP_QDISC_CBS: + return cpsw_set_cbs(ndev, type_data); + case TC_SETUP_QDISC_MQPRIO: return cpsw_set_mqprio(ndev, type_data); From patchwork Mon Jul 23 21:26:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ivan Khoronzhuk X-Patchwork-Id: 142655 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp6512980ljj; Mon, 23 Jul 2018 14:27:00 -0700 (PDT) X-Google-Smtp-Source: AAOMgpenAAOUC2gJn0Frc/zJd/kQKzDbHdQIzd5n7OER4ZzWe/n9Q8Mi/g3+vCo8I0xhSNk8NZrj X-Received: by 2002:aa7:87d0:: with SMTP id i16-v6mr14825611pfo.82.1532381220245; Mon, 23 Jul 2018 14:27:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1532381220; cv=none; d=google.com; s=arc-20160816; b=f5TtTS+xp4xVktjFOOKFIhnFyMgVIVRcIk9bXKAzfmGsGQQIvhOXzNnEc5yM+mhA1u eXRbAuLUvIX/x+PHhL9/HhHeQ/fGMd74mTg8wLo9SbgzSNnYRZ3zzrWvfeqjX1EuBfQQ brtzZp5akN7xNuoUu0/MZVEHLp+4jC+lPCnKfXF8nyMf7IFpCEphanAsrtjDVlPXv/PC zHgWtcVpsKs+jR54Qu15604tvRqoCkOTxIhyDDclXUKKPXGt0l8hmlnFA6LPec5YTQMu onwVa+LCJjG512a8IuA5mmX4uLeX2lec915JSHXCTZ0AwUHGghR8R8wSPd6fe9j6VMxU Lyhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=d1Za27wcuN7sHeOL/0KokiwCWrvu5jc334Ssx7ln6cQ=; b=WjOoeDLZJV0SvOa0Vgo4XwZGsZRP45Y69QCTJwIH8qehKz1BFNPxhWo6NXaH0LCkfC GdGhl4h/WUM3xU25VdacihfkAbTWtXfVhoG9zQxqNYAF1FttUbnlMEzb9o/ASHiyMugn Z+f6pG59SjwWfsjLCh9/dggJDIajPKHzFLzlG9uhzM/eSD1BVpSIc8mSNX1EplXRCU/f SOOhmtFgLeSn+tu1k8btuP6gQV+ue0qpWGZ+QWcyTpUso1rSeG/ttuD5Qk6a4QMvZ7Ep BtwyQxcIQom8dHKwG2ZocetHnzMsL41LO89Xykq4zciFns34+opoDxqgSRl5q4U6ziKV JNZQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VxLGjWVm; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p5-v6si7925394pgb.598.2018.07.23.14.27.00; Mon, 23 Jul 2018 14:27:00 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VxLGjWVm; spf=pass (google.com: best guess record for domain of netdev-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2388298AbeGWWaD (ORCPT + 10 others); Mon, 23 Jul 2018 18:30:03 -0400 Received: from mail-lj1-f194.google.com ([209.85.208.194]:44107 "EHLO mail-lj1-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2388283AbeGWWaD (ORCPT ); Mon, 23 Jul 2018 18:30:03 -0400 Received: by mail-lj1-f194.google.com with SMTP id q127-v6so1760396ljq.11 for ; Mon, 23 Jul 2018 14:26:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=d1Za27wcuN7sHeOL/0KokiwCWrvu5jc334Ssx7ln6cQ=; b=VxLGjWVmg52DX/Z2bx/9MzKKF/eQFkgY/odRP6QZDV0aE0SyupBBBa34pdIf71ozlq XLgWvoh5sAd+QjroInR5X0xexI1lCZtoXeTASrdFOXtRVg0VR8Z2on0rrscn0ADmDfeH i5kB8ztBxosNweVWp/XJBpQMQXMw+6c85t6b4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=d1Za27wcuN7sHeOL/0KokiwCWrvu5jc334Ssx7ln6cQ=; b=DcPDYgL7Os4/9G5593kSEdeCWCDDjEGNyDzlI93Fu8VO3o+OyO/j4Z/AmVi+Yio8JG oAmCsNv8WwrIufN2yAo2hMSvahBRup8NDHWBqhUeRHl6nHrS7sbTWPtZbSLEs7PtIP5j CeiESLFP0+SfIu7w+ae34fJGTl2ibCitgD7cBM6Lzyv9CgTu4H3dDb2yzyfdkjqYdldn fjBAgwqq9CNRUPGZnXrBnVMXmvG6EjeMsTAm9xc4y1Pxbit7+Hw8n1RM5udO6fAezEgI +CsLXxHcfl2WigiLO85TLWrVro5ae2INJggV36ETfYjN+n5MbUdNarMMp40BEiHwFvZu gElA== X-Gm-Message-State: AOUpUlGzui5yx6Gvq5iATUHUediUfT0+RHa+eHwlL/+by8Z6aRn/c+CH IlCd09n3WZ+bZbaOStddvbFl9w== X-Received: by 2002:a2e:1004:: with SMTP id j4-v6mr10458738lje.2.1532381215695; Mon, 23 Jul 2018 14:26:55 -0700 (PDT) Received: from localhost.localdomain (59-201-94-178.pool.ukrtel.net. [178.94.201.59]) by smtp.gmail.com with ESMTPSA id q4-v6sm1990435ljh.36.2018.07.23.14.26.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 23 Jul 2018 14:26:54 -0700 (PDT) From: Ivan Khoronzhuk To: davem@davemloft.net, grygorii.strashko@ti.com Cc: corbet@lwn.net, akpm@linux-foundation.org, netdev@vger.kernel.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-omap@vger.kernel.org, vinicius.gomes@intel.com, henrik@austad.us, jesus.sanchez-palencia@intel.com, ilias.apalodimas@linaro.org, p-varis@ti.com, spatton@ti.com, francois.ozog@linaro.org, yogeshs@ti.com, nsekhar@ti.com, andrew@lunn.ch, Ivan Khoronzhuk Subject: [PATCH v5 net-next 5/6] net: ethernet: ti: cpsw: restore shaper configuration while down/up Date: Tue, 24 Jul 2018 00:26:33 +0300 Message-Id: <20180723212634.3219-6-ivan.khoronzhuk@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180723212634.3219-1-ivan.khoronzhuk@linaro.org> References: <20180723212634.3219-1-ivan.khoronzhuk@linaro.org> Sender: netdev-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Need to restore shapers configuration after interface was down/up. This is needed as appropriate configuration is still replicated in kernel settings. This only shapers context restore, so vlan configuration should be restored by user if needed, especially for devices with one port where vlan frames are sent via ALE. Reviewed-by: Ilias Apalodimas Reviewed-by: Grygorii Strashko Signed-off-by: Ivan Khoronzhuk --- drivers/net/ethernet/ti/cpsw.c | 47 ++++++++++++++++++++++++++++++++++ 1 file changed, 47 insertions(+) -- 2.17.1 diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c index 449dc7f1e5f8..171abcfb6184 100644 --- a/drivers/net/ethernet/ti/cpsw.c +++ b/drivers/net/ethernet/ti/cpsw.c @@ -1808,6 +1808,51 @@ static int cpsw_set_cbs(struct net_device *ndev, return ret; } +static void cpsw_cbs_resume(struct cpsw_slave *slave, struct cpsw_priv *priv) +{ + int fifo, bw; + + for (fifo = CPSW_FIFO_SHAPERS_NUM; fifo > 0; fifo--) { + bw = priv->fifo_bw[fifo]; + if (!bw) + continue; + + cpsw_set_fifo_rlimit(priv, fifo, bw); + } +} + +static void cpsw_mqprio_resume(struct cpsw_slave *slave, struct cpsw_priv *priv) +{ + struct cpsw_common *cpsw = priv->cpsw; + u32 tx_prio_map = 0; + int i, tc, fifo; + u32 tx_prio_rg; + + if (!priv->mqprio_hw) + return; + + for (i = 0; i < 8; i++) { + tc = netdev_get_prio_tc_map(priv->ndev, i); + fifo = CPSW_FIFO_SHAPERS_NUM - tc; + tx_prio_map |= fifo << (4 * i); + } + + tx_prio_rg = cpsw->version == CPSW_VERSION_1 ? + CPSW1_TX_PRI_MAP : CPSW2_TX_PRI_MAP; + + slave_write(slave, tx_prio_map, tx_prio_rg); +} + +/* restore resources after port reset */ +static void cpsw_restore(struct cpsw_priv *priv) +{ + /* restore MQPRIO offload */ + for_each_slave(priv, cpsw_mqprio_resume, priv); + + /* restore CBS offload */ + for_each_slave(priv, cpsw_cbs_resume, priv); +} + static int cpsw_ndo_open(struct net_device *ndev) { struct cpsw_priv *priv = netdev_priv(ndev); @@ -1887,6 +1932,8 @@ static int cpsw_ndo_open(struct net_device *ndev) } + cpsw_restore(priv); + /* Enable Interrupt pacing if configured */ if (cpsw->coal_intvl != 0) { struct ethtool_coalesce coal;