From patchwork Mon Jun 14 11:34:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459838 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3198513jae; Mon, 14 Jun 2021 04:35:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxKKiSVglRDk15VbP80dkK/JByzDgz/zc0S9VSe4/cNm3VuelmS97hQiWLtWdzkmJsUBVoJ X-Received: by 2002:a05:6402:5244:: with SMTP id t4mr10277376edd.254.1623670533226; Mon, 14 Jun 2021 04:35:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670533; cv=none; d=google.com; s=arc-20160816; b=ue4PEAtKq2TdZeU5E2raHbvFdPT7C5HL5ytrD9ugtSJvj/CuLOB4L79aLKUDu4cQKk Rw7+loENN+TpNc2JZdLUx8bQUWcLLE4YKIgna+kgw8H12R/ooCTfr7xPj6ghC2n4NHsW wndD8/3WcDaxUfNTlLNewSKFkQmQhRlS4iuIHYJamYsixi+BIZ6ShgctE7oH/xn6YKIM M4MjPfhtGoIuO2p4cgqVlHQ019eyhkUhZV3+tH1L0etDXfrr44ijRFfCwZshEDS2Rp/t AogokD3UA4d4VjU9zKfU5adcqqgTVhItE7Yv8g0uzupYTE/rMHBPTMbtNsHFfi7BhOHV 45Lw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=T5WkXpY4/tfDrgVJg5+X67+6fctdMQE8PXE3DYCt2YU=; b=NhXmcpxXPCjINnBjPCUsyqkvzEesOKg8dmbQ2vqMD0XfEA2OhO+Jn4Rpdc3xBryAUW qUmsq7jE/AIEDKDRgUA8T8324RmyyCixp0OCJBEJ2OAq+7PQCRMHCAqBr04YsdgbGoc5 VeSqvax1YgPGjVB9WBQhlo1yyjnSYzsOv85nsS0QdiMnkkQTRXPBsFiHxlEkLuCMrPFR Y72Lnq84XZzE9stFM0ulotYVvu1V6QgOYiGdQ517khaos1MQ570X/gVt5wkSzulhDYSC wvEMK3xKWGZdiEXx3LkLK+Wv6ahLKM7U2E/ABU2PGDLqjQvGCl3cGsuKNg1/2v3W33cY XjPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=LpQNKOz0; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j1si4280808ejj.668.2021.06.14.04.35.33; Mon, 14 Jun 2021 04:35:33 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=LpQNKOz0; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235756AbhFNLhZ (ORCPT + 7 others); Mon, 14 Jun 2021 07:37:25 -0400 Received: from mail.kernel.org ([198.145.29.99]:58730 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233249AbhFNLfX (ORCPT ); Mon, 14 Jun 2021 07:35:23 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id D123B61209; Mon, 14 Jun 2021 11:33:18 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670401; bh=DGEJhZj0RNHztUBk54pVFKT/l8A/xuK64FSh/emWbrE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LpQNKOz0rJYJasV7V+HjOCpDjppJddjTx3HiNAKqXNk+qlv+snnBIdLIEI3inI78c 5bPK1Cp+JOvYlCx8dbWJ3KO0xflDEeVcvIpnsSlu1InFCk1uX4xxdc8OIkQIloowRv NfxCHaUmBcqggAakxnUtQLLCbo+mxUEcL3imXiTPCQRvoNSlv/ALLFvkqVXRqaqhy6 MLbTxNmE12+sfbg3TBlGkiYHb+5OdJ67LjQBU8o4cGXLWzXS/Cl34IasKGxXyzxdPp wD3kRBhrKvmHbHbx7Ccw8Gi58MABYHhXM+F9Otg5cb6iFcNfoDA3zopeEf27hX/Oog N561Uo69/Kuhg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 01/17] staging:iio:adc:ad7280a: Fix handing of device address bit reversing. Date: Mon, 14 Jun 2021 12:34:51 +0100 Message-Id: <20210614113507.897732-2-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron The bit reversal was wrong for bits 1 and 3 of the 5 bits. Result is driver failure to probe if you have more than 2 daisy-chained devices. Discovered via QEMU based device emulation. Fixes tag is for when this moved from a macro to a function, but it was broken before that. Signed-off-by: Jonathan Cameron Fixes: 065a7c0b1fec ("Staging: iio: adc: ad7280a.c: Fixed Macro argument reuse") --- drivers/staging/iio/adc/ad7280a.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index fef0055b8990..20183b2ea127 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -107,9 +107,9 @@ static unsigned int ad7280a_devaddr(unsigned int addr) { return ((addr & 0x1) << 4) | - ((addr & 0x2) << 3) | + ((addr & 0x2) << 2) | (addr & 0x4) | - ((addr & 0x8) >> 3) | + ((addr & 0x8) >> 2) | ((addr & 0x10) >> 4); } From patchwork Mon Jun 14 11:34:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459840 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3198519jae; Mon, 14 Jun 2021 04:35:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwaEduwdlHGzwj2gkS6yY2/cEXKXoafa8Tjl5nIZtUpocXW5VN2YpqvP+DQjwNcb7blUWaB X-Received: by 2002:a17:906:b2c1:: with SMTP id cf1mr14410062ejb.544.1623670533649; Mon, 14 Jun 2021 04:35:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670533; cv=none; d=google.com; s=arc-20160816; b=FqqVD6SLgyhXSsXDMXHCfP6zhnQzLv2P+1RtKD862NXmCal2lmVSU6JZr9dx2vDr1x Q7F6QErn5GXkDH+Upe00sQuHkrirWKoo5WpyOSka7rMa/cb+upTSRE3fr2VyK3eBz2vm AN4KhvPof/FC//JkRdjJPN1GcQJ33k5g4UXOOTqlW+4qG5UKj0rdwg2pQ7KBnxIk1AcL ZifBinHotg4Qud86wwbEYRrptzX8EANhVrfMSMqxBMwA6tlMHb8cik7jqEdQX4gQgc15 KeIB6ulQNmBhB8sabok32PfhqZYGm4E4VY2SD+S8OQjl2YVaHJTZrfw9vzCnwi/QrP61 0d9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Wdz0G0xLbjY+rQPFtxtTUZST7fBRe6rwjuLOoTALfWc=; b=k8q7w+wSTzmN73U8p4AnGrEWT6LCehg14WA4NlU4xFGtVY5LGTFr3W9TMZapbBc8T8 vLv9YrAaNSSoDBB2Lina4sDo09u5E9qp1arbcQ7gP0quwWj6ds3kWn9P0hHKbZZVdngt DSs/rf+EpfE4vG856ZiEVaUzz2NX5a7219kBeXM4b2rCm6ISDFbFdQMNoaSpEED05C2H 2ZXlwHrk9TsrNVESI1OvjCUf2lF31ZdVBAV9uS68BYCicE9W3DfM4Lg9oxKIy+/59F7x u5/9vWj/C5OJ6ocw8YERDQGxGrN82zunWQ24gWAl8xphrxV19AZr4e4v6ufL18DBMzQ4 bFug== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=dGkVbbeW; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j1si4280808ejj.668.2021.06.14.04.35.33; Mon, 14 Jun 2021 04:35:33 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=dGkVbbeW; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234944AbhFNLh1 (ORCPT + 7 others); Mon, 14 Jun 2021 07:37:27 -0400 Received: from mail.kernel.org ([198.145.29.99]:58744 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234891AbhFNLf0 (ORCPT ); Mon, 14 Jun 2021 07:35:26 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 661166120E; Mon, 14 Jun 2021 11:33:21 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670403; bh=NoRcjVByj6WEiAlqZXoV5NBLfPb7wIt8zxF/t+seA0E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dGkVbbeWsCIR1n3MrwAxAD3OEdAc2NF/g149CmLH6pB1+u14VOyw9C2QaQELMff87 yJHz1GxZfZ8Ai8g6gggJTfGrjJmoq7375qABEb+ZtKb4RJ+Ht4Ka1KT2fAoKmuVyzH nj0QoEGIkNIBHQweulNzhugQtWF6+F6VYzhKzc17W4DJv0SoNmSdFse092gFoF5/+L Det6xLRfYvWGy/h+Zo50cVmGaHr8bAOIkiMBGPj74Dwvo5twBjECwZnIYZWmlPd8fD 1iMJVXlch1NqnwIo/DDVltvC3on3tSaAQ9B5BpCUBiFAe0wg4XX6C+bPq1DEgJAicz varw190iaZDeg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 02/17] staging:iio:adc:ad7280a: Register define cleanup. Date: Mon, 14 Jun 2021 12:34:52 +0100 Message-Id: <20210614113507.897732-3-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron 1. Postfix register addresses with _REG to distinguish them from fields within the registers 2. Switch to using FIELD_PREP and masks to aid readability. 3. Shorten a few defines to make the lines remain a sensible length. 4. Fix an issue whether where an CTRL_LB field is set in CTRL_HB. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 299 ++++++++++++++++-------------- 1 file changed, 161 insertions(+), 138 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 20183b2ea127..d169c8a7b5f1 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -11,6 +11,7 @@ #include #include #include +#include #include #include #include @@ -23,78 +24,86 @@ #include "ad7280a.h" /* Registers */ -#define AD7280A_CELL_VOLTAGE_1 0x0 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_2 0x1 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_3 0x2 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_4 0x3 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_5 0x4 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_6 0x5 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_1 0x6 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_2 0x7 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_3 0x8 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_4 0x9 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_5 0xA /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_6 0xB /* D11 to D0, Read only */ -#define AD7280A_SELF_TEST 0xC /* D11 to D0, Read only */ -#define AD7280A_CONTROL_HB 0xD /* D15 to D8, Read/write */ -#define AD7280A_CONTROL_LB 0xE /* D7 to D0, Read/write */ -#define AD7280A_CELL_OVERVOLTAGE 0xF /* D7 to D0, Read/write */ -#define AD7280A_CELL_UNDERVOLTAGE 0x10 /* D7 to D0, Read/write */ -#define AD7280A_AUX_ADC_OVERVOLTAGE 0x11 /* D7 to D0, Read/write */ -#define AD7280A_AUX_ADC_UNDERVOLTAGE 0x12 /* D7 to D0, Read/write */ -#define AD7280A_ALERT 0x13 /* D7 to D0, Read/write */ -#define AD7280A_CELL_BALANCE 0x14 /* D7 to D0, Read/write */ -#define AD7280A_CB1_TIMER 0x15 /* D7 to D0, Read/write */ -#define AD7280A_CB2_TIMER 0x16 /* D7 to D0, Read/write */ -#define AD7280A_CB3_TIMER 0x17 /* D7 to D0, Read/write */ -#define AD7280A_CB4_TIMER 0x18 /* D7 to D0, Read/write */ -#define AD7280A_CB5_TIMER 0x19 /* D7 to D0, Read/write */ -#define AD7280A_CB6_TIMER 0x1A /* D7 to D0, Read/write */ -#define AD7280A_PD_TIMER 0x1B /* D7 to D0, Read/write */ -#define AD7280A_READ 0x1C /* D7 to D0, Read/write */ -#define AD7280A_CNVST_CONTROL 0x1D /* D7 to D0, Read/write */ - -/* Bits and Masks */ -#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 -#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 BIT(6) -#define AD7280A_CTRL_HB_CONV_INPUT_6CELL BIT(7) -#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST (BIT(7) | BIT(6)) -#define AD7280A_CTRL_HB_CONV_RES_READ_ALL 0 -#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL_AUX1_3_4 BIT(4) -#define AD7280A_CTRL_HB_CONV_RES_READ_6CELL BIT(5) -#define AD7280A_CTRL_HB_CONV_RES_READ_NO (BIT(5) | BIT(4)) -#define AD7280A_CTRL_HB_CONV_START_CNVST 0 -#define AD7280A_CTRL_HB_CONV_START_CS BIT(3) -#define AD7280A_CTRL_HB_CONV_AVG_DIS 0 -#define AD7280A_CTRL_HB_CONV_AVG_2 BIT(1) -#define AD7280A_CTRL_HB_CONV_AVG_4 BIT(2) -#define AD7280A_CTRL_HB_CONV_AVG_8 (BIT(2) | BIT(1)) -#define AD7280A_CTRL_HB_CONV_AVG(x) ((x) << 1) -#define AD7280A_CTRL_HB_PWRDN_SW BIT(0) - -#define AD7280A_CTRL_LB_SWRST BIT(7) -#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 -#define AD7280A_CTRL_LB_ACQ_TIME_800ns BIT(5) -#define AD7280A_CTRL_LB_ACQ_TIME_1200ns BIT(6) -#define AD7280A_CTRL_LB_ACQ_TIME_1600ns (BIT(6) | BIT(5)) -#define AD7280A_CTRL_LB_ACQ_TIME(x) ((x) << 5) -#define AD7280A_CTRL_LB_MUST_SET BIT(4) -#define AD7280A_CTRL_LB_THERMISTOR_EN BIT(3) -#define AD7280A_CTRL_LB_LOCK_DEV_ADDR BIT(2) -#define AD7280A_CTRL_LB_INC_DEV_ADDR BIT(1) -#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN BIT(0) - -#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) -#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) +#define AD7280A_CELL_VOLTAGE_1_REG 0x0 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_2_REG 0x1 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_3_REG 0x2 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_4_REG 0x3 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_5_REG 0x4 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_6_REG 0x5 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_1_REG 0x6 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_2_REG 0x7 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_3_REG 0x8 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_4_REG 0x9 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_5_REG 0xA /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_6_REG 0xB /* D11 to D0, Read only */ +#define AD7280A_SELF_TEST_REG 0xC /* D11 to D0, Read only */ + +#define AD7280A_CTRL_HB_REG 0xD /* D15 to D8, Read/write */ +#define AD7280A_CTRL_HB_CONV_INPUT_MSK GENMASK(7, 6) +#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 +#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 1 +#define AD7280A_CTRL_HB_CONV_INPUT_6CELL 2 +#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST 3 +#define AD7280A_CTRL_HB_CONV_RREAD_MSK GENMASK(5, 4) +#define AD7280A_CTRL_HB_CONV_RREAD_ALL 0 +#define AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_4 1 +#define AD7280A_CTRL_HB_CONV_RREAD_6CELL 2 +#define AD7280A_CTRL_HB_CONV_RREAD_NO 3 +#define AD7280A_CTRL_HB_CONV_START_MSK BIT(3) +#define AD7280A_CTRL_HB_CONV_START_CNVST 0 +#define AD7280A_CTRL_HB_CONV_START_CS 1 +#define AD7280A_CTRL_HB_CONV_AVG_MSK GENMASK(2, 1) +#define AD7280A_CTRL_HB_CONV_AVG_DIS 0 +#define AD7280A_CTRL_HB_CONV_AVG_2 1 +#define AD7280A_CTRL_HB_CONV_AVG_4 2 +#define AD7280A_CTRL_HB_CONV_AVG_8 3 +#define AD7280A_CTRL_HB_PWRDN_SW BIT(0) + +#define AD7280A_CTRL_LB_REG 0xE /* D7 to D0, Read/write */ +#define AD7280A_CTRL_LB_SWRST_MSK BIT(7) +#define AD7280A_CTRL_LB_ACQ_TIME_MSK GENMASK(6, 5) +#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 +#define AD7280A_CTRL_LB_ACQ_TIME_800ns 1 +#define AD7280A_CTRL_LB_ACQ_TIME_1200ns 2 +#define AD7280A_CTRL_LB_ACQ_TIME_1600ns 3 +#define AD7280A_CTRL_LB_MUST_SET BIT(4) +#define AD7280A_CTRL_LB_THERMISTOR_MSK BIT(3) +#define AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK BIT(2) +#define AD7280A_CTRL_LB_INC_DEV_ADDR_MSK BIT(1) +#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK BIT(0) + +#define AD7280A_CELL_OVERVOLTAGE_REG 0xF /* D7 to D0, Read/write */ +#define AD7280A_CELL_UNDERVOLTAGE_REG 0x10 /* D7 to D0, Read/write */ +#define AD7280A_AUX_ADC_OVERVOLTAGE_REG 0x11 /* D7 to D0, Read/write */ +#define AD7280A_AUX_ADC_UNDERVOLTAGE_REG 0x12 /* D7 to D0, Read/write */ + +#define AD7280A_ALERT_REG 0x13 /* D7 to D0, Read/write */ +#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) +#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) + +#define AD7280A_CELL_BALANCE_REG 0x14 /* D7 to D0, Read/write */ +#define AD7280A_CB1_TIMER_REG 0x15 /* D7 to D0, Read/write */ +#define AD7280A_CB_TIMER_VAL_MSK GENMASK(7, 3) +#define AD7280A_CB2_TIMER_REG 0x16 /* D7 to D0, Read/write */ +#define AD7280A_CB3_TIMER_REG 0x17 /* D7 to D0, Read/write */ +#define AD7280A_CB4_TIMER_REG 0x18 /* D7 to D0, Read/write */ +#define AD7280A_CB5_TIMER_REG 0x19 /* D7 to D0, Read/write */ +#define AD7280A_CB6_TIMER_REG 0x1A /* D7 to D0, Read/write */ +#define AD7280A_PD_TIMER_REG 0x1B /* D7 to D0, Read/write */ +#define AD7280A_READ_REG 0x1C /* D7 to D0, Read/write */ +#define AD7280A_READ_ADDR_MSK GENMASK(7, 2) +#define AD7280A_CNVST_CTRL_REG 0x1D /* D7 to D0, Read/write */ + +/* Magic value used to indicate this special case */ #define AD7280A_ALL_CELLS (0xAD << 16) #define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */ #define AD7280A_MAX_CHAIN 8 #define AD7280A_CELLS_PER_DEV 6 #define AD7280A_BITS 12 -#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6 - \ - AD7280A_CELL_VOLTAGE_1 + 1) +#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6_REG - \ + AD7280A_CELL_VOLTAGE_1_REG + 1) #define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ (c)) @@ -222,23 +231,28 @@ static int ad7280_read(struct ad7280_state *st, unsigned int devaddr, unsigned int tmp; /* turns off the read operation on all parts */ - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_NO | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_NO) | st->ctrl_hb); if (ret) return ret; /* turns on the read operation on the addressed part */ - ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_ALL | + ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | st->ctrl_hb); if (ret) return ret; /* Set register address on the part to be read from */ - ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2); + ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, + FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); if (ret) return ret; @@ -261,21 +275,27 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, int ret; unsigned int tmp; - ret = ad7280_write(st, devaddr, AD7280A_READ, 0, addr << 2); + ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, + FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); if (ret) return ret; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_NO | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_NO) | st->ctrl_hb); if (ret) return ret; - ret = ad7280_write(st, devaddr, AD7280A_CONTROL_HB, 0, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_ALL | - AD7280A_CTRL_HB_CONV_START_CS | + ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, + AD7280A_CTRL_HB_CONV_START_CS) | st->ctrl_hb); if (ret) return ret; @@ -301,15 +321,18 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, int i, ret; unsigned int tmp, sum = 0; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1, - AD7280A_CELL_VOLTAGE_1 << 2); + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, + AD7280A_CELL_VOLTAGE_1_REG << 2); if (ret) return ret; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, - AD7280A_CTRL_HB_CONV_INPUT_ALL | - AD7280A_CTRL_HB_CONV_RES_READ_ALL | - AD7280A_CTRL_HB_CONV_START_CS | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, + AD7280A_CTRL_HB_CONV_START_CS) | st->ctrl_hb); if (ret) return ret; @@ -327,7 +350,7 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, if (array) array[i] = tmp; /* only sum cell voltages */ - if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) + if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6_REG) sum += ((tmp >> 11) & 0xFFF); } @@ -338,7 +361,7 @@ static void ad7280_sw_power_down(void *data) { struct ad7280_state *st = data; - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); } @@ -347,25 +370,26 @@ static int ad7280_chain_setup(struct ad7280_state *st) unsigned int val, n; int ret; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1, - AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN | - AD7280A_CTRL_LB_LOCK_DEV_ADDR | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, + FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | + FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | AD7280A_CTRL_LB_MUST_SET | - AD7280A_CTRL_LB_SWRST | + FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) | st->ctrl_lb); if (ret) return ret; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_LB, 1, - AD7280A_CTRL_LB_DAISY_CHAIN_RB_EN | - AD7280A_CTRL_LB_LOCK_DEV_ADDR | + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, + FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | + FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | AD7280A_CTRL_LB_MUST_SET | + FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) | st->ctrl_lb); if (ret) goto error_power_down; - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ, 1, - AD7280A_CONTROL_LB << 2); + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, + FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG)); if (ret) goto error_power_down; @@ -390,7 +414,7 @@ static int ad7280_chain_setup(struct ad7280_state *st) ret = -EFAULT; error_power_down: - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CONTROL_HB, 1, + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); return ret; @@ -434,7 +458,7 @@ static ssize_t ad7280_store_balance_sw(struct device *dev, else st->cb_mask[devaddr] &= ~(1 << (ch + 2)); - ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE, + ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, 0, st->cb_mask[devaddr]); mutex_unlock(&st->lock); @@ -459,7 +483,7 @@ static ssize_t ad7280_show_balance_timer(struct device *dev, if (ret < 0) return ret; - msecs = (ret >> 3) * 71500; + msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500; return sprintf(buf, "%u\n", msecs); } @@ -486,8 +510,8 @@ static ssize_t ad7280_store_balance_timer(struct device *dev, mutex_lock(&st->lock); ret = ad7280_write(st, this_attr->address >> 8, - this_attr->address & 0xFF, - 0, (val & 0x1F) << 3); + this_attr->address & 0xFF, 0, + FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val)); mutex_unlock(&st->lock); return ret ? ret : len; @@ -559,10 +583,10 @@ static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) int addr, ch, i; struct iio_chan_spec *chan; - for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_AUX_ADC_6; ch++) { + for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_AUX_ADC_6_REG; ch++) { chan = &st->channels[*cnt]; - if (ch < AD7280A_AUX_ADC_1) { + if (ch < AD7280A_AUX_ADC_1_REG) { i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); ad7280_voltage_channel_init(chan, i); } else { @@ -634,7 +658,7 @@ static int ad7280_init_dev_attrs(struct ad7280_state *st, int dev, int *cnt) struct iio_dev_attr *iio_attr; struct device *sdev = &st->spi->dev; - for (ch = AD7280A_CELL_VOLTAGE_1; ch <= AD7280A_CELL_VOLTAGE_6; ch++) { + for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_CELL_VOLTAGE_6_REG; ch++) { iio_attr = &st->iio_attr[*cnt]; addr = ad7280a_devaddr(dev) << 8 | ch; i = dev * AD7280A_CELLS_PER_DEV + ch; @@ -647,7 +671,7 @@ static int ad7280_init_dev_attrs(struct ad7280_state *st, int dev, int *cnt) (*cnt)++; iio_attr = &st->iio_attr[*cnt]; - addr = ad7280a_devaddr(dev) << 8 | (AD7280A_CB1_TIMER + ch); + addr = ad7280a_devaddr(dev) << 8 | (AD7280A_CB1_TIMER_REG + ch); ret = ad7280_balance_timer_attr_init(iio_attr, sdev, addr, i); if (ret < 0) @@ -691,16 +715,16 @@ static ssize_t ad7280_read_channel_config(struct device *dev, unsigned int val; switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE: + case AD7280A_CELL_OVERVOLTAGE_REG: val = 1000 + (st->cell_threshhigh * 1568) / 100; break; - case AD7280A_CELL_UNDERVOLTAGE: + case AD7280A_CELL_UNDERVOLTAGE_REG: val = 1000 + (st->cell_threshlow * 1568) / 100; break; - case AD7280A_AUX_ADC_OVERVOLTAGE: + case AD7280A_AUX_ADC_OVERVOLTAGE_REG: val = (st->aux_threshhigh * 196) / 10; break; - case AD7280A_AUX_ADC_UNDERVOLTAGE: + case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: val = (st->aux_threshlow * 196) / 10; break; default: @@ -727,12 +751,12 @@ static ssize_t ad7280_write_channel_config(struct device *dev, return ret; switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE: - case AD7280A_CELL_UNDERVOLTAGE: + case AD7280A_CELL_OVERVOLTAGE_REG: + case AD7280A_CELL_UNDERVOLTAGE_REG: val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ break; - case AD7280A_AUX_ADC_OVERVOLTAGE: - case AD7280A_AUX_ADC_UNDERVOLTAGE: + case AD7280A_AUX_ADC_OVERVOLTAGE_REG: + case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: val = (val * 10) / 196; /* LSB 19.6mV */ break; default: @@ -743,16 +767,16 @@ static ssize_t ad7280_write_channel_config(struct device *dev, mutex_lock(&st->lock); switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE: + case AD7280A_CELL_OVERVOLTAGE_REG: st->cell_threshhigh = val; break; - case AD7280A_CELL_UNDERVOLTAGE: + case AD7280A_CELL_UNDERVOLTAGE_REG: st->cell_threshlow = val; break; - case AD7280A_AUX_ADC_OVERVOLTAGE: + case AD7280A_AUX_ADC_OVERVOLTAGE_REG: st->aux_threshhigh = val; break; - case AD7280A_AUX_ADC_UNDERVOLTAGE: + case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: st->aux_threshlow = val; break; } @@ -781,17 +805,19 @@ static irqreturn_t ad7280_event_handler(int irq, void *private) goto out; for (i = 0; i < st->scan_cnt; i++) { - if (((channels[i] >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6) { - if (((channels[i] >> 11) & 0xFFF) >= - st->cell_threshhigh) { + unsigned int val; + + val = FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, channels[i]); + if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, channels[i]) + <= AD7280A_CELL_VOLTAGE_6_REG) { + if (val >= st->cell_threshhigh) { u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, IIO_EV_DIR_RISING, IIO_EV_TYPE_THRESH, 0, 0, 0); iio_push_event(indio_dev, tmp, iio_get_time_ns(indio_dev)); - } else if (((channels[i] >> 11) & 0xFFF) <= - st->cell_threshlow) { + } else if (val <= st->cell_threshlow) { u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, IIO_EV_DIR_FALLING, IIO_EV_TYPE_THRESH, @@ -800,15 +826,13 @@ static irqreturn_t ad7280_event_handler(int irq, void *private) iio_get_time_ns(indio_dev)); } } else { - if (((channels[i] >> 11) & 0xFFF) >= - st->aux_threshhigh) { + if (val >= st->aux_threshhigh) { u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, IIO_EV_TYPE_THRESH, IIO_EV_DIR_RISING); iio_push_event(indio_dev, tmp, iio_get_time_ns(indio_dev)); - } else if (((channels[i] >> 11) & 0xFFF) <= - st->aux_threshlow) { + } else if (val <= st->aux_threshlow) { u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, IIO_EV_TYPE_THRESH, IIO_EV_DIR_FALLING); @@ -833,26 +857,26 @@ static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value, 0644, ad7280_read_channel_config, ad7280_write_channel_config, - AD7280A_CELL_UNDERVOLTAGE); + AD7280A_CELL_UNDERVOLTAGE_REG); static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value, in_voltage-voltage_thresh_high_value, 0644, ad7280_read_channel_config, ad7280_write_channel_config, - AD7280A_CELL_OVERVOLTAGE); + AD7280A_CELL_OVERVOLTAGE_REG); static IIO_DEVICE_ATTR(in_temp_thresh_low_value, 0644, ad7280_read_channel_config, ad7280_write_channel_config, - AD7280A_AUX_ADC_UNDERVOLTAGE); + AD7280A_AUX_ADC_UNDERVOLTAGE_REG); static IIO_DEVICE_ATTR(in_temp_thresh_high_value, 0644, ad7280_read_channel_config, ad7280_write_channel_config, - AD7280A_AUX_ADC_OVERVOLTAGE); + AD7280A_AUX_ADC_OVERVOLTAGE_REG); static struct attribute *ad7280_event_attributes[] = { &iio_dev_attr_in_thresh_low_value.dev_attr.attr, @@ -892,7 +916,7 @@ static int ad7280_read_raw(struct iio_dev *indio_dev, return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: - if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6) + if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6_REG) *val = 4000; else *val = 5000; @@ -942,10 +966,9 @@ static int ad7280_probe(struct spi_device *spi) st->spi->mode = SPI_MODE_1; spi_setup(st->spi); - st->ctrl_lb = AD7280A_CTRL_LB_ACQ_TIME(pdata->acquisition_time & 0x3); - st->ctrl_hb = AD7280A_CTRL_HB_CONV_AVG(pdata->conversion_averaging - & 0x3) | (pdata->thermistor_term_en ? - AD7280A_CTRL_LB_THERMISTOR_EN : 0); + st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, pdata->acquisition_time) | + FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, pdata->thermistor_term_en); + st->ctrl_hb = FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, pdata->conversion_averaging); ret = ad7280_chain_setup(st); if (ret < 0) @@ -998,13 +1021,13 @@ static int ad7280_probe(struct spi_device *spi) if (spi->irq > 0) { ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, - AD7280A_ALERT, 1, + AD7280A_ALERT_REG, 1, AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN); if (ret) return ret; ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), - AD7280A_ALERT, 0, + AD7280A_ALERT_REG, 0, AD7280A_ALERT_GEN_STATIC_HIGH | (pdata->chain_last_alert_ignore & 0xF)); if (ret) From patchwork Mon Jun 14 11:34:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459839 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3198530jae; Mon, 14 Jun 2021 04:35:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwBiZnJKhSHuY+jT0dBm8smhBCBETHl6AkjhWmYV4RotyS2nx2y1eMQgupGCTDxzs8+lE75 X-Received: by 2002:a17:906:dbc2:: with SMTP id yc2mr15020035ejb.390.1623670534428; Mon, 14 Jun 2021 04:35:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670534; cv=none; d=google.com; s=arc-20160816; b=THHpVEOppijPnOS2SGLnLrsogqpTBDC/+WC/6vUhM+bQtn7p9EYcariRVR3KA7wg6X vHZ8IThrIIpejt/4SXOLwa5UKhKt3aJrhk9QUUDOtSclzU0xqZgyMbvAPRc98AjRk3zI 5NQMXWijbhb7gcAWa1e2CPJEp4hP1toeSzhrkFgKl44kDDFDAKDBR7AeI02aA0C+PO5u OmmAaixmRscYapSJJgU8pmmsB129gks2gouOOuUW8RlMzlWjfMujS/fLCLrToacjexrl QXnf2/4a6CcRMhMSkJLmy4OxLrIu/MfjG7TYsOpve4UpU0lOU8U9e5Lff7oAvl5uzf4y Vm8w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=zgeoU0wwm4K9Mtl1136mVYh+uq4k4HWgTFh7TH8SpCI=; b=XpfU3ACBZqaCpZhrTM1lxu6NdmYqPF5XZX9vTa6AEVwVdbdoA2hntnp7PkqU03a+Vl h4ZMgR/jX6e63K5SsjWm9OHnMNEyxW5nD0X89UewWPpZiJKhKF8ehcARdMviO/EjvdH4 QdIRuGAlUkyFyjHaqUY6A08uqi0+EntA3bNu5lXQSkGJlHGMbfY7VsDTRUNz/amJKBN5 UvhHgW7OBciVZ7zEUd/X3I+isxX1TM8Q9HSDU4QofRn9Pid7NVjuQK9S8+DPrD9tTg9i DRDh9fbJ0dIGmspMjz6aoPF5Us8EzbU5ttaRCbF73PcMtExpnQjMconnJv4DXNcsXQ1T rM3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=AAux309X; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j1si4280808ejj.668.2021.06.14.04.35.34; Mon, 14 Jun 2021 04:35:34 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=AAux309X; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234064AbhFNLha (ORCPT + 7 others); Mon, 14 Jun 2021 07:37:30 -0400 Received: from mail.kernel.org ([198.145.29.99]:58792 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235433AbhFNLf2 (ORCPT ); Mon, 14 Jun 2021 07:35:28 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 136A561206; Mon, 14 Jun 2021 11:33:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670406; bh=VgWxuagrhIzXlgSd+SF6Amipzgfu4PZ6XBtZ2frRAAQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=AAux309Xg0W0SrLmK0W7XnHDG9kR9GjT+2ELrubrWfj/fP03v05KPX28bdGeOpyXU bbbtPjKBX4HioPz+35JHjbK5XlEW14+wIylxL+68rhey6NwsVknoy1R56ItkEIy4nr g6/CxN0bpV0lpZwu/KLEo3nFg2pgIpZYTBLk6e8rEz8skZg1lMpHPW9IsejN8I/fpt sr/8yFHuFfjQSb4gVVh8UMr7W6LT8nH4T/nvvqdP7hTJaFdGtltGYLA1WEC21vs9OI EmNEqfhY+uDf1Pnt5pH98vl9Wzwq+cmVLWpUYuhV4cgEAhA16toi97L6pvO7LLafbb Q/TN4V1fXvRWg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 03/17] staging:iio:adc:ad7280a: rename _read() to _read_reg() Date: Mon, 14 Jun 2021 12:34:53 +0100 Message-Id: <20210614113507.897732-4-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron This avoids possible confusion with read back of the channel conversions. These two types of reads are of difference sizes with resulting differences in the data layout of the response from the hardware. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index d169c8a7b5f1..4d866e5fe43c 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -224,8 +224,8 @@ static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, return spi_write(st->spi, &st->buf[0], 4); } -static int ad7280_read(struct ad7280_state *st, unsigned int devaddr, - unsigned int addr) +static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, + unsigned int addr) { int ret; unsigned int tmp; @@ -476,8 +476,8 @@ static ssize_t ad7280_show_balance_timer(struct device *dev, unsigned int msecs; mutex_lock(&st->lock); - ret = ad7280_read(st, this_attr->address >> 8, - this_attr->address & 0xFF); + ret = ad7280_read_reg(st, this_attr->address >> 8, + this_attr->address & 0xFF); mutex_unlock(&st->lock); if (ret < 0) From patchwork Mon Jun 14 11:34:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459841 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3198547jae; Mon, 14 Jun 2021 04:35:35 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwxxZnJtyhC7l+t0BNggH6gPs/qWjg3mPBSErkAg2jy2GzPnog0oxBX+NI2O4NHq+CEQr3Y X-Received: by 2002:a17:906:ecb9:: with SMTP id qh25mr15033888ejb.283.1623670535717; Mon, 14 Jun 2021 04:35:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670535; cv=none; d=google.com; s=arc-20160816; b=Ot1Uj9OxOwYqgdtdBa8n54Rj2njFSlIDOIW+x7mkQ1wOGNzx6slYuUieOgX55UxrTf xMie9L8O70E0LDszEtXMoB70YecEg1fnRfhgA3dZemv+sx/zHmHNxtH8lref7M6qRhBn a3hFtvn+ln10qYf1FJGXzdS9XUdan7kDPeympKnpodTplxKiqLovxbwEpE4zCIFZwpY7 vP7dDPKptiE4BA+xGS3Vl8PBbHePzYIbzYpHPJ7gW2jOTEYdKbMDIy2N7h8amvNHFc9o x6+pkZaXTYxopxo4YjZI6iQNg07S6jtRB/aRDASnyEdZn0bIZO/qr5A3NFeWFhRbuKAg rSEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=9M2TgTyp3tKPT21XmGAqYJ58GBRgBRJcO8N3DkKWG6c=; b=YIoCBPRk6cgnSoA5M5CCKGBGZQFfb0vAbE+NMmoHySq3/tCzPvfLtjAqzaWebULLv2 J9Ru4jIByaBk1DkhmnwY+ZFp44TN/Dn6HGPeIQ1wCOcB431JPNNAzfez6igdoeqH3W4E okCBVjWqZDnB7aAMFM3H//+KzYBeJry+L00dlTgMSnckKIlUcF+fEVcA+Pt0lKOz6+md Rv5SIkIzIXSORQnoLEu1zc9iQ/4tIyzaulqe/aem5W6Q57vg2P8MAqsyeXkj4w5G9nnm jGCdrWKbcpOV518kk9FSbWfmHPUebJtoCnVPGUSnLb0enxttTpZ7d7PyQ9eJGjXIaVF3 2dag== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=pdCTVfP8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id j1si4280808ejj.668.2021.06.14.04.35.35; Mon, 14 Jun 2021 04:35:35 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=pdCTVfP8; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235177AbhFNLhe (ORCPT + 7 others); Mon, 14 Jun 2021 07:37:34 -0400 Received: from mail.kernel.org ([198.145.29.99]:58808 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235588AbhFNLfb (ORCPT ); Mon, 14 Jun 2021 07:35:31 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 8328461245; Mon, 14 Jun 2021 11:33:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670408; bh=zCr5830WhpGcT+eno1aibI0vVU9Q2xLsA8NPToLzKMQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pdCTVfP8QvLL9nX9ewbRx8llgsdcGWvH7Loevr9alhJd1Znfefq8oD58RSn6owrLD 3hHXCBE/0ZJVZ1IIW9XW/jqOZogKvI6QtYKF9lSMmDfbsRNj2ZUxokyGg6EKLlvQaA 2apAa7jkBUmINJag8mkO1VPS6zAnU+fjoaNifXxiMdNidfL3TJtaEC+XCl8tjqclNV zbssQdmg8lSy0XoxobKUhT/vPQStIY5ZXvTrPjxd0Rz7j+4oj+BMmhUCA51LJCHw7i rA3oZlboE8jLSNq8bx44TqLIBxiJH3/BHRgyZf8UldL3IwtZwiId9yWtynzbxDSZyg Ix6b4C8HFQFSw== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 04/17] staging:iio:adc:ad7280a: Split buff[2] into tx and rx parts Date: Mon, 14 Jun 2021 12:34:54 +0100 Message-Id: <20210614113507.897732-5-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron As the __cacheline_aligned will ensure that the first of these two buffers is appropriate aligned, there is no need to keep them as a single array which is confusing given the first element is always tx and the second rx. Hence let us just have two parts and name them separately. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 17 +++++++++-------- 1 file changed, 9 insertions(+), 8 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 4d866e5fe43c..1f7ea5fb1e20 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -153,7 +153,8 @@ struct ad7280_state { unsigned char cb_mask[AD7280A_MAX_CHAIN]; struct mutex lock; /* protect sensor state */ - __be32 buf[2] ____cacheline_aligned; + __be32 tx ____cacheline_aligned; + __be32 rx; }; static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) @@ -196,18 +197,18 @@ static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) { int ret; struct spi_transfer t = { - .tx_buf = &st->buf[0], - .rx_buf = &st->buf[1], - .len = 4, + .tx_buf = &st->tx, + .rx_buf = &st->rx, + .len = sizeof(st->tx), }; - st->buf[0] = cpu_to_be32(AD7280A_READ_TXVAL); + st->tx = cpu_to_be32(AD7280A_READ_TXVAL); ret = spi_sync_transfer(st->spi, &t, 1); if (ret) return ret; - *val = be32_to_cpu(st->buf[1]); + *val = be32_to_cpu(st->rx); return 0; } @@ -219,9 +220,9 @@ static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, (val & 0xFF) << 13 | all << 12; reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2; - st->buf[0] = cpu_to_be32(reg); + st->tx = cpu_to_be32(reg); - return spi_write(st->spi, &st->buf[0], 4); + return spi_write(st->spi, &st->tx, sizeof(st->tx)); } static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, From patchwork Mon Jun 14 11:34:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459843 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201004jae; Mon, 14 Jun 2021 04:39:34 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyBX8QAYI5PwQ7nn8+JLM0iJfXXKgE8qscScvl4O8l8QzVlPjPGplHDbVl9yIWb+m1zjDaR X-Received: by 2002:a17:906:5593:: with SMTP id y19mr14383770ejp.195.1623670774286; Mon, 14 Jun 2021 04:39:34 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670774; cv=none; d=google.com; s=arc-20160816; b=UgqGxjsPIg5jioRxcRWN2TdngoVwIXQ6efww422OiiZ5B+7ufeykOTDA3o5qPCm7tn u0eMWG1MPQr0WSkbRsffktfmAJ5Fs6dJEzdyS3OKyMLFgLdItKN4iV7OCGObJAgh/Jzp t6gsJ5qeLzNLae1dwa9nB9u7064gj9hC3M10AoO/d28tmdyIXpaHbRUCY3E6Is52cRBu VxMgpSmca7qwX0jY6Zp+oA38RhMECr8acWiRcqz1iA3hBKEI7depK1qWBeHk43IBpN/Y 2V/1E9iKE06GPO1BZMzIgj7avMWkOMCm8Nt7u6YyPGkgr1pz0GlaFx29DOc6D2h4uJdv XTew== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=p9Q+MOw/bR31qA4S9ky+Rsb+ckYl9OPdjcM84xrqZiY=; b=VhzEgVt7DUuOD15xyTVvINgD1gDhevkRds+4CNSBmhCYYMkATrVPEgTXq0xDaRT49m x0qRzErh3TFR2X26B4WcGEgQ3zqxo1698DEHyVFidt0i2mtwSGTdxJdNldwfCT22OQMG M7CxS8z2vTQeXcc3v1NfJtkn6nOS2JEDLWBEvCk0j/vHXMTuFw2smZBJftrUc9AWYxDt x66yNm4Bb2aKDBvQV/5fOEcrMsyabwXxbacJUHCc8YG1FHeE8kto0HL1PBrQQ6SAadgB Cui7be8sHaGuU1JDCCWtQ8iS4+eD8RzvOU9rHMhbxCZszkGlmYneFAht3KOAM2DUPr/5 9Oyg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=MoDjqVI1; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z13si10875643ejb.275.2021.06.14.04.39.34; Mon, 14 Jun 2021 04:39:34 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=MoDjqVI1; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235574AbhFNLld (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:33 -0400 Received: from mail.kernel.org ([198.145.29.99]:59692 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233471AbhFNLhV (ORCPT ); Mon, 14 Jun 2021 07:37:21 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id C0D4F61283; Mon, 14 Jun 2021 11:33:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670410; bh=h7zAOrHasLUWNW7IyHLjIwSpypEVjBIIyS5aFPBrzzU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=MoDjqVI1pE4PwIDSAo2yyfCb05NV/41BASu0kMFbraCt/r8kFHq2fmGUwJfGTJAA5 MT60SG7wlxcat1nDDKJ7kM9vU0wyu/5Eu9mkSFvg+qeYgIW7xH+Qb8NkWoxHJpfJ4x qcDx/qTl5VClbMxXjDhRZ8a0NiOpra57d0oX6R2y0WhV8JtS6lXZWxH6Hv2+GfqpP3 sRxCZq5gDkVbITAWEp3/2H/bbg8lCPBSpSdfSQzubn55XzdjJ1RCf7vCp2xpJcr/+6 WVh6Jn563YzOLGaujBGCuJcFE7OAd9UxdiXFsvAhHNG3JoLEBoaJfRHnUv5eM0/+rp j6Na/8Kw7Vwuw== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 05/17] staging:iio:adc:ad7280a: Use bitfield ops to managed fields in transfers. Date: Mon, 14 Jun 2021 12:34:55 +0100 Message-Id: <20210614113507.897732-6-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron The write and two types of read transfer are sufficiently complex that they benefit from the clarity of using FIELD_PREP() and FIELD_GET() Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 46 ++++++++++++++++++++++++------- 1 file changed, 36 insertions(+), 10 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 1f7ea5fb1e20..158a792c0bf8 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -95,6 +95,23 @@ #define AD7280A_READ_ADDR_MSK GENMASK(7, 2) #define AD7280A_CNVST_CTRL_REG 0x1D /* D7 to D0, Read/write */ +/* Transfer fields */ +#define AD7280A_TRANS_WRITE_DEVADDR_MSK GENMASK(31, 27) +#define AD7280A_TRANS_WRITE_ADDR_MSK GENMASK(26, 21) +#define AD7280A_TRANS_WRITE_VAL_MSK GENMASK(20, 13) +#define AD7280A_TRANS_WRITE_ALL_MSK BIT(12) +#define AD7280A_TRANS_WRITE_CRC_MSK GENMASK(10, 3) +#define AD7280A_TRANS_WRITE_RES_PATTERN 0x2 + +/* Layouts differ for channel vs other registers */ +#define AD7280A_TRANS_READ_DEVADDR_MSK GENMASK(31, 27) +#define AD7280A_TRANS_READ_CONV_CHANADDR_MSK GENMASK(26, 23) +#define AD7280A_TRANS_READ_CONV_DATA_MSK GENMASK(22, 11) +#define AD7280A_TRANS_READ_REG_REGADDR_MSK GENMASK(26, 21) +#define AD7280A_TRANS_READ_REG_DATA_MSK GENMASK(20, 13) +#define AD7280A_TRANS_READ_WRITE_ACK_MSK BIT(10) +#define AD7280A_TRANS_READ_CRC_MSK GENMASK(9, 2) + /* Magic value used to indicate this special case */ #define AD7280A_ALL_CELLS (0xAD << 16) @@ -216,10 +233,16 @@ static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, unsigned int addr, bool all, unsigned int val) { - unsigned int reg = devaddr << 27 | addr << 21 | - (val & 0xFF) << 13 | all << 12; + unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) | + FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) | + FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) | + FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all); + + reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK, + ad7280_calc_crc8(st->crc_tab, reg >> 11)); + /* Reserved b010 pattern not included crc calc */ + reg |= AD7280A_TRANS_WRITE_RES_PATTERN; - reg |= ad7280_calc_crc8(st->crc_tab, reg >> 11) << 3 | 0x2; st->tx = cpu_to_be32(reg); return spi_write(st->spi, &st->tx, sizeof(st->tx)); @@ -264,10 +287,11 @@ static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, if (ad7280_check_crc(st, tmp)) return -EIO; - if (((tmp >> 27) != devaddr) || (((tmp >> 21) & 0x3F) != addr)) + if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || + (FIELD_GET(AD7280A_TRANS_READ_REG_REGADDR_MSK, tmp) != addr)) return -EFAULT; - return (tmp >> 13) & 0xFF; + return FIELD_GET(AD7280A_TRANS_READ_REG_DATA_MSK, tmp); } static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, @@ -310,10 +334,11 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, if (ad7280_check_crc(st, tmp)) return -EIO; - if (((tmp >> 27) != devaddr) || (((tmp >> 23) & 0xF) != addr)) + if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || + (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) != addr)) return -EFAULT; - return (tmp >> 11) & 0xFFF; + return FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); } static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, @@ -351,8 +376,9 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, if (array) array[i] = tmp; /* only sum cell voltages */ - if (((tmp >> 23) & 0xF) <= AD7280A_CELL_VOLTAGE_6_REG) - sum += ((tmp >> 11) & 0xFFF); + if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) <= + AD7280A_CELL_VOLTAGE_6_REG) + sum += FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); } return sum; @@ -407,7 +433,7 @@ static int ad7280_chain_setup(struct ad7280_state *st) goto error_power_down; } - if (n != ad7280a_devaddr(val >> 27)) { + if (n != ad7280a_devaddr(FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, val))) { ret = -EIO; goto error_power_down; } From patchwork Mon Jun 14 11:34:56 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459842 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3200991jae; Mon, 14 Jun 2021 04:39:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzbroyF6ushAzFgAUjDTwvG4t3t6EFKxtJtmxe5SJ+HaUm3GRrY6euRyhB3cd5l7fu88QoI X-Received: by 2002:a17:906:9713:: with SMTP id k19mr15152948ejx.516.1623670772727; Mon, 14 Jun 2021 04:39:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670772; cv=none; d=google.com; s=arc-20160816; b=wK8XWf4UsF011BC02WEH9tEbCXQ1MlIJiMFG8DtlBSjIsLzNoW5lG/QTTt5H/M1SS6 7xvd7OG1nCi32Rswyv9xmBhiyEZR85iI2UXg6Z/AnT0A9C3DdrB7Jy0gJLLBTlCSTSF5 esZygLgnaHwY1WJTuy1f4JU8Nn4dcEGKoX0LQwFfOprqoNvpbHnvBPNF4NiD0Ym3lpiG 7tIiUFwdM0+CaotPZA/NbXhsLPDeIjiyLcUiweFkLqDVtPG6LdFEVZ054eT3uraGzz4D updhsnmfpUEP/cyiamOH2J0ehDvtb0QLR4sjaJZlbVQGjCnQ1FUMRxwSrwe0wJh0M3x4 +fOQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=5G2+j20x6HfTHYIHGExeLEQcWJMPq0V6cZhXg1LYe2g=; b=e+4qL3d7B2P0WGWJRoWoG6V1htU+bgd6fes+Tjz+BBocjhOsWZU43pv5Zxh66i4ORu FnHygaJbLAR3bq25W0wQaiS/puhb3dcBSDWsUzhDWO+8j4DaIXlLc7tcHMZT8/OH75e0 81wp4MD63kPXKnArTDQ2OKTQRB3OuQmFquHG6WSsRCJoFFiaeaiV3vmMZ6O0Hn6Y8QcH EwkYlJf4jiep+neGqU8+yqMZ7vV5SQ3D98pqWnE1YwrVhs67uSp30UqRKGmWHAzAOQQf BBZqgk9Br+AEbKRfb9zeCofn/leVpWNgIQxGABCpOboxa+xipIXUizMfFx8GFrbr38V1 qULA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=QOzMMput; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z13si10875643ejb.275.2021.06.14.04.39.32; Mon, 14 Jun 2021 04:39:32 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=QOzMMput; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234481AbhFNLlc (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:32 -0400 Received: from mail.kernel.org ([198.145.29.99]:59694 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235021AbhFNLhV (ORCPT ); Mon, 14 Jun 2021 07:37:21 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 6ECAE611AB; Mon, 14 Jun 2021 11:33:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670414; bh=ISzenilVRA7IMNW4lwy00KeF4exxjd4JUOlK8heWt/E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QOzMMputOytrbzGnUf4u1VPjk/lehNP8z5qSGmmbg75kZ16ETPfy4VnkyhDNrctFT yvHq20MZboal/UAPmz7ppAYI4jgWltuWNisGWUIbaEqDyyPdKhDQIA9c3ML0V8iggA IgkyDib0ipKZggRt2+ZIL7xS1CgD9hEgdCoQt3VayJauezS/CiA7oZvSWzoOw4vpQg 44GfsA+WlHoIdRzewQYYpa0OZfqtAJ9GqQRLwZB01HcuJBts5pmafMDAOmSlFHXKkx pIEUCoUdFik0Z1PsbTIS6FWM44sMy+aK7I3jmvcBFE8Q3YqHlkVlNw+Sz694INGBQN dkrAlNyQ7tq6g== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 06/17] staging:iio:adc:ad7280a: Switch to standard event control Date: Mon, 14 Jun 2021 12:34:56 +0100 Message-Id: <20210614113507.897732-7-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron This driver had a slightly non standard events ABI but there seems to be no reason for not doing it with the core support for rising and falling events on the two types of channels. In theory the events on different daisy chained chips could be at different levels, but the driver has never supported this and it doesn't seem likely to be used so let us ignore that option. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 198 ++++++++++++++---------------- 1 file changed, 95 insertions(+), 103 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 158a792c0bf8..0aeca39388cf 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -551,18 +551,34 @@ static const struct attribute_group ad7280_attrs_group = { .attrs = ad7280_attributes, }; +static const struct iio_event_spec ad7280_events[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), + }, +}; + static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i) { chan->type = IIO_VOLTAGE; chan->differential = 1; chan->channel = i; chan->channel2 = chan->channel + 1; + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); } static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i) { chan->type = IIO_TEMP; chan->channel = i; + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); } static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, @@ -732,88 +748,105 @@ static int ad7280_attr_init(struct ad7280_state *st) return 0; } -static ssize_t ad7280_read_channel_config(struct device *dev, - struct device_attribute *attr, - char *buf) +static int ad7280a_read_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, int *val, int *val2) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - unsigned int val; - switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE_REG: - val = 1000 + (st->cell_threshhigh * 1568) / 100; - break; - case AD7280A_CELL_UNDERVOLTAGE_REG: - val = 1000 + (st->cell_threshlow * 1568) / 100; - break; - case AD7280A_AUX_ADC_OVERVOLTAGE_REG: - val = (st->aux_threshhigh * 196) / 10; + switch (chan->type) { + case IIO_VOLTAGE: + switch (dir) { + case IIO_EV_DIR_RISING: + *val = 1000 + (st->cell_threshhigh * 1568L) / 100; + return IIO_VAL_INT; + case IIO_EV_DIR_FALLING: + *val = 1000 + (st->cell_threshlow * 1568L) / 100; + return IIO_VAL_INT; + default: + return -EINVAL; + } break; - case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: - val = (st->aux_threshlow * 196) / 10; + case IIO_TEMP: + switch (dir) { + case IIO_EV_DIR_RISING: + *val = ((st->aux_threshhigh) * 196L) / 10; + return IIO_VAL_INT; + case IIO_EV_DIR_FALLING: + *val = (st->aux_threshlow * 196L) / 10; + return IIO_VAL_INT; + default: + return -EINVAL; + } break; default: return -EINVAL; } - - return sprintf(buf, "%u\n", val); } -static ssize_t ad7280_write_channel_config(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) +static int ad7280a_write_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - - long val; + unsigned int addr; + long value; int ret; - ret = kstrtol(buf, 10, &val); - if (ret) - return ret; - - switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE_REG: - case AD7280A_CELL_UNDERVOLTAGE_REG: - val = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ - break; - case AD7280A_AUX_ADC_OVERVOLTAGE_REG: - case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: - val = (val * 10) / 196; /* LSB 19.6mV */ - break; - default: - return -EFAULT; - } - - val = clamp(val, 0L, 0xFFL); + if (val2 != 0) + return -EINVAL; mutex_lock(&st->lock); - switch (this_attr->address) { - case AD7280A_CELL_OVERVOLTAGE_REG: - st->cell_threshhigh = val; - break; - case AD7280A_CELL_UNDERVOLTAGE_REG: - st->cell_threshlow = val; - break; - case AD7280A_AUX_ADC_OVERVOLTAGE_REG: - st->aux_threshhigh = val; + switch (chan->type) { + case IIO_VOLTAGE: + value = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ + value = clamp(value, 0L, 0xFFL); + switch (dir) { + case IIO_EV_DIR_RISING: + addr = AD7280A_CELL_OVERVOLTAGE_REG; + st->cell_threshhigh = value; + break; + case IIO_EV_DIR_FALLING: + addr = AD7280A_CELL_UNDERVOLTAGE_REG; + st->cell_threshlow = value; + break; + default: + ret = -EINVAL; + goto err_unlock; + } break; - case AD7280A_AUX_ADC_UNDERVOLTAGE_REG: - st->aux_threshlow = val; + case IIO_TEMP: + value = (val * 10) / 196; /* LSB 19.6mV */ + value = clamp(value, 0L, 0xFFL); + switch (dir) { + case IIO_EV_DIR_RISING: + addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG; + st->aux_threshhigh = val; + break; + case IIO_EV_DIR_FALLING: + addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG; + st->aux_threshlow = val; + break; + default: + ret = -EINVAL; + goto err_unlock; + } break; + default: + ret = -EINVAL; + goto err_unlock; } - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, - this_attr->address, 1, val); - + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, 1, val); +err_unlock: mutex_unlock(&st->lock); - return ret ? ret : len; + return ret; } static irqreturn_t ad7280_event_handler(int irq, void *private) @@ -875,48 +908,6 @@ static irqreturn_t ad7280_event_handler(int irq, void *private) return IRQ_HANDLED; } -/* Note: No need to fix checkpatch warning that reads: - * CHECK: spaces preferred around that '-' (ctx:VxV) - * The function argument is stringified and doesn't need a fix - */ -static IIO_DEVICE_ATTR_NAMED(in_thresh_low_value, - in_voltage-voltage_thresh_low_value, - 0644, - ad7280_read_channel_config, - ad7280_write_channel_config, - AD7280A_CELL_UNDERVOLTAGE_REG); - -static IIO_DEVICE_ATTR_NAMED(in_thresh_high_value, - in_voltage-voltage_thresh_high_value, - 0644, - ad7280_read_channel_config, - ad7280_write_channel_config, - AD7280A_CELL_OVERVOLTAGE_REG); - -static IIO_DEVICE_ATTR(in_temp_thresh_low_value, - 0644, - ad7280_read_channel_config, - ad7280_write_channel_config, - AD7280A_AUX_ADC_UNDERVOLTAGE_REG); - -static IIO_DEVICE_ATTR(in_temp_thresh_high_value, - 0644, - ad7280_read_channel_config, - ad7280_write_channel_config, - AD7280A_AUX_ADC_OVERVOLTAGE_REG); - -static struct attribute *ad7280_event_attributes[] = { - &iio_dev_attr_in_thresh_low_value.dev_attr.attr, - &iio_dev_attr_in_thresh_high_value.dev_attr.attr, - &iio_dev_attr_in_temp_thresh_low_value.dev_attr.attr, - &iio_dev_attr_in_temp_thresh_high_value.dev_attr.attr, - NULL, -}; - -static const struct attribute_group ad7280_event_attrs_group = { - .attrs = ad7280_event_attributes, -}; - static int ad7280_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, @@ -956,7 +947,8 @@ static int ad7280_read_raw(struct iio_dev *indio_dev, static const struct iio_info ad7280_info = { .read_raw = ad7280_read_raw, - .event_attrs = &ad7280_event_attrs_group, + .read_event_value = &ad7280a_read_thresh, + .write_event_value = &ad7280a_write_thresh, .attrs = &ad7280_attrs_group, }; From patchwork Mon Jun 14 11:34:57 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459844 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201041jae; Mon, 14 Jun 2021 04:39:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyTgl5Z3vsQ0llO74WcsGsPnBeLz7UvIbtc7P9DKtEPFK6klS4XkQb1h3WKm5ygODwbK58l X-Received: by 2002:a17:906:2612:: with SMTP id h18mr14916344ejc.417.1623670776738; Mon, 14 Jun 2021 04:39:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670776; cv=none; d=google.com; s=arc-20160816; b=BSjsTK02YBncyGcH95ggD+916ca17+La4JkXj0wGTLx3m0ka2UNPDc3J5p+RdrvJCd YMaUfJCClw6/Blhh60yFkdVBRm15VIfhv1Z6YY0xZyS3D91q957CTtNtdd3Q4Rmw6nw/ F62hS0P1blKijAekcjHuxx5daRZzGC2EFgyySSGRO4KK8U22kzjofIAMTG5f+F+jatY5 1IZvyrITpfjPToCpBwcTG1J8Lx+M5ltP2jPwQos6yzrOWrIhcreh2ificpBfy5/PvMhL oABgjq9Y3hckoMiO/ouy1zKbkc/Io5OiN/PxGzIxe/q/Glos5KJ2iVJ9yins0FXd/5HZ VlwA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Nal8icQoAgUCsAw47PiFDffNZx/dsBJnGLk0APZgvho=; b=hzugsSQS0+lGa6513rzNmgcUk7CKlaLHxGid0HmHFS/Rr/6AeCFqH0MFl4faAO5gRW 5IC5IpXmxpCbok5W393inLZSVdEQ/Phae6tGTHyI8ZzoZCmiTEMHt7MfDjfqyuIBFETz ULkIg7Js/Q26QYqIeRftihSJF2AOuXfHwigfLNJImj19ewJ5gKiBT2sILsdvdrOSEMUV 2y1CQrSe4+yIzsPKITYzBFIxm0K0KYycqfSep0MWUnEw9D+PGqm4WpzwFefmycGnbtXA SlIHGhZntcR5lF52ho7vxP6GuHmga5Q/x1599Jf2L+6/b8lyPPZq18N5avycTPoeB4nA LVNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=KfIJi1K3; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z13si10875643ejb.275.2021.06.14.04.39.36; Mon, 14 Jun 2021 04:39:36 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=KfIJi1K3; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235843AbhFNLlf (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:35 -0400 Received: from mail.kernel.org ([198.145.29.99]:59696 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236053AbhFNLhY (ORCPT ); Mon, 14 Jun 2021 07:37:24 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 9949561105; Mon, 14 Jun 2021 11:33:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670416; bh=R0SIWw7QIlIp4dnMNNCvAJ6bdVhUe7SSvOvR7PWf4uo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=KfIJi1K3Q1WhMoXI/3VpRqzguXyTzKzxxJuEwYQB/CM6hd0fiEwHHdU2O0jBe3slM gJwtE67vnIbPYhybLZBx7KFUJX9AClh6Ug9DI8ni5hG8itUyxhRKgNlSxnzi22I3Ca M4zaNJElkCC2KfQ6Cq15bhP4JaSJfzOxvgoH2e+NSgSqt3+p4uEOM5rDww4MEPPHKo SD+adyXMUPq1wJ8L38gA2UMSgPF/GIzdZaUxgYu1a/DtDeHygjrjgniG8RRnmx/lkO SxWbAlpJeCPK4Cp29koOHU3/3Nl3VST/e3UCQ/cyQWYrN9RwrQYlsTLIYED5YQqkqa Tg2Z5i45eWnCA== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 07/17] staging:iio:adc:ad7280a: Standardize extended ABI naming Date: Mon, 14 Jun 2021 12:34:57 +0100 Message-Id: <20210614113507.897732-8-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron The *_balance_switch_en and *_balance_switch_timer attributes had non standard prefixes. Use the ext_info framework to automatically create then with in_voltageX-voltageY_ prefix. Documentation for these two unusual attributes to follow. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 174 ++++++++---------------------- 1 file changed, 43 insertions(+), 131 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 0aeca39388cf..032d6430bebf 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -156,7 +156,6 @@ static unsigned int ad7280a_devaddr(unsigned int addr) struct ad7280_state { struct spi_device *spi; struct iio_chan_spec *channels; - struct iio_dev_attr *iio_attr; int slave_num; int scan_cnt; int readback_delay_us; @@ -447,37 +446,33 @@ static int ad7280_chain_setup(struct ad7280_state *st) return ret; } -static ssize_t ad7280_show_balance_sw(struct device *dev, - struct device_attribute *attr, - char *buf) +static ssize_t ad7280_show_balance_sw(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, char *buf) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - return sprintf(buf, "%d\n", - !!(st->cb_mask[this_attr->address >> 8] & - (1 << ((this_attr->address & 0xFF) + 2)))); + return sysfs_emit(buf, "%d\n", + !!(st->cb_mask[chan->address >> 8] & + (1 << ((chan->address & 0xFF) + 2)))); } -static ssize_t ad7280_store_balance_sw(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) +static ssize_t ad7280_store_balance_sw(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); + unsigned int devaddr, ch; bool readin; int ret; - unsigned int devaddr, ch; ret = strtobool(buf, &readin); if (ret) return ret; - devaddr = this_attr->address >> 8; - ch = this_attr->address & 0xFF; + devaddr = chan->address >> 8; + ch = chan->address & 0xFF; mutex_lock(&st->lock); if (readin) @@ -492,19 +487,18 @@ static ssize_t ad7280_store_balance_sw(struct device *dev, return ret ? ret : len; } -static ssize_t ad7280_show_balance_timer(struct device *dev, - struct device_attribute *attr, +static ssize_t ad7280_show_balance_timer(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, char *buf) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - int ret; unsigned int msecs; + int ret; mutex_lock(&st->lock); - ret = ad7280_read_reg(st, this_attr->address >> 8, - this_attr->address & 0xFF); + ret = ad7280_read_reg(st, chan->address >> 8, + (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG); mutex_unlock(&st->lock); if (ret < 0) @@ -512,43 +506,50 @@ static ssize_t ad7280_show_balance_timer(struct device *dev, msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500; - return sprintf(buf, "%u\n", msecs); + return sysfs_emit(buf, "%u.%u\n", msecs / 1000, msecs % 1000); } -static ssize_t ad7280_store_balance_timer(struct device *dev, - struct device_attribute *attr, - const char *buf, - size_t len) +static ssize_t ad7280_store_balance_timer(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) { - struct iio_dev *indio_dev = dev_to_iio_dev(dev); struct ad7280_state *st = iio_priv(indio_dev); - struct iio_dev_attr *this_attr = to_iio_dev_attr(attr); - unsigned long val; + int val, val2; int ret; - ret = kstrtoul(buf, 10, &val); + ret = iio_str_to_fixpoint(buf, 1000, &val, &val2); if (ret) return ret; + val = val * 1000 + val2; val /= 71500; if (val > 31) return -EINVAL; mutex_lock(&st->lock); - ret = ad7280_write(st, this_attr->address >> 8, - this_attr->address & 0xFF, 0, + ret = ad7280_write(st, chan->address >> 8, + (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG, 0, FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val)); mutex_unlock(&st->lock); return ret ? ret : len; } -static struct attribute *ad7280_attributes[AD7280A_MAX_CHAIN * - AD7280A_CELLS_PER_DEV * 2 + 1]; - -static const struct attribute_group ad7280_attrs_group = { - .attrs = ad7280_attributes, +static const struct iio_chan_spec_ext_info ad7280_cell_ext_info[] = { + { + .name = "balance_switch_en", + .read = ad7280_show_balance_sw, + .write = ad7280_store_balance_sw, + .shared = IIO_SEPARATE, + }, { + .name = "balance_switch_timer", + .read = ad7280_show_balance_timer, + .write = ad7280_store_balance_timer, + .shared = IIO_SEPARATE, + }, + {} }; static const struct iio_event_spec ad7280_events[] = { @@ -571,6 +572,7 @@ static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i) chan->channel2 = chan->channel + 1; chan->event_spec = ad7280_events; chan->num_event_specs = ARRAY_SIZE(ad7280_events); + chan->ext_info = ad7280_cell_ext_info; } static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i) @@ -663,91 +665,6 @@ static int ad7280_channel_init(struct ad7280_state *st) return cnt + 1; } -static int ad7280_balance_switch_attr_init(struct iio_dev_attr *attr, - struct device *dev, int addr, int i) -{ - attr->address = addr; - attr->dev_attr.attr.mode = 0644; - attr->dev_attr.show = ad7280_show_balance_sw; - attr->dev_attr.store = ad7280_store_balance_sw; - attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, - "in%d-in%d_balance_switch_en", - i, i + 1); - if (!attr->dev_attr.attr.name) - return -ENOMEM; - - return 0; -} - -static int ad7280_balance_timer_attr_init(struct iio_dev_attr *attr, - struct device *dev, int addr, int i) -{ - attr->address = addr; - attr->dev_attr.attr.mode = 0644; - attr->dev_attr.show = ad7280_show_balance_timer; - attr->dev_attr.store = ad7280_store_balance_timer; - attr->dev_attr.attr.name = devm_kasprintf(dev, GFP_KERNEL, - "in%d-in%d_balance_timer", - i, i + 1); - if (!attr->dev_attr.attr.name) - return -ENOMEM; - - return 0; -} - -static int ad7280_init_dev_attrs(struct ad7280_state *st, int dev, int *cnt) -{ - int addr, ch, i, ret; - struct iio_dev_attr *iio_attr; - struct device *sdev = &st->spi->dev; - - for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_CELL_VOLTAGE_6_REG; ch++) { - iio_attr = &st->iio_attr[*cnt]; - addr = ad7280a_devaddr(dev) << 8 | ch; - i = dev * AD7280A_CELLS_PER_DEV + ch; - - ret = ad7280_balance_switch_attr_init(iio_attr, sdev, addr, i); - if (ret < 0) - return ret; - - ad7280_attributes[*cnt] = &iio_attr->dev_attr.attr; - - (*cnt)++; - iio_attr = &st->iio_attr[*cnt]; - addr = ad7280a_devaddr(dev) << 8 | (AD7280A_CB1_TIMER_REG + ch); - - ret = ad7280_balance_timer_attr_init(iio_attr, sdev, addr, i); - if (ret < 0) - return ret; - - ad7280_attributes[*cnt] = &iio_attr->dev_attr.attr; - (*cnt)++; - } - - ad7280_attributes[*cnt] = NULL; - - return 0; -} - -static int ad7280_attr_init(struct ad7280_state *st) -{ - int dev, cnt = 0, ret; - - st->iio_attr = devm_kcalloc(&st->spi->dev, 2, sizeof(*st->iio_attr) * - (st->slave_num + 1) * AD7280A_CELLS_PER_DEV, - GFP_KERNEL); - if (!st->iio_attr) - return -ENOMEM; - - for (dev = 0; dev <= st->slave_num; dev++) { - ret = ad7280_init_dev_attrs(st, dev, &cnt); - if (ret < 0) - return ret; - } - - return 0; -} - static int ad7280a_read_thresh(struct iio_dev *indio_dev, const struct iio_chan_spec *chan, enum iio_event_type type, @@ -949,7 +866,6 @@ static const struct iio_info ad7280_info = { .read_raw = ad7280_read_raw, .read_event_value = &ad7280a_read_thresh, .write_event_value = &ad7280a_write_thresh, - .attrs = &ad7280_attrs_group, }; static const struct ad7280_platform_data ad7793_default_pdata = { @@ -1030,10 +946,6 @@ static int ad7280_probe(struct spi_device *spi) indio_dev->channels = st->channels; indio_dev->info = &ad7280_info; - ret = ad7280_attr_init(st); - if (ret < 0) - return ret; - ret = devm_iio_device_register(&spi->dev, indio_dev); if (ret) return ret; From patchwork Mon Jun 14 11:34:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459845 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201067jae; Mon, 14 Jun 2021 04:39:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJy/34WeXjbA3i2hdI5C07zyQafY/AD1JB6Bii+kAxXflyIZXRn5lYI25+ZTRgf+MZX1qfuT X-Received: by 2002:a50:ec08:: with SMTP id g8mr16794308edr.376.1623670778628; Mon, 14 Jun 2021 04:39:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670778; cv=none; d=google.com; s=arc-20160816; b=N1FH9VTmVO/xzuJh7YEyBmlmTwNsi9s7+eVK4BMLzfzrS0MNtM3mNatGTGXItkVqEu Z7HpDmAUaEmWcYgWKRDwuFBstRH+hVG/ofhNMjXKAmMYwejNiXsJrUjYgrBwPE9Ffc4E 6qbnY49yEEJtUIDjK4diiIsdcOp5RJEazjoKto8OQwQkGVEyAT2GyBk6O17LABa/oIVw ar+UEFUQddlwSQu2M7uAGanUjUQ9js7ljjkvqn65244aIGF5lGsGQPBBdDmcz2e9uUKw 75UYNuwC4WKubhaQ+fDUvoDuNZJTvyd3SOyV0bmW+1neX5h8k0avxyekSylw3GMXUI5F +CwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1TkXQUD5le8vpaeoGxk0BMJOex9I8nZshB+DSx0HMl4=; b=QkKecxb5tUTDJbyIKK0SezwCKIxqP1JLowbXuW21gst88OGOKh2v1N9fFmCfePstBV KnR67g+5RhpFngBSsLGN1cjNusOIoW+gSy2FE/t687MjecmkboWtXRpv1hTE3Zc+HFBj uAdxaRKUA2inJ4Cwh2AoIehogXxNohQNihIitqLHgmtYalf0/Na/ODWl1KHgOYFuI8cz v3qI7Zfy5S0tSnfBDXk24CmLKR7rvay24FER1Cimxy5ZwuzvKiT+bacWLrtosEnyL/hL XVzUH1b+srOdJwCOPzHD4uGQzpVIfVX7tOHYLPYg4/fNp3kKGmeY49vCNzKLIUvuwBNc Mr0g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=YVX2UPmD; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z13si10875643ejb.275.2021.06.14.04.39.38; Mon, 14 Jun 2021 04:39:38 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=YVX2UPmD; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235862AbhFNLlg (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:36 -0400 Received: from mail.kernel.org ([198.145.29.99]:59698 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236056AbhFNLhY (ORCPT ); Mon, 14 Jun 2021 07:37:24 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 469F0611EE; Mon, 14 Jun 2021 11:33:37 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670419; bh=XvUmnBhp741OqeRlc9z7LVCxaoX+lzDfpn4J2bqjm2I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=YVX2UPmDGjWYXgXzSxdRrz2d5wJEfUT+jpkm4Qw+upe4nq+bJipN5KyQqDDlSOqrk qqCfFPqRZmR/tOt+ElTnDih88fS+dDkKPN7cfTvKjVPmiMITlJK9IMKH4/b/ZpseYj Gk/f5VnsWlSmnP8nRUS1109LiesK0TvnUXukK10Syj2ebEb0QMpyu2YpLEZlWHBC2n 2c/Uywr/0YcqN4+4jasKRqCGeteUhz6aTaYwjkWhlKEx0LUrisrtja5aZDrHECQe6O ubJQ39TinXzVhmP575N5r4JsLG/dtoiMnPJikfGrNLrH+BjxPHVMsyWf2b2LQi0kwI pHFnMH8YufILA== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 08/17] staging:iio:adc:ad7280a: Drop unused timestamp channel. Date: Mon, 14 Jun 2021 12:34:58 +0100 Message-Id: <20210614113507.897732-9-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron The driver doesn't support buffered mode, so a timestamp channel that is entirely hidden from userspace without buffer mode is rather pointless. Drop it. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 14 +------------- 1 file changed, 1 insertion(+), 13 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 032d6430bebf..58bddd07df0c 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -613,16 +613,6 @@ static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, chan->scan_type.storagebits = 32; } -static void ad7280_timestamp_channel_init(struct iio_chan_spec *chan, int cnt) -{ - chan->type = IIO_TIMESTAMP; - chan->channel = -1; - chan->scan_index = cnt; - chan->scan_type.sign = 's'; - chan->scan_type.realbits = 64; - chan->scan_type.storagebits = 64; -} - static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) { int addr, ch, i; @@ -650,7 +640,7 @@ static int ad7280_channel_init(struct ad7280_state *st) { int dev, cnt = 0; - st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 2, + st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1, sizeof(*st->channels), GFP_KERNEL); if (!st->channels) return -ENOMEM; @@ -659,8 +649,6 @@ static int ad7280_channel_init(struct ad7280_state *st) ad7280_init_dev_channels(st, dev, &cnt); ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); - cnt++; - ad7280_timestamp_channel_init(&st->channels[cnt], cnt); return cnt + 1; } From patchwork Mon Jun 14 11:34:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459847 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201114jae; Mon, 14 Jun 2021 04:39:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwG4IomaSUpxbWOecH6UnnAp8va8H77Wk1ys/YbXSA43/WjFdjJG22FSMY7+x5vbxi2kxpY X-Received: by 2002:a17:906:e44:: with SMTP id q4mr14635776eji.120.1623670782476; Mon, 14 Jun 2021 04:39:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670782; cv=none; d=google.com; s=arc-20160816; b=pNZ8oooZ+6/LPq5ebYfcHqic/SRURcg08wNQpHdhDBu5gZJu9V1irwosmvsY7xnIqs yHHnn5q8KK//xehWdl8hTZkzUI52ThtCbU4miSLNiLXu3mK8DgDvbw3XVcgXRICrOeVH M5Pix5xraE3fQeScBH2C10wQ4CtH61Xn9DFTlJIInJ8pgrxbN9bA2TbBvQBClChVCsx/ bDklAC68zUlR1PiDVApIPyA2FhVo3aGJJVt7R7LaPqs3tPH6IHVOt7leb1Hkrv+sSLrb ib3PW9SGgCGPVsopGsGEQlcyztmS0RHpHZeu3Mnf1GVGXo9DVD5wpp5JTpSSAeyi8mr4 u5sw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=izl5WOuP7eaxpvnBASpfP9x6dyhvRuQPkeCWekXxhDs=; b=qNkFAw2UaAS/2XCU0W1H+LgSLFTGvUHma7ERRbSi1409tp8Z7IOhIzxvP/Hwlx6FUA 37uUCDS9d4ZsVLzp1duZ0Crr9O2m6iB3TP4yx5zM4U2SQ/abRKde9AhZZP9LfsH1ECCb G/GZJTMxTw8WZMZIvqO/iYk55y4HE6C4mKBwUG7bcGN54Lyat0l8zcEsJBtog/SExJW1 E7wrzwL0QYqzFjqykl+8hQQI+6z4dtcWWO4e7ACt8+0/MpmFbtAQLtsgGNUXISQJvKGM 1d/y19u7Ei7K9gFmIy3rTsi8Gb7GAXkoZgEbV0XogQgJH625ufr6uxkl1fwKOUzICIbw GtzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=GBXCongJ; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z13si10875643ejb.275.2021.06.14.04.39.42; Mon, 14 Jun 2021 04:39:42 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=GBXCongJ; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235876AbhFNLlj (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:39 -0400 Received: from mail.kernel.org ([198.145.29.99]:59760 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233249AbhFNLh0 (ORCPT ); Mon, 14 Jun 2021 07:37:26 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 0D6B6611C1; Mon, 14 Jun 2021 11:33:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670422; bh=uX4j8Em0DfN95DWXSZS5TrQWrJs4W3Wt3k4zYml5GE4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=GBXCongJgimP2/ps4fwpZBjFJYOSiNyxtEYE6aNNFI8XmtG4MWfG6cQgpSQ2uSvrv Xc7+Ih9z9SUn+ly9ERkP6oxw1d6TD9sTpVJ2dw09tIL+FqTCYzhuswMTPmSZ+cmdbN AeUzn7zn5vm3vDlmyZnATtlMvA5ypVwSajNo2Qk9w/s7+rBbLcmhigcfzkPRIdNQ90 iBzt7cmoE7LVLbOB/m4FxQrxLC7yzWGzy9bRFE42b4SeQH1IqsRuoUe4ukRaGOF4lY 9514bRzpKv/W8SqiIhD2i4V1T76Gni4lrqIebavpQi/NflXC+SL6eNhI1Ci7z8nV8c S2PQ2NkfWaVpA== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 09/17] staging:iio:adc:ad7280a: Trivial comment formatting cleanup Date: Mon, 14 Jun 2021 12:34:59 +0100 Message-Id: <20210614113507.897732-10-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron IIO uses the /* * stuff * more stuff */ multi-line style, so use that here as well. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 21 +++++++++++---------- 1 file changed, 11 insertions(+), 10 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 58bddd07df0c..b186dda03432 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -139,9 +139,10 @@ static unsigned int ad7280a_devaddr(unsigned int addr) ((addr & 0x10) >> 4); } -/* During a read a valid write is mandatory. - * So writing to the highest available address (Address 0x1F) - * and setting the address all parts bit to 0 is recommended +/* + * During a read a valid write is mandatory. + * So writing to the highest available address (Address 0x1F) and setting the + * address all parts bit to 0 is recommended. * So the TXVAL is AD7280A_DEVADDR_ALL + CRC */ #define AD7280A_READ_TXVAL 0xF800030A @@ -180,7 +181,7 @@ static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) crc = crc_tab[val >> 16 & 0xFF]; crc = crc_tab[crc ^ (val >> 8 & 0xFF)]; - return crc ^ (val & 0xFF); + return crc ^ (val & 0xFF); } static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) @@ -193,12 +194,12 @@ static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) return 0; } -/* After initiating a conversion sequence we need to wait until the - * conversion is done. The delay is typically in the range of 15..30 us - * however depending an the number of devices in the daisy chain and the - * number of averages taken, conversion delays and acquisition time options - * it may take up to 250us, in this case we better sleep instead of busy - * wait. +/* + * After initiating a conversion sequence we need to wait until the conversion + * is done. The delay is typically in the range of 15..30us however depending on + * the number of devices in the daisy chain, the number of averages taken, + * conversion delays and acquisition time options it may take up to 250us, in + * this case we better sleep instead of busy wait. */ static void ad7280_delay(struct ad7280_state *st) From patchwork Mon Jun 14 11:35:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459846 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201082jae; Mon, 14 Jun 2021 04:39:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxDvRRQph/9XDGsp+utPrt4qrFSr+M6RNegLgelHWeXeOE8M3WV3VrbkC/0BkuDTVRZDeKc X-Received: by 2002:a17:906:7fc5:: with SMTP id r5mr15314973ejs.474.1623670779635; Mon, 14 Jun 2021 04:39:39 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670779; cv=none; d=google.com; s=arc-20160816; b=cTGRc0tGs6QhyViPwACo6/OArSRE+796PHomwCtPYnd0K/1aDV+tT4I4ksaNDOgB+M f/Odqvj+fcQWhBLGmotbisbOSrnNFKhzOfJ0VFK7dBHOfIDG3vhwHTOGWY3cX/l9FKxy 5Y0G8OIDrjhu2J87GUmSWeuCRvUY8H1O126lU/XuMkGcyUDHXo32PqzIjmTim6YhRJ8G EzHROUmW8L99GKw/x3EQSLoSs1GPh1qu4HH4wQn3WctNInXK0+7AciGTY3uzlV1GA0Ms LL/to0jAmxqX6MF+8ryEd3zJFqYWPX4X21tPAhmLYjW3+2dJZyBWb+LLAEuBFcJfeES6 t3WA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=L6a58MMEAUWASvhgrXl4zf2P66j0QScl8ntCzX+tPOA=; b=MiD0skg3JSQuvCeYAmVm6Yk5EhPsIGSyxLtyU22e52ESHIpyeFyePdxTF+gugRPfWB 1er0vXALiDamnbPRxLnsMGfx215djanoYnVPvBWtzBbWU4R2m3PS0jdfGnM5kXKt5nlV Qu7D0hq3KNDqO9UC+7qaKriS3qh2zXg/PZeXYh9hE3Am36N41WyF7osG61esP/B/rmcv VgRupbbx8djxvkJQMkOcygafzvx50H1OVZffOk4XJFd5Dl0FtLDsTfR9CG07pVQ361UJ rrW1fK0fkxBVXOVQssXYmVwlL2rmnq32r3lkrpDR9juBAtOhNIuB9xidx6/XMG2AvLHO K4CA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ZRsjGdZF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z13si10875643ejb.275.2021.06.14.04.39.39; Mon, 14 Jun 2021 04:39:39 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=ZRsjGdZF; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235737AbhFNLli (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:38 -0400 Received: from mail.kernel.org ([198.145.29.99]:59762 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236100AbhFNLh0 (ORCPT ); Mon, 14 Jun 2021 07:37:26 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 9668761241; Mon, 14 Jun 2021 11:33:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670424; bh=KX22bCcB2kdIkZsxZUIWlRlc5AZ90TtMWEGvHTcSaR8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZRsjGdZFluG8QQdbsF6ROX7SlmZ1xr45gxAtFpBG2TybaV4d3hhdoFhfpvjkrSi5k Rvv1QAOylbbZmpOlWKAp0Zbh/PReDCD2K2QNrjKCfl8ySUJcxfMqjcnLjMS4QfC09w R0s1SiWdQUVZHHdJYtSXlCdKGhoOD22i1wzkmwMBeLzzniUk9nJfhCdXcx1Yee50L1 o1fJooBTWeL2AniwcfNLUP3b6RqqF8AKwYgHOy1WJmhpXU6MwRKLInmA3Qj+RvE/qV qDvNsAHfYIHSDguJkfvokf+AkJ16Afj4AH1IMRa5Bwvw4o6mj8GNA0H1m5osu5DL56 J1yA61z/QqK3w== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 10/17] staging:iio:adc:ad7280a: Make oversampling_ratio a runtime control Date: Mon, 14 Jun 2021 12:35:00 +0100 Message-Id: <20210614113507.897732-11-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron Oversampling has nothing directly to do with analog circuits or similar so belongs in the control of userspace as a policy decision. The only complexity in here was that the acquisition time needs updating if this setting is changed at runtime (as oversampling is time consuming). Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 100 +++++++++++++++++++++--------- drivers/staging/iio/adc/ad7280a.h | 6 -- 2 files changed, 72 insertions(+), 34 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index b186dda03432..90241560f5cf 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -129,6 +129,10 @@ #define AD7280A_DEVADDR_MASTER 0 #define AD7280A_DEVADDR_ALL 0x1F + +static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8}; +static const unsigned short ad7280a_t_acq_ns[4] = {465, 1010, 1460, 1890}; + /* 5-bit device address is sent LSB first */ static unsigned int ad7280a_devaddr(unsigned int addr) { @@ -161,7 +165,8 @@ struct ad7280_state { int scan_cnt; int readback_delay_us; unsigned char crc_tab[CRC8_TABLE_SIZE]; - unsigned char ctrl_hb; + u8 oversampling_ratio; + u8 acquisition_time; unsigned char ctrl_lb; unsigned char cell_threshhigh; unsigned char cell_threshlow; @@ -260,7 +265,8 @@ static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, AD7280A_CTRL_HB_CONV_INPUT_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, AD7280A_CTRL_HB_CONV_RREAD_NO) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -270,7 +276,8 @@ static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, AD7280A_CTRL_HB_CONV_INPUT_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, AD7280A_CTRL_HB_CONV_RREAD_ALL) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -310,7 +317,8 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, AD7280A_CTRL_HB_CONV_INPUT_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, AD7280A_CTRL_HB_CONV_RREAD_NO) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -321,7 +329,8 @@ static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, AD7280A_CTRL_HB_CONV_RREAD_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, AD7280A_CTRL_HB_CONV_START_CS) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -359,7 +368,8 @@ static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, AD7280A_CTRL_HB_CONV_RREAD_ALL) | FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, AD7280A_CTRL_HB_CONV_START_CS) | - st->ctrl_hb); + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); if (ret) return ret; @@ -389,7 +399,8 @@ static void ad7280_sw_power_down(void *data) struct ad7280_state *st = data; ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); + AD7280A_CTRL_HB_PWRDN_SW | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); } static int ad7280_chain_setup(struct ad7280_state *st) @@ -442,7 +453,8 @@ static int ad7280_chain_setup(struct ad7280_state *st) error_power_down: ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - AD7280A_CTRL_HB_PWRDN_SW | st->ctrl_hb); + AD7280A_CTRL_HB_PWRDN_SW | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); return ret; } @@ -590,6 +602,7 @@ static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, chan->indexed = 1; chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + chan->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO); chan->address = addr; chan->scan_index = cnt; chan->scan_type.sign = 'u'; @@ -814,6 +827,26 @@ static irqreturn_t ad7280_event_handler(int irq, void *private) return IRQ_HANDLED; } +static void ad7280_update_delay(struct ad7280_state *st) +{ + /* + * Total Conversion Time = ((tACQ + tCONV) * + * (Number of Conversions per Part)) − + * tACQ + ((N - 1) * tDELAY) + * + * Readback Delay = Total Conversion Time + tWAIT + */ + + st->readback_delay_us = + ((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 695) * + (AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) - + ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250; + + /* Convert to usecs */ + st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); + st->readback_delay_us += 5; /* Add tWAIT */ +} + static int ad7280_read_raw(struct iio_dev *indio_dev, struct iio_chan_spec const *chan, int *val, @@ -847,19 +880,46 @@ static int ad7280_read_raw(struct iio_dev *indio_dev, *val2 = AD7280A_BITS; return IIO_VAL_FRACTIONAL_LOG2; + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *val = ad7280a_n_avg[st->oversampling_ratio]; + return IIO_VAL_INT; } return -EINVAL; } +static int ad7280_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct ad7280_state *st = iio_priv(indio_dev); + int i; + + switch (mask) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + if (val2 != 0) + return -EINVAL; + for (i = 0; i < ARRAY_SIZE(ad7280a_n_avg); i++) { + if (val == ad7280a_n_avg[i]) { + st->oversampling_ratio = i; + ad7280_update_delay(st); + return 0; + } + } + return -EINVAL; + default: + return -EINVAL; + } +} + static const struct iio_info ad7280_info = { .read_raw = ad7280_read_raw, + .write_raw = ad7280_write_raw, .read_event_value = &ad7280a_read_thresh, .write_event_value = &ad7280a_write_thresh, }; static const struct ad7280_platform_data ad7793_default_pdata = { .acquisition_time = AD7280A_ACQ_TIME_400ns, - .conversion_averaging = AD7280A_CONV_AVG_DIS, .thermistor_term_en = true, }; @@ -868,8 +928,6 @@ static int ad7280_probe(struct spi_device *spi) const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev); struct ad7280_state *st; int ret; - const unsigned short t_acq_ns[4] = {465, 1010, 1460, 1890}; - const unsigned short n_avg[4] = {1, 2, 4, 8}; struct iio_dev *indio_dev; indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); @@ -892,7 +950,7 @@ static int ad7280_probe(struct spi_device *spi) st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, pdata->acquisition_time) | FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, pdata->thermistor_term_en); - st->ctrl_hb = FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, pdata->conversion_averaging); + st->oversampling_ratio = 0; /* No oversampling */ ret = ad7280_chain_setup(st); if (ret < 0) @@ -902,27 +960,13 @@ static int ad7280_probe(struct spi_device *spi) st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; st->cell_threshhigh = 0xFF; st->aux_threshhigh = 0xFF; + st->acquisition_time = pdata->acquisition_time; ret = devm_add_action_or_reset(&spi->dev, ad7280_sw_power_down, st); if (ret) return ret; - /* - * Total Conversion Time = ((tACQ + tCONV) * - * (Number of Conversions per Part)) − - * tACQ + ((N - 1) * tDELAY) - * - * Readback Delay = Total Conversion Time + tWAIT - */ - - st->readback_delay_us = - ((t_acq_ns[pdata->acquisition_time & 0x3] + 695) * - (AD7280A_NUM_CH * n_avg[pdata->conversion_averaging & 0x3])) - - t_acq_ns[pdata->acquisition_time & 0x3] + st->slave_num * 250; - - /* Convert to usecs */ - st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); - st->readback_delay_us += 5; /* Add tWAIT */ + ad7280_update_delay(st); indio_dev->name = spi_get_device_id(spi)->name; indio_dev->modes = INDIO_DIRECT_MODE; diff --git a/drivers/staging/iio/adc/ad7280a.h b/drivers/staging/iio/adc/ad7280a.h index 23f18bb9e279..99297789a46d 100644 --- a/drivers/staging/iio/adc/ad7280a.h +++ b/drivers/staging/iio/adc/ad7280a.h @@ -17,11 +17,6 @@ #define AD7280A_ACQ_TIME_1200ns 2 #define AD7280A_ACQ_TIME_1600ns 3 -#define AD7280A_CONV_AVG_DIS 0 -#define AD7280A_CONV_AVG_2 1 -#define AD7280A_CONV_AVG_4 2 -#define AD7280A_CONV_AVG_8 3 - #define AD7280A_ALERT_REMOVE_VIN5 BIT(2) #define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) #define AD7280A_ALERT_REMOVE_AUX5 BIT(0) @@ -29,7 +24,6 @@ struct ad7280_platform_data { unsigned int acquisition_time; - unsigned int conversion_averaging; unsigned int chain_last_alert_ignore; bool thermistor_term_en; }; From patchwork Mon Jun 14 11:35:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459848 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201122jae; Mon, 14 Jun 2021 04:39:43 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyFRX1KtkWlTmkK9i597Cn2SVYyp0h8DyLcf4BCHe00L+qo/NBICmSWPfNAZ1Wp3URYGSdV X-Received: by 2002:aa7:c4d0:: with SMTP id p16mr17056455edr.150.1623670783348; Mon, 14 Jun 2021 04:39:43 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670783; cv=none; d=google.com; s=arc-20160816; b=Z3+naCsARmUMA/080oH6BClVgIg+dmfwPJPTCvS5el5eGxhSP/JUcvA5W9mNxwhxaY rHhJBvpf3GPUk7gQ1j5kMSc/9ueE0ibnlwHjDD3vLOBnpZa5G56Hs8ghj2rG9rTavZwK tabDnRXuK2wcWbvAOfqk8zCjX0mMOMc9HYj4sdF6qLIILMeyp2fK4OhYiK6qCWjtv+dy 881wZEtFwmnCZtaci/RPyfvG07l+0NxWmhEplYY7qik7tM4gFPLAmltJbk7qrOcQDq5x 43jj218FQurtKTepd+s96TwzxL6EvBaqwbTBff8SVPGgXbrZSZqZg0CnMGv5Wvm+VoNv MEuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qEzNVqKS9C92NGW6WVxutkEqJLG45/W87gGEZE5BiT4=; b=JP6hxOFAaABujmoAj3swMENYPIXbeF8P/JWxWaXOY10yToZ8kRn11CfWiUAWp/5TQM Bu2KTZ1iop14B2GmXjCll8yXAh8IRTM76363HkCirnME8Cv7RnnSOyPXy2tUcbqqS0Xc LYbDy+CPryCwJ8+2YEh17hYQ9rew7h3yGYgXPQwH4niH30H3SAp6uHoVVxY7qGLsvwne deBIMQfBZXqtwypfVpnqLW8dAuetuh3HWSmxdWce750la+mT0ZDHEFif68uuwCYgXYLE zLnr2mrbcWVBD0Yi/A//ZjUMoqIvqcVU+vDl/5SikiSFgbDaN1nirFgpbsA4UkDX3py0 yQ4A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=adVlvRPJ; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id z13si10875643ejb.275.2021.06.14.04.39.42; Mon, 14 Jun 2021 04:39:43 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=adVlvRPJ; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235663AbhFNLlm (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:42 -0400 Received: from mail.kernel.org ([198.145.29.99]:59768 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233533AbhFNLh1 (ORCPT ); Mon, 14 Jun 2021 07:37:27 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id ED1B16124B; Mon, 14 Jun 2021 11:33:44 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670426; bh=xT98V8a3SwZ+3ZQlFpw0Og2o/hKPlOM2ANJybtdORzQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=adVlvRPJbjaZ56FjLvbTS7s8xMvcZVZgfAUpHhMhoopNX4TUafUrIn68be8Nsr+N+ S05b+g1F4pgq/ssFcVQO7/ueZsCX9drevMsAfJj56ca2W1IRsQu0TMKwEZBr0xHutO hGcsXWX0p9//q5+O5XBYebSEBvvXxJUvTh9Te9k0hUfDqSaghEqhqlqkEkzAiUfzH/ 16zDTq7bsIlVeL0SLnVeCfNd4Nc+2KjIi+Jk3wGjcmuYFBBjjNki/KYJD0KHaIRzfO /8vEMgkftdr2c4Zp/4G+h1aTK2zOlJmJyBeaqJLNzk41P/jVFyNzlsL0Ts25xxsCYU I6qWwKfOzK/rQ== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 11/17] staging:iio:adc:ad7280a: Cleanup includes Date: Mon, 14 Jun 2021 12:35:01 +0100 Message-Id: <20210614113507.897732-12-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron Drop used includes, add a few missing ones and reorder. The include-what-you-use tool output was considered in making this change. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 16 +++++++++------- 1 file changed, 9 insertions(+), 7 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 90241560f5cf..7f9e2276e41a 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -5,21 +5,23 @@ * Copyright 2011 Analog Devices Inc. */ +#include +#include #include +#include #include +#include +#include #include +#include +#include +#include #include #include #include -#include -#include -#include -#include -#include -#include -#include #include +#include #include "ad7280a.h" From patchwork Mon Jun 14 11:35:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459849 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201506jae; Mon, 14 Jun 2021 04:40:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz7h0S5C6hNVzGCJAXTGhxlXixfi1c/5ENI6qZniuoUKZTN/8B4bsYUzps0vQILCqhNEmjX X-Received: by 2002:a17:906:6849:: with SMTP id a9mr14970046ejs.415.1623670824107; Mon, 14 Jun 2021 04:40:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670824; cv=none; d=google.com; s=arc-20160816; b=J6vEARIVFWkidKZp4qmskxx+3hAXXQiBuCoYvpJMIV0QezmqnsgmWMIAcfGV+RVr2U goQVuUfib0JqSffz4HnogRW3rclUEftCRzhNBszj2Ow17zYPD1knNqe/Y82FGrzvcFfs Yk0gqHOQNGHoM0Qxg5IVq7hlIbToSVZqU6qmdmteIXZHv2wRpzD59w1Sqbfb181xM+kQ stQE0Nfh9ljIGvWJtUh4H0K3i/+rlCybkY4MW/fR3Y7rX9aAnKDdGQhkUrhLfgYL8lmn juH4tb8pRcq7vQDny8P3kL7affhcl7U6otq1vn4R9WbqQmDHz4PwBw8IW6VWlDGqyRZv TOdA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=w1svZxsJ8CO9hPTISe7SMt+lW1K2u8YEOtbHtm3UR4I=; b=qxa5cJDix5uAJMVSBUnEU4Yw5yJncGxjLEJxtG0TJybLeVCXD/PXVir4tFwrA80G1P m1zGRJpLv7Wa43I9KrStPJvldVTyYyHLBTvSIhiRx29SDLhH0s61bM93AuPjjWP3I5gM OC5OnYJQxFN0isTYSkZzBROrQVe+IX39ikaZMBHHFtZIUzVj1+X3HSR+fp8dIce5Qmqv T161YW5mo/MHF5HVvmJ42tdVkfUseLIWCW23WiSaKhKkOs9oxoQi4TF+6i/7q1x1R7gS MgwktEvuYpFZM1YQfALPSEDbLcjqdmV+jKMlATxCMtSh3nxd4fILRBAFpMbVg6Zt75FV RFyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=JpktRzJc; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id nb10si11945869ejc.344.2021.06.14.04.40.23; Mon, 14 Jun 2021 04:40:24 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=JpktRzJc; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235765AbhFNLlo (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:44 -0400 Received: from mail.kernel.org ([198.145.29.99]:59770 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233546AbhFNLh1 (ORCPT ); Mon, 14 Jun 2021 07:37:27 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 51D566134F; Mon, 14 Jun 2021 11:33:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670429; bh=F7XmoMcwJPPcXxw0bTIa6C1AAdnqrRXSH7Ps7AlrnWA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=JpktRzJcqNTTAprJpDC33fEaGbIl+ih5rIRvpeksqSY1VUjM3CdfuUoWAzTshg5Z2 eNq8Mg4F9LYf5gh4Di5L/OIGQDo6gqgpK60MicoMSf896oyus4bD8ABL9OA7kuoR5S +lvtXmeSGSE6Em+m5NewFH/qYoC2pSHR/O6/E7Q8oN+mO49OAYDHYNBg98FlyS+JGk 9LPSpD4cyKIBh2vQAcevYdTjGv6sMVzvybeohYOjxfueFuashvu0vrKcCCYEcqzp+y 7t3QSFsfjDfvTjIGBNv0aJ7IVUaNcWspoJ+TE3W5NElYvEP0ENktMXxMOQuRaoCrTz Ya0bnfmMMr+dw== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 12/17] staging:iio:ad7280a: Reflect optionality of irq in ABI Date: Mon, 14 Jun 2021 12:35:02 +0100 Message-Id: <20210614113507.897732-13-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron Given the irq is optional, let us remove the interfaces related to events when it is not present. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 48 +++++++++++++++++++------------ 1 file changed, 29 insertions(+), 19 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index 7f9e2276e41a..b4ba6da07af9 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -579,23 +579,29 @@ static const struct iio_event_spec ad7280_events[] = { }, }; -static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i) +static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i, + bool irq_present) { chan->type = IIO_VOLTAGE; chan->differential = 1; chan->channel = i; chan->channel2 = chan->channel + 1; - chan->event_spec = ad7280_events; - chan->num_event_specs = ARRAY_SIZE(ad7280_events); + if (irq_present) { + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); + } chan->ext_info = ad7280_cell_ext_info; } -static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i) +static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i, + bool irq_present) { chan->type = IIO_TEMP; chan->channel = i; - chan->event_spec = ad7280_events; - chan->num_event_specs = ARRAY_SIZE(ad7280_events); + if (irq_present) { + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); + } } static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, @@ -629,7 +635,8 @@ static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, chan->scan_type.storagebits = 32; } -static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) +static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt, + bool irq_present) { int addr, ch, i; struct iio_chan_spec *chan; @@ -639,10 +646,10 @@ static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) if (ch < AD7280A_AUX_ADC_1_REG) { i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); - ad7280_voltage_channel_init(chan, i); + ad7280_voltage_channel_init(chan, i, irq_present); } else { i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch); - ad7280_temp_channel_init(chan, i); + ad7280_temp_channel_init(chan, i, irq_present); } addr = ad7280a_devaddr(dev) << 8 | ch; @@ -652,7 +659,7 @@ static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt) } } -static int ad7280_channel_init(struct ad7280_state *st) +static int ad7280_channel_init(struct ad7280_state *st, bool irq_present) { int dev, cnt = 0; @@ -662,7 +669,7 @@ static int ad7280_channel_init(struct ad7280_state *st) return -ENOMEM; for (dev = 0; dev <= st->slave_num; dev++) - ad7280_init_dev_channels(st, dev, &cnt); + ad7280_init_dev_channels(st, dev, &cnt, irq_present); ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); @@ -920,6 +927,11 @@ static const struct iio_info ad7280_info = { .write_event_value = &ad7280a_write_thresh, }; +static const struct iio_info ad7280_info_no_irq = { + .read_event_value = &ad7280a_read_thresh, + .write_event_value = &ad7280a_write_thresh, +}; + static const struct ad7280_platform_data ad7793_default_pdata = { .acquisition_time = AD7280A_ACQ_TIME_400ns, .thermistor_term_en = true, @@ -973,18 +985,12 @@ static int ad7280_probe(struct spi_device *spi) indio_dev->name = spi_get_device_id(spi)->name; indio_dev->modes = INDIO_DIRECT_MODE; - ret = ad7280_channel_init(st); + ret = ad7280_channel_init(st, spi->irq > 0); if (ret < 0) return ret; indio_dev->num_channels = ret; indio_dev->channels = st->channels; - indio_dev->info = &ad7280_info; - - ret = devm_iio_device_register(&spi->dev, indio_dev); - if (ret) - return ret; - if (spi->irq > 0) { ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_ALERT_REG, 1, @@ -1008,9 +1014,13 @@ static int ad7280_probe(struct spi_device *spi) indio_dev); if (ret) return ret; + + indio_dev->info = &ad7280_info; + } else { + indio_dev->info = &ad7280_info_no_irq; } - return 0; + return devm_iio_device_register(&spi->dev, indio_dev); } static const struct spi_device_id ad7280_id[] = { From patchwork Mon Jun 14 11:35:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459850 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201509jae; Mon, 14 Jun 2021 04:40:25 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyG/YF76mZVkGiTkkvoOLIBhLZQm6/y3vPlC/oHXn8TtM33Xwjd+l6qsvSXT/1hpnY7dsMC X-Received: by 2002:a05:6402:22fa:: with SMTP id dn26mr16122710edb.230.1623670825050; Mon, 14 Jun 2021 04:40:25 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670825; cv=none; d=google.com; s=arc-20160816; b=umIE0eNqTNy2NbQR0CalIOaQvsUP4sGkJ3FcGqrwmm/3FjTsgOFaAKO11B+dY0LYv0 vJP7aGVKF69ijD7M6lqb92XYhMjQd2tOG+lMdVwKWx7zmQU4R0clZzzAPgntrsQdRg6V ntGXyU6/MngJSqc38m+ApKAsy+/ZA5kVqGkNht+k7CQpKuiV5YMgkGQOwAB81LVUHNRe pLs9ScimOFInt7pZyEfvjnWNwQA/oTvj57mRG8xydFugHFBlbXoGAiJHuRFlha8MzvmU W17yhygWowsrsqhc6A8o+Tz3Gvp/cPhKXNUdraCV3cdY89AKuIo3q3D1jUN1KcgNoIEc HyVA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4GRwoOoV8NAw9iUeYN3EET65xEcGJ3bPSvAFCPxLtI0=; b=kULzfE38Td1s7y3atdhE/HLlhev7EliRTXfmqfA94pFTXLyD8Y9SdQN2q1OIbL9jwI IeYsgnsSQBlLcfv/OyM3sTdoi4h7Gwsmx2vKes8b8+y+nvKzXZhmSGOfcHBbUuLde3Fq 3ZcPouRbqu+EX1Rc3JcbhKVc36RXN+03MbZqrC2waeYuVBD/dAihXtZ1lgHBFN8oRwhu xDJ6lx5umTsaoSfzf6sTqf3KzUYsphgbFOSsav6ESdQmgbnbmGHd68CW58DujgRKMAvJ pW98tdQerFjrY9Uh3+lhEj7jDgPJb58gzl2d/A/9PlzDm3CtX5y7lk14TDxlnr8gBKik SNpA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=uSDPCMMs; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id nb10si11945869ejc.344.2021.06.14.04.40.24; Mon, 14 Jun 2021 04:40:25 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=uSDPCMMs; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235872AbhFNLlp (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:45 -0400 Received: from mail.kernel.org ([198.145.29.99]:59786 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234688AbhFNLhb (ORCPT ); Mon, 14 Jun 2021 07:37:31 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 7400B613D3; Mon, 14 Jun 2021 11:33:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670431; bh=DdhD+UYIptRwCAyJgGEgxEJPQ7/pKpn2YAzl6dapdBY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=uSDPCMMsUOJx4CEI3SFkJHoGP8nI6Y/p06EvcRp4xKSADg9Dm7e1Z5cPbXmyn+MeC NOr2jD+vi/jkgl7kiOh6dsrmGN72NilxV7ZIVzzfZvNzGW5enYXDpT7lA5rAITqEiI xj9POHobUC/sKW9rkWAMT0RPbcsymVDmLai7IzTq05yFYKbyjvxD2Olmm4lnlrgJsg /u/AjcfAj7jAtBYY5hYJWj5G0zdIKLIKNS7Ih+uUxaQ17vKmHYctu5WXvB0Ebczdmy yWgMBEgjZYr0xsodzymmmfTY01XcOW1Wfux8EVbVw5dM4wnizOA00fXW2pIffw4T9B 6AmGfkc2AWcYg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 13/17] staging:iio:adc:ad7280a: Use a local dev pointer to avoid &spi->dev Date: Mon, 14 Jun 2021 12:35:03 +0100 Message-Id: <20210614113507.897732-14-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron We use this a few times already and it is about to get worse, so introduce a local variable to simplify things. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index b4ba6da07af9..acaae1b33986 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -940,11 +940,12 @@ static const struct ad7280_platform_data ad7793_default_pdata = { static int ad7280_probe(struct spi_device *spi) { const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev); + struct device *dev = &spi->dev; struct ad7280_state *st; int ret; struct iio_dev *indio_dev; - indio_dev = devm_iio_device_alloc(&spi->dev, sizeof(*st)); + indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); if (!indio_dev) return -ENOMEM; @@ -976,7 +977,7 @@ static int ad7280_probe(struct spi_device *spi) st->aux_threshhigh = 0xFF; st->acquisition_time = pdata->acquisition_time; - ret = devm_add_action_or_reset(&spi->dev, ad7280_sw_power_down, st); + ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st); if (ret) return ret; @@ -1005,7 +1006,7 @@ static int ad7280_probe(struct spi_device *spi) if (ret) return ret; - ret = devm_request_threaded_irq(&spi->dev, spi->irq, + ret = devm_request_threaded_irq(dev, spi->irq, NULL, ad7280_event_handler, IRQF_TRIGGER_FALLING | @@ -1020,7 +1021,7 @@ static int ad7280_probe(struct spi_device *spi) indio_dev->info = &ad7280_info_no_irq; } - return devm_iio_device_register(&spi->dev, indio_dev); + return devm_iio_device_register(dev, indio_dev); } static const struct spi_device_id ad7280_id[] = { From patchwork Mon Jun 14 11:35:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459851 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201565jae; Mon, 14 Jun 2021 04:40:30 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzqWxDn0HnJfUfodSj88zCL+bzuUEgTHaDwn/nbmtwFVTkKqJqC5yXqlObYbZaRBcyCuJ2z X-Received: by 2002:a17:906:3ce:: with SMTP id c14mr15381707eja.426.1623670830083; Mon, 14 Jun 2021 04:40:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670830; cv=none; d=google.com; s=arc-20160816; b=C9b1LjSgu29GCJRoWtvON+bAvzHaN3Ar1sGb6SaqM6g+6xXCADI/hLiyE+yJctZv1K /APsi4eHOXepGRIrMnizSI0fMD38hTVtzN9PEqek79YpdOOGj/t0evh/8ySPiXx33CaD 8CAXeWZlSW/NnxeT1OrzNA3VBsgmx8nCtKyFCKfy2sBFhVFmUi9MLNtPP0Qx8GoKko4j ZsEVCYBZZnWO/dP27aNhm+3AHImhQvCjjP/V5RGzcpLVqVNg2dVo3edaT2ITFh5EayPX VQmCfsVkwstNSkgZuGtO2PBeJ8U9bVHR81g5U5dnamBX/nUHsjs6qe2idBrhlPnEJ1Dd JZpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YFrEGk42yU4rHooqpP+VYRN8KzKm+DDtYfaWWWxs07s=; b=gErAuGSjjYqQAA7ACt2dxfC09L/5IcxjgA2lGOvXRopcgJNp6wL6cX77wjLZiXccUH eaIWWMciJ3Go7XwlBXRm+FcUDlx1RMsNLExidoAWvyAAooXif8zQmuZQRaU+89WhOClb +BvA75nT6PNztwUXd9Xr6HndC1QyW4IeLoN/qHjSX3rp7P2Ev2rF8QwhfX57+q5lG9R1 lBHbwcSC9+EcBjQ02TdAtTxToY+XzI6Um+D1MuzDUdDgZ00oIr5WY4TQmZQ3QxRG4ncP Qd6Dc7K1WCLh+s9tROCcUMrq5wErbsjA01HR4xmF9YvJWcAIyhhWm0Tuuoq3H/GxY+YM hszg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=W2uD1abu; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id nb10si11945869ejc.344.2021.06.14.04.40.29; Mon, 14 Jun 2021 04:40:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=W2uD1abu; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235886AbhFNLlq (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:46 -0400 Received: from mail.kernel.org ([198.145.29.99]:59788 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234717AbhFNLhc (ORCPT ); Mon, 14 Jun 2021 07:37:32 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 0888661360; Mon, 14 Jun 2021 11:33:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670434; bh=6vWq4Yh1ITlaNUbxjiGykgH0QdzkC1dErOw5pvgfbF8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W2uD1abu9HZHHq3ash2/zsMZYd5o49w7u9Q9jZ2S/i4wstafvZGfh5abWoQpiIkhQ 9FpkBk02yIjg/zD+Gnrx4zW8/c9Nxhb3gTyT1Np5MGoeR1vR260vnAKVPePOoGwWxa Y2aroNDytHHeNLEDaIHEtbnC1ey7T1KeN/818JFpWwHW+8cKqcrHwp9yI04/KBKLLL ckQZRZl5yaS7Pw5OAJHtDkfGrxndQNRNicpwbapkNNzJex7GgZaglmtAtZJ9WccT6f dC5r8weoOqlxdsYUtrKM8qjMT/HwItSacWFNhWh7wO9RPrJkg+3yfrdUinsc+vaZ/M vf0d4Qs56Igrw== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 14/17] staging:iio:adc:ad7280a: Use device properties to replace platform data. Date: Mon, 14 Jun 2021 12:35:04 +0100 Message-Id: <20210614113507.897732-15-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron Convert all the device specific info that was previously in platform data over to generic firmware query interfaces. dt-bindings to follow shortly. Signed-off-by: Jonathan Cameron --- drivers/staging/iio/adc/ad7280a.c | 100 +++++++++++++++++++++++++----- drivers/staging/iio/adc/ad7280a.h | 31 --------- 2 files changed, 86 insertions(+), 45 deletions(-) -- 2.32.0 diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c index acaae1b33986..0806238debe3 100644 --- a/drivers/staging/iio/adc/ad7280a.c +++ b/drivers/staging/iio/adc/ad7280a.c @@ -23,8 +23,6 @@ #include #include -#include "ad7280a.h" - /* Registers */ #define AD7280A_CELL_VOLTAGE_1_REG 0x0 /* D11 to D0, Read only */ @@ -81,6 +79,11 @@ #define AD7280A_AUX_ADC_UNDERVOLTAGE_REG 0x12 /* D7 to D0, Read/write */ #define AD7280A_ALERT_REG 0x13 /* D7 to D0, Read/write */ +#define AD7280A_ALERT_REMOVE_MSK GENMASK(3, 0) +#define AD7280A_ALERT_REMOVE_AUX5 BIT(0) +#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) +#define AD7280A_ALERT_REMOVE_VIN5 BIT(2) +#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) #define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) #define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) @@ -163,6 +166,8 @@ static unsigned int ad7280a_devaddr(unsigned int addr) struct ad7280_state { struct spi_device *spi; struct iio_chan_spec *channels; + unsigned int chain_last_alert_ignore; + bool thermistor_term_en; int slave_num; int scan_cnt; int readback_delay_us; @@ -932,14 +937,8 @@ static const struct iio_info ad7280_info_no_irq = { .write_event_value = &ad7280a_write_thresh, }; -static const struct ad7280_platform_data ad7793_default_pdata = { - .acquisition_time = AD7280A_ACQ_TIME_400ns, - .thermistor_term_en = true, -}; - static int ad7280_probe(struct spi_device *spi) { - const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev); struct device *dev = &spi->dev; struct ad7280_state *st; int ret; @@ -954,17 +953,90 @@ static int ad7280_probe(struct spi_device *spi) st->spi = spi; mutex_init(&st->lock); - if (!pdata) - pdata = &ad7793_default_pdata; + st->thermistor_term_en = + device_property_read_bool(dev, "adi,thermistor-termination"); + + if (device_property_present(dev, "adi,acquistion-time-ns")) { + u32 val; + + ret = device_property_read_u32(dev, "adi,acquisition-time-ns", &val); + if (ret) + return ret; + + switch (val) { + case 400: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; + break; + case 800: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns; + break; + case 1200: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns; + break; + case 1600: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns; + break; + default: + dev_err(dev, "Firmware provided acquisition time is invalid\n"); + return -EINVAL; + } + } else { + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; + } + + /* Alert masks are intended for when particular inputs are not wired up */ + if (device_property_present(dev, "adi,voltage-alert-last-chan")) { + u8 val; + ret = device_property_read_u8(dev, "adi,voltage-alert-last-chan", &val); + if (ret) + return ret; + + switch (val) { + case 3: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5; + break; + case 4: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5; + break; + case 5: + break; + default: + dev_err(dev, + "Firmware provided last voltage alert channel invalid\n"); + break; + } + } + if (device_property_present(dev, "adi,temp-alert-last-chan")) { + u8 val; + + ret = device_property_read_u8(dev, "adi,temp-alert-last-chan", &val); + if (ret) + return ret; + + switch (val) { + case 3: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX4_AUX5; + break; + case 4: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX5; + break; + case 5: + break; + default: + dev_err(dev, + "Firmware provided last temp alert channel invalid\n"); + break; + } + } crc8_populate_msb(st->crc_tab, POLYNOM); st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ; st->spi->mode = SPI_MODE_1; spi_setup(st->spi); - st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, pdata->acquisition_time) | - FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, pdata->thermistor_term_en); + st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) | + FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en); st->oversampling_ratio = 0; /* No oversampling */ ret = ad7280_chain_setup(st); @@ -975,7 +1047,6 @@ static int ad7280_probe(struct spi_device *spi) st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; st->cell_threshhigh = 0xFF; st->aux_threshhigh = 0xFF; - st->acquisition_time = pdata->acquisition_time; ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st); if (ret) @@ -1002,7 +1073,8 @@ static int ad7280_probe(struct spi_device *spi) ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), AD7280A_ALERT_REG, 0, AD7280A_ALERT_GEN_STATIC_HIGH | - (pdata->chain_last_alert_ignore & 0xF)); + FIELD_PREP(AD7280A_ALERT_REMOVE_MSK, + st->chain_last_alert_ignore)); if (ret) return ret; diff --git a/drivers/staging/iio/adc/ad7280a.h b/drivers/staging/iio/adc/ad7280a.h deleted file mode 100644 index 99297789a46d..000000000000 --- a/drivers/staging/iio/adc/ad7280a.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * AD7280A Lithium Ion Battery Monitoring System - * - * Copyright 2011 Analog Devices Inc. - */ - -#ifndef IIO_ADC_AD7280_H_ -#define IIO_ADC_AD7280_H_ - -/* - * TODO: struct ad7280_platform_data needs to go into include/linux/iio - */ - -#define AD7280A_ACQ_TIME_400ns 0 -#define AD7280A_ACQ_TIME_800ns 1 -#define AD7280A_ACQ_TIME_1200ns 2 -#define AD7280A_ACQ_TIME_1600ns 3 - -#define AD7280A_ALERT_REMOVE_VIN5 BIT(2) -#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) -#define AD7280A_ALERT_REMOVE_AUX5 BIT(0) -#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) - -struct ad7280_platform_data { - unsigned int acquisition_time; - unsigned int chain_last_alert_ignore; - bool thermistor_term_en; -}; - -#endif /* IIO_ADC_AD7280_H_ */ From patchwork Mon Jun 14 11:35:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459852 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201578jae; Mon, 14 Jun 2021 04:40:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwVzaA4FO1iEXcdCdUR3P2LEuuAWxTdS1xbNzaiqkW6sHxDPhcuBulWgsZ88rQwIsPzwC4B X-Received: by 2002:aa7:dc42:: with SMTP id g2mr16363098edu.362.1623670830998; Mon, 14 Jun 2021 04:40:30 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670830; cv=none; d=google.com; s=arc-20160816; b=OQ207adeC/SqciA6ZdDFmPTtSsmRlYyymXoMDvAnskxEThrIHJXk0I+7Hq2ZIcFVpv 9I3YmHiiUVPVwk0ZPc7zDyu5tjlOUq0FKmYwxTbEBujcp4/7bSd5ctK7qE3jYwnH+NcP /xb1W0XA4aAsCHFK+dJkBYBT7hpu4Z17rclySALljXcjvx5PtnpcdzzEstgzZx4nhEud rwUhsZT8d6X+bHuajC4xtw8rmjli8S5go8g0bwwrLZgoOwy1g/aMQ9YdakJY4GqAc5rs zJzHC+Cxj2tv9ffr+IOxblMMgExiYmbLzbQuueM1/7Z4XyDhaWwqszQcKf4ju1ALboS3 5heg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=P6iYYsSN8aHfuQ3det6Rqqa5Mqm9FC+jo1GjrWmDIew=; b=sFPjko164CnHvwQtlRgyFSOhYwEVSII6dUN2mBjtR1QGrGnMYvbEZpaVFz6aPsqKF8 UIfqcEnhCwzjVzJRgBEsy5iga5FuoiOHfbGl4Sfg15PNGggg0V+Dk9Exee9ANPZMRUOV Tk6Lh9Xa0biK3FEXF5thQI0bswgNCNKdb3ZhvmwrLPZ5XlzGVjNjimmwIunlxHfm3bJm CeZAQA1e9qwgsqmp1XH1Go4LIjUAUfMUeSfDAo469SXIZAq4SlRR6RLlD8QKUZYe4hZN lq48s8lnnRegRLsy6iQmeCCbMfZ2bb2Ren5TUDWa/CL3zPMnQmsKRRteYzD+pgJm1jCH Gnpg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=O9sDz8DQ; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id nb10si11945869ejc.344.2021.06.14.04.40.30; Mon, 14 Jun 2021 04:40:30 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=O9sDz8DQ; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235925AbhFNLlr (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:47 -0400 Received: from mail.kernel.org ([198.145.29.99]:59692 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236555AbhFNLjP (ORCPT ); Mon, 14 Jun 2021 07:39:15 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id DCCDB613D0; Mon, 14 Jun 2021 11:33:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670437; bh=nUZoBNjU8SfS4RGpa++OgfFzwMNgdWbkuCW0Fi/pt2o=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=O9sDz8DQgq2kBMLLDMhei/S4sOMDsDjFPPx+WrkqIIV6TYQu8tLENfjp9aCASnVlb uLSUrE7m1amxOoyt8zbcWTuELv6uqU4GFRYmKt5Smaprlv+weiVEsSe7fSsuFZpnLD 1Q0HJCKoBefw+oskbTNRAj0vxR4QCUjVfRZceWz5GTMTkwkH8KeTulFyECR3jo0fB6 ocuByyw5WuXpxbcc+CLs4aTG/ObTPqGyBTzrJ2jdQdatNBemw++4KLLVJ5s20R902V 7vaydq0IxyEBTZtYfwfo7iWurA+85JTyTDusIGwp4v5DN5WANv3uhygnzSzz3y7Dkg YsH4UffG0Vl/Q== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 15/17] dt-bindings:iio:adc:ad7280a: Add binding Date: Mon, 14 Jun 2021 12:35:05 +0100 Message-Id: <20210614113507.897732-16-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron Add a binding for this Lithium Ion Battery monitoring chip/chain of chips as it is now clean and ready to move out of staging. Signed-off-by: Jonathan Cameron --- .../bindings/iio/adc/adi,ad7280a.yaml | 87 +++++++++++++++++++ 1 file changed, 87 insertions(+) -- 2.32.0 Reviewed-by: Rob Herring diff --git a/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml b/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml new file mode 100644 index 000000000000..77b8f67fe446 --- /dev/null +++ b/Documentation/devicetree/bindings/iio/adc/adi,ad7280a.yaml @@ -0,0 +1,87 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/iio/adc/adi,ad7280a.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Analog Devices AD7280a Lithium Ion Battery Monitoring System + +maintainers: + - Michael Hennerich + - Jonathan Cameron + +description: | + Bindings for the Analog Devices AD7280a Battery Monitoring System. + Used in devices such as hybrid electric cars, battery backup and power tools. + Multiple chips can be daisy chained and accessed via a single SPI interface. + Data sheet found here: + https://www.analog.com/media/en/technical-documentation/data-sheets/AD7280A.pdf + +properties: + compatible: + const: adi,ad7280a + + reg: + maxItems: 1 + + interrupts: + description: IRQ line for the ADC + maxItems: 1 + + spi-max-frequency: true + + adi,temp-alert-last-chan: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Allows limiting of scope of which channels are considered for temperature + alerts, typically because not all are wired to anything. Only applies to + last device in the daisy chain. + default: 5 + enum: [3, 4, 5] + + adi,voltage-alert-last-chan: + $ref: /schemas/types.yaml#/definitions/uint32 + description: + Allows limiting of scope of which channels are considered for voltage + alerts, typically because not all are wired to anything. Only applies to + last device in the daisy chain. + default: 5 + enum: [3, 4, 5] + + adi,acquisition-time-ns: + description: + Additional time may be needed to charge the sampling capacitors depending + on external writing. + default: 400 + enum: [400, 800, 1200, 1600] + + adi,thermistor-termination: + type: boolean + description: + Enable the thermistor termination function. + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + spi { + #address-cells = <1>; + #size-cells = <0>; + + adc@0 { + compatible = "adi,ad7280a"; + reg = <0>; + spi-max-frequency = <700000>; + interrupt-parent = <&gpio>; + interrupts = <25 2>; + adi,thermistor-termination; + adi,acquisition-time-ns = <800>; + adi,voltage-alert-last-chan = <5>; + adi,temp-alert-last-chan = <5>; + }; + }; +... From patchwork Mon Jun 14 11:35:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459853 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201585jae; Mon, 14 Jun 2021 04:40:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzaWRSCSQOZuNZyrLSAiy82t26sqUKUvjCmWqFypBllb0UE3uFgAKxulHoE52mYAUPOWyf/ X-Received: by 2002:a17:906:8345:: with SMTP id b5mr14602663ejy.14.1623670831409; Mon, 14 Jun 2021 04:40:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670831; cv=none; d=google.com; s=arc-20160816; b=hRclcsUJckBsd6rv8v+C2XpculgV7RQSDPSP6BBLNUMHa29uJj2nFphr1Y313lnNoj 0ZcPAKGjMQNO7XzjeujY9wsyrQu6bwc7l1JWSXEgj3GlJo6Cr2WlQf1j69eJFIM7RTpV /afxzve0MlZJTpPiV6y/vDqlqVxAWL1Q3DqBk0UWDuRvkY9wk8181N1Z7+egHwV3/MqK d6VgWHu02YrFrB9Tc8RefVL9cJq9fjWY07mU98ujJni/TwpXsWIOxwqXIg2gEBztWzxl x2Iq4RAZgcIABAeGTQiwCzVoNqWxi2RHz/ZeMwokq4/rz62sm8R17bUqslHnmFWYIKny QXQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ggn4VsYYRIXJfgZyDFm2Y/0Fk5QoMs3uQtOEf1TtyY4=; b=b+hyWEp9MmZAUhd7iYtsgvtmpymgfA6/FI1/6+BIq59Ws70EMDJC93o65RoUTJpcGt WyKxRtf3wh8flmYFW/VCSm1OVdDhJf5RqwBshWEwxvl/Ol53T0KEPt3n5lm9222/f2XW qZsdDl2q26nKJBO0/bRj3RkhQ7vS2cWw697YRO66JUoBR6DABPgQ/Sq8FwTvtM/4eAgo 3YcDCRTR/3SbMleD/7dOZQ7M/g+25uAsEg3Ld14laOx265MbQKMYJZ4Hx0DhV2HQseIf Gyq64kNPZ/5WUc1En+kaKWzHnO5qwFYU/JCxrodbbQPw++A30C8Ewso0LHXbcoUgAL3V YPYg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=pNQY0jnm; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id nb10si11945869ejc.344.2021.06.14.04.40.31; Mon, 14 Jun 2021 04:40:31 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=pNQY0jnm; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235930AbhFNLlr (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:47 -0400 Received: from mail.kernel.org ([198.145.29.99]:60502 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236557AbhFNLjQ (ORCPT ); Mon, 14 Jun 2021 07:39:16 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 64DB9613DF; Mon, 14 Jun 2021 11:33:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670439; bh=0pcQ1EkU67/sAEQ1HZATJ0trgyQZCpmGY+zQNg7r4pU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=pNQY0jnmC/RX94S2dP7NF6aZePEpobRuQx8bGtD2g8QKeW762Geook4SaWK2aSnJV yykGUmRtJ5537TBPcAngoxnaEhKQi/COw65qz7l5V2gGwuHpaPgjGzf0pcR4DQZa1v SLZ8C6L/0aFp1oN8m1A0sMIZaA42lw59WbLD5gGZQdf73BJIQUFzSvh/4oza+HJna5 9ZH1zOMMccJOxc555TzCX619EUsdme62PzZs1xx0jutzID1AT09js+QEEuDYlR7xk9 Ab0m40ECfInb1g0L2q9Cav5AQzW3O7S7J6O9vk4l774TLnhk+SYTHsOMFem/S9l4HR zC8nudlT0EXOA== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 16/17] iio:adc:ad7280a: Document ABI for cell balance switches Date: Mon, 14 Jun 2021 12:35:06 +0100 Message-Id: <20210614113507.897732-17-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron Very minimal ABI docs. This is unusual enough that I'd expect anyone who actually wanted to touch them to go look at the datasheet. Signed-off-by: Jonathan Cameron --- .../ABI/testing/sysfs-bus-iio-adc-ad7280a | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.32.0 diff --git a/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7280a b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7280a new file mode 100644 index 000000000000..f51fc77b0143 --- /dev/null +++ b/Documentation/ABI/testing/sysfs-bus-iio-adc-ad7280a @@ -0,0 +1,14 @@ +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_balance_switch_en +KernelVersion: 5.14 +Contact: linux-iio@vger.kernel.org +Description: + Used to enable an output for balancing cells for time + controlled via in_voltage_Y-voltageZ_balance_switch_timer. + +What: /sys/bus/iio/devices/iio:deviceX/in_voltageY-voltageZ_balance_switch_timer +KernelVersion: 5.14 +Contact: linux-iio@vger.kernel.org +Description: + Time in seconds for which balance switch will be turned on. + Multiple of 71.5 seconds. + From patchwork Mon Jun 14 11:35:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Jonathan Cameron X-Patchwork-Id: 459854 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp3201596jae; Mon, 14 Jun 2021 04:40:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw5F0ofugUF8nlcFkGo66te5a2S69cMzsy74atSNWZ3hRee1oZH9K9hUq8QeS/6Z7fS9iZ7 X-Received: by 2002:a17:907:9710:: with SMTP id jg16mr12903057ejc.366.1623670833275; Mon, 14 Jun 2021 04:40:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623670833; cv=none; d=google.com; s=arc-20160816; b=rlicWYzye2M8ITgj2KyGfYEvnvILlk0JpTuuaPnhozKCJmp7PdyQahSr7Bhz5AcOst 38hFAF9X0qxIpRmiy2EfbpIEqjUcqb88yDGWVXSH0lIux4FR7hrgFslY83lUFuNfBMEP l/Nvc2VwUCpcfL1Lrezc/frvbr8BXlIwDM5T70Tvv0qs1SBKFMf24t7xfFlN+3O8a41n AKWPd+FB0pFYOHzycSU59OkqF5hQ1kKpc2Y37tiJ6mrzKkcZ/rZd3SN4gjOplWGp3kYk 1/mhGRU7zTzVoTHitbaMiJgw5keVzoqdC00D4q47T6cAaeTry4aEJfRRqo9leSWwMHeY KpYg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=o1tGguoXNNwJ5LRpD8D4M1TNaJLpAA+HGvv19muVnmc=; b=lR/yWYuULmmrKlCLdbuZ/wesH+pbxEOrTZ0cFh2uaSOVwwiLuOvIXp7AYQ/HQCkqXO DnaevO2FVsoGbRz5d+pjx2FTqxgMFe8UkfCsP+wok8HsbQvykZN1n7DqrVy2Ta4KOk+g cFUANEWVtmSmUwMH8ZJGaasghBr1AwoedsDfkTBXGfIaoilt7LhjTmmX30AwVRrRGm9N p5FuUbANb+hkG+7xbSkajN6PaP2L6PToz8kx6myorDPPxhwE4YeRDStrZu5+UEKzDcEl yVSQ50TocvPGBpPr8Twlz42zsmZozqQ+bux++twCf8/j4/4wWqULwh2U6ycRkBAFngts RjTw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=WNNFDda2; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id nb10si11945869ejc.344.2021.06.14.04.40.32; Mon, 14 Jun 2021 04:40:33 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=WNNFDda2; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235961AbhFNLls (ORCPT + 7 others); Mon, 14 Jun 2021 07:41:48 -0400 Received: from mail.kernel.org ([198.145.29.99]:59694 "EHLO mail.kernel.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236560AbhFNLjQ (ORCPT ); Mon, 14 Jun 2021 07:39:16 -0400 Received: by mail.kernel.org (Postfix) with ESMTPSA id 058AD613DB; Mon, 14 Jun 2021 11:33:59 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1623670442; bh=3cQb0fkXsyMgdnVLtCr3oXld4CpTKapsAbRRQ93VEMY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WNNFDda2G7CH9X5svwU86+vA6g8wHzcp00cYRe7KBig8IPZeQlmjjPxglPLa3o/XC pbAJrxr1hiy/ygbnI0wNYtd6gwvtoGUqHKM99dRGemOYspz74S7RoqwOQQ28m2PvgI QL0+MXntTmBPoNAjPOAx4P1c8cn8Ce62kQjm0jV6gJAVONN30H0EjEsCtA9UOra3su p2Zpx8m6dbefUUZilqDpXoRFsAFoua/4lyuxO2BPc8430uIRAT/u9qiK4KloNqeTVZ RKxNkL1ZHee9Z4GCzH/qI62dFSqH4vBUsq8xkWfIYuWi6juhX3RnWzIiS1BnDKde7l Bmlql87ZntQrg== From: Jonathan Cameron To: linux-iio@vger.kernel.org, Rob Herring Cc: Michael.Hennerich@analog.com, lars@metafoo.de, devicetree@vger.kernel.org, Nuno Sa , Jonathan Cameron Subject: [PATCH 17/17] iio:adc:ad7280a: Move out of staging Date: Mon, 14 Jun 2021 12:35:07 +0100 Message-Id: <20210614113507.897732-18-jic23@kernel.org> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210614113507.897732-1-jic23@kernel.org> References: <20210614113507.897732-1-jic23@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Jonathan Cameron This is a rather unusual device (in IIO anyway). However, it has a near to standard userspace ABI. Note the work to move this out of staging was done against a minimal QEMU model, which doesn't model all the features of the device. I have no intention to upstream the QEMU model as it was developed just to enable this driver cleanup, but am happy to share it on request. Signed-off-by: Jonathan Cameron --- drivers/iio/adc/Kconfig | 11 + drivers/iio/adc/Makefile | 1 + drivers/iio/adc/ad7280a.c | 1116 +++++++++++++++++++++++++++++ drivers/staging/iio/adc/Kconfig | 11 - drivers/staging/iio/adc/Makefile | 1 - drivers/staging/iio/adc/ad7280a.c | 1116 ----------------------------- 6 files changed, 1128 insertions(+), 1128 deletions(-) -- 2.32.0 diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index db0c8fb60515..ca748102dee5 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -64,6 +64,17 @@ config AD7266 To compile this driver as a module, choose M here: the module will be called ad7266. +config AD7280 + tristate "Analog Devices AD7280A Lithium Ion Battery Monitoring System" + depends on SPI + select CRC8 + help + Say yes here to build support for Analog Devices AD7280A + Lithium Ion Battery Monitoring System. + + To compile this driver as a module, choose M here: the + module will be called ad7280a + config AD7291 tristate "Analog Devices AD7291 ADC driver" depends on I2C diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index f70d877c555a..516671c2cff1 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -10,6 +10,7 @@ obj-$(CONFIG_AD7091R5) += ad7091r5.o ad7091r-base.o obj-$(CONFIG_AD7124) += ad7124.o obj-$(CONFIG_AD7192) += ad7192.o obj-$(CONFIG_AD7266) += ad7266.o +obj-$(CONFIG_AD7280) += ad7280a.o obj-$(CONFIG_AD7291) += ad7291.o obj-$(CONFIG_AD7292) += ad7292.o obj-$(CONFIG_AD7298) += ad7298.o diff --git a/drivers/iio/adc/ad7280a.c b/drivers/iio/adc/ad7280a.c new file mode 100644 index 000000000000..0806238debe3 --- /dev/null +++ b/drivers/iio/adc/ad7280a.c @@ -0,0 +1,1116 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * AD7280A Lithium Ion Battery Monitoring System + * + * Copyright 2011 Analog Devices Inc. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +/* Registers */ + +#define AD7280A_CELL_VOLTAGE_1_REG 0x0 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_2_REG 0x1 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_3_REG 0x2 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_4_REG 0x3 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_5_REG 0x4 /* D11 to D0, Read only */ +#define AD7280A_CELL_VOLTAGE_6_REG 0x5 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_1_REG 0x6 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_2_REG 0x7 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_3_REG 0x8 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_4_REG 0x9 /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_5_REG 0xA /* D11 to D0, Read only */ +#define AD7280A_AUX_ADC_6_REG 0xB /* D11 to D0, Read only */ +#define AD7280A_SELF_TEST_REG 0xC /* D11 to D0, Read only */ + +#define AD7280A_CTRL_HB_REG 0xD /* D15 to D8, Read/write */ +#define AD7280A_CTRL_HB_CONV_INPUT_MSK GENMASK(7, 6) +#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 +#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 1 +#define AD7280A_CTRL_HB_CONV_INPUT_6CELL 2 +#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST 3 +#define AD7280A_CTRL_HB_CONV_RREAD_MSK GENMASK(5, 4) +#define AD7280A_CTRL_HB_CONV_RREAD_ALL 0 +#define AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_4 1 +#define AD7280A_CTRL_HB_CONV_RREAD_6CELL 2 +#define AD7280A_CTRL_HB_CONV_RREAD_NO 3 +#define AD7280A_CTRL_HB_CONV_START_MSK BIT(3) +#define AD7280A_CTRL_HB_CONV_START_CNVST 0 +#define AD7280A_CTRL_HB_CONV_START_CS 1 +#define AD7280A_CTRL_HB_CONV_AVG_MSK GENMASK(2, 1) +#define AD7280A_CTRL_HB_CONV_AVG_DIS 0 +#define AD7280A_CTRL_HB_CONV_AVG_2 1 +#define AD7280A_CTRL_HB_CONV_AVG_4 2 +#define AD7280A_CTRL_HB_CONV_AVG_8 3 +#define AD7280A_CTRL_HB_PWRDN_SW BIT(0) + +#define AD7280A_CTRL_LB_REG 0xE /* D7 to D0, Read/write */ +#define AD7280A_CTRL_LB_SWRST_MSK BIT(7) +#define AD7280A_CTRL_LB_ACQ_TIME_MSK GENMASK(6, 5) +#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 +#define AD7280A_CTRL_LB_ACQ_TIME_800ns 1 +#define AD7280A_CTRL_LB_ACQ_TIME_1200ns 2 +#define AD7280A_CTRL_LB_ACQ_TIME_1600ns 3 +#define AD7280A_CTRL_LB_MUST_SET BIT(4) +#define AD7280A_CTRL_LB_THERMISTOR_MSK BIT(3) +#define AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK BIT(2) +#define AD7280A_CTRL_LB_INC_DEV_ADDR_MSK BIT(1) +#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK BIT(0) + +#define AD7280A_CELL_OVERVOLTAGE_REG 0xF /* D7 to D0, Read/write */ +#define AD7280A_CELL_UNDERVOLTAGE_REG 0x10 /* D7 to D0, Read/write */ +#define AD7280A_AUX_ADC_OVERVOLTAGE_REG 0x11 /* D7 to D0, Read/write */ +#define AD7280A_AUX_ADC_UNDERVOLTAGE_REG 0x12 /* D7 to D0, Read/write */ + +#define AD7280A_ALERT_REG 0x13 /* D7 to D0, Read/write */ +#define AD7280A_ALERT_REMOVE_MSK GENMASK(3, 0) +#define AD7280A_ALERT_REMOVE_AUX5 BIT(0) +#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) +#define AD7280A_ALERT_REMOVE_VIN5 BIT(2) +#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) +#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) +#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) + +#define AD7280A_CELL_BALANCE_REG 0x14 /* D7 to D0, Read/write */ +#define AD7280A_CB1_TIMER_REG 0x15 /* D7 to D0, Read/write */ +#define AD7280A_CB_TIMER_VAL_MSK GENMASK(7, 3) +#define AD7280A_CB2_TIMER_REG 0x16 /* D7 to D0, Read/write */ +#define AD7280A_CB3_TIMER_REG 0x17 /* D7 to D0, Read/write */ +#define AD7280A_CB4_TIMER_REG 0x18 /* D7 to D0, Read/write */ +#define AD7280A_CB5_TIMER_REG 0x19 /* D7 to D0, Read/write */ +#define AD7280A_CB6_TIMER_REG 0x1A /* D7 to D0, Read/write */ +#define AD7280A_PD_TIMER_REG 0x1B /* D7 to D0, Read/write */ +#define AD7280A_READ_REG 0x1C /* D7 to D0, Read/write */ +#define AD7280A_READ_ADDR_MSK GENMASK(7, 2) +#define AD7280A_CNVST_CTRL_REG 0x1D /* D7 to D0, Read/write */ + +/* Transfer fields */ +#define AD7280A_TRANS_WRITE_DEVADDR_MSK GENMASK(31, 27) +#define AD7280A_TRANS_WRITE_ADDR_MSK GENMASK(26, 21) +#define AD7280A_TRANS_WRITE_VAL_MSK GENMASK(20, 13) +#define AD7280A_TRANS_WRITE_ALL_MSK BIT(12) +#define AD7280A_TRANS_WRITE_CRC_MSK GENMASK(10, 3) +#define AD7280A_TRANS_WRITE_RES_PATTERN 0x2 + +/* Layouts differ for channel vs other registers */ +#define AD7280A_TRANS_READ_DEVADDR_MSK GENMASK(31, 27) +#define AD7280A_TRANS_READ_CONV_CHANADDR_MSK GENMASK(26, 23) +#define AD7280A_TRANS_READ_CONV_DATA_MSK GENMASK(22, 11) +#define AD7280A_TRANS_READ_REG_REGADDR_MSK GENMASK(26, 21) +#define AD7280A_TRANS_READ_REG_DATA_MSK GENMASK(20, 13) +#define AD7280A_TRANS_READ_WRITE_ACK_MSK BIT(10) +#define AD7280A_TRANS_READ_CRC_MSK GENMASK(9, 2) + +/* Magic value used to indicate this special case */ +#define AD7280A_ALL_CELLS (0xAD << 16) + +#define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */ +#define AD7280A_MAX_CHAIN 8 +#define AD7280A_CELLS_PER_DEV 6 +#define AD7280A_BITS 12 +#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6_REG - \ + AD7280A_CELL_VOLTAGE_1_REG + 1) + +#define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ + (c)) +#define AD7280A_CALC_TEMP_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ + (c) - AD7280A_CELLS_PER_DEV) + +#define AD7280A_DEVADDR_MASTER 0 +#define AD7280A_DEVADDR_ALL 0x1F + +static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8}; +static const unsigned short ad7280a_t_acq_ns[4] = {465, 1010, 1460, 1890}; + +/* 5-bit device address is sent LSB first */ +static unsigned int ad7280a_devaddr(unsigned int addr) +{ + return ((addr & 0x1) << 4) | + ((addr & 0x2) << 2) | + (addr & 0x4) | + ((addr & 0x8) >> 2) | + ((addr & 0x10) >> 4); +} + +/* + * During a read a valid write is mandatory. + * So writing to the highest available address (Address 0x1F) and setting the + * address all parts bit to 0 is recommended. + * So the TXVAL is AD7280A_DEVADDR_ALL + CRC + */ +#define AD7280A_READ_TXVAL 0xF800030A + +/* + * AD7280 CRC + * + * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F + */ +#define POLYNOM 0x2F + +struct ad7280_state { + struct spi_device *spi; + struct iio_chan_spec *channels; + unsigned int chain_last_alert_ignore; + bool thermistor_term_en; + int slave_num; + int scan_cnt; + int readback_delay_us; + unsigned char crc_tab[CRC8_TABLE_SIZE]; + u8 oversampling_ratio; + u8 acquisition_time; + unsigned char ctrl_lb; + unsigned char cell_threshhigh; + unsigned char cell_threshlow; + unsigned char aux_threshhigh; + unsigned char aux_threshlow; + unsigned char cb_mask[AD7280A_MAX_CHAIN]; + struct mutex lock; /* protect sensor state */ + + __be32 tx ____cacheline_aligned; + __be32 rx; +}; + +static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) +{ + unsigned char crc; + + crc = crc_tab[val >> 16 & 0xFF]; + crc = crc_tab[crc ^ (val >> 8 & 0xFF)]; + + return crc ^ (val & 0xFF); +} + +static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) +{ + unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10); + + if (crc != ((val >> 2) & 0xFF)) + return -EIO; + + return 0; +} + +/* + * After initiating a conversion sequence we need to wait until the conversion + * is done. The delay is typically in the range of 15..30us however depending on + * the number of devices in the daisy chain, the number of averages taken, + * conversion delays and acquisition time options it may take up to 250us, in + * this case we better sleep instead of busy wait. + */ + +static void ad7280_delay(struct ad7280_state *st) +{ + if (st->readback_delay_us < 50) + udelay(st->readback_delay_us); + else + usleep_range(250, 500); +} + +static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) +{ + int ret; + struct spi_transfer t = { + .tx_buf = &st->tx, + .rx_buf = &st->rx, + .len = sizeof(st->tx), + }; + + st->tx = cpu_to_be32(AD7280A_READ_TXVAL); + + ret = spi_sync_transfer(st->spi, &t, 1); + if (ret) + return ret; + + *val = be32_to_cpu(st->rx); + + return 0; +} + +static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, + unsigned int addr, bool all, unsigned int val) +{ + unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) | + FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) | + FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) | + FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all); + + reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK, + ad7280_calc_crc8(st->crc_tab, reg >> 11)); + /* Reserved b010 pattern not included crc calc */ + reg |= AD7280A_TRANS_WRITE_RES_PATTERN; + + st->tx = cpu_to_be32(reg); + + return spi_write(st->spi, &st->tx, sizeof(st->tx)); +} + +static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, + unsigned int addr) +{ + int ret; + unsigned int tmp; + + /* turns off the read operation on all parts */ + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_NO) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + /* turns on the read operation on the addressed part */ + ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + /* Set register address on the part to be read from */ + ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, + FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); + if (ret) + return ret; + + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; + + if (ad7280_check_crc(st, tmp)) + return -EIO; + + if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || + (FIELD_GET(AD7280A_TRANS_READ_REG_REGADDR_MSK, tmp) != addr)) + return -EFAULT; + + return FIELD_GET(AD7280A_TRANS_READ_REG_DATA_MSK, tmp); +} + +static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, + unsigned int addr) +{ + int ret; + unsigned int tmp; + + ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, + FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); + if (ret) + return ret; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_NO) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, + AD7280A_CTRL_HB_CONV_START_CS) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + ad7280_delay(st); + + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; + + if (ad7280_check_crc(st, tmp)) + return -EIO; + + if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || + (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) != addr)) + return -EFAULT; + + return FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); +} + +static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, + unsigned int *array) +{ + int i, ret; + unsigned int tmp, sum = 0; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, + AD7280A_CELL_VOLTAGE_1_REG << 2); + if (ret) + return ret; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, + AD7280A_CTRL_HB_CONV_INPUT_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, + AD7280A_CTRL_HB_CONV_RREAD_ALL) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, + AD7280A_CTRL_HB_CONV_START_CS) | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, + st->oversampling_ratio)); + if (ret) + return ret; + + ad7280_delay(st); + + for (i = 0; i < cnt; i++) { + ret = __ad7280_read32(st, &tmp); + if (ret) + return ret; + + if (ad7280_check_crc(st, tmp)) + return -EIO; + + if (array) + array[i] = tmp; + /* only sum cell voltages */ + if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) <= + AD7280A_CELL_VOLTAGE_6_REG) + sum += FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); + } + + return sum; +} + +static void ad7280_sw_power_down(void *data) +{ + struct ad7280_state *st = data; + + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + AD7280A_CTRL_HB_PWRDN_SW | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); +} + +static int ad7280_chain_setup(struct ad7280_state *st) +{ + unsigned int val, n; + int ret; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, + FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | + FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | + AD7280A_CTRL_LB_MUST_SET | + FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) | + st->ctrl_lb); + if (ret) + return ret; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, + FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | + FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | + AD7280A_CTRL_LB_MUST_SET | + FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) | + st->ctrl_lb); + if (ret) + goto error_power_down; + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, + FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG)); + if (ret) + goto error_power_down; + + for (n = 0; n <= AD7280A_MAX_CHAIN; n++) { + ret = __ad7280_read32(st, &val); + if (ret) + goto error_power_down; + + if (val == 0) + return n - 1; + + if (ad7280_check_crc(st, val)) { + ret = -EIO; + goto error_power_down; + } + + if (n != ad7280a_devaddr(FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, val))) { + ret = -EIO; + goto error_power_down; + } + } + ret = -EFAULT; + +error_power_down: + ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, + AD7280A_CTRL_HB_PWRDN_SW | + FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); + + return ret; +} + +static ssize_t ad7280_show_balance_sw(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, char *buf) +{ + struct ad7280_state *st = iio_priv(indio_dev); + + return sysfs_emit(buf, "%d\n", + !!(st->cb_mask[chan->address >> 8] & + (1 << ((chan->address & 0xFF) + 2)))); +} + +static ssize_t ad7280_store_balance_sw(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct ad7280_state *st = iio_priv(indio_dev); + unsigned int devaddr, ch; + bool readin; + int ret; + + ret = strtobool(buf, &readin); + if (ret) + return ret; + + devaddr = chan->address >> 8; + ch = chan->address & 0xFF; + + mutex_lock(&st->lock); + if (readin) + st->cb_mask[devaddr] |= 1 << (ch + 2); + else + st->cb_mask[devaddr] &= ~(1 << (ch + 2)); + + ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, + 0, st->cb_mask[devaddr]); + mutex_unlock(&st->lock); + + return ret ? ret : len; +} + +static ssize_t ad7280_show_balance_timer(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + char *buf) +{ + struct ad7280_state *st = iio_priv(indio_dev); + unsigned int msecs; + int ret; + + mutex_lock(&st->lock); + ret = ad7280_read_reg(st, chan->address >> 8, + (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500; + + return sysfs_emit(buf, "%u.%u\n", msecs / 1000, msecs % 1000); +} + +static ssize_t ad7280_store_balance_timer(struct iio_dev *indio_dev, + uintptr_t private, + const struct iio_chan_spec *chan, + const char *buf, size_t len) +{ + struct ad7280_state *st = iio_priv(indio_dev); + int val, val2; + int ret; + + ret = iio_str_to_fixpoint(buf, 1000, &val, &val2); + if (ret) + return ret; + + val = val * 1000 + val2; + val /= 71500; + + if (val > 31) + return -EINVAL; + + mutex_lock(&st->lock); + ret = ad7280_write(st, chan->address >> 8, + (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG, 0, + FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val)); + mutex_unlock(&st->lock); + + return ret ? ret : len; +} + +static const struct iio_chan_spec_ext_info ad7280_cell_ext_info[] = { + { + .name = "balance_switch_en", + .read = ad7280_show_balance_sw, + .write = ad7280_store_balance_sw, + .shared = IIO_SEPARATE, + }, { + .name = "balance_switch_timer", + .read = ad7280_show_balance_timer, + .write = ad7280_store_balance_timer, + .shared = IIO_SEPARATE, + }, + {} +}; + +static const struct iio_event_spec ad7280_events[] = { + { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_RISING, + .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), + }, { + .type = IIO_EV_TYPE_THRESH, + .dir = IIO_EV_DIR_FALLING, + .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), + }, +}; + +static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i, + bool irq_present) +{ + chan->type = IIO_VOLTAGE; + chan->differential = 1; + chan->channel = i; + chan->channel2 = chan->channel + 1; + if (irq_present) { + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); + } + chan->ext_info = ad7280_cell_ext_info; +} + +static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i, + bool irq_present) +{ + chan->type = IIO_TEMP; + chan->channel = i; + if (irq_present) { + chan->event_spec = ad7280_events; + chan->num_event_specs = ARRAY_SIZE(ad7280_events); + } +} + +static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, + int cnt) +{ + chan->indexed = 1; + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + chan->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO); + chan->address = addr; + chan->scan_index = cnt; + chan->scan_type.sign = 'u'; + chan->scan_type.realbits = 12; + chan->scan_type.storagebits = 32; +} + +static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, + int cnt, int dev) +{ + chan->type = IIO_VOLTAGE; + chan->differential = 1; + chan->channel = 0; + chan->channel2 = dev * AD7280A_CELLS_PER_DEV; + chan->address = AD7280A_ALL_CELLS; + chan->indexed = 1; + chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); + chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); + chan->scan_index = cnt; + chan->scan_type.sign = 'u'; + chan->scan_type.realbits = 32; + chan->scan_type.storagebits = 32; +} + +static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt, + bool irq_present) +{ + int addr, ch, i; + struct iio_chan_spec *chan; + + for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_AUX_ADC_6_REG; ch++) { + chan = &st->channels[*cnt]; + + if (ch < AD7280A_AUX_ADC_1_REG) { + i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); + ad7280_voltage_channel_init(chan, i, irq_present); + } else { + i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch); + ad7280_temp_channel_init(chan, i, irq_present); + } + + addr = ad7280a_devaddr(dev) << 8 | ch; + ad7280_common_fields_init(chan, addr, *cnt); + + (*cnt)++; + } +} + +static int ad7280_channel_init(struct ad7280_state *st, bool irq_present) +{ + int dev, cnt = 0; + + st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1, + sizeof(*st->channels), GFP_KERNEL); + if (!st->channels) + return -ENOMEM; + + for (dev = 0; dev <= st->slave_num; dev++) + ad7280_init_dev_channels(st, dev, &cnt, irq_present); + + ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); + + return cnt + 1; +} + +static int ad7280a_read_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, int *val, int *val2) +{ + struct ad7280_state *st = iio_priv(indio_dev); + + switch (chan->type) { + case IIO_VOLTAGE: + switch (dir) { + case IIO_EV_DIR_RISING: + *val = 1000 + (st->cell_threshhigh * 1568L) / 100; + return IIO_VAL_INT; + case IIO_EV_DIR_FALLING: + *val = 1000 + (st->cell_threshlow * 1568L) / 100; + return IIO_VAL_INT; + default: + return -EINVAL; + } + break; + case IIO_TEMP: + switch (dir) { + case IIO_EV_DIR_RISING: + *val = ((st->aux_threshhigh) * 196L) / 10; + return IIO_VAL_INT; + case IIO_EV_DIR_FALLING: + *val = (st->aux_threshlow * 196L) / 10; + return IIO_VAL_INT; + default: + return -EINVAL; + } + break; + default: + return -EINVAL; + } +} + +static int ad7280a_write_thresh(struct iio_dev *indio_dev, + const struct iio_chan_spec *chan, + enum iio_event_type type, + enum iio_event_direction dir, + enum iio_event_info info, + int val, int val2) +{ + struct ad7280_state *st = iio_priv(indio_dev); + unsigned int addr; + long value; + int ret; + + if (val2 != 0) + return -EINVAL; + + mutex_lock(&st->lock); + switch (chan->type) { + case IIO_VOLTAGE: + value = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ + value = clamp(value, 0L, 0xFFL); + switch (dir) { + case IIO_EV_DIR_RISING: + addr = AD7280A_CELL_OVERVOLTAGE_REG; + st->cell_threshhigh = value; + break; + case IIO_EV_DIR_FALLING: + addr = AD7280A_CELL_UNDERVOLTAGE_REG; + st->cell_threshlow = value; + break; + default: + ret = -EINVAL; + goto err_unlock; + } + break; + case IIO_TEMP: + value = (val * 10) / 196; /* LSB 19.6mV */ + value = clamp(value, 0L, 0xFFL); + switch (dir) { + case IIO_EV_DIR_RISING: + addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG; + st->aux_threshhigh = val; + break; + case IIO_EV_DIR_FALLING: + addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG; + st->aux_threshlow = val; + break; + default: + ret = -EINVAL; + goto err_unlock; + } + break; + default: + ret = -EINVAL; + goto err_unlock; + } + + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, 1, val); +err_unlock: + mutex_unlock(&st->lock); + + return ret; +} + +static irqreturn_t ad7280_event_handler(int irq, void *private) +{ + struct iio_dev *indio_dev = private; + struct ad7280_state *st = iio_priv(indio_dev); + unsigned int *channels; + int i, ret; + + channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL); + if (!channels) + return IRQ_HANDLED; + + ret = ad7280_read_all_channels(st, st->scan_cnt, channels); + if (ret < 0) + goto out; + + for (i = 0; i < st->scan_cnt; i++) { + unsigned int val; + + val = FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, channels[i]); + if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, channels[i]) + <= AD7280A_CELL_VOLTAGE_6_REG) { + if (val >= st->cell_threshhigh) { + u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, + IIO_EV_DIR_RISING, + IIO_EV_TYPE_THRESH, + 0, 0, 0); + iio_push_event(indio_dev, tmp, + iio_get_time_ns(indio_dev)); + } else if (val <= st->cell_threshlow) { + u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, + IIO_EV_DIR_FALLING, + IIO_EV_TYPE_THRESH, + 0, 0, 0); + iio_push_event(indio_dev, tmp, + iio_get_time_ns(indio_dev)); + } + } else { + if (val >= st->aux_threshhigh) { + u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_RISING); + iio_push_event(indio_dev, tmp, + iio_get_time_ns(indio_dev)); + } else if (val <= st->aux_threshlow) { + u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, + IIO_EV_TYPE_THRESH, + IIO_EV_DIR_FALLING); + iio_push_event(indio_dev, tmp, + iio_get_time_ns(indio_dev)); + } + } + } + +out: + kfree(channels); + + return IRQ_HANDLED; +} + +static void ad7280_update_delay(struct ad7280_state *st) +{ + /* + * Total Conversion Time = ((tACQ + tCONV) * + * (Number of Conversions per Part)) − + * tACQ + ((N - 1) * tDELAY) + * + * Readback Delay = Total Conversion Time + tWAIT + */ + + st->readback_delay_us = + ((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 695) * + (AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) - + ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250; + + /* Convert to usecs */ + st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); + st->readback_delay_us += 5; /* Add tWAIT */ +} + +static int ad7280_read_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int *val, + int *val2, + long m) +{ + struct ad7280_state *st = iio_priv(indio_dev); + int ret; + + switch (m) { + case IIO_CHAN_INFO_RAW: + mutex_lock(&st->lock); + if (chan->address == AD7280A_ALL_CELLS) + ret = ad7280_read_all_channels(st, st->scan_cnt, NULL); + else + ret = ad7280_read_channel(st, chan->address >> 8, + chan->address & 0xFF); + mutex_unlock(&st->lock); + + if (ret < 0) + return ret; + + *val = ret; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_SCALE: + if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6_REG) + *val = 4000; + else + *val = 5000; + + *val2 = AD7280A_BITS; + return IIO_VAL_FRACTIONAL_LOG2; + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *val = ad7280a_n_avg[st->oversampling_ratio]; + return IIO_VAL_INT; + } + return -EINVAL; +} + +static int ad7280_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct ad7280_state *st = iio_priv(indio_dev); + int i; + + switch (mask) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + if (val2 != 0) + return -EINVAL; + for (i = 0; i < ARRAY_SIZE(ad7280a_n_avg); i++) { + if (val == ad7280a_n_avg[i]) { + st->oversampling_ratio = i; + ad7280_update_delay(st); + return 0; + } + } + return -EINVAL; + default: + return -EINVAL; + } +} + +static const struct iio_info ad7280_info = { + .read_raw = ad7280_read_raw, + .write_raw = ad7280_write_raw, + .read_event_value = &ad7280a_read_thresh, + .write_event_value = &ad7280a_write_thresh, +}; + +static const struct iio_info ad7280_info_no_irq = { + .read_event_value = &ad7280a_read_thresh, + .write_event_value = &ad7280a_write_thresh, +}; + +static int ad7280_probe(struct spi_device *spi) +{ + struct device *dev = &spi->dev; + struct ad7280_state *st; + int ret; + struct iio_dev *indio_dev; + + indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); + if (!indio_dev) + return -ENOMEM; + + st = iio_priv(indio_dev); + spi_set_drvdata(spi, indio_dev); + st->spi = spi; + mutex_init(&st->lock); + + st->thermistor_term_en = + device_property_read_bool(dev, "adi,thermistor-termination"); + + if (device_property_present(dev, "adi,acquistion-time-ns")) { + u32 val; + + ret = device_property_read_u32(dev, "adi,acquisition-time-ns", &val); + if (ret) + return ret; + + switch (val) { + case 400: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; + break; + case 800: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns; + break; + case 1200: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns; + break; + case 1600: + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns; + break; + default: + dev_err(dev, "Firmware provided acquisition time is invalid\n"); + return -EINVAL; + } + } else { + st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; + } + + /* Alert masks are intended for when particular inputs are not wired up */ + if (device_property_present(dev, "adi,voltage-alert-last-chan")) { + u8 val; + + ret = device_property_read_u8(dev, "adi,voltage-alert-last-chan", &val); + if (ret) + return ret; + + switch (val) { + case 3: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5; + break; + case 4: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5; + break; + case 5: + break; + default: + dev_err(dev, + "Firmware provided last voltage alert channel invalid\n"); + break; + } + } + if (device_property_present(dev, "adi,temp-alert-last-chan")) { + u8 val; + + ret = device_property_read_u8(dev, "adi,temp-alert-last-chan", &val); + if (ret) + return ret; + + switch (val) { + case 3: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX4_AUX5; + break; + case 4: + st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX5; + break; + case 5: + break; + default: + dev_err(dev, + "Firmware provided last temp alert channel invalid\n"); + break; + } + } + crc8_populate_msb(st->crc_tab, POLYNOM); + + st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ; + st->spi->mode = SPI_MODE_1; + spi_setup(st->spi); + + st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) | + FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en); + st->oversampling_ratio = 0; /* No oversampling */ + + ret = ad7280_chain_setup(st); + if (ret < 0) + return ret; + + st->slave_num = ret; + st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; + st->cell_threshhigh = 0xFF; + st->aux_threshhigh = 0xFF; + + ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st); + if (ret) + return ret; + + ad7280_update_delay(st); + + indio_dev->name = spi_get_device_id(spi)->name; + indio_dev->modes = INDIO_DIRECT_MODE; + + ret = ad7280_channel_init(st, spi->irq > 0); + if (ret < 0) + return ret; + + indio_dev->num_channels = ret; + indio_dev->channels = st->channels; + if (spi->irq > 0) { + ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, + AD7280A_ALERT_REG, 1, + AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN); + if (ret) + return ret; + + ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), + AD7280A_ALERT_REG, 0, + AD7280A_ALERT_GEN_STATIC_HIGH | + FIELD_PREP(AD7280A_ALERT_REMOVE_MSK, + st->chain_last_alert_ignore)); + if (ret) + return ret; + + ret = devm_request_threaded_irq(dev, spi->irq, + NULL, + ad7280_event_handler, + IRQF_TRIGGER_FALLING | + IRQF_ONESHOT, + indio_dev->name, + indio_dev); + if (ret) + return ret; + + indio_dev->info = &ad7280_info; + } else { + indio_dev->info = &ad7280_info_no_irq; + } + + return devm_iio_device_register(dev, indio_dev); +} + +static const struct spi_device_id ad7280_id[] = { + {"ad7280a", 0}, + {} +}; +MODULE_DEVICE_TABLE(spi, ad7280_id); + +static struct spi_driver ad7280_driver = { + .driver = { + .name = "ad7280", + }, + .probe = ad7280_probe, + .id_table = ad7280_id, +}; +module_spi_driver(ad7280_driver); + +MODULE_AUTHOR("Michael Hennerich "); +MODULE_DESCRIPTION("Analog Devices AD7280A"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/staging/iio/adc/Kconfig b/drivers/staging/iio/adc/Kconfig index b25f41053fac..2f0d6cf048d2 100644 --- a/drivers/staging/iio/adc/Kconfig +++ b/drivers/staging/iio/adc/Kconfig @@ -15,15 +15,4 @@ config AD7816 To compile this driver as a module, choose M here: the module will be called ad7816. -config AD7280 - tristate "Analog Devices AD7280A Lithium Ion Battery Monitoring System" - depends on SPI - select CRC8 - help - Say yes here to build support for Analog Devices AD7280A - Lithium Ion Battery Monitoring System. - - To compile this driver as a module, choose M here: the - module will be called ad7280a - endmenu diff --git a/drivers/staging/iio/adc/Makefile b/drivers/staging/iio/adc/Makefile index 6436a62b6278..1e2a94c4db84 100644 --- a/drivers/staging/iio/adc/Makefile +++ b/drivers/staging/iio/adc/Makefile @@ -4,4 +4,3 @@ # obj-$(CONFIG_AD7816) += ad7816.o -obj-$(CONFIG_AD7280) += ad7280a.o diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c deleted file mode 100644 index 0806238debe3..000000000000 --- a/drivers/staging/iio/adc/ad7280a.c +++ /dev/null @@ -1,1116 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -/* - * AD7280A Lithium Ion Battery Monitoring System - * - * Copyright 2011 Analog Devices Inc. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -/* Registers */ - -#define AD7280A_CELL_VOLTAGE_1_REG 0x0 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_2_REG 0x1 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_3_REG 0x2 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_4_REG 0x3 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_5_REG 0x4 /* D11 to D0, Read only */ -#define AD7280A_CELL_VOLTAGE_6_REG 0x5 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_1_REG 0x6 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_2_REG 0x7 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_3_REG 0x8 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_4_REG 0x9 /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_5_REG 0xA /* D11 to D0, Read only */ -#define AD7280A_AUX_ADC_6_REG 0xB /* D11 to D0, Read only */ -#define AD7280A_SELF_TEST_REG 0xC /* D11 to D0, Read only */ - -#define AD7280A_CTRL_HB_REG 0xD /* D15 to D8, Read/write */ -#define AD7280A_CTRL_HB_CONV_INPUT_MSK GENMASK(7, 6) -#define AD7280A_CTRL_HB_CONV_INPUT_ALL 0 -#define AD7280A_CTRL_HB_CONV_INPUT_6CELL_AUX1_3_4 1 -#define AD7280A_CTRL_HB_CONV_INPUT_6CELL 2 -#define AD7280A_CTRL_HB_CONV_INPUT_SELF_TEST 3 -#define AD7280A_CTRL_HB_CONV_RREAD_MSK GENMASK(5, 4) -#define AD7280A_CTRL_HB_CONV_RREAD_ALL 0 -#define AD7280A_CTRL_HB_CONV_RREAD_6CELL_AUX1_3_4 1 -#define AD7280A_CTRL_HB_CONV_RREAD_6CELL 2 -#define AD7280A_CTRL_HB_CONV_RREAD_NO 3 -#define AD7280A_CTRL_HB_CONV_START_MSK BIT(3) -#define AD7280A_CTRL_HB_CONV_START_CNVST 0 -#define AD7280A_CTRL_HB_CONV_START_CS 1 -#define AD7280A_CTRL_HB_CONV_AVG_MSK GENMASK(2, 1) -#define AD7280A_CTRL_HB_CONV_AVG_DIS 0 -#define AD7280A_CTRL_HB_CONV_AVG_2 1 -#define AD7280A_CTRL_HB_CONV_AVG_4 2 -#define AD7280A_CTRL_HB_CONV_AVG_8 3 -#define AD7280A_CTRL_HB_PWRDN_SW BIT(0) - -#define AD7280A_CTRL_LB_REG 0xE /* D7 to D0, Read/write */ -#define AD7280A_CTRL_LB_SWRST_MSK BIT(7) -#define AD7280A_CTRL_LB_ACQ_TIME_MSK GENMASK(6, 5) -#define AD7280A_CTRL_LB_ACQ_TIME_400ns 0 -#define AD7280A_CTRL_LB_ACQ_TIME_800ns 1 -#define AD7280A_CTRL_LB_ACQ_TIME_1200ns 2 -#define AD7280A_CTRL_LB_ACQ_TIME_1600ns 3 -#define AD7280A_CTRL_LB_MUST_SET BIT(4) -#define AD7280A_CTRL_LB_THERMISTOR_MSK BIT(3) -#define AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK BIT(2) -#define AD7280A_CTRL_LB_INC_DEV_ADDR_MSK BIT(1) -#define AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK BIT(0) - -#define AD7280A_CELL_OVERVOLTAGE_REG 0xF /* D7 to D0, Read/write */ -#define AD7280A_CELL_UNDERVOLTAGE_REG 0x10 /* D7 to D0, Read/write */ -#define AD7280A_AUX_ADC_OVERVOLTAGE_REG 0x11 /* D7 to D0, Read/write */ -#define AD7280A_AUX_ADC_UNDERVOLTAGE_REG 0x12 /* D7 to D0, Read/write */ - -#define AD7280A_ALERT_REG 0x13 /* D7 to D0, Read/write */ -#define AD7280A_ALERT_REMOVE_MSK GENMASK(3, 0) -#define AD7280A_ALERT_REMOVE_AUX5 BIT(0) -#define AD7280A_ALERT_REMOVE_AUX4_AUX5 BIT(1) -#define AD7280A_ALERT_REMOVE_VIN5 BIT(2) -#define AD7280A_ALERT_REMOVE_VIN4_VIN5 BIT(3) -#define AD7280A_ALERT_GEN_STATIC_HIGH BIT(6) -#define AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN (BIT(7) | BIT(6)) - -#define AD7280A_CELL_BALANCE_REG 0x14 /* D7 to D0, Read/write */ -#define AD7280A_CB1_TIMER_REG 0x15 /* D7 to D0, Read/write */ -#define AD7280A_CB_TIMER_VAL_MSK GENMASK(7, 3) -#define AD7280A_CB2_TIMER_REG 0x16 /* D7 to D0, Read/write */ -#define AD7280A_CB3_TIMER_REG 0x17 /* D7 to D0, Read/write */ -#define AD7280A_CB4_TIMER_REG 0x18 /* D7 to D0, Read/write */ -#define AD7280A_CB5_TIMER_REG 0x19 /* D7 to D0, Read/write */ -#define AD7280A_CB6_TIMER_REG 0x1A /* D7 to D0, Read/write */ -#define AD7280A_PD_TIMER_REG 0x1B /* D7 to D0, Read/write */ -#define AD7280A_READ_REG 0x1C /* D7 to D0, Read/write */ -#define AD7280A_READ_ADDR_MSK GENMASK(7, 2) -#define AD7280A_CNVST_CTRL_REG 0x1D /* D7 to D0, Read/write */ - -/* Transfer fields */ -#define AD7280A_TRANS_WRITE_DEVADDR_MSK GENMASK(31, 27) -#define AD7280A_TRANS_WRITE_ADDR_MSK GENMASK(26, 21) -#define AD7280A_TRANS_WRITE_VAL_MSK GENMASK(20, 13) -#define AD7280A_TRANS_WRITE_ALL_MSK BIT(12) -#define AD7280A_TRANS_WRITE_CRC_MSK GENMASK(10, 3) -#define AD7280A_TRANS_WRITE_RES_PATTERN 0x2 - -/* Layouts differ for channel vs other registers */ -#define AD7280A_TRANS_READ_DEVADDR_MSK GENMASK(31, 27) -#define AD7280A_TRANS_READ_CONV_CHANADDR_MSK GENMASK(26, 23) -#define AD7280A_TRANS_READ_CONV_DATA_MSK GENMASK(22, 11) -#define AD7280A_TRANS_READ_REG_REGADDR_MSK GENMASK(26, 21) -#define AD7280A_TRANS_READ_REG_DATA_MSK GENMASK(20, 13) -#define AD7280A_TRANS_READ_WRITE_ACK_MSK BIT(10) -#define AD7280A_TRANS_READ_CRC_MSK GENMASK(9, 2) - -/* Magic value used to indicate this special case */ -#define AD7280A_ALL_CELLS (0xAD << 16) - -#define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */ -#define AD7280A_MAX_CHAIN 8 -#define AD7280A_CELLS_PER_DEV 6 -#define AD7280A_BITS 12 -#define AD7280A_NUM_CH (AD7280A_AUX_ADC_6_REG - \ - AD7280A_CELL_VOLTAGE_1_REG + 1) - -#define AD7280A_CALC_VOLTAGE_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ - (c)) -#define AD7280A_CALC_TEMP_CHAN_NUM(d, c) (((d) * AD7280A_CELLS_PER_DEV) + \ - (c) - AD7280A_CELLS_PER_DEV) - -#define AD7280A_DEVADDR_MASTER 0 -#define AD7280A_DEVADDR_ALL 0x1F - -static const unsigned short ad7280a_n_avg[4] = {1, 2, 4, 8}; -static const unsigned short ad7280a_t_acq_ns[4] = {465, 1010, 1460, 1890}; - -/* 5-bit device address is sent LSB first */ -static unsigned int ad7280a_devaddr(unsigned int addr) -{ - return ((addr & 0x1) << 4) | - ((addr & 0x2) << 2) | - (addr & 0x4) | - ((addr & 0x8) >> 2) | - ((addr & 0x10) >> 4); -} - -/* - * During a read a valid write is mandatory. - * So writing to the highest available address (Address 0x1F) and setting the - * address all parts bit to 0 is recommended. - * So the TXVAL is AD7280A_DEVADDR_ALL + CRC - */ -#define AD7280A_READ_TXVAL 0xF800030A - -/* - * AD7280 CRC - * - * P(x) = x^8 + x^5 + x^3 + x^2 + x^1 + x^0 = 0b100101111 => 0x2F - */ -#define POLYNOM 0x2F - -struct ad7280_state { - struct spi_device *spi; - struct iio_chan_spec *channels; - unsigned int chain_last_alert_ignore; - bool thermistor_term_en; - int slave_num; - int scan_cnt; - int readback_delay_us; - unsigned char crc_tab[CRC8_TABLE_SIZE]; - u8 oversampling_ratio; - u8 acquisition_time; - unsigned char ctrl_lb; - unsigned char cell_threshhigh; - unsigned char cell_threshlow; - unsigned char aux_threshhigh; - unsigned char aux_threshlow; - unsigned char cb_mask[AD7280A_MAX_CHAIN]; - struct mutex lock; /* protect sensor state */ - - __be32 tx ____cacheline_aligned; - __be32 rx; -}; - -static unsigned char ad7280_calc_crc8(unsigned char *crc_tab, unsigned int val) -{ - unsigned char crc; - - crc = crc_tab[val >> 16 & 0xFF]; - crc = crc_tab[crc ^ (val >> 8 & 0xFF)]; - - return crc ^ (val & 0xFF); -} - -static int ad7280_check_crc(struct ad7280_state *st, unsigned int val) -{ - unsigned char crc = ad7280_calc_crc8(st->crc_tab, val >> 10); - - if (crc != ((val >> 2) & 0xFF)) - return -EIO; - - return 0; -} - -/* - * After initiating a conversion sequence we need to wait until the conversion - * is done. The delay is typically in the range of 15..30us however depending on - * the number of devices in the daisy chain, the number of averages taken, - * conversion delays and acquisition time options it may take up to 250us, in - * this case we better sleep instead of busy wait. - */ - -static void ad7280_delay(struct ad7280_state *st) -{ - if (st->readback_delay_us < 50) - udelay(st->readback_delay_us); - else - usleep_range(250, 500); -} - -static int __ad7280_read32(struct ad7280_state *st, unsigned int *val) -{ - int ret; - struct spi_transfer t = { - .tx_buf = &st->tx, - .rx_buf = &st->rx, - .len = sizeof(st->tx), - }; - - st->tx = cpu_to_be32(AD7280A_READ_TXVAL); - - ret = spi_sync_transfer(st->spi, &t, 1); - if (ret) - return ret; - - *val = be32_to_cpu(st->rx); - - return 0; -} - -static int ad7280_write(struct ad7280_state *st, unsigned int devaddr, - unsigned int addr, bool all, unsigned int val) -{ - unsigned int reg = FIELD_PREP(AD7280A_TRANS_WRITE_DEVADDR_MSK, devaddr) | - FIELD_PREP(AD7280A_TRANS_WRITE_ADDR_MSK, addr) | - FIELD_PREP(AD7280A_TRANS_WRITE_VAL_MSK, val) | - FIELD_PREP(AD7280A_TRANS_WRITE_ALL_MSK, all); - - reg |= FIELD_PREP(AD7280A_TRANS_WRITE_CRC_MSK, - ad7280_calc_crc8(st->crc_tab, reg >> 11)); - /* Reserved b010 pattern not included crc calc */ - reg |= AD7280A_TRANS_WRITE_RES_PATTERN; - - st->tx = cpu_to_be32(reg); - - return spi_write(st->spi, &st->tx, sizeof(st->tx)); -} - -static int ad7280_read_reg(struct ad7280_state *st, unsigned int devaddr, - unsigned int addr) -{ - int ret; - unsigned int tmp; - - /* turns off the read operation on all parts */ - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_NO) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - /* turns on the read operation on the addressed part */ - ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - /* Set register address on the part to be read from */ - ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, - FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); - if (ret) - return ret; - - ret = __ad7280_read32(st, &tmp); - if (ret) - return ret; - - if (ad7280_check_crc(st, tmp)) - return -EIO; - - if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || - (FIELD_GET(AD7280A_TRANS_READ_REG_REGADDR_MSK, tmp) != addr)) - return -EFAULT; - - return FIELD_GET(AD7280A_TRANS_READ_REG_DATA_MSK, tmp); -} - -static int ad7280_read_channel(struct ad7280_state *st, unsigned int devaddr, - unsigned int addr) -{ - int ret; - unsigned int tmp; - - ret = ad7280_write(st, devaddr, AD7280A_READ_REG, 0, - FIELD_PREP(AD7280A_READ_ADDR_MSK, addr)); - if (ret) - return ret; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_NO) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - ret = ad7280_write(st, devaddr, AD7280A_CTRL_HB_REG, 0, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, - AD7280A_CTRL_HB_CONV_START_CS) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - ad7280_delay(st); - - ret = __ad7280_read32(st, &tmp); - if (ret) - return ret; - - if (ad7280_check_crc(st, tmp)) - return -EIO; - - if ((FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, tmp) != devaddr) || - (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) != addr)) - return -EFAULT; - - return FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); -} - -static int ad7280_read_all_channels(struct ad7280_state *st, unsigned int cnt, - unsigned int *array) -{ - int i, ret; - unsigned int tmp, sum = 0; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, - AD7280A_CELL_VOLTAGE_1_REG << 2); - if (ret) - return ret; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - FIELD_PREP(AD7280A_CTRL_HB_CONV_INPUT_MSK, - AD7280A_CTRL_HB_CONV_INPUT_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_RREAD_MSK, - AD7280A_CTRL_HB_CONV_RREAD_ALL) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_START_MSK, - AD7280A_CTRL_HB_CONV_START_CS) | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, - st->oversampling_ratio)); - if (ret) - return ret; - - ad7280_delay(st); - - for (i = 0; i < cnt; i++) { - ret = __ad7280_read32(st, &tmp); - if (ret) - return ret; - - if (ad7280_check_crc(st, tmp)) - return -EIO; - - if (array) - array[i] = tmp; - /* only sum cell voltages */ - if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, tmp) <= - AD7280A_CELL_VOLTAGE_6_REG) - sum += FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, tmp); - } - - return sum; -} - -static void ad7280_sw_power_down(void *data) -{ - struct ad7280_state *st = data; - - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - AD7280A_CTRL_HB_PWRDN_SW | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); -} - -static int ad7280_chain_setup(struct ad7280_state *st) -{ - unsigned int val, n; - int ret; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, - FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | - FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | - AD7280A_CTRL_LB_MUST_SET | - FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 1) | - st->ctrl_lb); - if (ret) - return ret; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_LB_REG, 1, - FIELD_PREP(AD7280A_CTRL_LB_DAISY_CHAIN_RB_MSK, 1) | - FIELD_PREP(AD7280A_CTRL_LB_LOCK_DEV_ADDR_MSK, 1) | - AD7280A_CTRL_LB_MUST_SET | - FIELD_PREP(AD7280A_CTRL_LB_SWRST_MSK, 0) | - st->ctrl_lb); - if (ret) - goto error_power_down; - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_READ_REG, 1, - FIELD_PREP(AD7280A_READ_ADDR_MSK, AD7280A_CTRL_LB_REG)); - if (ret) - goto error_power_down; - - for (n = 0; n <= AD7280A_MAX_CHAIN; n++) { - ret = __ad7280_read32(st, &val); - if (ret) - goto error_power_down; - - if (val == 0) - return n - 1; - - if (ad7280_check_crc(st, val)) { - ret = -EIO; - goto error_power_down; - } - - if (n != ad7280a_devaddr(FIELD_GET(AD7280A_TRANS_READ_DEVADDR_MSK, val))) { - ret = -EIO; - goto error_power_down; - } - } - ret = -EFAULT; - -error_power_down: - ad7280_write(st, AD7280A_DEVADDR_MASTER, AD7280A_CTRL_HB_REG, 1, - AD7280A_CTRL_HB_PWRDN_SW | - FIELD_PREP(AD7280A_CTRL_HB_CONV_AVG_MSK, st->oversampling_ratio)); - - return ret; -} - -static ssize_t ad7280_show_balance_sw(struct iio_dev *indio_dev, - uintptr_t private, - const struct iio_chan_spec *chan, char *buf) -{ - struct ad7280_state *st = iio_priv(indio_dev); - - return sysfs_emit(buf, "%d\n", - !!(st->cb_mask[chan->address >> 8] & - (1 << ((chan->address & 0xFF) + 2)))); -} - -static ssize_t ad7280_store_balance_sw(struct iio_dev *indio_dev, - uintptr_t private, - const struct iio_chan_spec *chan, - const char *buf, size_t len) -{ - struct ad7280_state *st = iio_priv(indio_dev); - unsigned int devaddr, ch; - bool readin; - int ret; - - ret = strtobool(buf, &readin); - if (ret) - return ret; - - devaddr = chan->address >> 8; - ch = chan->address & 0xFF; - - mutex_lock(&st->lock); - if (readin) - st->cb_mask[devaddr] |= 1 << (ch + 2); - else - st->cb_mask[devaddr] &= ~(1 << (ch + 2)); - - ret = ad7280_write(st, devaddr, AD7280A_CELL_BALANCE_REG, - 0, st->cb_mask[devaddr]); - mutex_unlock(&st->lock); - - return ret ? ret : len; -} - -static ssize_t ad7280_show_balance_timer(struct iio_dev *indio_dev, - uintptr_t private, - const struct iio_chan_spec *chan, - char *buf) -{ - struct ad7280_state *st = iio_priv(indio_dev); - unsigned int msecs; - int ret; - - mutex_lock(&st->lock); - ret = ad7280_read_reg(st, chan->address >> 8, - (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG); - mutex_unlock(&st->lock); - - if (ret < 0) - return ret; - - msecs = FIELD_GET(AD7280A_CB_TIMER_VAL_MSK, ret) * 71500; - - return sysfs_emit(buf, "%u.%u\n", msecs / 1000, msecs % 1000); -} - -static ssize_t ad7280_store_balance_timer(struct iio_dev *indio_dev, - uintptr_t private, - const struct iio_chan_spec *chan, - const char *buf, size_t len) -{ - struct ad7280_state *st = iio_priv(indio_dev); - int val, val2; - int ret; - - ret = iio_str_to_fixpoint(buf, 1000, &val, &val2); - if (ret) - return ret; - - val = val * 1000 + val2; - val /= 71500; - - if (val > 31) - return -EINVAL; - - mutex_lock(&st->lock); - ret = ad7280_write(st, chan->address >> 8, - (chan->address & 0xFF) + AD7280A_CB1_TIMER_REG, 0, - FIELD_PREP(AD7280A_CB_TIMER_VAL_MSK, val)); - mutex_unlock(&st->lock); - - return ret ? ret : len; -} - -static const struct iio_chan_spec_ext_info ad7280_cell_ext_info[] = { - { - .name = "balance_switch_en", - .read = ad7280_show_balance_sw, - .write = ad7280_store_balance_sw, - .shared = IIO_SEPARATE, - }, { - .name = "balance_switch_timer", - .read = ad7280_show_balance_timer, - .write = ad7280_store_balance_timer, - .shared = IIO_SEPARATE, - }, - {} -}; - -static const struct iio_event_spec ad7280_events[] = { - { - .type = IIO_EV_TYPE_THRESH, - .dir = IIO_EV_DIR_RISING, - .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), - }, { - .type = IIO_EV_TYPE_THRESH, - .dir = IIO_EV_DIR_FALLING, - .mask_shared_by_type = BIT(IIO_EV_INFO_VALUE), - }, -}; - -static void ad7280_voltage_channel_init(struct iio_chan_spec *chan, int i, - bool irq_present) -{ - chan->type = IIO_VOLTAGE; - chan->differential = 1; - chan->channel = i; - chan->channel2 = chan->channel + 1; - if (irq_present) { - chan->event_spec = ad7280_events; - chan->num_event_specs = ARRAY_SIZE(ad7280_events); - } - chan->ext_info = ad7280_cell_ext_info; -} - -static void ad7280_temp_channel_init(struct iio_chan_spec *chan, int i, - bool irq_present) -{ - chan->type = IIO_TEMP; - chan->channel = i; - if (irq_present) { - chan->event_spec = ad7280_events; - chan->num_event_specs = ARRAY_SIZE(ad7280_events); - } -} - -static void ad7280_common_fields_init(struct iio_chan_spec *chan, int addr, - int cnt) -{ - chan->indexed = 1; - chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); - chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); - chan->info_mask_shared_by_all = BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO); - chan->address = addr; - chan->scan_index = cnt; - chan->scan_type.sign = 'u'; - chan->scan_type.realbits = 12; - chan->scan_type.storagebits = 32; -} - -static void ad7280_total_voltage_channel_init(struct iio_chan_spec *chan, - int cnt, int dev) -{ - chan->type = IIO_VOLTAGE; - chan->differential = 1; - chan->channel = 0; - chan->channel2 = dev * AD7280A_CELLS_PER_DEV; - chan->address = AD7280A_ALL_CELLS; - chan->indexed = 1; - chan->info_mask_separate = BIT(IIO_CHAN_INFO_RAW); - chan->info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE); - chan->scan_index = cnt; - chan->scan_type.sign = 'u'; - chan->scan_type.realbits = 32; - chan->scan_type.storagebits = 32; -} - -static void ad7280_init_dev_channels(struct ad7280_state *st, int dev, int *cnt, - bool irq_present) -{ - int addr, ch, i; - struct iio_chan_spec *chan; - - for (ch = AD7280A_CELL_VOLTAGE_1_REG; ch <= AD7280A_AUX_ADC_6_REG; ch++) { - chan = &st->channels[*cnt]; - - if (ch < AD7280A_AUX_ADC_1_REG) { - i = AD7280A_CALC_VOLTAGE_CHAN_NUM(dev, ch); - ad7280_voltage_channel_init(chan, i, irq_present); - } else { - i = AD7280A_CALC_TEMP_CHAN_NUM(dev, ch); - ad7280_temp_channel_init(chan, i, irq_present); - } - - addr = ad7280a_devaddr(dev) << 8 | ch; - ad7280_common_fields_init(chan, addr, *cnt); - - (*cnt)++; - } -} - -static int ad7280_channel_init(struct ad7280_state *st, bool irq_present) -{ - int dev, cnt = 0; - - st->channels = devm_kcalloc(&st->spi->dev, (st->slave_num + 1) * 12 + 1, - sizeof(*st->channels), GFP_KERNEL); - if (!st->channels) - return -ENOMEM; - - for (dev = 0; dev <= st->slave_num; dev++) - ad7280_init_dev_channels(st, dev, &cnt, irq_present); - - ad7280_total_voltage_channel_init(&st->channels[cnt], cnt, dev); - - return cnt + 1; -} - -static int ad7280a_read_thresh(struct iio_dev *indio_dev, - const struct iio_chan_spec *chan, - enum iio_event_type type, - enum iio_event_direction dir, - enum iio_event_info info, int *val, int *val2) -{ - struct ad7280_state *st = iio_priv(indio_dev); - - switch (chan->type) { - case IIO_VOLTAGE: - switch (dir) { - case IIO_EV_DIR_RISING: - *val = 1000 + (st->cell_threshhigh * 1568L) / 100; - return IIO_VAL_INT; - case IIO_EV_DIR_FALLING: - *val = 1000 + (st->cell_threshlow * 1568L) / 100; - return IIO_VAL_INT; - default: - return -EINVAL; - } - break; - case IIO_TEMP: - switch (dir) { - case IIO_EV_DIR_RISING: - *val = ((st->aux_threshhigh) * 196L) / 10; - return IIO_VAL_INT; - case IIO_EV_DIR_FALLING: - *val = (st->aux_threshlow * 196L) / 10; - return IIO_VAL_INT; - default: - return -EINVAL; - } - break; - default: - return -EINVAL; - } -} - -static int ad7280a_write_thresh(struct iio_dev *indio_dev, - const struct iio_chan_spec *chan, - enum iio_event_type type, - enum iio_event_direction dir, - enum iio_event_info info, - int val, int val2) -{ - struct ad7280_state *st = iio_priv(indio_dev); - unsigned int addr; - long value; - int ret; - - if (val2 != 0) - return -EINVAL; - - mutex_lock(&st->lock); - switch (chan->type) { - case IIO_VOLTAGE: - value = ((val - 1000) * 100) / 1568; /* LSB 15.68mV */ - value = clamp(value, 0L, 0xFFL); - switch (dir) { - case IIO_EV_DIR_RISING: - addr = AD7280A_CELL_OVERVOLTAGE_REG; - st->cell_threshhigh = value; - break; - case IIO_EV_DIR_FALLING: - addr = AD7280A_CELL_UNDERVOLTAGE_REG; - st->cell_threshlow = value; - break; - default: - ret = -EINVAL; - goto err_unlock; - } - break; - case IIO_TEMP: - value = (val * 10) / 196; /* LSB 19.6mV */ - value = clamp(value, 0L, 0xFFL); - switch (dir) { - case IIO_EV_DIR_RISING: - addr = AD7280A_AUX_ADC_OVERVOLTAGE_REG; - st->aux_threshhigh = val; - break; - case IIO_EV_DIR_FALLING: - addr = AD7280A_AUX_ADC_UNDERVOLTAGE_REG; - st->aux_threshlow = val; - break; - default: - ret = -EINVAL; - goto err_unlock; - } - break; - default: - ret = -EINVAL; - goto err_unlock; - } - - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, addr, 1, val); -err_unlock: - mutex_unlock(&st->lock); - - return ret; -} - -static irqreturn_t ad7280_event_handler(int irq, void *private) -{ - struct iio_dev *indio_dev = private; - struct ad7280_state *st = iio_priv(indio_dev); - unsigned int *channels; - int i, ret; - - channels = kcalloc(st->scan_cnt, sizeof(*channels), GFP_KERNEL); - if (!channels) - return IRQ_HANDLED; - - ret = ad7280_read_all_channels(st, st->scan_cnt, channels); - if (ret < 0) - goto out; - - for (i = 0; i < st->scan_cnt; i++) { - unsigned int val; - - val = FIELD_GET(AD7280A_TRANS_READ_CONV_DATA_MSK, channels[i]); - if (FIELD_GET(AD7280A_TRANS_READ_CONV_CHANADDR_MSK, channels[i]) - <= AD7280A_CELL_VOLTAGE_6_REG) { - if (val >= st->cell_threshhigh) { - u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, - IIO_EV_DIR_RISING, - IIO_EV_TYPE_THRESH, - 0, 0, 0); - iio_push_event(indio_dev, tmp, - iio_get_time_ns(indio_dev)); - } else if (val <= st->cell_threshlow) { - u64 tmp = IIO_EVENT_CODE(IIO_VOLTAGE, 1, 0, - IIO_EV_DIR_FALLING, - IIO_EV_TYPE_THRESH, - 0, 0, 0); - iio_push_event(indio_dev, tmp, - iio_get_time_ns(indio_dev)); - } - } else { - if (val >= st->aux_threshhigh) { - u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_RISING); - iio_push_event(indio_dev, tmp, - iio_get_time_ns(indio_dev)); - } else if (val <= st->aux_threshlow) { - u64 tmp = IIO_UNMOD_EVENT_CODE(IIO_TEMP, 0, - IIO_EV_TYPE_THRESH, - IIO_EV_DIR_FALLING); - iio_push_event(indio_dev, tmp, - iio_get_time_ns(indio_dev)); - } - } - } - -out: - kfree(channels); - - return IRQ_HANDLED; -} - -static void ad7280_update_delay(struct ad7280_state *st) -{ - /* - * Total Conversion Time = ((tACQ + tCONV) * - * (Number of Conversions per Part)) − - * tACQ + ((N - 1) * tDELAY) - * - * Readback Delay = Total Conversion Time + tWAIT - */ - - st->readback_delay_us = - ((ad7280a_t_acq_ns[st->acquisition_time & 0x3] + 695) * - (AD7280A_NUM_CH * ad7280a_n_avg[st->oversampling_ratio & 0x3])) - - ad7280a_t_acq_ns[st->acquisition_time & 0x3] + st->slave_num * 250; - - /* Convert to usecs */ - st->readback_delay_us = DIV_ROUND_UP(st->readback_delay_us, 1000); - st->readback_delay_us += 5; /* Add tWAIT */ -} - -static int ad7280_read_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int *val, - int *val2, - long m) -{ - struct ad7280_state *st = iio_priv(indio_dev); - int ret; - - switch (m) { - case IIO_CHAN_INFO_RAW: - mutex_lock(&st->lock); - if (chan->address == AD7280A_ALL_CELLS) - ret = ad7280_read_all_channels(st, st->scan_cnt, NULL); - else - ret = ad7280_read_channel(st, chan->address >> 8, - chan->address & 0xFF); - mutex_unlock(&st->lock); - - if (ret < 0) - return ret; - - *val = ret; - - return IIO_VAL_INT; - case IIO_CHAN_INFO_SCALE: - if ((chan->address & 0xFF) <= AD7280A_CELL_VOLTAGE_6_REG) - *val = 4000; - else - *val = 5000; - - *val2 = AD7280A_BITS; - return IIO_VAL_FRACTIONAL_LOG2; - case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - *val = ad7280a_n_avg[st->oversampling_ratio]; - return IIO_VAL_INT; - } - return -EINVAL; -} - -static int ad7280_write_raw(struct iio_dev *indio_dev, - struct iio_chan_spec const *chan, - int val, int val2, long mask) -{ - struct ad7280_state *st = iio_priv(indio_dev); - int i; - - switch (mask) { - case IIO_CHAN_INFO_OVERSAMPLING_RATIO: - if (val2 != 0) - return -EINVAL; - for (i = 0; i < ARRAY_SIZE(ad7280a_n_avg); i++) { - if (val == ad7280a_n_avg[i]) { - st->oversampling_ratio = i; - ad7280_update_delay(st); - return 0; - } - } - return -EINVAL; - default: - return -EINVAL; - } -} - -static const struct iio_info ad7280_info = { - .read_raw = ad7280_read_raw, - .write_raw = ad7280_write_raw, - .read_event_value = &ad7280a_read_thresh, - .write_event_value = &ad7280a_write_thresh, -}; - -static const struct iio_info ad7280_info_no_irq = { - .read_event_value = &ad7280a_read_thresh, - .write_event_value = &ad7280a_write_thresh, -}; - -static int ad7280_probe(struct spi_device *spi) -{ - struct device *dev = &spi->dev; - struct ad7280_state *st; - int ret; - struct iio_dev *indio_dev; - - indio_dev = devm_iio_device_alloc(dev, sizeof(*st)); - if (!indio_dev) - return -ENOMEM; - - st = iio_priv(indio_dev); - spi_set_drvdata(spi, indio_dev); - st->spi = spi; - mutex_init(&st->lock); - - st->thermistor_term_en = - device_property_read_bool(dev, "adi,thermistor-termination"); - - if (device_property_present(dev, "adi,acquistion-time-ns")) { - u32 val; - - ret = device_property_read_u32(dev, "adi,acquisition-time-ns", &val); - if (ret) - return ret; - - switch (val) { - case 400: - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; - break; - case 800: - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_800ns; - break; - case 1200: - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1200ns; - break; - case 1600: - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_1600ns; - break; - default: - dev_err(dev, "Firmware provided acquisition time is invalid\n"); - return -EINVAL; - } - } else { - st->acquisition_time = AD7280A_CTRL_LB_ACQ_TIME_400ns; - } - - /* Alert masks are intended for when particular inputs are not wired up */ - if (device_property_present(dev, "adi,voltage-alert-last-chan")) { - u8 val; - - ret = device_property_read_u8(dev, "adi,voltage-alert-last-chan", &val); - if (ret) - return ret; - - switch (val) { - case 3: - st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN4_VIN5; - break; - case 4: - st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_VIN5; - break; - case 5: - break; - default: - dev_err(dev, - "Firmware provided last voltage alert channel invalid\n"); - break; - } - } - if (device_property_present(dev, "adi,temp-alert-last-chan")) { - u8 val; - - ret = device_property_read_u8(dev, "adi,temp-alert-last-chan", &val); - if (ret) - return ret; - - switch (val) { - case 3: - st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX4_AUX5; - break; - case 4: - st->chain_last_alert_ignore |= AD7280A_ALERT_REMOVE_AUX5; - break; - case 5: - break; - default: - dev_err(dev, - "Firmware provided last temp alert channel invalid\n"); - break; - } - } - crc8_populate_msb(st->crc_tab, POLYNOM); - - st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ; - st->spi->mode = SPI_MODE_1; - spi_setup(st->spi); - - st->ctrl_lb = FIELD_PREP(AD7280A_CTRL_LB_ACQ_TIME_MSK, st->acquisition_time) | - FIELD_PREP(AD7280A_CTRL_LB_THERMISTOR_MSK, st->thermistor_term_en); - st->oversampling_ratio = 0; /* No oversampling */ - - ret = ad7280_chain_setup(st); - if (ret < 0) - return ret; - - st->slave_num = ret; - st->scan_cnt = (st->slave_num + 1) * AD7280A_NUM_CH; - st->cell_threshhigh = 0xFF; - st->aux_threshhigh = 0xFF; - - ret = devm_add_action_or_reset(dev, ad7280_sw_power_down, st); - if (ret) - return ret; - - ad7280_update_delay(st); - - indio_dev->name = spi_get_device_id(spi)->name; - indio_dev->modes = INDIO_DIRECT_MODE; - - ret = ad7280_channel_init(st, spi->irq > 0); - if (ret < 0) - return ret; - - indio_dev->num_channels = ret; - indio_dev->channels = st->channels; - if (spi->irq > 0) { - ret = ad7280_write(st, AD7280A_DEVADDR_MASTER, - AD7280A_ALERT_REG, 1, - AD7280A_ALERT_RELAY_SIG_CHAIN_DOWN); - if (ret) - return ret; - - ret = ad7280_write(st, ad7280a_devaddr(st->slave_num), - AD7280A_ALERT_REG, 0, - AD7280A_ALERT_GEN_STATIC_HIGH | - FIELD_PREP(AD7280A_ALERT_REMOVE_MSK, - st->chain_last_alert_ignore)); - if (ret) - return ret; - - ret = devm_request_threaded_irq(dev, spi->irq, - NULL, - ad7280_event_handler, - IRQF_TRIGGER_FALLING | - IRQF_ONESHOT, - indio_dev->name, - indio_dev); - if (ret) - return ret; - - indio_dev->info = &ad7280_info; - } else { - indio_dev->info = &ad7280_info_no_irq; - } - - return devm_iio_device_register(dev, indio_dev); -} - -static const struct spi_device_id ad7280_id[] = { - {"ad7280a", 0}, - {} -}; -MODULE_DEVICE_TABLE(spi, ad7280_id); - -static struct spi_driver ad7280_driver = { - .driver = { - .name = "ad7280", - }, - .probe = ad7280_probe, - .id_table = ad7280_id, -}; -module_spi_driver(ad7280_driver); - -MODULE_AUTHOR("Michael Hennerich "); -MODULE_DESCRIPTION("Analog Devices AD7280A"); -MODULE_LICENSE("GPL v2");