From patchwork Tue Jun 15 07:45:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460488 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4034486jae; Tue, 15 Jun 2021 00:49:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyKapBOrt7DpjzcM7E71lYNtRNpLJYRrz5tVzdoSKM1wCi5hr/3wUMPhuKuZ6bq9j4opoYD X-Received: by 2002:a17:907:7808:: with SMTP id la8mr19623785ejc.13.1623743364721; Tue, 15 Jun 2021 00:49:24 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743364; cv=none; d=google.com; s=arc-20160816; b=qLo0TNO3QW9Tl91Y2fKPAhwJzk9MZ+s55eysGEH/xHL9wK0H1rbW3NHi3JL7531FNQ BiiOy9wQxjLFInfupVpxSfxZoGDdm1v8bc8sEEqgDgWa8Uu5d+Z0Uy0cLTeDxBExoz/P PEJpSzbdMbRtVOKWVbmneOIgfiBIT0cU4qtluQvvtKgOHZhTHMItbfQO36J1lO0oVQZs SY3tFTiObVCBGzEjM8rAoB/32oCVBRupMJsNgcbtRzwuzXyammHsencnx3hXSSTIacDy 4YiHI530dOp5pn3DcEXRB8vbCMiIgHXuJMFqo6sdNUJLUABjZTfdeBeeeSjlEiJzrHGF V2Iw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sGWRVUlazvDnItAZtGGyEDeGtg0J5AyvblHx2w1qXWE=; b=DxUPBC+IBupaCn7KjYjotqHcFhKU4ZEVkRQjioFyWwrek6gHKtxNyoL+WxglX9qeaQ TdBfxUf1Cq9vRa3FALr6rnBtxMPXbqevAJ3N92JNtO6HvshIWc0BYb1hkCUxjGRor8iU DpPmh2r5QPynR0AAJvOs+PPBiFAKYRMW7PG0b5d4VdTzzFJGm0FfDQqri0UvserAcDoM Ofl8I6pnlzF+AmMzjjhiV01etp0FuolIG8S7Qj0sq3T/3cYgNe/WqJy2fO0pQzNd6vl4 5Vw7cOa2u64KaiPpb/h7CDGQZ9R3IMb/gn+sZGHtT2JAEcrxF3O5CRHnIy6H8W9d5FYI Ewbw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cdpc0EQu; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id f8si13929176edr.154.2021.06.15.00.49.24; Tue, 15 Jun 2021 00:49:24 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=cdpc0EQu; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S230443AbhFOHvX (ORCPT + 7 others); Tue, 15 Jun 2021 03:51:23 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59606 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229613AbhFOHvV (ORCPT ); Tue, 15 Jun 2021 03:51:21 -0400 Received: from mail-pg1-x52c.google.com (mail-pg1-x52c.google.com [IPv6:2607:f8b0:4864:20::52c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 53A8FC061574 for ; Tue, 15 Jun 2021 00:49:17 -0700 (PDT) Received: by mail-pg1-x52c.google.com with SMTP id i34so10732627pgl.9 for ; Tue, 15 Jun 2021 00:49:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sGWRVUlazvDnItAZtGGyEDeGtg0J5AyvblHx2w1qXWE=; b=cdpc0EQuXEuwUlrhmkjoKLMumoqgkNHwPdeVjIfON9XSIeeM4DEoj3i0Nd8pST61kl 51gE8P3WnLkS1uI01dDdjHF+jjkDHT5dmxzocGjqLO9O3EkW2GSclGgL1YVkAv+8R+Z9 PWbbXIIxT2EZPQrae4i+8E+YHtdR0SBDZabmFfWr4IFcTBi1WQGSJv+0JkxnJ4dri2vc rh+13qfJ22ldH+NeIKpWYHGWs7MPR8FTMS8ijkTVdpZAOfTRSTNlk1sH73Y/OGI/yENc 9UgdFgiK4jsSFkHQhhFs2MO+n0UFxBSG0HQRxN2IZFMGfAGnB8ay5BnTlEQU99zsFFNg Gg0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sGWRVUlazvDnItAZtGGyEDeGtg0J5AyvblHx2w1qXWE=; b=OPalDAIx6W3SA+CLLtTMoORlSwndWBsE5/+xH/goqC5yh0YU6sA6ThWvxRtUFuDHmp Ai76dq51+9QnSRY8y2/iPdNhWUo+gytvNbTmO8QSbtKWyAX4GzavsvdTdhe9Z7WK0ner 8cQCdTk1AFGy5DX8FaxZOH39cl/C4wIMnUE9Vg34M2fzJzRno3ckK4Ld0w9se8nsJia/ jYYtuYemFR9LqZ+PUw+76kslxOrgCN6TYkWxTH9ieDIMWE3wrAJyGdanMMQfqh4WT/LK rgUC+uxKYuXJq7SMz3k3vIiTX/sDOs+VyRH8ya/R89ZKmy8OJ+J8SSBrHlOh8g5tRpxU 4n/Q== X-Gm-Message-State: AOAM533qiZlViFfR2R0Bv3mOsCAlC8UMWhKaBuuuzQ+lrqk9c2tAJXdS eqrHjNYsTfAIU3/y0Cn96A4Vsg== X-Received: by 2002:a63:515d:: with SMTP id r29mr20931165pgl.56.1623743356898; Tue, 15 Jun 2021 00:49:16 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:16 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 01/10] dt-bindings: qcom: rpmh-regulator: Add compatible for SA8155p-adp board pmic Date: Tue, 15 Jun 2021 13:15:34 +0530 Message-Id: <20210615074543.26700-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add compatible string for pmm8155au pmic found on the SA8155p-adp board. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- .../devicetree/bindings/regulator/qcom,rpmh-regulator.yaml | 1 + 1 file changed, 1 insertion(+) -- 2.31.1 Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml index e561a5b941e4..13dbc8e2fd85 100644 --- a/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/qcom,rpmh-regulator.yaml @@ -55,6 +55,7 @@ properties: - qcom,pm8009-1-rpmh-regulators - qcom,pm8150-rpmh-regulators - qcom,pm8150l-rpmh-regulators + - qcom,pmm8155au-rpmh-regulators - qcom,pm8350-rpmh-regulators - qcom,pm8350c-rpmh-regulators - qcom,pm8998-rpmh-regulators From patchwork Tue Jun 15 07:45:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460489 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4034579jae; Tue, 15 Jun 2021 00:49:31 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyZH6fDGVVtN++27QPBoSNMGR4YIXqXkKpXSRk+ODcqOchvFsBEX0olNMlTvYPPqr2M76bS X-Received: by 2002:a50:ee8b:: with SMTP id f11mr21621643edr.329.1623743371081; Tue, 15 Jun 2021 00:49:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743371; cv=none; d=google.com; s=arc-20160816; b=X+C8vmyl7cWNS5ATnlJQHdpwOcDuDrG/HlEjutnKbrjkdvfb8yJFAcqWnoRcjC7gYp V5b4uM2jK4TGjjUeG+C1t9IqpJiubtzVAEcbxhcvKZ0lyezJN9d2UPR7chSuORK16Xr7 qu8fiSI7KcXRJlJAUwl9W8181T8d0Jl6dcEheWfNbhH0SVUwmAjyOXRWwqEF4TpfKJ60 MZB1qNNhdC+4cvkfGMbgw3Ii8iTcqt9BQmkn5CFWnewsyEdAEcWQs8pkswmQoOBfoxcq GRB9dRetvXfcZmUk0b56b+OWslV1Xix1GJwK8j1KS4cVIhU8ZD2t/3RACTmspwQsGMms C4uw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=kToQoYGMVDwEP081PrugIKt6rs2IgkM3tpJJ4Oi9CQ8=; b=peSb9NH5k2Z+9ve+O4s5YAqKC86ZYgugkc/n8g0RZs5qF4IVbPUxXq11SS24Wv13l/ 0Kd92mkvNgbCxBtnoT6/Lj+GG8WRkrRCeEki1vyS7EZomFJZH2EdLfeAK3HG0jLrc4tr gemO40zsVyNY2Zrc1z6HQ2Jeki57cbvMHJk/6/jybgoZFY0yL0bQMRmY32cI9b2B76A6 R18wa/xrjMdo19MMwg2Z1rIVrmrqiDFXICaApPe7H6+h4OC8rcivDfBiUWo4tYZv4B0E M5VG/UhJi4PLeR+jFy3Jmi14I++w3srTEMdLRpBxNL2KGuMQDrSfrl8qMmWzzsu4hOeK OyQQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=bdX2tgiS; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 2 ++ 1 file changed, 2 insertions(+) -- 2.31.1 diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt index f6a9760558a6..80b8a66e29d8 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt @@ -27,6 +27,7 @@ PMIC's from Qualcomm. "qcom,pm660l-gpio" "qcom,pm8150-gpio" "qcom,pm8150b-gpio" + "qcom,pmm8155au-gpio" "qcom,pm8350-gpio" "qcom,pm8350b-gpio" "qcom,pm8350c-gpio" @@ -116,6 +117,7 @@ to specify in a pin configuration subnode: and gpio8) gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) gpio1-gpio12 for pm8150l (hole on gpio7) + gpio1-gpio10 for pmm8155au gpio1-gpio10 for pm8350 gpio1-gpio8 for pm8350b gpio1-gpio9 for pm8350c From patchwork Tue Jun 15 07:45:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460490 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4034662jae; Tue, 15 Jun 2021 00:49:36 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwUFXy10zYfAk6CaxxfpaskIWpi3dlJq0dFv2XZqRAPn7NXTZllmFFp3zu5phei6CDBUkUb X-Received: by 2002:a17:906:ac4:: with SMTP id z4mr5624506ejf.303.1623743376630; Tue, 15 Jun 2021 00:49:36 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743376; cv=none; d=google.com; s=arc-20160816; b=sURORE0lv1DERrdCZ5Am/L/27Ti108nN3Hzpwu0b7lELmYYDhEtzN0rgn/Iv3/oiKp CzMVL0ooA5K4XpAv1h5vNgnw1GBLWCpQHG8OIpep5PIiM5S9jT5z9FHK661vuXf7Qf/r BJi7HYc1PUlYQcB1tlkh319dNvgBHH3CGd1P96qu6fnSLs9vvzql8HHCKLcuqJRiJeA6 RejGEopwj3ZOSTqSjOKknN5YeV6ThtypmlsPti9APDAWQruPoO1XMlkKAYe9wx70iiFo 9RS0zu4O7HcxI53buE7uKyFRgsLUMpBkRq4NOhIr4wGVX1IxSpEm1SpI5aS22DzA66jj lfFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=YZn3e3VBEAR8TZlTha9G2vnyP+heLgxEDY2GiRmVtgY=; b=xbQn6MnfVxGTQt3lDJPVI792H5WgeJ5vlTHDivYsZgMBUZFAbO3LNraJY7wkxAOf7V 8u2SYRX2sN48E6hX8Hzp82cksPVRGLhRIgggvivLWWUYO1ckSDrY5iAoMVUwIs2OA14o Vi4dZgsKwwlnDPU+uJPkh0NGf3JUBtOmEcks2j2viDItQNdD0EeE6DQmeI3Yd7mBITlp /sxq0DCnTTAPYKpq+NEzBjAA8tFUmJKnnUdHtM2gEKcq+SmP3XWMYA8kMjeV7poEgQ7r YLxv1xGJDbntOwvmRyeOf7qgBcc/q4LkdiOyKGH5HGsjvrds3tE5m0s5iCQZn9L96/QO 6khQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=B1hk7G36; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Add support for the same in dt-bindings. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/arm/qcom.yaml | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.31.1 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index 9b27e991bddc..d7bb90e5082c 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -42,6 +42,7 @@ description: | sdm660 sdm845 sdx55 + sm8150 sm8250 sm8350 @@ -198,6 +199,11 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,sm8150-mtp + - const: qcom,sm8150 + - items: - enum: - qcom,qrb5165-rb5 From patchwork Tue Jun 15 07:45:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460491 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4034691jae; Tue, 15 Jun 2021 00:49:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx8k4EQeOAVcJ1Lk5gLHmxsUqPvaIaN8HVyCEfQC91oDMaUTnOzci3BwUMIK4dDtncWBYS5 X-Received: by 2002:a17:906:a458:: with SMTP id cb24mr19585227ejb.482.1623743378914; Tue, 15 Jun 2021 00:49:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743378; cv=none; d=google.com; s=arc-20160816; b=cdOntBgQVRAjyEzQf8bEqSRX8RTKJGoNya8qRuLHO6x7KNuV9xq8rBiXxUksqNpdQs xjI8bJPg4CPewik6Oa3hOD9VUN7PJi3t0dLRYkxneZXGtfPeVi79+UidCgdMQ9qCMb8o 4018woQWbYib28n3XYnizyikjaDjkBGT46MAiyq6/oPbWuaB3+SWXWbDXSySSO9hPLQl LwpBj8Cy9dRDTrCNSrt/ZX+g/0H/MsVqixybBk1Wk/BLcywqSBX8YkDenQG1Uua73JYj ohW32IZRv4XH7S5pdBUoVN8pM1kilC1nwdLFea+ti4U1McEbP1wVQBhQNrSARzYwQy0W 0OiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eaKkXhgRq+hiBDUlSLJALn4pH2MiH2Q3FouMp4doJio=; b=PhPkpq7EbHbdi7twvxTTAo+89k5G68QpaSOFkp6siEUjlFSPuZjtC2fPV3s2fy1uwY CqGu6/Epezz29qSodDvUD4MimOwhCqVf8LeR/N/ZN6RQ4GqTaqZiU5fe1hzxfN+pXoAs NmtWNj2jZu1k4yJMAHIG1EiKdjzM2eUIz3h1I+8jjcNP924RVrj6KA9MI1k631Z6RqOm u4R9uBwZAg1e431qOD3jvkNFllxdv2ys+JH/hesArd+jRwzZJPlftP7cY78f1JDr0gpA SSSWe3Rr5TjEmxwEcQv6vgQ6ri8yOSQQ3qQ2reEv6vHfjAwAXwuK9Zwm6obmV56ssPnf gEJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=pSd6Ecpy; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Add support for the same in dt-bindings. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- Documentation/devicetree/bindings/arm/qcom.yaml | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.31.1 diff --git a/Documentation/devicetree/bindings/arm/qcom.yaml b/Documentation/devicetree/bindings/arm/qcom.yaml index d7bb90e5082c..b6dceca8b11f 100644 --- a/Documentation/devicetree/bindings/arm/qcom.yaml +++ b/Documentation/devicetree/bindings/arm/qcom.yaml @@ -36,6 +36,7 @@ description: | msm8992 msm8994 msm8996 + sa8155p sc7180 sc7280 sdm630 @@ -48,6 +49,7 @@ description: | The 'board' element must be one of the following strings: + adp cdp cp01-c1 dragonboard @@ -199,6 +201,11 @@ properties: - qcom,ipq6018-cp01-c1 - const: qcom,ipq6018 + - items: + - enum: + - qcom,sa8155p-adp + - const: qcom,sa8155p + - items: - enum: - qcom,sm8150-mtp From patchwork Tue Jun 15 07:45:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460704 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 39413C48BDF for ; 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Tue, 15 Jun 2021 00:49:38 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:38 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 05/10] regulator: qcom-rpmh: Cleanup terminator line commas Date: Tue, 15 Jun 2021 13:15:38 +0530 Message-Id: <20210615074543.26700-6-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Cleanup the qcom-rpmh regulator driver: - remove comma(s) at the end of the terminator line. - add missing terminator in instances of pm7325x_vreg_data[] arrays. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma Reviewed-by: Bjorn Andersson --- drivers/regulator/qcom-rpmh-regulator.c | 26 +++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index 22fec370fa61..af41a517da99 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -811,12 +811,12 @@ static const struct rpmh_vreg_init_data pm8998_vreg_data[] = { RPMH_VREG("ldo28", "ldo%s28", &pmic4_pldo, "vdd-l16-l28"), RPMH_VREG("lvs1", "vs%s1", &pmic4_lvs, "vin-lvs-1-2"), RPMH_VREG("lvs2", "vs%s2", &pmic4_lvs, "vin-lvs-1-2"), - {}, + {} }; static const struct rpmh_vreg_init_data pmi8998_vreg_data[] = { RPMH_VREG("bob", "bob%s1", &pmic4_bob, "vdd-bob"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8005_vreg_data[] = { @@ -824,7 +824,7 @@ static const struct rpmh_vreg_init_data pm8005_vreg_data[] = { RPMH_VREG("smps2", "smp%s2", &pmic4_ftsmps426, "vdd-s2"), RPMH_VREG("smps3", "smp%s3", &pmic4_ftsmps426, "vdd-s3"), RPMH_VREG("smps4", "smp%s4", &pmic4_ftsmps426, "vdd-s4"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { @@ -856,7 +856,7 @@ static const struct rpmh_vreg_init_data pm8150_vreg_data[] = { RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"), RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"), RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { @@ -880,7 +880,7 @@ static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { @@ -906,7 +906,7 @@ static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l8"), RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9-l10"), RPMH_VREG("ldo10", "ldo%s10", &pmic5_nldo, "vdd-l6-l9-l10"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = { @@ -934,7 +934,7 @@ static const struct rpmh_vreg_init_data pm8350c_vreg_data[] = { RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l1-l12"), RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l3-l4-l5-l7-l13"), RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { @@ -947,7 +947,7 @@ static const struct rpmh_vreg_init_data pm8009_vreg_data[] = { RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7"), - {}, + {} }; static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { @@ -960,7 +960,7 @@ static const struct rpmh_vreg_init_data pm8009_1_vreg_data[] = { RPMH_VREG("ldo5", "ldo%s5", &pmic5_pldo, "vdd-l5-l6"), RPMH_VREG("ldo6", "ldo%s6", &pmic5_pldo, "vdd-l5-l6"), RPMH_VREG("ldo7", "ldo%s6", &pmic5_pldo_lv, "vdd-l7"), - {}, + {} }; static const struct rpmh_vreg_init_data pm6150_vreg_data[] = { @@ -988,7 +988,7 @@ static const struct rpmh_vreg_init_data pm6150_vreg_data[] = { RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo, "vdd-l5-l16-l17-l18-l19"), - {}, + {} }; static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { @@ -1012,7 +1012,7 @@ static const struct rpmh_vreg_init_data pm6150l_vreg_data[] = { RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l9-l10"), RPMH_VREG("ldo11", "ldo%s11", &pmic5_pldo, "vdd-l7-l11"), RPMH_VREG("bob", "bob%s1", &pmic5_bob, "vdd-bob"), - {}, + {} }; static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { @@ -1039,7 +1039,7 @@ static const struct rpmh_vreg_init_data pmx55_vreg_data[] = { RPMH_VREG("ldo14", "ldo%s14", &pmic5_nldo, "vdd-l14"), RPMH_VREG("ldo15", "ldo%s15", &pmic5_nldo, "vdd-l15"), RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l16"), - {}, + {} }; static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { @@ -1070,6 +1070,7 @@ static const struct rpmh_vreg_init_data pm7325_vreg_data[] = { RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), RPMH_VREG("ldo18", "ldo%s18", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), RPMH_VREG("ldo19", "ldo%s19", &pmic5_pldo_lv, "vdd-l11-l17-l18-l19"), + {} }; static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { @@ -1083,6 +1084,7 @@ static const struct rpmh_vreg_init_data pmr735a_vreg_data[] = { RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l5-l6"), RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l5-l6"), RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo, "vdd-l7-bob"), + {} }; static int rpmh_regulator_probe(struct platform_device *pdev) From patchwork Tue Jun 15 07:45:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460493 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4034864jae; Tue, 15 Jun 2021 00:49:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyeKob6P0xTJyFS4LFQbQoEY7vaUvIoRB6QhnHI7yjkgkm+q0bx6dRJ0gkLaiolLsUeJR05 X-Received: by 2002:a17:906:9486:: with SMTP id t6mr19091515ejx.271.1623743391722; Tue, 15 Jun 2021 00:49:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743391; cv=none; d=google.com; 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The output power management circuits in this regulator include: - FTS510 smps, - HFS510 smps, and - LDO510 linear regulators Add support for the same. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- drivers/regulator/qcom-rpmh-regulator.c | 36 +++++++++++++++++++++++++ 1 file changed, 36 insertions(+) -- 2.31.1 Reviewed-by: Bjorn Andersson diff --git a/drivers/regulator/qcom-rpmh-regulator.c b/drivers/regulator/qcom-rpmh-regulator.c index af41a517da99..73623d51929b 100644 --- a/drivers/regulator/qcom-rpmh-regulator.c +++ b/drivers/regulator/qcom-rpmh-regulator.c @@ -883,6 +883,38 @@ static const struct rpmh_vreg_init_data pm8150l_vreg_data[] = { {} }; +static const struct rpmh_vreg_init_data pmm8155au_vreg_data[] = { + RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), + RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), + RPMH_VREG("smps3", "smp%s3", &pmic5_ftsmps510, "vdd-s3"), + RPMH_VREG("smps4", "smp%s4", &pmic5_hfsmps510, "vdd-s4"), + RPMH_VREG("smps5", "smp%s5", &pmic5_hfsmps510, "vdd-s5"), + RPMH_VREG("smps6", "smp%s6", &pmic5_ftsmps510, "vdd-s6"), + RPMH_VREG("smps7", "smp%s7", &pmic5_ftsmps510, "vdd-s7"), + RPMH_VREG("smps8", "smp%s8", &pmic5_ftsmps510, "vdd-s8"), + RPMH_VREG("smps9", "smp%s9", &pmic5_ftsmps510, "vdd-s9"), + RPMH_VREG("smps10", "smp%s10", &pmic5_ftsmps510, "vdd-s10"), + RPMH_VREG("ldo1", "ldo%s1", &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo2", "ldo%s2", &pmic5_pldo, "vdd-l2-l10"), + RPMH_VREG("ldo3", "ldo%s3", &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo4", "ldo%s4", &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo5", "ldo%s5", &pmic5_nldo, "vdd-l3-l4-l5-l18"), + RPMH_VREG("ldo6", "ldo%s6", &pmic5_nldo, "vdd-l6-l9"), + RPMH_VREG("ldo7", "ldo%s7", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo8", "ldo%s8", &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo9", "ldo%s9", &pmic5_nldo, "vdd-l6-l9"), + RPMH_VREG("ldo10", "ldo%s10", &pmic5_pldo, "vdd-l2-l10"), + RPMH_VREG("ldo11", "ldo%s11", &pmic5_nldo, "vdd-l1-l8-l11"), + RPMH_VREG("ldo12", "ldo%s12", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo13", "ldo%s13", &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo14", "ldo%s14", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo15", "ldo%s15", &pmic5_pldo_lv, "vdd-l7-l12-l14-l15"), + RPMH_VREG("ldo16", "ldo%s16", &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo17", "ldo%s17", &pmic5_pldo, "vdd-l13-l16-l17"), + RPMH_VREG("ldo18", "ldo%s18", &pmic5_nldo, "vdd-l3-l4-l5-l18"), + {} +}; + static const struct rpmh_vreg_init_data pm8350_vreg_data[] = { RPMH_VREG("smps1", "smp%s1", &pmic5_ftsmps510, "vdd-s1"), RPMH_VREG("smps2", "smp%s2", &pmic5_ftsmps510, "vdd-s2"), @@ -1145,6 +1177,10 @@ static const struct of_device_id __maybe_unused rpmh_regulator_match_table[] = { .compatible = "qcom,pm8150l-rpmh-regulators", .data = pm8150l_vreg_data, }, + { + .compatible = "qcom,pmm8155au-rpmh-regulators", + .data = pmm8155au_vreg_data, + }, { .compatible = "qcom,pm8350-rpmh-regulators", .data = pm8350_vreg_data, From patchwork Tue Jun 15 07:45:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460703 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A3860C48BE8 for ; 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Tue, 15 Jun 2021 00:49:49 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:48 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 07/10] pinctrl: qcom/pinctrl-spmi-gpio: Add compatible for pmic-gpio on SA8155p-adp Date: Tue, 15 Jun 2021 13:15:40 +0530 Message-Id: <20210615074543.26700-8-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org SA8155p-adp PMIC (PMM8155AU) exposes 10 GPIOs. Add support for the same in the pinctrl driver. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 00870da0c94e..f886c683e2bd 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1127,6 +1127,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pm8150b-gpio", .data = (void *) 12 }, /* pm8150l has 12 GPIOs with holes on 7 */ { .compatible = "qcom,pm8150l-gpio", .data = (void *) 12 }, + { .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 }, { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 }, From patchwork Tue Jun 15 07:45:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460495 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp4035136jae; Tue, 15 Jun 2021 00:50:11 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwM6XhY1HGLKmjR49snmVf6UFetNUMf6YiwO4iNOS9qU0zV1A8DhxO+if9OOfpELpXA23EA X-Received: by 2002:a17:906:51d8:: with SMTP id v24mr18699054ejk.264.1623743411490; Tue, 15 Jun 2021 00:50:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623743411; cv=none; d=google.com; s=arc-20160816; b=FFPaLS64ItxYFpZHhSXyNyw/qZagT1bTqVRA/pUNHIBdzoBfR0w6APRH4ICPrr5QXn CMav9VekxhXViMTxfeOE7BxJxEXC3mOFks55qqsiL0H09H3+CvScmS/PqkFn9/3wl1ZQ vtqhsgAJOBmDD1gpoajX6D90WApnbr/rtLw33VhcDyk0xaSpcauIoEGyKix/uamSzeIl JNCKm+J6hFUTaqWzYREY3U2qvB6zp0tcVelxMpNUEtivK+H9Ecie+cT5n/YwSKYTtl6F /aWymQvzxpfVIKQfCGddKVKTKH5JtRueFAS+xc+TUhV2glec+tWgVMV9m1lJJSY6AqWr gfxg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tz2MIbk3vc4zbAhiqlVvL6FoXwBOoa2e5bHBmg/V5nU=; b=w+GgJ7Qbyy71T1T/+mL6pRyaiqHSzhyFa/od4G2jzvxCsMZG5DFfkGHPENy/0UTA3G Q8sr5RoaXFTQcB1Vch7cB1Oxcv1Yrm6NiUdFsgnW+sW8RfgCbMTlyq9vMVPCdfdrtnvD B8e+4u4QYppDQah/HV8mqZnM117Ym7c0Z57S84tVWI5L8REYRYL2LDH3Mr5u9dmgWzLS 0h6gDXvnbGEZFST1AeZ0cwTDKABha3jTcaWAv//buA35tUSjgIdOQPRznwQnhDcAPJYK 39+JYMTiJHo6Mr0JX6OJt9IQyDCzAZ4dXR2hwcEiO7WvJa4RDOEdJ5226d0XF6ZpEdUW S8+w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CXCSx9xi; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id r7si9103470edy.461.2021.06.15.00.50.11; Tue, 15 Jun 2021 00:50:11 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CXCSx9xi; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231168AbhFOHwI (ORCPT + 7 others); Tue, 15 Jun 2021 03:52:08 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:59784 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231177AbhFOHv6 (ORCPT ); Tue, 15 Jun 2021 03:51:58 -0400 Received: from mail-pg1-x534.google.com (mail-pg1-x534.google.com [IPv6:2607:f8b0:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91621C061574 for ; Tue, 15 Jun 2021 00:49:54 -0700 (PDT) Received: by mail-pg1-x534.google.com with SMTP id l184so10749475pgd.8 for ; Tue, 15 Jun 2021 00:49:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tz2MIbk3vc4zbAhiqlVvL6FoXwBOoa2e5bHBmg/V5nU=; b=CXCSx9xib+KGKWjG1OZ9WsJoW0LDDPa6D2AKy3FZ4NFO9vVZGYt0UP5RVvbEJWNfn2 Fa507p6Cd7sgQzHTmAjp07h8oNZZWOI+tQ5paq51SexO6i43IVLNbvR+Mn4isuYvBRG3 KUZaNl/OPNZl6zwV7BHf9avFVLQJuBPxi1YLAW9hUEsvI0Ahqi8EeYXKTxCjJt7EArRa lKrOGoa3soUFlwcDXlAxyw6aQJdXLRUnDGkm9UubOkCN7cj7nEVsYCVCeWpEuuj3g83r 7Flxv79sxeMA+NrStDc7oSpaZ7aECCfGyjmmJDCSxFgesTFY5Bc5k3HTnQGUyOa8+v3i ZD5w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tz2MIbk3vc4zbAhiqlVvL6FoXwBOoa2e5bHBmg/V5nU=; b=C85D4DOvZiLcNYvAtoUhnHr483G4mydTRScK8hUvrFZ1Le43vnvW5//ooL+fPxHesg FS8gVO7NRBOnuBKkg+s6u6LjVm/l22Ur/K3O52WciQ+R6158JeI4JJT/ZxnXF6q61xRV PGJ6jY0Q7VuTQ8swiPFLDsramPw2y1yOU6MGuZSt4oMDUQPST1CvWxhzi369MHDaq+fC 7pzCrXCuNocsDhBrs8mk1K9u3T6YbnhVkTqwxTg6b9t5NzUTHpRY0LLIONPO9FHCc7D6 gSluYaJiCW+KV9m9XrHz5d4fafSsGEaGaLWwUpVGBH0b00Z98ssObwh+Q22vZwZrAsIY QDiA== X-Gm-Message-State: AOAM533FyypYVw6sG2+p3Mg5g+/zsQt5G903mDzzVxQ9CDfQKh1apl3A MzeQ33czqh+OaU4bnYq/tg2jmA== X-Received: by 2002:a63:fa03:: with SMTP id y3mr21074370pgh.389.1623743394162; Tue, 15 Jun 2021 00:49:54 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.49.49 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:49:53 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 08/10] arm64: dts: qcom: pmm8155au_1: Add base dts file Date: Tue, 15 Jun 2021 13:15:41 +0530 Message-Id: <20210615074543.26700-9-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add base DTS file for pmm8155au_1 along with GPIOs, power-on, rtc and vadc nodes. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi | 134 ++++++++++++++++++++++ 1 file changed, 134 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi -- 2.31.1 Reviewed-by: Bjorn Andersson diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi new file mode 100644 index 000000000000..b04c28e54470 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8155au_1.dtsi @@ -0,0 +1,134 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +#include +#include +#include +#include + +/ { + thermal-zones { + pmm8155au-1-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pmm8155au_1_temp>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@0 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + pon: power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + pwrkey { + compatible = "qcom,pm8941-pwrkey"; + interrupts = <0x0 0x8 0x0 IRQ_TYPE_EDGE_BOTH>; + debounce = <15625>; + bias-pull-up; + linux,code = ; + + status = "disabled"; + }; + }; + + pmm8155au_1_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x0 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pmm8155au_1_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmm8155au_1_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x0 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + ref-gnd@0 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + }; + + pmm8155au_1_adc_tm: adc-tm@3500 { + compatible = "qcom,spmi-adc-tm5"; + reg = <0x3500>; + interrupts = <0x0 0x35 0x0 IRQ_TYPE_EDGE_RISING>; + #thermal-sensor-cells = <1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + + pmm8155au_1_rtc: rtc@6000 { + compatible = "qcom,pm8941-rtc"; + reg = <0x6000>; + reg-names = "rtc", "alarm"; + interrupts = <0x0 0x61 0x1 IRQ_TYPE_NONE>; + + status = "disabled"; + }; + + pmm8155au_1_gpios: gpio@c000 { + compatible = "qcom,pmm8155au-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@1 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Tue Jun 15 07:45:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 461659 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 25812C49EA2 for ; Tue, 15 Jun 2021 07:50:12 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0E95B61428 for ; Tue, 15 Jun 2021 07:50:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231191AbhFOHwM (ORCPT ); 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Tue, 15 Jun 2021 00:49:59 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 09/10] arm64: dts: qcom: pmm8155au_2: Add base dts file Date: Tue, 15 Jun 2021 13:15:42 +0530 Message-Id: <20210615074543.26700-10-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add base DTS file for pmm8155au_2 along with GPIOs, power-on, rtc and vadc nodes. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma --- arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi | 107 ++++++++++++++++++++++ 1 file changed, 107 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi diff --git a/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi new file mode 100644 index 000000000000..0c7d7a66c0b5 --- /dev/null +++ b/arch/arm64/boot/dts/qcom/pmm8155au_2.dtsi @@ -0,0 +1,107 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +#include +#include +#include + +/ { + thermal-zones { + pmm8155au-2-thermal { + polling-delay-passive = <100>; + polling-delay = <0>; + + thermal-sensors = <&pmm8155au_2_temp>; + + trips { + trip0 { + temperature = <95000>; + hysteresis = <0>; + type = "passive"; + }; + + trip1 { + temperature = <115000>; + hysteresis = <0>; + type = "hot"; + }; + + trip2 { + temperature = <145000>; + hysteresis = <0>; + type = "critical"; + }; + }; + }; + }; +}; + +&spmi_bus { + pmic@4 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + + power-on@800 { + compatible = "qcom,pm8916-pon"; + reg = <0x0800>; + + status = "disabled"; + }; + + pmm8155au_2_temp: temp-alarm@2400 { + compatible = "qcom,spmi-temp-alarm"; + reg = <0x2400>; + interrupts = <0x4 0x24 0x0 IRQ_TYPE_EDGE_BOTH>; + io-channels = <&pmm8155au_2_adc ADC5_DIE_TEMP>; + io-channel-names = "thermal"; + #thermal-sensor-cells = <0>; + }; + + pmm8155au_2_adc: adc@3100 { + compatible = "qcom,spmi-adc5"; + reg = <0x3100>; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + interrupts = <0x4 0x31 0x0 IRQ_TYPE_EDGE_RISING>; + + ref-gnd@0 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "ref_gnd"; + }; + + vref-1p25@1 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "vref_1p25"; + }; + + die-temp@6 { + reg = ; + qcom,pre-scaling = <1 1>; + label = "die_temp"; + }; + }; + + pmm8155au_2_gpios: gpio@c000 { + compatible = "qcom,pmm8155au-gpio"; + reg = <0xc000>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + }; + }; + + pmic@5 { + compatible = "qcom,pmm8155au", "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <1>; + #size-cells = <0>; + }; +}; From patchwork Tue Jun 15 07:45:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 460701 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-18.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,SPF_HELO_NONE,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68CD4C49EA3 for ; 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Tue, 15 Jun 2021 00:50:05 -0700 (PDT) Received: from localhost.localdomain.name ([122.177.197.114]) by smtp.gmail.com with ESMTPSA id c25sm14273097pfo.130.2021.06.15.00.50.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 15 Jun 2021 00:50:04 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, Linus Walleij , Liam Girdwood , Mark Brown , Bjorn Andersson , Vinod Koul , Rob Herring , Andy Gross Subject: [PATCH v2 10/10] arm64: dts: qcom: sa8155p-adp: Add base dts file Date: Tue, 15 Jun 2021 13:15:43 +0530 Message-Id: <20210615074543.26700-11-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210615074543.26700-1-bhupesh.sharma@linaro.org> References: <20210615074543.26700-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add base DTS file for SA8155p Automotive Development Platform. It enables boot to console, adds tlmm reserved range and ufs flash. It also includes pmic file. SA8155p-adp board is based on sa8155p Qualcomm Snapdragon SoC. SA8155p platform is similar to the SM8150, so use this as base for now. Cc: Linus Walleij Cc: Liam Girdwood Cc: Mark Brown Cc: Bjorn Andersson Cc: Vinod Koul Cc: Rob Herring Cc: Andy Gross Signed-off-by: Bhupesh Sharma Reviewed-by: Bjorn Andersson --- arch/arm64/boot/dts/qcom/Makefile | 1 + arch/arm64/boot/dts/qcom/sa8155p-adp.dts | 355 +++++++++++++++++++++++ 2 files changed, 356 insertions(+) create mode 100644 arch/arm64/boot/dts/qcom/sa8155p-adp.dts diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 456502aeee49..666f3528697d 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -32,6 +32,7 @@ dtb-$(CONFIG_ARCH_QCOM) += msm8998-oneplus-dumpling.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-1000.dtb dtb-$(CONFIG_ARCH_QCOM) += qcs404-evb-4000.dtb dtb-$(CONFIG_ARCH_QCOM) += qrb5165-rb5.dtb +dtb-$(CONFIG_ARCH_QCOM) += sa8155p-adp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-idp.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1.dtb dtb-$(CONFIG_ARCH_QCOM) += sc7180-trogdor-coachz-r1-lte.dtb diff --git a/arch/arm64/boot/dts/qcom/sa8155p-adp.dts b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts new file mode 100644 index 000000000000..95e0a6612e6b --- /dev/null +++ b/arch/arm64/boot/dts/qcom/sa8155p-adp.dts @@ -0,0 +1,355 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2021, Linaro Limited + */ + +/dts-v1/; + +#include +#include +#include "sm8150.dtsi" +#include "pmm8155au_1.dtsi" +#include "pmm8155au_2.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. SA8155P ADP"; + compatible = "qcom,sa8155p-adp", "qcom,sa8155p"; + + aliases { + serial0 = &uart2; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + vreg_3p3: vreg_3p3_regulator { + compatible = "regulator-fixed"; + regulator-name = "vreg_3p3"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + }; + + /* + * S4A is always on and not controllable through RPMh. + * So model it as a fixed regulator. + */ + vreg_s4a_1p8: smps4 { + compatible = "regulator-fixed"; + regulator-name = "vreg_s4a_1p8"; + + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + + regulator-always-on; + regulator-boot-on; + + vin-supply = <&vreg_3p3>; + }; +}; + +&apps_rsc { + pmm8155au-1-rpmh-regulators { + compatible = "qcom,pmm8155au-rpmh-regulators"; + qcom,pmic-id = "a"; + + vdd-s1-supply = <&vreg_3p3>; + vdd-s2-supply = <&vreg_3p3>; + vdd-s3-supply = <&vreg_3p3>; + vdd-s4-supply = <&vreg_3p3>; + vdd-s5-supply = <&vreg_3p3>; + vdd-s6-supply = <&vreg_3p3>; + vdd-s7-supply = <&vreg_3p3>; + vdd-s8-supply = <&vreg_3p3>; + vdd-s9-supply = <&vreg_3p3>; + vdd-s10-supply = <&vreg_3p3>; + + vdd-l1-l8-l11-supply = <&vreg_s6a_0p92>; + vdd-l2-l10-supply = <&vreg_3p3>; + vdd-l3-l4-l5-l18-supply = <&vreg_s6a_0p92>; + vdd-l6-l9-supply = <&vreg_s6a_0p92>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; + vdd-l13-l16-l17-supply = <&vreg_3p3>; + + vreg_s5a_2p04: smps5 { + regulator-name = "vreg_s5a_2p04"; + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2000000>; + }; + + vreg_s6a_0p92: smps6 { + regulator-name = "vreg_s6a_0p92"; + regulator-min-microvolt = <920000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_l1a_0p752: ldo1 { + regulator-name = "vreg_l1a_0p752"; + regulator-min-microvolt = <752000>; + regulator-max-microvolt = <752000>; + regulator-initial-mode = ; + }; + + vdda_usb_hs_3p1: + vreg_l2a_3p072: ldo2 { + regulator-name = "vreg_l2a_3p072"; + regulator-min-microvolt = <3072000>; + regulator-max-microvolt = <3072000>; + regulator-initial-mode = ; + }; + + vreg_l3a_0p8: ldo3 { + regulator-name = "vreg_l3a_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vdd_usb_hs_core: + vdda_usb_ss_dp_core_1: + vreg_l5a_0p88: ldo5 { + regulator-name = "vreg_l5a_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + + vreg_l7a_1p8: ldo7 { + regulator-name = "vreg_l7a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l10a_2p96: ldo10 { + regulator-name = "vreg_l10a_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l11a_0p8: ldo11 { + regulator-name = "vreg_l11a_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vdda_usb_hs_1p8: + vreg_l12a_1p8: ldo12 { + regulator-name = "vreg_l12a_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l13a_2p7: ldo13 { + regulator-name = "vreg_l13a_2p7"; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2704000>; + regulator-initial-mode = ; + }; + + vreg_l15a_1p7: ldo15 { + regulator-name = "vreg_l15a_1p7"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <1704000>; + regulator-initial-mode = ; + }; + + vreg_l16a_2p7: ldo16 { + regulator-name = "vreg_l16a_2p7"; + regulator-min-microvolt = <2704000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l17a_2p96: ldo17 { + regulator-name = "vreg_l17a_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + }; + + pmm8155au-2-rpmh-regulators { + compatible = "qcom,pmm8155au-rpmh-regulators"; + qcom,pmic-id = "c"; + + vdd-s1-supply = <&vreg_3p3>; + vdd-s2-supply = <&vreg_3p3>; + vdd-s3-supply = <&vreg_3p3>; + vdd-s4-supply = <&vreg_3p3>; + vdd-s5-supply = <&vreg_3p3>; + vdd-s6-supply = <&vreg_3p3>; + vdd-s7-supply = <&vreg_3p3>; + vdd-s8-supply = <&vreg_3p3>; + vdd-s9-supply = <&vreg_3p3>; + vdd-s10-supply = <&vreg_3p3>; + + vdd-l1-l8-l11-supply = <&vreg_s4c_1p352>; + vdd-l2-l10-supply = <&vreg_3p3>; + vdd-l3-l4-l5-l18-supply = <&vreg_s4c_1p352>; + vdd-l6-l9-supply = <&vreg_s6c_1p128>; + vdd-l7-l12-l14-l15-supply = <&vreg_s5c_2p04>; + vdd-l13-l16-l17-supply = <&vreg_3p3>; + + vreg_s4c_1p352: smps4 { + regulator-name = "vreg_s4c_1p352"; + regulator-min-microvolt = <1352000>; + regulator-max-microvolt = <1352000>; + }; + + vreg_s5c_2p04: smps5 { + regulator-name = "vreg_s5c_2p04"; + regulator-min-microvolt = <1904000>; + regulator-max-microvolt = <2000000>; + }; + + vreg_s6c_1p128: smps6 { + regulator-name = "vreg_s6c_1p128"; + regulator-min-microvolt = <1128000>; + regulator-max-microvolt = <1128000>; + }; + + vreg_l1c_1p304: ldo1 { + regulator-name = "vreg_l1c_1p304"; + regulator-min-microvolt = <1304000>; + regulator-max-microvolt = <1304000>; + regulator-initial-mode = ; + }; + + vreg_l2c_1p808: ldo2 { + regulator-name = "vreg_l2c_1p808"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l5c_1p2: ldo5 { + regulator-name = "vreg_l5c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l7c_1p8: ldo7 { + regulator-name = "vreg_l7c_1p8"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-initial-mode = ; + }; + + vreg_l8c_1p2: ldo8 { + regulator-name = "vreg_l8c_1p2"; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-initial-mode = ; + }; + + vreg_l10c_3p3: ldo10 { + regulator-name = "vreg_l10c_3p3"; + regulator-min-microvolt = <3000000>; + regulator-max-microvolt = <3312000>; + regulator-initial-mode = ; + }; + + vreg_l11c_0p8: ldo11 { + regulator-name = "vreg_l11c_0p8"; + regulator-min-microvolt = <800000>; + regulator-max-microvolt = <800000>; + regulator-initial-mode = ; + }; + + vreg_l12c_1p808: ldo12 { + regulator-name = "vreg_l12c_1p808"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l13c_2p96: ldo13 { + regulator-name = "vreg_l13c_2p96"; + regulator-min-microvolt = <2504000>; + regulator-max-microvolt = <2960000>; + regulator-initial-mode = ; + }; + + vreg_l15c_1p9: ldo15 { + regulator-name = "vreg_l15c_1p9"; + regulator-min-microvolt = <1704000>; + regulator-max-microvolt = <2928000>; + regulator-initial-mode = ; + }; + + vreg_l16c_3p008: ldo16 { + regulator-name = "vreg_l16c_3p008"; + regulator-min-microvolt = <3008000>; + regulator-max-microvolt = <3008000>; + regulator-initial-mode = ; + }; + + vreg_l18c_0p88: ldo18 { + regulator-name = "vreg_l18c_0p88"; + regulator-min-microvolt = <880000>; + regulator-max-microvolt = <880000>; + regulator-initial-mode = ; + }; + }; +}; + +&tlmm { + gpio-reserved-ranges = <0 4>; +}; + +&uart2 { + status = "okay"; +}; + +&ufs_mem_hc { + status = "okay"; + + reset-gpios = <&tlmm 175 GPIO_ACTIVE_LOW>; + + vcc-supply = <&vreg_l10a_2p96>; + vcc-max-microamp = <750000>; + vccq-supply = <&vreg_l5c_1p2>; + vccq-max-microamp = <700000>; + vccq2-supply = <&vreg_s4a_1p8>; + vccq2-max-microamp = <750000>; +}; + +&ufs_mem_phy { + status = "okay"; + + vdda-phy-supply = <&vreg_l8c_1p2>; + vdda-max-microamp = <87100>; + vdda-pll-supply = <&vreg_l5a_0p88>; + vdda-pll-max-microamp = <18300>; +}; + + +&usb_1_hsphy { + status = "okay"; + vdda-pll-supply = <&vdd_usb_hs_core>; + vdda33-supply = <&vdda_usb_hs_3p1>; + vdda18-supply = <&vdda_usb_hs_1p8>; +}; + +&usb_1_qmpphy { + status = "okay"; + vdda-phy-supply = <&vreg_l8c_1p2>; + vdda-pll-supply = <&vdda_usb_ss_dp_core_1>; +}; + +&usb_1 { + status = "okay"; +}; + +&usb_1_dwc3 { + dr_mode = "peripheral"; +}; + +&qupv3_id_1 { + status = "okay"; +};