From patchwork Thu Jun 17 05:34:29 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 462113 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp111175jae; Wed, 16 Jun 2021 22:34:49 -0700 (PDT) X-Google-Smtp-Source: ABdhPJytWoF/mLgVwq3LujsoLVqaQ6mGYGSeKMSJf4UjlK7mw+34hPTUCfP3ThXO43sGDNZT3l7i X-Received: by 2002:a17:906:390d:: with SMTP id f13mr2470616eje.128.1623908089151; Wed, 16 Jun 2021 22:34:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623908089; cv=none; d=google.com; s=arc-20160816; b=ViK3GD7fLza8OyQNf2DhGCS9idHvoj8AYJXTn865tH0jBG+CVdaSnP5m9vonuKmrl2 4HZeLDsZdYHHBZGUE0ZwG3sMt5W+oFwzqFevVMdvLF5HXnJo1h9qKU3MCBcyeNVL3rj3 iUybhh9r8KJtkJV1+tf6ZSK5+HdT09aetY5aIGMax0PGhzrFC7TdGrH6B6ama0S6lagd mK4MJCaoxYJrDR5wO7Tbx85DPwrXV3yNjJPjkru2+B86Qo04UePG+8c/R0o6qLIacEfW 1jYY1Ph5Q6sGKia0KDcfdihlKa3zg9w6iNeQTqN+1/iq6N10bZfmk/XX6hItNDXIKyOu 0Z+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=mXC2NA+CSEwSuQ2JUNooTVOMpQPHWlDfkI99DL5Kw+A=; b=Ogpvymft1IIz0g5WNwuludJipidoFMny7LZz1KlIcfJMvbvhvms69med98vXu7GRry QiO8NY3xRTYjDw5HaChYz0SP94Wp2Y65ureX3KA8F3Sf/ZaL1PbrdEy4M3AeroovW5VA SdQqpRsL7AImT6sYkabZIAIH/zKsa5zJRQClw9T7wUsq7cHRXbFzdeZWpoadfBJ/ggJr 8mh3vF7cxttLYEU1KjGCZw7QuQdbutrfXWVNOEDKK3GzKL5j27iue3WSzZrGcDyeVTal l3JbQchInH23F4Evl4M7NaBDeT2palJJn+7panBxUgN7tIfGtlRPRwYmb/wucyLT6Baj aaEQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uA6oN8l2; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id ia4si1061212ejc.84.2021.06.16.22.34.48; Wed, 16 Jun 2021 22:34:49 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uA6oN8l2; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229666AbhFQFgy (ORCPT + 7 others); Thu, 17 Jun 2021 01:36:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:56704 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229897AbhFQFgx (ORCPT ); Thu, 17 Jun 2021 01:36:53 -0400 Received: from mail-pg1-x534.google.com (mail-pg1-x534.google.com [IPv6:2607:f8b0:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5C2E5C061767 for ; Wed, 16 Jun 2021 22:34:46 -0700 (PDT) Received: by mail-pg1-x534.google.com with SMTP id q15so3971875pgg.12 for ; Wed, 16 Jun 2021 22:34:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=mXC2NA+CSEwSuQ2JUNooTVOMpQPHWlDfkI99DL5Kw+A=; b=uA6oN8l2LKCr6Dbrep/XAPRBGNqFDwLt1sC+AZBEqwdO9pR2ZhOlBwhUVKJl+lkhzx G0NGmpyzRfuCpKRK+KbTWt6YtAJofkCjUa891fj/oAZGFssUQP0QqjbdL59BVzHviGjj qK/RRLEocaVW1Y7eAqCvd50I4gbXZNW9LoSLgp2Pq29UDubF1dT6X6lUWUjtPVxQi998 Au9igrArV5SnAYdoa3Hj4UMMjslnNwsn/XvHwxRWjGp+sK2DQ0af/L/xnCblQzQ1o4PS xAVGYPAuSmMRAmvMH09OZ6l1TMG7RI48jDVKNpPIx3drXuPsPfM4hEJaME7SK4jF2hjP 4o8g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=mXC2NA+CSEwSuQ2JUNooTVOMpQPHWlDfkI99DL5Kw+A=; b=jg4t2WOy8duT5BW4qhD96kDCwprjapjrbUfHSiXbv7sOJtXh+nZgtTmbQpGz+pE7NA 3ISqCNdv/N39mGtpU30x3a2kp0vxWR0OcA8RGvu/aLTRq+/IeETiJgewXImL4Ygnwh8h tcCDF6unkuxcElQZeTh/j9gtTYRFnwD3bJQgZSskQp3wHjofJsj/dbSkwD9M//gXZnp0 ykT2uol7qgmDfgExsLNkTr2EiXgdvB/u5CCDHm/xFu48F9Q4kRtL5AJS8a7DgOFDU8ea YwNWSLINcl0VMYwnhxN1eh1SC/uuYAwF+jQtR4rJiJy9cTYtKfDFf4EblK/0E4WZL6lK uHaw== X-Gm-Message-State: AOAM532/Q1Y16EtmH8TVNeLsUBtf2oZXEjbeud+Vm0VDjVVinJ0yFKnU R8ctPLeQ+59b2NhjrIzQOKPlTw== X-Received: by 2002:a63:5a5d:: with SMTP id k29mr3237914pgm.215.1623908085941; Wed, 16 Jun 2021 22:34:45 -0700 (PDT) Received: from localhost.name ([122.177.46.2]) by smtp.gmail.com with ESMTPSA id m126sm4056405pfb.15.2021.06.16.22.34.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 16 Jun 2021 22:34:45 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lgirdwood@gmail.com, Linus Walleij , Bjorn Andersson Subject: [PATCH v3 1/4] dt-bindings: pinctrl: qcom, pmic-gpio: Arrange compatibles alphabetically Date: Thu, 17 Jun 2021 11:04:29 +0530 Message-Id: <20210617053432.350486-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210617053432.350486-1-bhupesh.sharma@linaro.org> References: <20210617053432.350486-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Arrange the compatibles inside qcom-pmic gpio device tree bindings alphabetically. While at it, also make some minor cosmetic changes to allow future compatible addition to the bindings simpler. Cc: Linus Walleij Cc: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- .../bindings/pinctrl/qcom,pmic-gpio.txt | 58 +++++++++---------- 1 file changed, 29 insertions(+), 29 deletions(-) -- 2.31.1 Reviewed-by: Bjorn Andersson Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt index f6a9760558a6..10f049e21264 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt @@ -7,10 +7,20 @@ PMIC's from Qualcomm. Usage: required Value type: Definition: must be one of: + "qcom,pm660-gpio" + "qcom,pm660l-gpio" + "qcom,pm6150-gpio" + "qcom,pm6150l-gpio" "qcom,pm8005-gpio" + "qcom,pm8008-gpio" "qcom,pm8018-gpio" "qcom,pm8038-gpio" "qcom,pm8058-gpio" + "qcom,pm8150-gpio" + "qcom,pm8150b-gpio" + "qcom,pm8350-gpio" + "qcom,pm8350b-gpio" + "qcom,pm8350c-gpio" "qcom,pm8916-gpio" "qcom,pm8917-gpio" "qcom,pm8921-gpio" @@ -22,20 +32,10 @@ PMIC's from Qualcomm. "qcom,pmi8950-gpio" "qcom,pmi8994-gpio" "qcom,pmi8998-gpio" - "qcom,pms405-gpio" - "qcom,pm660-gpio" - "qcom,pm660l-gpio" - "qcom,pm8150-gpio" - "qcom,pm8150b-gpio" - "qcom,pm8350-gpio" - "qcom,pm8350b-gpio" - "qcom,pm8350c-gpio" "qcom,pmk8350-gpio" "qcom,pmr735a-gpio" "qcom,pmr735b-gpio" - "qcom,pm6150-gpio" - "qcom,pm6150l-gpio" - "qcom,pm8008-gpio" + "qcom,pms405-gpio" "qcom,pmx55-gpio" And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" @@ -97,34 +97,34 @@ to specify in a pin configuration subnode: Value type: Definition: List of gpio pins affected by the properties specified in this subnode. Valid pins are: - gpio1-gpio4 for pm8005 - gpio1-gpio6 for pm8018 + gpio1-gpio10 for pm6150 + gpio1-gpio12 for pm6150l + gpio1-gpio4 for pm8005 + gpio1-gpio2 for pm8008 + gpio1-gpio6 for pm8018 gpio1-gpio12 for pm8038 gpio1-gpio40 for pm8058 - gpio1-gpio4 for pm8916 + gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 + and gpio8) + gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) + gpio1-gpio12 for pm8150l (hole on gpio7) + gpio1-gpio10 for pm8350 + gpio1-gpio8 for pm8350b + gpio1-gpio9 for pm8350c + gpio1-gpio4 for pm8916 gpio1-gpio38 for pm8917 gpio1-gpio44 for pm8921 gpio1-gpio36 for pm8941 - gpio1-gpio8 for pm8950 (hole on gpio3) + gpio1-gpio8 for pm8950 (hole on gpio3) gpio1-gpio22 for pm8994 gpio1-gpio26 for pm8998 gpio1-gpio22 for pma8084 - gpio1-gpio2 for pmi8950 + gpio1-gpio2 for pmi8950 gpio1-gpio10 for pmi8994 + gpio1-gpio4 for pmk8350 + gpio1-gpio4 for pmr735a + gpio1-gpio4 for pmr735b gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10) - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 - and gpio8) - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) - gpio1-gpio12 for pm8150l (hole on gpio7) - gpio1-gpio10 for pm8350 - gpio1-gpio8 for pm8350b - gpio1-gpio9 for pm8350c - gpio1-gpio4 for pmk8350 - gpio1-gpio4 for pmr735a - gpio1-gpio4 for pmr735b - gpio1-gpio10 for pm6150 - gpio1-gpio12 for pm6150l - gpio1-gpio2 for pm8008 gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10 and gpio11) From patchwork Thu Jun 17 05:34:30 2021 Content-Type: text/plain; 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Wed, 16 Jun 2021 22:34:49 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lgirdwood@gmail.com, Linus Walleij , Bjorn Andersson Subject: [PATCH v3 2/4] dt-bindings: pinctrl: qcom, pmic-gpio: Add compatible for SA8155p-adp Date: Thu, 17 Jun 2021 11:04:30 +0530 Message-Id: <20210617053432.350486-3-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210617053432.350486-1-bhupesh.sharma@linaro.org> References: <20210617053432.350486-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add pmic-gpio compatible string for pmm8155au pmic found on the SA8155p-adp board. Cc: Linus Walleij Cc: Bjorn Andersson Signed-off-by: Bhupesh Sharma Reviewed-by: Bjorn Andersson Acked-by: Rob Herring --- Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt index 10f049e21264..95d158848546 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt @@ -33,6 +33,7 @@ PMIC's from Qualcomm. "qcom,pmi8994-gpio" "qcom,pmi8998-gpio" "qcom,pmk8350-gpio" + "qcom,pmm8155au-gpio" "qcom,pmr735a-gpio" "qcom,pmr735b-gpio" "qcom,pms405-gpio" @@ -122,6 +123,7 @@ to specify in a pin configuration subnode: gpio1-gpio2 for pmi8950 gpio1-gpio10 for pmi8994 gpio1-gpio4 for pmk8350 + gpio1-gpio10 for pmm8155au gpio1-gpio4 for pmr735a gpio1-gpio4 for pmr735b gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10) From patchwork Thu Jun 17 05:34:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 462115 Delivered-To: patch@linaro.org Received: by 2002:a02:735a:0:0:0:0:0 with SMTP id a26csp111278jae; Wed, 16 Jun 2021 22:34:56 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxvdBJ5bbbjVE/KLACSKS/NC3MmrG5o6GnSPq4LYZo/HcwxMeqQqH/vs6TjJB94GpRwBxW0 X-Received: by 2002:a17:906:35cd:: with SMTP id p13mr3345976ejb.24.1623908096845; Wed, 16 Jun 2021 22:34:56 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1623908096; cv=none; d=google.com; s=arc-20160816; b=BPQl8p4E4T9u7PaxAeZp5+PVLIdHeT2iR6ONoPnuDkwItHCMHHZhzVpIbg54/B8xLe oMPtoYiFjJ90SVldWxnnFVd0BE0cO4T9SXiKPC5jyvo8oOTR3ruLmy8R2WSdYX/dNHmL 8d/l1sbFFiDwCFv7MD6/tjj7QzVWlsPcWsYjTIYMYaE1scHW0s4XqqaSTiD0tPYnmkPz 0wDO/17RRwdvV1Izh/uAJEOEEMfoKFK9NqVZa9JqR6r4jBxWcxKTb+z2pbAPm1cdkKrf KWWZsRMxXAb48XG4BugEvo6oLccf+NyBURXDVGPoVi7jSNkVIYAP1M0W1w5H4rbxPzSO Rkyw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=X2Jgtg46fvD0VIIhEX+lIqgmEij/wG71wKNSQ3al/aA=; b=dJ6aOIdM1x2ANGM5ah/ZjM23NXp3OduOO0/SgobsFnIlYiuyoVQBwhrMBy0oIbRozC S9Uhmeefyd9htQ8EU3f1Sb6wQ/r1/+ZwEmmbhNrhv2Eajz8i7UabfVW1GtvofklZre47 9ACNoyCFt+bQCRg6pn/ZRqEVoRkKkweM8zDVR9wBxwBetAwC4uupmLGFBDVbwsySdO/U VEfhpQzkRwA/Adq+8Y4SDSiRnPebAgZ5J1DPQ+2H8Ag3r6BUCj6a9vJisVHeGo7C9J6i Gt9HxKJk8RwPbrHdgDxHOrRVAKpbKBrrcvya4V2hgKmgvB/HOjdJlirGxwRTZgez6c96 yL4g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Ip7TwC6r; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Cc: Linus Walleij Cc: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 32 ++++++++++++------------ 1 file changed, 16 insertions(+), 16 deletions(-) -- 2.31.1 Reviewed-by: Bjorn Andersson diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 00870da0c94e..89f6147efe58 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1104,23 +1104,14 @@ static int pmic_gpio_remove(struct platform_device *pdev) } static const struct of_device_id pmic_gpio_of_match[] = { - { .compatible = "qcom,pm8005-gpio", .data = (void *) 4 }, - { .compatible = "qcom,pm8916-gpio", .data = (void *) 4 }, - { .compatible = "qcom,pm8941-gpio", .data = (void *) 36 }, - /* pm8950 has 8 GPIOs with holes on 3 */ - { .compatible = "qcom,pm8950-gpio", .data = (void *) 8 }, - { .compatible = "qcom,pmi8950-gpio", .data = (void *) 2 }, - { .compatible = "qcom,pm8994-gpio", .data = (void *) 22 }, - { .compatible = "qcom,pmi8994-gpio", .data = (void *) 10 }, - { .compatible = "qcom,pm8998-gpio", .data = (void *) 26 }, - { .compatible = "qcom,pmi8998-gpio", .data = (void *) 14 }, - { .compatible = "qcom,pma8084-gpio", .data = (void *) 22 }, - /* pms405 has 12 GPIOs with holes on 1, 9, and 10 */ - { .compatible = "qcom,pms405-gpio", .data = (void *) 12 }, /* pm660 has 13 GPIOs with holes on 1, 5, 6, 7, 8 and 10 */ { .compatible = "qcom,pm660-gpio", .data = (void *) 13 }, /* pm660l has 12 GPIOs with holes on 1, 2, 10, 11 and 12 */ { .compatible = "qcom,pm660l-gpio", .data = (void *) 12 }, + { .compatible = "qcom,pm6150-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pm6150l-gpio", .data = (void *) 12 }, + { .compatible = "qcom,pm8005-gpio", .data = (void *) 4 }, + { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 }, /* pm8150 has 10 GPIOs with holes on 2, 5, 7 and 8 */ { .compatible = "qcom,pm8150-gpio", .data = (void *) 10 }, /* pm8150b has 12 GPIOs with holes on 3, r and 7 */ @@ -1130,12 +1121,21 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 }, { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 }, + { .compatible = "qcom,pm8916-gpio", .data = (void *) 4 }, + { .compatible = "qcom,pm8941-gpio", .data = (void *) 36 }, + /* pm8950 has 8 GPIOs with holes on 3 */ + { .compatible = "qcom,pm8950-gpio", .data = (void *) 8 }, + { .compatible = "qcom,pm8994-gpio", .data = (void *) 22 }, + { .compatible = "qcom,pm8998-gpio", .data = (void *) 26 }, + { .compatible = "qcom,pma8084-gpio", .data = (void *) 22 }, + { .compatible = "qcom,pmi8950-gpio", .data = (void *) 2 }, + { .compatible = "qcom,pmi8994-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pmi8998-gpio", .data = (void *) 14 }, { .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 }, { .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 }, { .compatible = "qcom,pmr735b-gpio", .data = (void *) 4 }, - { .compatible = "qcom,pm6150-gpio", .data = (void *) 10 }, - { .compatible = "qcom,pm6150l-gpio", .data = (void *) 12 }, - { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 }, + /* pms405 has 12 GPIOs with holes on 1, 9, and 10 */ + { .compatible = "qcom,pms405-gpio", .data = (void *) 12 }, /* pmx55 has 11 GPIOs with holes on 3, 7, 10, 11 */ { .compatible = "qcom,pmx55-gpio", .data = (void *) 11 }, { }, From patchwork Thu Jun 17 05:34:32 2021 Content-Type: text/plain; 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Add support for the same in the pinctrl driver. Cc: Linus Walleij Cc: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + 1 file changed, 1 insertion(+) -- 2.31.1 Reviewed-by: Bjorn Andersson diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 89f6147efe58..cc50cfc576fd 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1132,6 +1132,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pmi8994-gpio", .data = (void *) 10 }, { .compatible = "qcom,pmi8998-gpio", .data = (void *) 14 }, { .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 }, + { .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 }, { .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 }, { .compatible = "qcom,pmr735b-gpio", .data = (void *) 4 }, /* pms405 has 12 GPIOs with holes on 1, 9, and 10 */