From patchwork Thu Aug 9 12:32:33 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 143829 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2038298ljj; Thu, 9 Aug 2018 05:33:01 -0700 (PDT) X-Google-Smtp-Source: AA+uWPw5kizqc+AOzlx5Lnx3i/wpGvay5+k2eNL/GiZvDKofmwi1N69LhL03QoimaMJX8+W3DANR X-Received: by 2002:a63:ea0c:: with SMTP id c12-v6mr2045773pgi.158.1533817981587; Thu, 09 Aug 2018 05:33:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533817981; cv=none; d=google.com; s=arc-20160816; b=dGD5UaFklUz41453SxmHaeVrq3iSrnQSniFB07W5Ys8zh+PZjmqNziSmVa+GfdMHOK gznHMLywjfqKUNrIbqSdpToOz5ZIzi513LKg+0M054oW2xiTpwazSrM5mumRbpLLHFMi 5Z7wxGoaLNSxj2RFKyaBniFKyL5Y+kyZaMSNg4p2IMz5Mej9FDo657jixNi9fL0S51pk bB8OzVXKKZxEcSPFCKYSHToA2FjdX215pVPzm2wz2AD6pXpyy0py/rQGqHXD+b4/qVl1 +nfPm/oWauOZbxrKLp+eQZib30ngd7y7oYEANJRcP1iHzUPFd4Bu46IRnupMvf53sJ1M 3+Kw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=60pxgKEjbMLBfaf8CabVulHtQL7BJDgpEYjlT+OZ5DU=; b=lq89q1QLVMvXtzVlaYZn5Ch0ayC7hFuufXCraZuPVE2E8YGpc+WT0jHvuyO4e9DxLh 6QCwq+fFGpQADgluU9Zu0JeeyXO/zZfQnID78Gpr155o4zAZv3KNjTuVeAJPHXDc4F5B Y0Gr4YELoo1fYWbOTGrQ8bQ/UCpjwFdZ/wmXNQNeQO4tOkVpnFAiSY3jrIe4E2ZMq2vJ YYOR2NzdtXu9iHsj96j0jSalXIGPn8q7Wh02Y1p12+2DjOiJqzHFTgXJOq77+MJBZgZm Z+XjH5vQ3s8XJoxoVCMU2P3Oj0R9kOWZ58k8+5kDermRg1BiWRB7zkexK+sHeXUGJLg+ 4PyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="EUbM4/SI"; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y68-v6si6749376pfg.246.2018.08.09.05.33.01; Thu, 09 Aug 2018 05:33:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="EUbM4/SI"; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731985AbeHIO5l (ORCPT + 13 others); Thu, 9 Aug 2018 10:57:41 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:44544 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1731969AbeHIO5k (ORCPT ); Thu, 9 Aug 2018 10:57:40 -0400 Received: by mail-pg1-f196.google.com with SMTP id r1-v6so2681938pgp.11 for ; Thu, 09 Aug 2018 05:32:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=zyKbfUOB0Y9T8bByL2E46QXLNpmRHMe5dD12vKApofY=; b=EUbM4/SIh7RAHxEjlJgTq6apupexB9/sDI3QO/YPngFPr1iC4TZjnKT5uHU6TgXbuq Dl54WWuhj2nbaU1XD6L0VEmkEMb+nW0TmZayNnpC5aMQIzPfP7O4XdQmGSix83xM7Sh+ Ur517vJlbwHPuKQVBIb5oughoqod27z2WwCT8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=zyKbfUOB0Y9T8bByL2E46QXLNpmRHMe5dD12vKApofY=; b=a/Hnb4PRRj+BlGWhNP6nwvwWgGjBOHQ5A3SnybalO0kWrtU10q6PdnNB1SsW2km2cD wS/gLPIir8Z7mKw/uL80VMTvVpv+4GH3wkM4cx0TSgCB8haopQhR+ul6R6pUBNmEhtDq n/97G6HmwMc+9g4ybh4RprMwgwRjjFnH7RhexiEwC6Pr+xLEW0z7IpvLOLmDx1obdz8M TW5E6jM8Qsd9E34SzDqHaYLKcBFVqwNAWVdc8GvqfP9DUBU3oKGeCcOjk/GGLFSlO7Fo 0zzyxEmkj2qsML9KJm4Gazg2ZpG3jpfVYg8qs4dEiBnpnvg1a+FWeam3fRu+H0VusbkO A6Dg== X-Gm-Message-State: AOUpUlEfytLtKvxLlCspy/3uQQHKJmtXdywlXbJNBBzlaHRMri6P65V9 2fb3A0E6pCNH/JfFbGDqTT8dtw== X-Received: by 2002:a63:8f03:: with SMTP id n3-v6mr2051619pgd.166.1533817978957; Thu, 09 Aug 2018 05:32:58 -0700 (PDT) Received: from localhost ([45.113.251.134]) by smtp.gmail.com with ESMTPSA id r1-v6sm20812005pfi.17.2018.08.09.05.32.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 09 Aug 2018 05:32:58 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, David Brown , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , Zhang Rui , linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-pm@vger.kernel.org Subject: [PATCH v1 01/10] arm/arm64: dts: msm8974/msm8916: thermal: Split address space into two Date: Thu, 9 Aug 2018 18:02:33 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org We've earlier added support to split the register address space into TM and SROT regions. Split up the regmap address space into two for the remaining platforms that have a similar register layout and make corresponding changes to the get_temp_common() function used by these platforms. Since tsens-common.c/init_common() currently only registers one address space, the order is important (TM before SROT). This is OK since the code doesn't really use the SROT functionality yet. Signed-off-by: Amit Kucheria --- arch/arm/boot/dts/qcom-msm8974.dtsi | 6 ++++-- arch/arm64/boot/dts/qcom/msm8916.dtsi | 6 ++++-- drivers/thermal/qcom/tsens-common.c | 5 +++-- 3 files changed, 11 insertions(+), 6 deletions(-) -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index d9019a49b292..3c4b81c29798 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -427,11 +427,13 @@ }; }; - tsens: thermal-sensor@fc4a8000 { + tsens: thermal-sensor@fc4a9000 { compatible = "qcom,msm8974-tsens"; - reg = <0xfc4a8000 0x2000>; + reg = <0xfc4a9000 0x1000>, /* TM */ + <0xfc4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_calib>, <&tsens_backup>; nvmem-cell-names = "calib", "calib_backup"; + #qcom,sensors = <11>; #thermal-sensor-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index cc1040eacdf5..abf84df5a7bc 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -774,11 +774,13 @@ }; }; - tsens: thermal-sensor@4a8000 { + tsens: thermal-sensor@4a9000 { compatible = "qcom,msm8916-tsens"; - reg = <0x4a8000 0x2000>; + reg = <0x4a9000 0x1000>, /* TM */ + <0x4a8000 0x1000>; /* SROT */ nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; nvmem-cell-names = "calib", "calib_sel"; + #qcom,sensors = <5>; #thermal-sensor-cells = <1>; }; diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 6207d8d92351..478739543bbc 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -21,7 +21,7 @@ #include #include "tsens.h" -#define S0_ST_ADDR 0x1030 +#define STATUS_OFFSET 0x30 #define SN_ADDR_OFFSET 0x4 #define SN_ST_TEMP_MASK 0x3ff #define CAL_DEGC_PT1 30 @@ -107,8 +107,9 @@ int get_temp_common(struct tsens_device *tmdev, int id, int *temp) unsigned int status_reg; int last_temp = 0, ret; - status_reg = S0_ST_ADDR + s->hw_id * SN_ADDR_OFFSET; + status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; ret = regmap_read(tmdev->map, status_reg, &code); + if (ret) return ret; last_temp = code & SN_ST_TEMP_MASK; From patchwork Thu Aug 9 12:32:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 143833 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2038560ljj; Thu, 9 Aug 2018 05:33:16 -0700 (PDT) X-Google-Smtp-Source: AA+uWPwFFwWHFYOxjItkrMVqKJ/BorAg0kHM349tTPKJwAtTZgPgaFFesLCSDAMZIxctmQjQbh7H X-Received: by 2002:a63:7d7:: with SMTP id 206-v6mr1998016pgh.137.1533817996459; Thu, 09 Aug 2018 05:33:16 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533817996; cv=none; d=google.com; s=arc-20160816; b=EhQ3wpvgdrarN0puY/kP3YZBn7fgSYjZh5fxHTfKyyTJZx8vr4ZEhVhm8uprGCyxeF +879PJU2TXKxZwx8PmgsAJTth8PUH2R6sUzRjkXNn2a+OB9Mrhib5/wzKZx5Lbr3eXsC SYh8TeyX1KCue1475mvF1agB+jk4WMW78RN7Qt2aY7amHJb9T56mi+etjhevMrmphx5I yypM0e8xcN7YLCMH+AzJpoSuD420DlXRChv7izJZ46puboeimx4wIsvzPzNtzjij8Uy3 wnIeNqSAjMODsUY+o5GoAU39m72QVG560GMp7vw+CR/IxCDe8LLNagtq0Xm6SxQBp9Wa d1iQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=sAcmpzw4GjrvMghN5p4O5dtSbZfHK3PKk7mgUVSJhOw=; b=chF3PzV3E/cVzS0nfjWM21aVwZo/nLvMi1GLJAOkh5J+qpBDMZZbAYqkerpcSvdqvM Mpo590ucuCb5VdfDUS0aq/JcB4OUxlrjnDWL+3IsZonI0fcnQuflk95zs90dOg0aPYcE zu5kbmUgZ0SIXcUvUukbpLwC7dK3+GxisZrBidCeVdrfgLwX8K0xbUZrsK/thdIFtWJ3 lwNmfLhNzcdMDhDvSPSW6L6k2snb2dlaIoqO/mNmt9mdMJYW7YxergS6IsBOmSXmNWaF MlZDP8K6gfaPFe6Cd4eDrLQQnR4HsWtf+cd3RWomvkvQ3O77M31Kkj34QpixCpkB6U/Z YzIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="WFyj6fC/"; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v7-v6si5634318plp.263.2018.08.09.05.33.16; Thu, 09 Aug 2018 05:33:16 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="WFyj6fC/"; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732173AbeHIO54 (ORCPT + 13 others); Thu, 9 Aug 2018 10:57:56 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:37781 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732169AbeHIO5z (ORCPT ); Thu, 9 Aug 2018 10:57:55 -0400 Received: by mail-pg1-f196.google.com with SMTP id n7-v6so2698054pgq.4 for ; Thu, 09 Aug 2018 05:33:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=4iFvQEtHzfGSiaSbjmel4gFV6jgpew3aXPZrZrdD19k=; b=WFyj6fC/7ky3EvG+Ujae3rlnT7lLGoKBndzoXpaaeUs9X9MHu7DImpqIu6R4AUyqT0 dgikG2ZWEIzggDKKamPOBr7W4BrydKOmZGkK5fZwElYgyNsNJJNYOk30fL16zcni42pD 7CLGDA9T+6WyrBtuDnjL/xdpz2B+EP7E+8SUw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=4iFvQEtHzfGSiaSbjmel4gFV6jgpew3aXPZrZrdD19k=; b=IyaIXV4u+Lrj+yFbL+qHFhzwVlf9ZsymX6L6RYjzYK3UuYYTwDwVUYcP/Rl6vhjYb6 xp1lvjw5D0Se148jIfPNF5GTs2+5d64FM2lCVv/Cd9h23K64+ctOB88xWomme3/bwl8U 78RNgqNj4IWWBzsOYPPjk5zWJLOwB2vJy1WUVcz8InPBwbmMblBs3joilEjVXXoUwbp7 KnKPjUJxrTrTZd2UG0UkWpXQD8FOZn66EuQDUjuvX9aW4BWax9KHN6jBVusTXt8XLeoD Z1VSGB8767sOi3fHAAH30b4k8vAOIem52dN7ZJ6jo/3gZM+GvmyylJdB49zarqeovaM1 xuQQ== X-Gm-Message-State: AOUpUlHhNQk2+UWQj/kHATI6JwH1lgFih82iRLDjfeJTB0C4MN/xAXId 2XkSfTWchNYmfsoGAl0SpVXCKw== X-Received: by 2002:a63:4d47:: with SMTP id n7-v6mr2017712pgl.270.1533817994112; Thu, 09 Aug 2018 05:33:14 -0700 (PDT) Received: from localhost ([45.113.251.134]) by smtp.gmail.com with ESMTPSA id v20-v6sm10603170pfk.12.2018.08.09.05.33.12 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 09 Aug 2018 05:33:13 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, Zhang Rui , linux-pm@vger.kernel.org Subject: [PATCH v1 05/10] thermal: tsens: Rename map field in order to add a second address map Date: Thu, 9 Aug 2018 18:02:37 +0530 Message-Id: X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The TSENS driver currently only uses a limited set of registers from the TM address space. So it was ok to map just that set of registers and call it "map". We'd now like to map a second set: SROT registers to introduce new functionality. Rename the "map" field to a more appropriate "tm_map". The 8960 doesn't have a clear split between TM and SROT registers. To avoid complicating the data structure, it will switchover to using tm_map for its maps. There is no functional change with this patch. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-8960.c | 30 ++++++++++++++--------------- drivers/thermal/qcom/tsens-common.c | 17 ++++++++-------- drivers/thermal/qcom/tsens-v2.c | 6 +++--- drivers/thermal/qcom/tsens.h | 2 +- 4 files changed, 27 insertions(+), 28 deletions(-) -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/thermal/qcom/tsens-8960.c b/drivers/thermal/qcom/tsens-8960.c index 4af76de7dc2e..0f0adb302a7b 100644 --- a/drivers/thermal/qcom/tsens-8960.c +++ b/drivers/thermal/qcom/tsens-8960.c @@ -60,7 +60,7 @@ static int suspend_8960(struct tsens_device *tmdev) { int ret; unsigned int mask; - struct regmap *map = tmdev->map; + struct regmap *map = tmdev->tm_map; ret = regmap_read(map, THRESHOLD_ADDR, &tmdev->ctx.threshold); if (ret) @@ -85,7 +85,7 @@ static int suspend_8960(struct tsens_device *tmdev) static int resume_8960(struct tsens_device *tmdev) { int ret; - struct regmap *map = tmdev->map; + struct regmap *map = tmdev->tm_map; ret = regmap_update_bits(map, CNTL_ADDR, SW_RST, SW_RST); if (ret) @@ -117,12 +117,12 @@ static int enable_8960(struct tsens_device *tmdev, int id) int ret; u32 reg, mask; - ret = regmap_read(tmdev->map, CNTL_ADDR, ®); + ret = regmap_read(tmdev->tm_map, CNTL_ADDR, ®); if (ret) return ret; mask = BIT(id + SENSOR0_SHIFT); - ret = regmap_write(tmdev->map, CNTL_ADDR, reg | SW_RST); + ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg | SW_RST); if (ret) return ret; @@ -131,7 +131,7 @@ static int enable_8960(struct tsens_device *tmdev, int id) else reg |= mask | SLP_CLK_ENA_8660 | EN; - ret = regmap_write(tmdev->map, CNTL_ADDR, reg); + ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg); if (ret) return ret; @@ -148,7 +148,7 @@ static void disable_8960(struct tsens_device *tmdev) mask <<= SENSOR0_SHIFT; mask |= EN; - ret = regmap_read(tmdev->map, CNTL_ADDR, ®_cntl); + ret = regmap_read(tmdev->tm_map, CNTL_ADDR, ®_cntl); if (ret) return; @@ -159,7 +159,7 @@ static void disable_8960(struct tsens_device *tmdev) else reg_cntl &= ~SLP_CLK_ENA_8660; - regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); + regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); } static int init_8960(struct tsens_device *tmdev) @@ -167,8 +167,8 @@ static int init_8960(struct tsens_device *tmdev) int ret, i; u32 reg_cntl; - tmdev->map = dev_get_regmap(tmdev->dev, NULL); - if (!tmdev->map) + tmdev->tm_map = dev_get_regmap(tmdev->dev, NULL); + if (!tmdev->tm_map) return -ENODEV; /* @@ -184,14 +184,14 @@ static int init_8960(struct tsens_device *tmdev) } reg_cntl = SW_RST; - ret = regmap_update_bits(tmdev->map, CNTL_ADDR, SW_RST, reg_cntl); + ret = regmap_update_bits(tmdev->tm_map, CNTL_ADDR, SW_RST, reg_cntl); if (ret) return ret; if (tmdev->num_sensors > 1) { reg_cntl |= SLP_CLK_ENA | (MEASURE_PERIOD << 18); reg_cntl &= ~SW_RST; - ret = regmap_update_bits(tmdev->map, CONFIG_ADDR, + ret = regmap_update_bits(tmdev->tm_map, CONFIG_ADDR, CONFIG_MASK, CONFIG); } else { reg_cntl |= SLP_CLK_ENA_8660 | (MEASURE_PERIOD << 16); @@ -200,12 +200,12 @@ static int init_8960(struct tsens_device *tmdev) } reg_cntl |= GENMASK(tmdev->num_sensors - 1, 0) << SENSOR0_SHIFT; - ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); + ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); if (ret) return ret; reg_cntl |= EN; - ret = regmap_write(tmdev->map, CNTL_ADDR, reg_cntl); + ret = regmap_write(tmdev->tm_map, CNTL_ADDR, reg_cntl); if (ret) return ret; @@ -252,12 +252,12 @@ static int get_temp_8960(struct tsens_device *tmdev, int id, int *temp) timeout = jiffies + usecs_to_jiffies(TIMEOUT_US); do { - ret = regmap_read(tmdev->map, INT_STATUS_ADDR, &trdy); + ret = regmap_read(tmdev->tm_map, INT_STATUS_ADDR, &trdy); if (ret) return ret; if (!(trdy & TRDY_MASK)) continue; - ret = regmap_read(tmdev->map, s->status, &code); + ret = regmap_read(tmdev->tm_map, s->status, &code); if (ret) return ret; *temp = code_to_mdegC(code, s); diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 303e3fdaca98..0585084630b3 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -99,8 +99,7 @@ int get_temp_common(struct tsens_device *tmdev, int id, int *temp) int last_temp = 0, ret; status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * SN_ADDR_OFFSET; - ret = regmap_read(tmdev->map, status_reg, &code); - + ret = regmap_read(tmdev->tm_map, status_reg, &code); if (ret) return ret; last_temp = code & SN_ST_TEMP_MASK; @@ -118,7 +117,7 @@ static const struct regmap_config tsens_config = { int __init init_common(struct tsens_device *tmdev) { - void __iomem *base; + void __iomem *tm_base; struct resource *res; struct platform_device *op = of_find_device_by_node(tmdev->dev->of_node); @@ -134,13 +133,13 @@ int __init init_common(struct tsens_device *tmdev) } res = platform_get_resource(op, IORESOURCE_MEM, 0); - base = devm_ioremap_resource(&op->dev, res); - if (IS_ERR(base)) - return PTR_ERR(base); + tm_base = devm_ioremap_resource(&op->dev, res); + if (IS_ERR(tm_base)) + return PTR_ERR(tm_base); - tmdev->map = devm_regmap_init_mmio(tmdev->dev, base, &tsens_config); - if (IS_ERR(tmdev->map)) - return PTR_ERR(tmdev->map); + tmdev->tm_map = devm_regmap_init_mmio(tmdev->dev, tm_base, &tsens_config); + if (IS_ERR(tmdev->tm_map)) + return PTR_ERR(tmdev->tm_map); return 0; } diff --git a/drivers/thermal/qcom/tsens-v2.c b/drivers/thermal/qcom/tsens-v2.c index 44da02f594ac..1bdef92e4521 100644 --- a/drivers/thermal/qcom/tsens-v2.c +++ b/drivers/thermal/qcom/tsens-v2.c @@ -21,7 +21,7 @@ static int get_temp_tsens_v2(struct tsens_device *tmdev, int id, int *temp) int ret; status_reg = tmdev->tm_offset + STATUS_OFFSET + s->hw_id * 4; - ret = regmap_read(tmdev->map, status_reg, &code); + ret = regmap_read(tmdev->tm_map, status_reg, &code); if (ret) return ret; last_temp = code & LAST_TEMP_MASK; @@ -29,7 +29,7 @@ static int get_temp_tsens_v2(struct tsens_device *tmdev, int id, int *temp) goto done; /* Try a second time */ - ret = regmap_read(tmdev->map, status_reg, &code); + ret = regmap_read(tmdev->tm_map, status_reg, &code); if (ret) return ret; if (code & STATUS_VALID_BIT) { @@ -40,7 +40,7 @@ static int get_temp_tsens_v2(struct tsens_device *tmdev, int id, int *temp) } /* Try a third/last time */ - ret = regmap_read(tmdev->map, status_reg, &code); + ret = regmap_read(tmdev->tm_map, status_reg, &code); if (ret) return ret; if (code & STATUS_VALID_BIT) { diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 8207610f326a..58e98c4d3a8b 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -69,7 +69,7 @@ struct tsens_context { struct tsens_device { struct device *dev; u32 num_sensors; - struct regmap *map; + struct regmap *tm_map; u32 tm_offset; struct tsens_context ctx; const struct tsens_ops *ops; From patchwork Thu Aug 9 12:32:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 143834 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2038633ljj; Thu, 9 Aug 2018 05:33:20 -0700 (PDT) X-Google-Smtp-Source: AA+uWPwtU6GoDQ8XzCtOTermLj83yPufcROil0JO7TeZcYHxiYne2PuDaeV9SDJd3Y/3ceRX4VxK X-Received: by 2002:a63:6c05:: with SMTP id h5-v6mr2006358pgc.367.1533818000310; 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[209.132.180.67]) by mx.google.com with ESMTP id e185-v6si6967383pgc.318.2018.08.09.05.33.20; Thu, 09 Aug 2018 05:33:20 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b="MD/s985U"; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732203AbeHIO6A (ORCPT + 13 others); Thu, 9 Aug 2018 10:58:00 -0400 Received: from mail-pg1-f196.google.com ([209.85.215.196]:33727 "EHLO mail-pg1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732100AbeHIO57 (ORCPT ); Thu, 9 Aug 2018 10:57:59 -0400 Received: by mail-pg1-f196.google.com with SMTP id r5-v6so2705235pgv.0 for ; Thu, 09 Aug 2018 05:33:17 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=3ESQmXQZFM8HUugR+y7kuqNvZLR844rwPBdqMRc4GHg=; b=MD/s985U67JRAGE4XjUMo1kDCnx44R//xo5N7NcCMsgalYxjuwZx3InYj6GRi/CFis 1z1NHcjctzAHYiAIv6kdEJDF88CMMY6d418C84OdhzX8NPFDCaHXeCb2L6xIB1U7NuS5 +abUaD5hUkHc1v7+jf42YNWLW7XfhPrvAaWyU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=3ESQmXQZFM8HUugR+y7kuqNvZLR844rwPBdqMRc4GHg=; b=Bc3az5DlOHp46k8clmhNv8hb9XHydtgYDJ6HAU2TDKdH8ItUWP1nkQEILj86BZkTY3 L3bEUQ73J9b3eWKecmKyC/fmvx1qgCb1I0xlx9O8ebwS7qGqz+FMcUt6ioMxbNJqh38t 91w1fKmXm42A0X/bGglVOhAiH3Vuusod5wZY4ZRUQxmQ8kVIpRttuMxZukdEMGb+DwSd G9B0hJiNDt3zx7ofR0y0hlP0zJoXqyIU/Fx6XDkz0ordnoUWc+JE0cSRJicI9Hn3si9d 0Qcxt/0Hs2xYvWrlbVO3f6gf6voCenKFnasCu6qZhgIeuOVJP2Qnk+o/s3HnM9o4poUc j3Pw== X-Gm-Message-State: AOUpUlFP6AN+dLT9B68C16mi3yoDvOtxO0JDDqjYR1snfNGGM5U/3r9g nhmiphUbhIreP1u+tw6l2u3Hkw== X-Received: by 2002:a62:2ac8:: with SMTP id q191-v6mr2203566pfq.139.1533817997513; Thu, 09 Aug 2018 05:33:17 -0700 (PDT) Received: from localhost ([45.113.251.134]) by smtp.gmail.com with ESMTPSA id v7-v6sm21878001pgh.57.2018.08.09.05.33.16 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 09 Aug 2018 05:33:16 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, Zhang Rui , linux-pm@vger.kernel.org Subject: [PATCH v1 06/10] thermal: tsens: Add the SROT address map Date: Thu, 9 Aug 2018 18:02:38 +0530 Message-Id: <3759de54da8dac772f43c098fcec322de179c1a4.1533815718.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org On platforms whose device trees specify two address spaces for TSENS, the second one points to the SROT registers. Initialise the SROT map on those platforms. Signed-off-by: Amit Kucheria --- drivers/thermal/qcom/tsens-common.c | 14 ++++++++++++-- drivers/thermal/qcom/tsens.h | 1 + 2 files changed, 13 insertions(+), 2 deletions(-) -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/drivers/thermal/qcom/tsens-common.c b/drivers/thermal/qcom/tsens-common.c index 0585084630b3..0b8a793f15f4 100644 --- a/drivers/thermal/qcom/tsens-common.c +++ b/drivers/thermal/qcom/tsens-common.c @@ -117,16 +117,26 @@ static const struct regmap_config tsens_config = { int __init init_common(struct tsens_device *tmdev) { - void __iomem *tm_base; + void __iomem *tm_base, *srot_base; struct resource *res; struct platform_device *op = of_find_device_by_node(tmdev->dev->of_node); if (!op) return -EINVAL; - /* The driver only uses the TM register address space for now */ if (op->num_resources > 1) { + /* DT with separate SROT and TM address space */ tmdev->tm_offset = 0; + res = platform_get_resource(op, IORESOURCE_MEM, 1); + srot_base = devm_ioremap_resource(&op->dev, res); + if (IS_ERR(srot_base)) + return PTR_ERR(srot_base); + + tmdev->srot_map = devm_regmap_init_mmio(tmdev->dev, + srot_base, &tsens_config); + if (IS_ERR(tmdev->srot_map)) + return PTR_ERR(tmdev->srot_map); + } else { /* old DTs where SROT and TM were in a contiguous 2K block */ tmdev->tm_offset = 0x1000; diff --git a/drivers/thermal/qcom/tsens.h b/drivers/thermal/qcom/tsens.h index 58e98c4d3a8b..b9c4bcf255fa 100644 --- a/drivers/thermal/qcom/tsens.h +++ b/drivers/thermal/qcom/tsens.h @@ -70,6 +70,7 @@ struct tsens_device { struct device *dev; u32 num_sensors; struct regmap *tm_map; + struct regmap *srot_map; u32 tm_offset; struct tsens_context ctx; const struct tsens_ops *ops; From patchwork Thu Aug 9 12:32:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amit Kucheria X-Patchwork-Id: 143837 Delivered-To: patch@linaro.org Received: by 2002:a2e:9754:0:0:0:0:0 with SMTP id f20-v6csp2038836ljj; Thu, 9 Aug 2018 05:33:31 -0700 (PDT) X-Google-Smtp-Source: AA+uWPxqpwl4y7tkMvAGOAc9uoogMFUVKqlxl1y+8TLlxAN/tSBSayt16C3VNH7MOavUWnR2o7Jx X-Received: by 2002:a65:5a01:: with SMTP id y1-v6mr2004309pgs.125.1533818011188; Thu, 09 Aug 2018 05:33:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1533818011; cv=none; d=google.com; s=arc-20160816; b=L24FWo+GGwAGU3eAOeMYklUp9oZ0dbjLd2X5sjL+Qiqd0jBd+DP+r9yhylcLuP3KHL nLYHrhH37Xi3TQLeVogQRRqvVQiH9FvoPFPn3ahOhsko/46IPapZiHgEM7JLt3+mmKy3 +BKD5LsnJkWCSdNNpUgyPX+glBs403QrKsm38AQItdCFbvWwRZY8oBlm+NWFk5fgF1Pr bZFy7qgJ1p7LHfqJWhEzCCmu0jhhMSkCmV6wCAgGF4501+mbJS1yLhLMudeagEErm2X9 jLbB/z2AsYIZP1qK2D29XlWSK9B2YNOucRvNI5K5jFJKNYmyrZ0W/uA1pNjcXG7E3l6X bibQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:references :in-reply-to:message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=kTc3maLa8S5rnjFT9DQ/KPX+Tvy5qdi/jlLCOo2A/QE=; b=ee85Dd3Msd7gfmDVtc4FFOnr+h9BMrVaJ6kV852gyZsuAlJg8ExQ99Qwsj5YCymhOY mHaoYQD4nEqCtpO8+RkbEcVMJV4fFkzl4qAIVc7YRLGfVA2HBc6Y2Ju6tP8DMfttsACE GXp5DplffQVdUahCds7vWGkJiy81XptInD+OeONreVKvpOzNJj9hy5NNBBxUoT2R6Fn+ 4At0OTi7gzP7Tzdlvy8cpeFczfnrhQochlVP/0zNdieGG61x3fuuUxhhQJ4ga0XQ0OpT YKMNkmru56/LoxK/sbMDkrOmLxY5Z1IO1yJ6fz0jEhv/uUOisLImtQ8hhV3Vzlyq9fy0 UIYw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=NCR4i49B; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id b25-v6si5971838pgf.545.2018.08.09.05.33.30; Thu, 09 Aug 2018 05:33:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=NCR4i49B; spf=pass (google.com: best guess record for domain of linux-arm-msm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1732299AbeHIO6K (ORCPT + 13 others); Thu, 9 Aug 2018 10:58:10 -0400 Received: from mail-pl0-f67.google.com ([209.85.160.67]:37036 "EHLO mail-pl0-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1732298AbeHIO6J (ORCPT ); Thu, 9 Aug 2018 10:58:09 -0400 Received: by mail-pl0-f67.google.com with SMTP id d5-v6so2513857pll.4 for ; Thu, 09 Aug 2018 05:33:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :in-reply-to:references; bh=P+8ZtXuBWeWo7/benGwezLj8nb3RsvbE1i3tK4LtIoc=; b=NCR4i49BGPwZ1Q345daLUuAdEIFBSZxRMTGevcSNH4M3yoq7mZWk1n9NIZLDrs/2pi vC2bPFG7w/ew0jpC+2tofjKhi6NBX4okIct1aSQNuTaI6WHRiPp+SyDd7ABFVZazN66Z bAXyvpQ74ya1J7OyLCOVh1J8z3c//t00wJiQg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:in-reply-to:references; bh=P+8ZtXuBWeWo7/benGwezLj8nb3RsvbE1i3tK4LtIoc=; b=KB9e8RXjZl82QDr3avtxpzMhm/Mq+pa7T7dw+qRUnuL27XfZ8BiDvyjYEwKathLcbt 0wjw56L+Wcd7A4DY0bNu4Q4m9SLYx63yDwrMBRZmDhpRTMT/MAmYfk80UYOuMKrLc8tj zpisr/4jNbLJUvtCU7ZkP4LHTl2i0kraF6hlaECszf+GWjkNIA+CqTkFpkQVo83sqAPJ 5kN27+LZL2hHWH5WQjrmSeDR3UAHbz51lTjZIXmecVnbCylwXQOPyuu6YTa+2Ec8Dx0J nc0o15PzBUFz8Fz5LcZ8odWSt0kbTRVYjFk2mKTGy9Q+mgk8eAkHdBD5jjnSqsyaso5U Yncg== X-Gm-Message-State: AOUpUlE0/MDIl2Q2VeEMteU1nwcE9cubfvQFmJJU2xtJlZBMMrCZxNjx nMSl5JRq0l/cLkgF7JIXzo9ziw== X-Received: by 2002:a17:902:2ac3:: with SMTP id j61-v6mr1913890plb.172.1533818007813; Thu, 09 Aug 2018 05:33:27 -0700 (PDT) Received: from localhost ([45.113.251.134]) by smtp.gmail.com with ESMTPSA id f65-v6sm23210298pfj.46.2018.08.09.05.33.26 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 09 Aug 2018 05:33:27 -0700 (PDT) From: Amit Kucheria To: linux-kernel@vger.kernel.org Cc: rnayak@codeaurora.org, linux-arm-msm@vger.kernel.org, bjorn.andersson@linaro.org, edubezval@gmail.com, smohanad@codeaurora.org, andy.gross@linaro.org, dianders@chromium.org, mka@chromium.org, David Brown , Rob Herring , Mark Rutland , Catalin Marinas , Will Deacon , linux-soc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v1 09/10] arm64: dts: qcom: Add reg-names for all tsens nodes Date: Thu, 9 Aug 2018 18:02:41 +0530 Message-Id: <188c07144d98bfbe2bbbb7d1f2941acdcf4e6682.1533815718.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Instead of showing up as thermal-sensor@, the nodes will show up as tsens0_tm, tsen1_tm, tsens1_srot, etc. in /proc/iomem making it easier to read. IOW, 0c222000-0c2221fe : thermal-sensor@c263000 0c223000-0c2231fe : thermal-sensor@c265000 0c263000-0c2631fe : thermal-sensor@c263000 0c265000-0c2651fe : thermal-sensor@c265000 becomes 0c222000-0c2221fe : tsens0_srot 0c223000-0c2231fe : tsens1_srot 0c263000-0c2631fe : tsens0_tm 0c265000-0c2651fe : tsens1_tm Signed-off-by: Amit Kucheria --- arch/arm/boot/dts/qcom-msm8974.dtsi | 1 + arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 + arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 ++ arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 ++ 4 files changed, 6 insertions(+) -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi index 3c4b81c29798..64c9f81ddd90 100644 --- a/arch/arm/boot/dts/qcom-msm8974.dtsi +++ b/arch/arm/boot/dts/qcom-msm8974.dtsi @@ -431,6 +431,7 @@ compatible = "qcom,msm8974-tsens"; reg = <0xfc4a9000 0x1000>, /* TM */ <0xfc4a8000 0x1000>; /* SROT */ + reg-names = "tsens_tm", "tsens_srot"; nvmem-cells = <&tsens_calib>, <&tsens_backup>; nvmem-cell-names = "calib", "calib_backup"; #qcom,sensors = <11>; diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index abf84df5a7bc..4e6a5e462a91 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -778,6 +778,7 @@ compatible = "qcom,msm8916-tsens"; reg = <0x4a9000 0x1000>, /* TM */ <0x4a8000 0x1000>; /* SROT */ + reg-names = "tsens_tm", "tsens_srot"; nvmem-cells = <&tsens_caldata>, <&tsens_calsel>; nvmem-cell-names = "calib", "calib_sel"; #qcom,sensors = <5>; diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi index c2dca3a30091..7e5982daa2ed 100644 --- a/arch/arm64/boot/dts/qcom/msm8996.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi @@ -969,6 +969,7 @@ compatible = "qcom,msm8996-tsens"; reg = <0x4a9000 0x1000>, /* TM */ <0x4a8000 0x1000>; /* SROT */ + reg-names = "tsens0_tm", "tsens0_srot"; #qcom,sensors = <13>; #thermal-sensor-cells = <1>; }; @@ -977,6 +978,7 @@ compatible = "qcom,msm8996-tsens"; reg = <0x4ad000 0x1000>, /* TM */ <0x4ac000 0x1000>; /* SROT */ + reg-names = "tsens1_tm", "tsens1_srot"; #qcom,sensors = <8>; #thermal-sensor-cells = <1>; }; diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index f722785df26b..efd5d7abd1cd 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -1531,6 +1531,7 @@ compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; reg = <0xc263000 0x1ff>, /* TM */ <0xc222000 0x1ff>; /* SROT */ + reg-names = "tsens0_tm", "tsens0_srot"; #qcom,sensors = <13>; #thermal-sensor-cells = <1>; }; @@ -1539,6 +1540,7 @@ compatible = "qcom,sdm845-tsens", "qcom,tsens-v2"; reg = <0xc265000 0x1ff>, /* TM */ <0xc223000 0x1ff>; /* SROT */ + reg-names = "tsens1_tm", "tsens1_srot"; #qcom,sensors = <8>; #thermal-sensor-cells = <1>; }; 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Miller" , Mauro Carvalho Chehab , Greg Kroah-Hartman , Andrew Morton , Arnd Bergmann Subject: [PATCH v1 10/10] MAINTAINERS: Add entry for Qualcomm TSENS thermal drivers Date: Thu, 9 Aug 2018 18:02:42 +0530 Message-Id: <106a459af3882745e78cb9b774dcfda08a96a6dd.1533815718.git.amit.kucheria@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: In-Reply-To: References: Sender: linux-arm-msm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Create an entry for the TSENS drivers and mark them as maintained Signed-off-by: Amit Kucheria --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.17.1 -- To unsubscribe from this list: send the line "unsubscribe linux-arm-msm" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Rajendra Nayak diff --git a/MAINTAINERS b/MAINTAINERS index 68b4ff8ed205..ca6183d6d545 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11862,6 +11862,13 @@ L: linux-arm-msm@vger.kernel.org S: Maintained F: drivers/iommu/qcom_iommu.c +QUALCOMM TSENS THERMAL DRIVER +M: Amit Kucheria +L: linux-pm@vger.kernel.org +L: linux-arm-msm@vger.kernel.org +S: Maintained +F: drivers/thermal/qcom/ + QUALCOMM VENUS VIDEO ACCELERATOR DRIVER M: Stanimir Varbanov L: linux-media@vger.kernel.org