From patchwork Tue Jun 22 15:55:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 465323 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A67ECC48BDF for ; Tue, 22 Jun 2021 15:56:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 8E72761075 for ; Tue, 22 Jun 2021 15:56:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232220AbhFVP6Q (ORCPT ); Tue, 22 Jun 2021 11:58:16 -0400 Received: from out28-195.mail.aliyun.com ([115.124.28.195]:34478 "EHLO out28-195.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232084AbhFVP6P (ORCPT ); Tue, 22 Jun 2021 11:58:15 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.1995052|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_regular_dialog|0.0106988-0.000757401-0.988544; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047211; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=12; RT=12; SR=0; TI=SMTPD_---.KWKjI6A_1624377348; Received: from localhost.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.KWKjI6A_1624377348) by smtp.aliyun-inc.com(10.147.41.178); Tue, 22 Jun 2021 23:55:57 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: tsbogend@alpha.franken.de, paul@crapouillou.net, robh+dt@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sihui.liu@ingenic.com, jun.jiang@ingenic.com, sernia.zhou@foxmail.com Subject: [PATCH v2 1/3] MIPS: X1830: Respect cell count of common properties. Date: Tue, 22 Jun 2021 23:55:36 +0800 Message-Id: <1624377338-75384-2-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624377338-75384-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1624377338-75384-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org If N fields of X cells should be provided, then that's what the devicetree should represent, instead of having one single field of (N * X) cells. Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil --- Notes: v1->v2: No change. arch/mips/boot/dts/ingenic/x1830.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index b21c930..59ca3a8 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -97,9 +97,9 @@ #clock-cells = <1>; - clocks = <&cgu X1830_CLK_RTCLK - &cgu X1830_CLK_EXCLK - &cgu X1830_CLK_PCLK>; + clocks = <&cgu X1830_CLK_RTCLK>, + <&cgu X1830_CLK_EXCLK>, + <&cgu X1830_CLK_PCLK>; clock-names = "rtc", "ext", "pclk"; interrupt-controller; @@ -274,8 +274,7 @@ pdma: dma-controller@13420000 { compatible = "ingenic,x1830-dma"; - reg = <0x13420000 0x400 - 0x13421000 0x40>; + reg = <0x13420000 0x400>, <0x13421000 0x40>; #dma-cells = <2>; interrupt-parent = <&intc>; From patchwork Tue Jun 22 15:55:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Zhou Yanjie X-Patchwork-Id: 465322 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, UNPARSEABLE_RELAY, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 28334C49EA5 for ; Tue, 22 Jun 2021 15:56:03 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0D21861075 for ; Tue, 22 Jun 2021 15:56:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232321AbhFVP6R (ORCPT ); Tue, 22 Jun 2021 11:58:17 -0400 Received: from out29-147.mail.aliyun.com ([115.124.29.147]:42898 "EHLO out29-147.mail.aliyun.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232166AbhFVP6Q (ORCPT ); Tue, 22 Jun 2021 11:58:16 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.1413986|-1; CH=blue; DM=|OVERLOAD|false|; DS=CONTINUE|ham_regular_dialog|0.0113689-0.000133307-0.988498; FP=14765443853533058402|3|2|8|0|-1|-1|-1; HT=ay29a033018047213; MF=zhouyanjie@wanyeetech.com; NM=1; PH=DS; RN=12; RT=12; SR=0; TI=SMTPD_---.KWKjI6A_1624377348; Received: from localhost.localdomain(mailfrom:zhouyanjie@wanyeetech.com fp:SMTPD_---.KWKjI6A_1624377348) by smtp.aliyun-inc.com(10.147.41.178); Tue, 22 Jun 2021 23:55:58 +0800 From: =?utf-8?b?5ZGo55Cw5p2wIChaaG91IFlhbmppZSk=?= To: tsbogend@alpha.franken.de, paul@crapouillou.net, robh+dt@kernel.org Cc: linux-mips@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dongsheng.qiu@ingenic.com, aric.pzqi@ingenic.com, rick.tyliu@ingenic.com, sihui.liu@ingenic.com, jun.jiang@ingenic.com, sernia.zhou@foxmail.com Subject: [PATCH v2 2/3] MIPS: Ingenic: Add MAC syscon nodes for Ingenic SoCs. Date: Tue, 22 Jun 2021 23:55:37 +0800 Message-Id: <1624377338-75384-3-git-send-email-zhouyanjie@wanyeetech.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1624377338-75384-1-git-send-email-zhouyanjie@wanyeetech.com> References: <1624377338-75384-1-git-send-email-zhouyanjie@wanyeetech.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add MAC syscon nodes for X1000 SoC and X1830 SoC from Ingenic. Signed-off-by: 周琰杰 (Zhou Yanjie) Acked-by: Paul Cercueil --- Notes: v1->v2: No change. arch/mips/boot/dts/ingenic/x1000.dtsi | 7 +++++++ arch/mips/boot/dts/ingenic/x1830.dtsi | 7 +++++++ 2 files changed, 14 insertions(+) diff --git a/arch/mips/boot/dts/ingenic/x1000.dtsi b/arch/mips/boot/dts/ingenic/x1000.dtsi index aac9ded..dec7909 100644 --- a/arch/mips/boot/dts/ingenic/x1000.dtsi +++ b/arch/mips/boot/dts/ingenic/x1000.dtsi @@ -80,6 +80,11 @@ status = "disabled"; }; + + mac_phy_ctrl: mac-phy-ctrl@e8 { + compatible = "syscon"; + reg = <0xe8 0x4>; + }; }; ost: timer@12000000 { @@ -347,6 +352,8 @@ clocks = <&cgu X1000_CLK_MAC>; clock-names = "stmmaceth"; + mode-reg = <&mac_phy_ctrl>; + status = "disabled"; mdio: mdio { diff --git a/arch/mips/boot/dts/ingenic/x1830.dtsi b/arch/mips/boot/dts/ingenic/x1830.dtsi index 59ca3a8..215257f 100644 --- a/arch/mips/boot/dts/ingenic/x1830.dtsi +++ b/arch/mips/boot/dts/ingenic/x1830.dtsi @@ -73,6 +73,11 @@ status = "disabled"; }; + + mac_phy_ctrl: mac-phy-ctrl@e8 { + compatible = "syscon"; + reg = <0xe8 0x4>; + }; }; ost: timer@12000000 { @@ -336,6 +341,8 @@ clocks = <&cgu X1830_CLK_MAC>; clock-names = "stmmaceth"; + mode-reg = <&mac_phy_ctrl>; + status = "disabled"; mdio: mdio {