From patchwork Tue Jun 29 12:34:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 468303 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp4912033jao; Tue, 29 Jun 2021 05:34:39 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwxQV2NNfPeIrwZrU7rb6XWdj0jgMqVgM752+1dL/O3XnAL2FNRZi+Vlm9dij+esvYVutl9 X-Received: by 2002:a17:906:5d06:: with SMTP id g6mr30229693ejt.342.1624970078993; Tue, 29 Jun 2021 05:34:38 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624970078; cv=none; d=google.com; s=arc-20160816; b=wrFsJvaAfNWK42NSP24oYzOmlmiGUSfpFza0SbViNZTa98f7jb2v+3WcvAfc9dAPJ7 fNTgQCXTt4sNmedbHUL3wIE/Wb3kSJs3S3u4aXYM/3E7+Q5SKxwQH82N4Zz8TSWeBEkv Dydy5qwRMBjm4mehHD7GcMEmYL0bk24Lv8QM1oZKHnHfI1CriyO9fWnoWCzAgeEkf206 Rpuzz2NQNwqvTice1v1rUAYBN4fq+mejbVF3IxTeFKy56zgymIDHK0YZmt0HOYWnFzxo QRpLfoVe5vAwUys9qOKX7bzmkXP5dsRcn0VYPdkuFRZ7eupINsA3UNKiW1QOC+GV/sQJ HUZw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=v9DYlWSWic1b68MEKNTSvKWtqRdyWA1mD3gX3M18m2w=; b=oV2Q2UAP4c6WetLpwcDqRyBkvqjx3Dl7BWYljLNHhXPG/ow2QfeqRLKnVdrnAq2Mfh G5MvHX5kUjgBoXu+qm0Veb3qHE8EdTTpvKgrIl6mlZ8lkHS7g8BlfXOHWdwcHM/kjnjR 7roE250z7aiSvv5sWUW5yQRnfT6hGVgOCNDcXgwILCL6lQY7rMYmvRq4OZof7atjA63p DY03JfMWBOkQRtAInwEggKBeH1bn/Ri+tMSE4piOq1BnkJI7F+1mwyH5hbXQwHuKxJtg sM4snSMLcLt2Qqb6dwsyKt/Ar96joH6FU3SOg0cOlEqTn5BOJeIgDzBOx6B5NPAcrh2L jFuw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LFiFoi13; spf=pass (google.com: domain of linux-gpio-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id g18si17568759eds.64.2021.06.29.05.34.38; Tue, 29 Jun 2021 05:34:38 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-gpio-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LFiFoi13; spf=pass (google.com: domain of linux-gpio-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233657AbhF2MhF (ORCPT + 3 others); Tue, 29 Jun 2021 08:37:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233721AbhF2MhB (ORCPT ); Tue, 29 Jun 2021 08:37:01 -0400 Received: from mail-pg1-x530.google.com (mail-pg1-x530.google.com [IPv6:2607:f8b0:4864:20::530]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D4E3FC061787 for ; Tue, 29 Jun 2021 05:34:33 -0700 (PDT) Received: by mail-pg1-x530.google.com with SMTP id 80so2606130pgg.10 for ; Tue, 29 Jun 2021 05:34:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v9DYlWSWic1b68MEKNTSvKWtqRdyWA1mD3gX3M18m2w=; b=LFiFoi136IysUwzZESYIY+zVaVM3jxao0XpXOZ66W2JxOhTUXRobwI0mZG9B8ntBon fsO4+FESgF9+LibMYGpX1XnDMsd/zWHfcyds+jrpoYAe7L8jhOenS/Fm0sOAHIsNhqyQ HjyKGyfZyemtUCNoHSmeccWNX4+7fuxiT9z43znracKHan76oVexnuuRI8U/InxONGgQ 4ypG6/998bPtjWoFWbo0gmcziQjdmyrEo+KIhcVkevs1RnCi+Fc9jriHGfPw50MEp6l0 7MEX3VXs5uNbSvI8oXX4VAr00dUmzwmzyQLH8whjcQA9SACnkSZ5mvBmwbYCxsrSOibd p1IQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v9DYlWSWic1b68MEKNTSvKWtqRdyWA1mD3gX3M18m2w=; b=F3Ms8lLfbM9Ctyp1glGGrNNzIKsENZk2tECBhUWtfwVqmjIzHUc1BH8M5TguJcW1gO f0pTfeWDp8fJ3rPDOQ95QK5LL+30bVYpPvQr7LN0RQmm9bjvC9MJ0EQOIwhSOBVau+X0 CE1GzSu9WHyq3G39JNhpzmMRKi46C9EZRwmg2GzN0ICMaMe+2iiH3DakLqteEjhXDTiq aYnLAKzHSGIFv27JoTDMOJ+v00az0Fw12fpWDuRjtRUVeXr9CFpEmPc0Rzo6cd4PWqmD QgdKB9VfePMz0DQz9A2DrKKfyrpmTyls4zqhsUliZi/3F2U2RmeSlTzIg5qbSFmc/xDA U6dQ== X-Gm-Message-State: AOAM530zuo3yorWDRLNyxf4VivoLfpEZIC93eiZ2B0AFjp1Z71c7DGzu lSoPWthLq+UBT32zPOch1RXEpg== X-Received: by 2002:a63:f65:: with SMTP id 37mr17583270pgp.367.1624970073332; Tue, 29 Jun 2021 05:34:33 -0700 (PDT) Received: from localhost.name ([182.69.252.226]) by smtp.gmail.com with ESMTPSA id 143sm16176692pfx.46.2021.06.29.05.34.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 29 Jun 2021 05:34:32 -0700 (PDT) From: Bhupesh Sharma To: linux-arm-msm@vger.kernel.org Cc: bhupesh.sharma@linaro.org, bhupesh.linux@gmail.com, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, lgirdwood@gmail.com, robh+dt@kernel.org, Linus Walleij , Bjorn Andersson , Rob Herring Subject: [PATCH v4 1/4] dt-bindings: pinctrl: qcom, pmic-gpio: Arrange compatibles alphabetically Date: Tue, 29 Jun 2021 18:04:04 +0530 Message-Id: <20210629123407.82561-2-bhupesh.sharma@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210629123407.82561-1-bhupesh.sharma@linaro.org> References: <20210629123407.82561-1-bhupesh.sharma@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Arrange the compatibles inside qcom-pmic gpio device tree bindings alphabetically. While at it, also make some minor cosmetic changes to allow future compatible addition to the bindings simpler. Cc: Linus Walleij Cc: Bjorn Andersson Reviewed-by: Bjorn Andersson Acked-by: Rob Herring Signed-off-by: Bhupesh Sharma --- .../bindings/pinctrl/qcom,pmic-gpio.txt | 62 +++++++++---------- 1 file changed, 31 insertions(+), 31 deletions(-) -- 2.31.1 diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt index 161216daf463..c9f02062774a 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt +++ b/Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt @@ -7,10 +7,21 @@ PMIC's from Qualcomm. Usage: required Value type: Definition: must be one of: + "qcom,pm660-gpio" + "qcom,pm660l-gpio" + "qcom,pm6150-gpio" + "qcom,pm6150l-gpio" + "qcom,pm7325-gpio" "qcom,pm8005-gpio" + "qcom,pm8008-gpio" "qcom,pm8018-gpio" "qcom,pm8038-gpio" "qcom,pm8058-gpio" + "qcom,pm8150-gpio" + "qcom,pm8150b-gpio" + "qcom,pm8350-gpio" + "qcom,pm8350b-gpio" + "qcom,pm8350c-gpio" "qcom,pm8916-gpio" "qcom,pm8917-gpio" "qcom,pm8921-gpio" @@ -22,21 +33,10 @@ PMIC's from Qualcomm. "qcom,pmi8950-gpio" "qcom,pmi8994-gpio" "qcom,pmi8998-gpio" - "qcom,pms405-gpio" - "qcom,pm660-gpio" - "qcom,pm660l-gpio" - "qcom,pm8150-gpio" - "qcom,pm8150b-gpio" - "qcom,pm8350-gpio" - "qcom,pm8350b-gpio" - "qcom,pm8350c-gpio" "qcom,pmk8350-gpio" - "qcom,pm7325-gpio" "qcom,pmr735a-gpio" "qcom,pmr735b-gpio" - "qcom,pm6150-gpio" - "qcom,pm6150l-gpio" - "qcom,pm8008-gpio" + "qcom,pms405-gpio" "qcom,pmx55-gpio" And must contain either "qcom,spmi-gpio" or "qcom,ssbi-gpio" @@ -98,35 +98,35 @@ to specify in a pin configuration subnode: Value type: Definition: List of gpio pins affected by the properties specified in this subnode. Valid pins are: - gpio1-gpio4 for pm8005 - gpio1-gpio6 for pm8018 + gpio1-gpio10 for pm6150 + gpio1-gpio12 for pm6150l + gpio1-gpio10 for pm7325 + gpio1-gpio4 for pm8005 + gpio1-gpio2 for pm8008 + gpio1-gpio6 for pm8018 gpio1-gpio12 for pm8038 gpio1-gpio40 for pm8058 - gpio1-gpio4 for pm8916 + gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 + and gpio8) + gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) + gpio1-gpio12 for pm8150l (hole on gpio7) + gpio1-gpio10 for pm8350 + gpio1-gpio8 for pm8350b + gpio1-gpio9 for pm8350c + gpio1-gpio4 for pm8916 gpio1-gpio38 for pm8917 gpio1-gpio44 for pm8921 gpio1-gpio36 for pm8941 - gpio1-gpio8 for pm8950 (hole on gpio3) + gpio1-gpio8 for pm8950 (hole on gpio3) gpio1-gpio22 for pm8994 gpio1-gpio26 for pm8998 gpio1-gpio22 for pma8084 - gpio1-gpio2 for pmi8950 + gpio1-gpio2 for pmi8950 gpio1-gpio10 for pmi8994 + gpio1-gpio4 for pmk8350 + gpio1-gpio4 for pmr735a + gpio1-gpio4 for pmr735b gpio1-gpio12 for pms405 (holes on gpio1, gpio9 and gpio10) - gpio1-gpio10 for pm8150 (holes on gpio2, gpio5, gpio7 - and gpio8) - gpio1-gpio12 for pm8150b (holes on gpio3, gpio4, gpio7) - gpio1-gpio12 for pm8150l (hole on gpio7) - gpio1-gpio10 for pm8350 - gpio1-gpio8 for pm8350b - gpio1-gpio9 for pm8350c - gpio1-gpio4 for pmk8350 - gpio1-gpio10 for pm7325 - gpio1-gpio4 for pmr735a - gpio1-gpio4 for pmr735b - gpio1-gpio10 for pm6150 - gpio1-gpio12 for pm6150l - gpio1-gpio2 for pm8008 gpio1-gpio11 for pmx55 (holes on gpio3, gpio7, gpio10 and gpio11) From patchwork Tue Jun 29 12:34:06 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bhupesh Sharma X-Patchwork-Id: 468305 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp4912132jao; Tue, 29 Jun 2021 05:34:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzI5Vi+6CNQ924e9oYVIcNEtH1YXPSdm5bmrFpWNh8l44oRCvjsLyGzASOVbntEFGUp+2Cp X-Received: by 2002:aa7:c88c:: with SMTP id p12mr39948678eds.244.1624970086369; Tue, 29 Jun 2021 05:34:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1624970086; cv=none; d=google.com; s=arc-20160816; b=A5OYa22+rD42v1XWpS8mdvI7155sYmK/CjS/Yo1nqcbMardFoDgsfRR+xgBmVCZTvR j+fS+DA14mdbDW+qjZnozOsARXnNu8COM5jUidvc2gbAUR9mZnuCApjzbkv0ZQZVWxkF FxT1zF8eUtwGdLgcA1opOgZOm/t9yQsla72tVbsekU9upf6v3asVVBmj9NkJG9U5TM9t Hiuwuxa14crUUctiQzw27/X3Yw8JpeSovpDJH/X47ZvS5pf/eN6cCUbUHcjFQLBFUeP9 tL8IGfOk9IXb40kZ21ZScvNwd3gi56tECd36kIcQc+c1x2k//2L4be6hID89ll/x28zP wcxQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=TPXbvy+pe/ZgHSulNWzsbEUPTKXE98FkKXq40hDTOqc=; b=uea0qQgzOFsEvcjRR9yu/k4bjMepRYX3CmR4URPi7Mj+x0LUvThDDFCCFWUE29aCpy jj85AMaFCc0Tzgd4LFxqk/HH1JVuedGAxtMatvJgG7WS4dxGyOZ+r9AhXQ9Zc3zKad26 rB/FQocWz9OVN/5Dqv+foZmxmFhZ5Xqi5Lm4nCLuuTRjZK7xwyqwGMvYZnP3FGJxjeL5 4XusBybPBZDJbRKItV3yD31dFhrRaYaeo0VZTIO4MNGXos5/IuAaBIC3HUY8bi7EaxCW 9JMuWBZ7CZ/CJBWkjkW0mX4bC7eUZVKxMLgnsSK/a8vyWlSdWqEzfKsq7HHpps4KZaSe Fsmw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DE2nlgn+; spf=pass (google.com: domain of linux-gpio-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-gpio-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Cc: Linus Walleij Cc: Bjorn Andersson Reviewed-by: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 34 ++++++++++++------------ 1 file changed, 17 insertions(+), 17 deletions(-) -- 2.31.1 diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index a89d24a040af..5246ea09c295 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1104,23 +1104,15 @@ static int pmic_gpio_remove(struct platform_device *pdev) } static const struct of_device_id pmic_gpio_of_match[] = { - { .compatible = "qcom,pm8005-gpio", .data = (void *) 4 }, - { .compatible = "qcom,pm8916-gpio", .data = (void *) 4 }, - { .compatible = "qcom,pm8941-gpio", .data = (void *) 36 }, - /* pm8950 has 8 GPIOs with holes on 3 */ - { .compatible = "qcom,pm8950-gpio", .data = (void *) 8 }, - { .compatible = "qcom,pmi8950-gpio", .data = (void *) 2 }, - { .compatible = "qcom,pm8994-gpio", .data = (void *) 22 }, - { .compatible = "qcom,pmi8994-gpio", .data = (void *) 10 }, - { .compatible = "qcom,pm8998-gpio", .data = (void *) 26 }, - { .compatible = "qcom,pmi8998-gpio", .data = (void *) 14 }, - { .compatible = "qcom,pma8084-gpio", .data = (void *) 22 }, - /* pms405 has 12 GPIOs with holes on 1, 9, and 10 */ - { .compatible = "qcom,pms405-gpio", .data = (void *) 12 }, /* pm660 has 13 GPIOs with holes on 1, 5, 6, 7, 8 and 10 */ { .compatible = "qcom,pm660-gpio", .data = (void *) 13 }, /* pm660l has 12 GPIOs with holes on 1, 2, 10, 11 and 12 */ { .compatible = "qcom,pm660l-gpio", .data = (void *) 12 }, + { .compatible = "qcom,pm6150-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pm6150l-gpio", .data = (void *) 12 }, + { .compatible = "qcom,pm7325-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pm8005-gpio", .data = (void *) 4 }, + { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 }, /* pm8150 has 10 GPIOs with holes on 2, 5, 7 and 8 */ { .compatible = "qcom,pm8150-gpio", .data = (void *) 10 }, /* pm8150b has 12 GPIOs with holes on 3, r and 7 */ @@ -1130,13 +1122,21 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pm8350-gpio", .data = (void *) 10 }, { .compatible = "qcom,pm8350b-gpio", .data = (void *) 8 }, { .compatible = "qcom,pm8350c-gpio", .data = (void *) 9 }, + { .compatible = "qcom,pm8916-gpio", .data = (void *) 4 }, + { .compatible = "qcom,pm8941-gpio", .data = (void *) 36 }, + /* pm8950 has 8 GPIOs with holes on 3 */ + { .compatible = "qcom,pm8950-gpio", .data = (void *) 8 }, + { .compatible = "qcom,pm8994-gpio", .data = (void *) 22 }, + { .compatible = "qcom,pm8998-gpio", .data = (void *) 26 }, + { .compatible = "qcom,pma8084-gpio", .data = (void *) 22 }, + { .compatible = "qcom,pmi8950-gpio", .data = (void *) 2 }, + { .compatible = "qcom,pmi8994-gpio", .data = (void *) 10 }, + { .compatible = "qcom,pmi8998-gpio", .data = (void *) 14 }, { .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 }, - { .compatible = "qcom,pm7325-gpio", .data = (void *) 10 }, { .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 }, { .compatible = "qcom,pmr735b-gpio", .data = (void *) 4 }, - { .compatible = "qcom,pm6150-gpio", .data = (void *) 10 }, - { .compatible = "qcom,pm6150l-gpio", .data = (void *) 12 }, - { .compatible = "qcom,pm8008-gpio", .data = (void *) 2 }, + /* pms405 has 12 GPIOs with holes on 1, 9, and 10 */ + { .compatible = "qcom,pms405-gpio", .data = (void *) 12 }, /* pmx55 has 11 GPIOs with holes on 3, 7, 10, 11 */ { .compatible = "qcom,pmx55-gpio", .data = (void *) 11 }, { }, From patchwork Tue Jun 29 12:34:07 2021 Content-Type: text/plain; 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Add support for the same in the pinctrl driver. Cc: Linus Walleij Cc: Bjorn Andersson Reviewed-by: Bjorn Andersson Signed-off-by: Bhupesh Sharma --- drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 1 + 1 file changed, 1 insertion(+) -- 2.31.1 diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c index 5246ea09c295..bbea3499178e 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-gpio.c @@ -1133,6 +1133,7 @@ static const struct of_device_id pmic_gpio_of_match[] = { { .compatible = "qcom,pmi8994-gpio", .data = (void *) 10 }, { .compatible = "qcom,pmi8998-gpio", .data = (void *) 14 }, { .compatible = "qcom,pmk8350-gpio", .data = (void *) 4 }, + { .compatible = "qcom,pmm8155au-gpio", .data = (void *) 10 }, { .compatible = "qcom,pmr735a-gpio", .data = (void *) 4 }, { .compatible = "qcom,pmr735b-gpio", .data = (void *) 4 }, /* pms405 has 12 GPIOs with holes on 1, 9, and 10 */