From patchwork Tue Jul 13 06:58:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 474623 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp3685982jao; Tue, 13 Jul 2021 00:05:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwP/54ptyb4QKwGeUnwcWH73GOBDMqUAL4NGvCZGGUFypu4E3xj+iXmFoRRthHzbeEyPVTF X-Received: by 2002:ab0:63d1:: with SMTP id i17mr4066963uap.86.1626159933079; Tue, 13 Jul 2021 00:05:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626159933; cv=none; d=google.com; s=arc-20160816; b=CfkrIq0tPDRpe3m1nUoyOnUgKjizOX0VtQ5Mq5UWgnV50PLshcy8ATcOUjaVX1ILgl eR5J9LNQz5sF96usDWcQcf/DA7Dm252TJZ6t8obbttbpDXdJARLFRjNgn8+2FOdNf1vo e3DPWtOVRiZiop36aqanXgWolgL4bniLQ0fRXbCHl6fTxg+Yj8OGtxwqZoriehyINO+o +8TTvwVHKLvHB2EMJFYUSy6KLUd/XbZePpzOdtCjD0KX0HIrs9vpit8xDl14s1R06WKq V2Ik7zK9rOBdMtxKGJNjrRChUlgGSDrvFdCcGsNI/7KY/wxiciHCpmgQVXD+Nsw3r10H PfiA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=FOpxG9RrKHY0yrQ3ismxAW7bzM0rSsenlPHhQrZoPm4=; b=C/CX8iTzVGoIPXgHrTJNRYlSCo+VUxjI3cKF9E4E5RFRb0Ly74Up+KukrTstj9V+ay A6UUDotVsOr2Wk+oPVJKKilV/Mzhu47Sc6FTZ0mtpYOnRMc7Sw6zbLcBcLommegK8xMQ WhRaP9mtfOCc/dMbn6YlZwjNOifhenixQrxvsbcHw9q2vpgOBQJ8Nq2Cq1+3kJyGhcuE AR1J6cUmt3S0CMOPNZTK8FqtgkpsRymZ6a9l3k++fyzZ4NKbEBNFkbRX5CxcZMfkXOmk FDYoVZIq4W2eAvkX8/fQ+JhcP2WkJzS8VA9yykA/EX3GiscU23qyaZ9sHngeby2USbtj JdRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=S3ZwygLO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id z15si16988527vse.100.2021.07.13.00.05.33 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 13 Jul 2021 00:05:33 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=S3ZwygLO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:55734 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m3CU0-0001di-Cs for patch@linaro.org; Tue, 13 Jul 2021 03:05:32 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53228) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m3CNr-0006mC-2Y; Tue, 13 Jul 2021 02:59:11 -0400 Received: from mail-pf1-x435.google.com ([2607:f8b0:4864:20::435]:44746) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m3CNp-0001xl-J2; Tue, 13 Jul 2021 02:59:10 -0400 Received: by mail-pf1-x435.google.com with SMTP id p36so8965544pfw.11; Mon, 12 Jul 2021 23:59:08 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=FOpxG9RrKHY0yrQ3ismxAW7bzM0rSsenlPHhQrZoPm4=; b=S3ZwygLOpxOYJWkF5sRTV9OG8AchIIsoWjSFOHbRHj/PzULXL+a7zNka7j3gsDfCHk NmhtOAk1cRlR8EnORAg9LqjHdDOgQc13kEK13jSx44g8LtHvLD6aY3XNkCPjOMMYe792 qIvXoyZWjUbWUYl0Iee+vDEmfAfrK3VskZtg281INFus3VgX9b9flF/UjVUdu4uSLz9r rhtJx0TwK0zJH7WP01sZZOT1OkjaLlsHgbOW2amlen5MYhBp90fgWak1mVo9WljHusFF VEgK7jp71MSyCwIdffAmM6FyuxHVy7L/aLC4AvMpXWUAkWvGPVPbHsOhdIFsMFOFPs1G N2DQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=FOpxG9RrKHY0yrQ3ismxAW7bzM0rSsenlPHhQrZoPm4=; b=R0A495GiCQwiv6aqsE0vT4A8pG5gwr0IL7dIX3cIjqsVXs9tgo7UkioaC98nrmpdtq E4MVXSvaf7Pb0JSv3heX1L3ScoMBzwsMaN719kkmhNd3gZ0zsa91FzEFh1yad8qUT+SR 9k8CKUoIlNHaYUCcKaUcvgQc/o2XLpt5cgMa97JoI7pMmtdpAwy8+2oucYYHIyqHozYA Zg44iju7CtHDLKIP+V/WFYtoN2Nwz6KOPazB3QnO4KGlHlcrJiiyTiBBWMBUNhHTy0Xy GyFN/CAfPujojYjk0g8XdKp2fwM72dVbsuCRCG7EhJB9dJY7RjuSpSGi+l/XV+W3u5S1 aPDg== X-Gm-Message-State: AOAM5337HJhD+yu4Ugp5svxEMjVgzE4gBz3eerVYTpndbavZgwXYjDym OL1ZmKvvQ7mMOdxL0EVTUAo= X-Received: by 2002:a63:171e:: with SMTP id x30mr3035285pgl.368.1626159547939; Mon, 12 Jul 2021 23:59:07 -0700 (PDT) Received: from localhost.localdomain ([45.124.203.14]) by smtp.gmail.com with ESMTPSA id o184sm20334846pga.18.2021.07.12.23.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jul 2021 23:59:06 -0700 (PDT) From: Joel Stanley To: =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PATCH v2 1/3] hw: aspeed_gpio: Fix memory size Date: Tue, 13 Jul 2021 16:28:52 +0930 Message-Id: <20210713065854.134634-2-joel@jms.id.au> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210713065854.134634-1-joel@jms.id.au> References: <20210713065854.134634-1-joel@jms.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::435; envelope-from=joel.stan@gmail.com; helo=mail-pf1-x435.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , Rashmica Gupta , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The macro used to calculate the maximum memory size of the MMIO region had a mistake, causing all GPIO models to create a mapping of 0x9D8. The intent was to have it be 0x9D8 - 0x800. This extra size doesn't matter on ast2400 and ast2500, which have a 4KB region set aside for the GPIO controller. On the ast2600 the 3.3V and 1.8V GPIO controllers are 2KB apart, so the regions would overlap. Worse was the 1.8V controller would map over the top of the following perianal, which happens to be the RTC. The mmio region used by each device is a maximum of 2KB, so avoid the calculations and hard code this as the maximum. Fixes: 36d737ee82b2 ("hw/gpio: Add in AST2600 specific implementation") Signed-off-by: Joel Stanley --- hw/gpio/aspeed_gpio.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.32.0 Reviewed-by: Rashmica Gupta Reviewed-by: Cédric Le Goater diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c index 6ae0116be70b..b3dec4448009 100644 --- a/hw/gpio/aspeed_gpio.c +++ b/hw/gpio/aspeed_gpio.c @@ -207,7 +207,6 @@ #define GPIO_1_8V_MEM_SIZE 0x9D8 #define GPIO_1_8V_REG_ARRAY_SIZE ((GPIO_1_8V_MEM_SIZE - \ GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_MAX_MEM_SIZE MAX(GPIO_3_6V_MEM_SIZE, GPIO_1_8V_MEM_SIZE) static int aspeed_evaluate_irq(GPIOSets *regs, int gpio_prev_high, int gpio) { @@ -849,7 +848,7 @@ static void aspeed_gpio_realize(DeviceState *dev, Error **errp) } memory_region_init_io(&s->iomem, OBJECT(s), &aspeed_gpio_ops, s, - TYPE_ASPEED_GPIO, GPIO_MAX_MEM_SIZE); + TYPE_ASPEED_GPIO, 0x800); sysbus_init_mmio(sbd, &s->iomem); } From patchwork Tue Jul 13 06:58:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Joel Stanley X-Patchwork-Id: 474625 Delivered-To: patch@linaro.org Received: by 2002:a02:c94a:0:0:0:0:0 with SMTP id u10csp3688949jao; Tue, 13 Jul 2021 00:09:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx9PTZN8uIDn8AsUjK7o3nLaQkO6z+jaTllVIU5H03XrhTkH9sShUb9EGjZ3b4ib+6CYwCE X-Received: by 2002:a67:eb18:: with SMTP id a24mr4386621vso.60.1626160184804; Tue, 13 Jul 2021 00:09:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1626160184; cv=none; d=google.com; s=arc-20160816; b=udmMU1Qk+P5ksk5PgL63EkNXc6LEix123sAXxTl2skNAtSp8sKWcstOlrZxHy4pnre iMtFJ39vuI/V7NcmZx/Pf/ua6iLU58o9ipJLpWZuHggry3XhxvA5GWvby3oPkfPP2tUf JtvYOq7Yxf00c7sDMR8XckTGysAOHkobsgr/DkWf0t2XlPBYs+9ZgDeFniLou2lYr5rH +tE5f5frtO+qQcGZ+ZSgsSXXK04cbkfvj6AlO/8FL+Y25DyUIRrFIdIfG2/8YoB+CfGA 6ci02edz2QGdnvuBy0OGgh/IQD0QNvfbdw80aOrw9PamGTSNyzys+1r0gNPN9ibxy7u2 ycpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=DH5GouSa0wDf1nMy2lbp70CqrASM0E4BZI5IceUTT9M=; b=PnmhvDaPDBZM/BtAn4ANEy5t7zFKfGyAWPXC43BmfptzsvFp1dnJQpAkBe3jjnYhes B5K7E9w2MBMzj2l6Y/Y3rowJ2OCsN3OVHS4Y5JgjZS52libNJuU5zhHgjLDnEQ/SOarf Hq7DVMFT61RFzeNRgR7CmsU2oE7bE2kLNOCChTtjd/ARI00TqG1f+Nx7ocBjOYHrhQX1 CO50RaOn8tq6XHCCSNH+QaST12VZhJXf7Q6n54zzl5yISec2QExrNg/bQVgOfcHiHAX7 60eHsYsJsBjlL9c8fBP1uoDUnSzVtcDuVTMYscVZfSzLpBdCIgNuEVPUO5FCTfR4zUDy 6pbA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=t5JyR7dB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Return-Path: Received: from lists.gnu.org (lists.gnu.org. [209.51.188.17]) by mx.google.com with ESMTPS id h26si4722074vsj.190.2021.07.13.00.09.44 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 13 Jul 2021 00:09:44 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=t5JyR7dB; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:60754 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m3CY4-0005BY-31 for patch@linaro.org; Tue, 13 Jul 2021 03:09:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53252) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m3CNu-0006w0-Sa; Tue, 13 Jul 2021 02:59:14 -0400 Received: from mail-pf1-x42d.google.com ([2607:f8b0:4864:20::42d]:37636) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m3CNt-0001zu-0A; Tue, 13 Jul 2021 02:59:14 -0400 Received: by mail-pf1-x42d.google.com with SMTP id 17so18708347pfz.4; Mon, 12 Jul 2021 23:59:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DH5GouSa0wDf1nMy2lbp70CqrASM0E4BZI5IceUTT9M=; b=t5JyR7dBBz/+4qeOunLPyRFUhW3ASEHBwC6uYfYbUO/3Q6/N1KlzKWBQbPoEYXhGVL 0vQ+CN4V23USLEgAL9nukBLw1/wKJad+W0gbSKTHB8MggaI6CiySWz23OTsdW9medG1T n9I3QVSy03guUr7twp7ITDBXl6YOX2/KpWIJdut0or2/NrNZQHir5qsHtlVGE5uFo64i DZ7yXMdUtDdu8ApA15s87a/uVrZbshoXtPDuYVO9LrhEFTp4IOeKbMYV2fq86EF26bts FyOMac7w9rZwERR3OM3b5xmjuqiR9wpBSBIDOSIirbdg5DS6ZVhNv80iTQWnyPW6EHLF 77UQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=DH5GouSa0wDf1nMy2lbp70CqrASM0E4BZI5IceUTT9M=; b=NlDQUlxiIlHhIjcK+Gmvxpr0PjeV5oMXfiycDk5QqZHHBEvdIVTTnyBlFxKe4bKQqU Fx2YupThRSVD9n8UDLMA1bylbls6HtlncmP8MKc9rekiAHTLbxWU0nojfvuJD7H4Ph6l z+MNC/rUoQumm6/s8V7x9Tb/fKDHA5+HjXtgal6ayIfA/X5cXEg+idWVElZLzBq1V2OC H9XiL0KhxzQbyyBQt2QFqSIpCyQFXWmCskHL0O7TB3EzyARjP43sjWAjiDvaICpgqorT S4XfWLMVfhPp8QNLnFiEvuXq8xpILhKce/WB1zDLr4Dxk9gN9w8Fw8b8HoVxxtda4yPg 23pw== X-Gm-Message-State: AOAM532xkLvswuZakri60oAtE+VFWlKFfBFmcC5unbsILtTMDza+O49S 0Ai7uG5bBxMPSK9t2QD2UBk= X-Received: by 2002:a63:5cb:: with SMTP id 194mr2942908pgf.146.1626159551232; Mon, 12 Jul 2021 23:59:11 -0700 (PDT) Received: from localhost.localdomain ([45.124.203.14]) by smtp.gmail.com with ESMTPSA id o184sm20334846pga.18.2021.07.12.23.59.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jul 2021 23:59:10 -0700 (PDT) From: Joel Stanley To: =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PATCH v2 2/3] hw: aspeed_gpio: Simplify 1.8V defines Date: Tue, 13 Jul 2021 16:28:53 +0930 Message-Id: <20210713065854.134634-3-joel@jms.id.au> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210713065854.134634-1-joel@jms.id.au> References: <20210713065854.134634-1-joel@jms.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::42d; envelope-from=joel.stan@gmail.com; helo=mail-pf1-x42d.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , Rashmica Gupta , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There's no need to define the registers relative to the 0x800 offset where the controller is mapped, as the device is instantiated as it's own model at the correct memory address. Simplify the defines and remove the offset to save future confusion. Signed-off-by: Joel Stanley --- hw/gpio/aspeed_gpio.c | 73 +++++++++++++++++++++---------------------- 1 file changed, 36 insertions(+), 37 deletions(-) -- 2.32.0 Reviewed-by: Rashmica Gupta Reviewed-by: Cédric Le Goater Reviewed-by: Philippe Mathieu-Daudé diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c index b3dec4448009..dc721aec5da7 100644 --- a/hw/gpio/aspeed_gpio.c +++ b/hw/gpio/aspeed_gpio.c @@ -169,44 +169,43 @@ /* AST2600 only - 1.8V gpios */ /* - * The AST2600 has same 3.6V gpios as the AST2400 (memory offsets 0x0-0x198) - * and additional 1.8V gpios (memory offsets 0x800-0x9D4). + * The AST2600 two copies of the GPIO controller: the same 3.6V gpios as the + * AST2400 (memory offsets 0x0-0x198) and a second controller with 1.8V gpios + * (memory offsets 0x800-0x9D4). */ -#define GPIO_1_8V_REG_OFFSET 0x800 -#define GPIO_1_8V_ABCD_DATA_VALUE ((0x800 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_DIRECTION ((0x804 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_INT_ENABLE ((0x808 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_INT_SENS_0 ((0x80C - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_INT_SENS_1 ((0x810 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_INT_SENS_2 ((0x814 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_INT_STATUS ((0x818 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_RESET_TOLERANT ((0x81C - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_DATA_VALUE ((0x820 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_DIRECTION ((0x824 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_INT_ENABLE ((0x828 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_INT_SENS_0 ((0x82C - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_INT_SENS_1 ((0x830 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_INT_SENS_2 ((0x834 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_INT_STATUS ((0x838 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_RESET_TOLERANT ((0x83C - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_DEBOUNCE_1 ((0x840 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_DEBOUNCE_2 ((0x844 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_DEBOUNCE_1 ((0x848 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_DEBOUNCE_2 ((0x84C - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_DEBOUNCE_TIME_1 ((0x850 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_DEBOUNCE_TIME_2 ((0x854 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_DEBOUNCE_TIME_3 ((0x858 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_COMMAND_SRC_0 ((0x860 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_COMMAND_SRC_1 ((0x864 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_COMMAND_SRC_0 ((0x868 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_COMMAND_SRC_1 ((0x86C - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_DATA_READ ((0x8C0 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_DATA_READ ((0x8C4 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_ABCD_INPUT_MASK ((0x9D0 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_E_INPUT_MASK ((0x9D4 - GPIO_1_8V_REG_OFFSET) >> 2) -#define GPIO_1_8V_MEM_SIZE 0x9D8 -#define GPIO_1_8V_REG_ARRAY_SIZE ((GPIO_1_8V_MEM_SIZE - \ - GPIO_1_8V_REG_OFFSET) >> 2) +#define GPIO_1_8V_ABCD_DATA_VALUE (0x000 >> 2) +#define GPIO_1_8V_ABCD_DIRECTION (0x004 >> 2) +#define GPIO_1_8V_ABCD_INT_ENABLE (0x008 >> 2) +#define GPIO_1_8V_ABCD_INT_SENS_0 (0x00C >> 2) +#define GPIO_1_8V_ABCD_INT_SENS_1 (0x010 >> 2) +#define GPIO_1_8V_ABCD_INT_SENS_2 (0x014 >> 2) +#define GPIO_1_8V_ABCD_INT_STATUS (0x018 >> 2) +#define GPIO_1_8V_ABCD_RESET_TOLERANT (0x01C >> 2) +#define GPIO_1_8V_E_DATA_VALUE (0x020 >> 2) +#define GPIO_1_8V_E_DIRECTION (0x024 >> 2) +#define GPIO_1_8V_E_INT_ENABLE (0x028 >> 2) +#define GPIO_1_8V_E_INT_SENS_0 (0x02C >> 2) +#define GPIO_1_8V_E_INT_SENS_1 (0x030 >> 2) +#define GPIO_1_8V_E_INT_SENS_2 (0x034 >> 2) +#define GPIO_1_8V_E_INT_STATUS (0x038 >> 2) +#define GPIO_1_8V_E_RESET_TOLERANT (0x03C >> 2) +#define GPIO_1_8V_ABCD_DEBOUNCE_1 (0x040 >> 2) +#define GPIO_1_8V_ABCD_DEBOUNCE_2 (0x044 >> 2) +#define GPIO_1_8V_E_DEBOUNCE_1 (0x048 >> 2) +#define GPIO_1_8V_E_DEBOUNCE_2 (0x04C >> 2) +#define GPIO_1_8V_DEBOUNCE_TIME_1 (0x050 >> 2) +#define GPIO_1_8V_DEBOUNCE_TIME_2 (0x054 >> 2) +#define GPIO_1_8V_DEBOUNCE_TIME_3 (0x058 >> 2) +#define GPIO_1_8V_ABCD_COMMAND_SRC_0 (0x060 >> 2) +#define GPIO_1_8V_ABCD_COMMAND_SRC_1 (0x064 >> 2) +#define GPIO_1_8V_E_COMMAND_SRC_0 (0x068 >> 2) +#define GPIO_1_8V_E_COMMAND_SRC_1 (0x06C >> 2) +#define GPIO_1_8V_ABCD_DATA_READ (0x0C0 >> 2) +#define GPIO_1_8V_E_DATA_READ (0x0C4 >> 2) +#define GPIO_1_8V_ABCD_INPUT_MASK (0x1D0 >> 2) +#define GPIO_1_8V_E_INPUT_MASK (0x1D4 >> 2) +#define GPIO_1_8V_MEM_SIZE 0x1D8 +#define GPIO_1_8V_REG_ARRAY_SIZE (GPIO_1_8V_MEM_SIZE >> 2) static int aspeed_evaluate_irq(GPIOSets *regs, int gpio_prev_high, int gpio) { From patchwork Tue Jul 13 06:58:54 2021 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id v1si17368492vse.103.2021.07.13.00.06.52 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 13 Jul 2021 00:06:52 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@gmail.com header.s=20161025 header.b=jlVJQYOV; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org" Received: from localhost ([::1]:58438 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1m3CVH-0003Zc-Ty for patch@linaro.org; Tue, 13 Jul 2021 03:06:52 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:53284) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1m3CNy-00076t-HI; Tue, 13 Jul 2021 02:59:18 -0400 Received: from mail-pg1-x529.google.com ([2607:f8b0:4864:20::529]:46000) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1m3CNw-000227-BX; Tue, 13 Jul 2021 02:59:18 -0400 Received: by mail-pg1-x529.google.com with SMTP id y17so20754935pgf.12; Mon, 12 Jul 2021 23:59:15 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jXr0oYdxuCPhHpRyN6xru8psZhpSihWPYHRi9fijk8M=; b=jlVJQYOVvbWP7le3mhf/a7ofMoKCi1W+H7AZEnKTCGgyWpf9PuDWlqQ0a6VMOAUmk3 b/CgX/eUNjZkMIWhJNNms28r6DGtVjUR4AByPf4BfauA4EqdmTcJhhHWzVK/NMpc7uVs nEBEWC79oeeicaxnwg7Q1S2m9J5ESeXc2F8lVLdedf8YRosjITDey5WWLvVcq2mR1FX6 jR8indKOp8qhaxyIU40I9qVzv19pwPHWxm9y4m5Rr9eqa5x9qoVfbJtu7iAiQwj+f4Nz NVOXEf5vFDBndrvH5LFHl5Z9nBuyg9syzmg1ZuHptn6R6C4sFd07L7DN+uyI8nZG0Bh8 QeBg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=jXr0oYdxuCPhHpRyN6xru8psZhpSihWPYHRi9fijk8M=; b=PCYoLBBNzhRzcMvEnKNnre3N7twW1jW3k9B/hOQUUbr5VfujwhqZCV4HthPi37eQ5B VIyzDNNFjSWAHnVqjzbPG7Rk6yG7+0dpcR81K/xOv7IyH4jNp6QzBrfICY/vRz+v1iVv SJI5d9f8BwnQ4n9gw1eVy/ES++BBTvpaN3rDRkhFKT6GYApXpjmCS047eVFcAK8mULnr +8F9HR7frQ9NiXC+7A0gQ56FtuZIJ3Qf5vfc6hgNtphqaQzpwMENjk0qrIvon26Qiyl3 tHKcyTuj9fFBiRnSN41TWCuNdKS+d7LIq2MbJhCZl2Mbhu+2/DJXkVrlc3AuIkU1gV4c kF+g== X-Gm-Message-State: AOAM533VwuhkUd3snbxsEw93P3PKWD8cZju8wBZlMJisj3TkwXjCViKv LsssVIXYRzzXB0o08dRsBPU= X-Received: by 2002:a62:15c5:0:b029:32c:ea9f:a5ed with SMTP id 188-20020a6215c50000b029032cea9fa5edmr2955428pfv.27.1626159554762; Mon, 12 Jul 2021 23:59:14 -0700 (PDT) Received: from localhost.localdomain ([45.124.203.14]) by smtp.gmail.com with ESMTPSA id o184sm20334846pga.18.2021.07.12.23.59.11 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Jul 2021 23:59:13 -0700 (PDT) From: Joel Stanley To: =?utf-8?q?C=C3=A9dric_Le_Goater?= Subject: [PATCH v2 3/3] hw: aspeed_gpio: Clarify GPIO controller name Date: Tue, 13 Jul 2021 16:28:54 +0930 Message-Id: <20210713065854.134634-4-joel@jms.id.au> X-Mailer: git-send-email 2.32.0 In-Reply-To: <20210713065854.134634-1-joel@jms.id.au> References: <20210713065854.134634-1-joel@jms.id.au> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::529; envelope-from=joel.stan@gmail.com; helo=mail-pg1-x529.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.248, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , Rashmica Gupta , qemu-arm@nongnu.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" There are two GPIO controllers in the ast2600; one is 3.3V and the other is 1.8V. Signed-off-by: Joel Stanley --- hw/gpio/aspeed_gpio.c | 26 +++++++++++++------------- 1 file changed, 13 insertions(+), 13 deletions(-) -- 2.32.0 Reviewed-by: Rashmica Gupta Reviewed-by: Cédric Le Goater diff --git a/hw/gpio/aspeed_gpio.c b/hw/gpio/aspeed_gpio.c index dc721aec5da7..dfa6d6cb40a9 100644 --- a/hw/gpio/aspeed_gpio.c +++ b/hw/gpio/aspeed_gpio.c @@ -164,12 +164,12 @@ #define GPIO_YZAAAB_DIRECTION (0x1E4 >> 2) #define GPIO_AC_DATA_VALUE (0x1E8 >> 2) #define GPIO_AC_DIRECTION (0x1EC >> 2) -#define GPIO_3_6V_MEM_SIZE 0x1F0 -#define GPIO_3_6V_REG_ARRAY_SIZE (GPIO_3_6V_MEM_SIZE >> 2) +#define GPIO_3_3V_MEM_SIZE 0x1F0 +#define GPIO_3_3V_REG_ARRAY_SIZE (GPIO_3_3V_MEM_SIZE >> 2) /* AST2600 only - 1.8V gpios */ /* - * The AST2600 two copies of the GPIO controller: the same 3.6V gpios as the + * The AST2600 two copies of the GPIO controller: the same 3.3V gpios as the * AST2400 (memory offsets 0x0-0x198) and a second controller with 1.8V gpios * (memory offsets 0x800-0x9D4). */ @@ -380,7 +380,7 @@ static uint32_t update_value_control_source(GPIOSets *regs, uint32_t old_value, return new_value; } -static const AspeedGPIOReg aspeed_3_6v_gpios[GPIO_3_6V_REG_ARRAY_SIZE] = { +static const AspeedGPIOReg aspeed_3_3v_gpios[GPIO_3_3V_REG_ARRAY_SIZE] = { /* Set ABCD */ [GPIO_ABCD_DATA_VALUE] = { 0, gpio_reg_data_value }, [GPIO_ABCD_DIRECTION] = { 0, gpio_reg_direction }, @@ -800,7 +800,7 @@ static const GPIOSetProperties ast2500_set_props[] = { [7] = {0x000000ff, 0x000000ff, {"AC"} }, }; -static GPIOSetProperties ast2600_3_6v_set_props[] = { +static GPIOSetProperties ast2600_3_3v_set_props[] = { [0] = {0xffffffff, 0xffffffff, {"A", "B", "C", "D"} }, [1] = {0xffffffff, 0xffffffff, {"E", "F", "G", "H"} }, [2] = {0xffffffff, 0xffffffff, {"I", "J", "K", "L"} }, @@ -927,7 +927,7 @@ static void aspeed_gpio_ast2400_class_init(ObjectClass *klass, void *data) agc->nr_gpio_pins = 216; agc->nr_gpio_sets = 7; agc->gap = 196; - agc->reg_table = aspeed_3_6v_gpios; + agc->reg_table = aspeed_3_3v_gpios; } static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data) @@ -938,17 +938,17 @@ static void aspeed_gpio_2500_class_init(ObjectClass *klass, void *data) agc->nr_gpio_pins = 228; agc->nr_gpio_sets = 8; agc->gap = 220; - agc->reg_table = aspeed_3_6v_gpios; + agc->reg_table = aspeed_3_3v_gpios; } -static void aspeed_gpio_ast2600_3_6v_class_init(ObjectClass *klass, void *data) +static void aspeed_gpio_ast2600_3_3v_class_init(ObjectClass *klass, void *data) { AspeedGPIOClass *agc = ASPEED_GPIO_CLASS(klass); - agc->props = ast2600_3_6v_set_props; + agc->props = ast2600_3_3v_set_props; agc->nr_gpio_pins = 208; agc->nr_gpio_sets = 7; - agc->reg_table = aspeed_3_6v_gpios; + agc->reg_table = aspeed_3_3v_gpios; } static void aspeed_gpio_ast2600_1_8v_class_init(ObjectClass *klass, void *data) @@ -984,10 +984,10 @@ static const TypeInfo aspeed_gpio_ast2500_info = { .instance_init = aspeed_gpio_init, }; -static const TypeInfo aspeed_gpio_ast2600_3_6v_info = { +static const TypeInfo aspeed_gpio_ast2600_3_3v_info = { .name = TYPE_ASPEED_GPIO "-ast2600", .parent = TYPE_ASPEED_GPIO, - .class_init = aspeed_gpio_ast2600_3_6v_class_init, + .class_init = aspeed_gpio_ast2600_3_3v_class_init, .instance_init = aspeed_gpio_init, }; @@ -1003,7 +1003,7 @@ static void aspeed_gpio_register_types(void) type_register_static(&aspeed_gpio_info); type_register_static(&aspeed_gpio_ast2400_info); type_register_static(&aspeed_gpio_ast2500_info); - type_register_static(&aspeed_gpio_ast2600_3_6v_info); + type_register_static(&aspeed_gpio_ast2600_3_3v_info); type_register_static(&aspeed_gpio_ast2600_1_8v_info); }