From patchwork Fri Aug 31 14:01:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 145648 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp819429ljw; Fri, 31 Aug 2018 07:02:02 -0700 (PDT) X-Google-Smtp-Source: ANB0VdbrsRmcr6qXp4t7ihl7dfWyM1JuAZnAgX12oZcRGFjJVK8P3uC7TWa0rwNy8OVhUuL+TJFJ X-Received: by 2002:a62:54c7:: with SMTP id i190-v6mr15944191pfb.155.1535724121962; Fri, 31 Aug 2018 07:02:01 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535724121; cv=none; d=google.com; s=arc-20160816; b=G+gIc1CT6t1hN18eq61D/P6gbRkgP50Sav9bPCrSESN/d2eFdGwlSQ4HitQlNANeGC 9c0f+H5IRE3X8nLOopzdjR6OpHlYYcAyBl8Ui+xRf+NrZVfYBWyWXqlmBik9AtKQAdyE jFtoz/uF0sTDd0M/7qT/pf4uca/C4au7KwkeFlvdGYw89Xk91LqmX9PfZfDJGrtCNQWd 7HvxfYL+SAESE15h8iQLm/6tA3TGZfYhf34tXIwnZuHfAOYK8Vs2AYHdHDYlFAxkeMbR /137F8KcLRgdOSf8ffTNcpY4yto2UCxXZ2AbJCxnFSkya/9TYVhx7nw7fLb69OabBYQj LB9A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=Wpwh1J0n/D8S9rbxdqkayW0bLbU11ULq+GMS5dW7EjU=; b=LLKyN9txWr9nxcbAs+PVPcbBa/SNeu7KZQl5wl2l01/BTZxnauBRejXgZdtULfndwi XeVk0+71VpbekWfIjkFXBH2X+J6DESelcz4hWhMbie7TuJkUDxyJGa5Wmz8KUjvaMt3+ f0NX3ZSCKDt+9dSD7S/pvY2bedm/0nkDe3zaN+h7Mtr7utmZKi2KtdLKjoWHYqYaJ7JM 8y/c4yE+m0c8PNz3rE7rhVv3Mk74HZDfRu/VozdmZg4EpNJCBY2v8OnNLA5lbHKjfJLK m99GsNfG9+gG6ro2qjgh38XJdktmRU7RMq55t17NtJJ94jzpmFjTLbZuR40/0EjRwMwf eqPw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WnKMpsPo; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m37-v6si4126722pla.236.2018.08.31.07.02.01; Fri, 31 Aug 2018 07:02:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WnKMpsPo; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728692AbeHaSJh (ORCPT + 6 others); Fri, 31 Aug 2018 14:09:37 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:35036 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728675AbeHaSJg (ORCPT ); Fri, 31 Aug 2018 14:09:36 -0400 Received: by mail-wr1-f67.google.com with SMTP id j26-v6so11332377wre.2 for ; Fri, 31 Aug 2018 07:01:58 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Wpwh1J0n/D8S9rbxdqkayW0bLbU11ULq+GMS5dW7EjU=; b=WnKMpsPo7YRkUxgETFZi0F4/wLp546KODvbWtN2BHc9uDkMXKakn+Cq0aW7erowIw7 DZrIqcF8k1dLKnTZOLReOQQ5aOGIqsYbJUibaP/mz3fkqODYlXrye8b/ePQY7CVA9UPb JnG6JSLbZB5aIEs62YcMeY7RhmUArMwZnpZa4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Wpwh1J0n/D8S9rbxdqkayW0bLbU11ULq+GMS5dW7EjU=; b=pPKjc3C0X5Buf+47tupqK0Upf9wFDxRImxualHRXq2fjjT+k0FJ8TjnfzhHz6ydkr6 18BKgeIEB/IW0lMZDr457P/abu5He7BlhvveHjvgCMgx2e0RjMCPrxWh96SVmdSpkjV/ eUuYaBkjPz9kFhByH3FcpvHme+mx4Pp+RxuQUlGr6mKG15pov1GSixOMEri375CPzAZc ubXtoCZC12d2fXPIaJVHldDnWwC22ff7E+zVAvNmfKr+rso2bRVbkYccSgxJUvcFs9y4 /Ho7J3y3kgGovNZdsUwOOZWTxqj9wp4HvporywzlZ5KWVMUihX+eyFGaBFC40OdrEJiY oaVQ== X-Gm-Message-State: APzg51AlmSCeA725gg9j5Ouzf7SxW+7N4aJTZZM7ictFOKn1pV5UAQ5e SUy8CRpjgl44z46fC6bApTd+GA== X-Received: by 2002:adf:ce06:: with SMTP id p6-v6mr11550258wrn.118.1535724117788; Fri, 31 Aug 2018 07:01:57 -0700 (PDT) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id m68-v6sm8624513wmb.10.2018.08.31.07.01.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 31 Aug 2018 07:01:57 -0700 (PDT) From: Georgi Djakov To: linux-pm@vger.kernel.org, gregkh@linuxfoundation.org Cc: rjw@rjwysocki.net, robh+dt@kernel.org, mturquette@baylibre.com, khilman@baylibre.com, vincent.guittot@linaro.org, skannan@codeaurora.org, bjorn.andersson@linaro.org, amit.kucheria@linaro.org, seansw@qti.qualcomm.com, daidavid1@codeaurora.org, evgreen@chromium.org, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, abailon@baylibre.com, maxime.ripard@bootlin.com, arnd@arndb.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH v9 2/8] dt-bindings: Introduce interconnect binding Date: Fri, 31 Aug 2018 17:01:45 +0300 Message-Id: <20180831140151.13972-3-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180831140151.13972-1-georgi.djakov@linaro.org> References: <20180831140151.13972-1-georgi.djakov@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This binding is intended to represent the relations between the interconnect controllers (providers) and consumer device nodes. It will allow creating links between consumers and interconnect paths (exposed by interconnect providers). Signed-off-by: Georgi Djakov --- .../bindings/interconnect/interconnect.txt | 60 +++++++++++++++++++ 1 file changed, 60 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/interconnect.txt diff --git a/Documentation/devicetree/bindings/interconnect/interconnect.txt b/Documentation/devicetree/bindings/interconnect/interconnect.txt new file mode 100644 index 000000000000..5cb7d3c8d44d --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/interconnect.txt @@ -0,0 +1,60 @@ +Interconnect Provider Device Tree Bindings +========================================= + +The purpose of this document is to define a common set of generic interconnect +providers/consumers properties. + + += interconnect providers = + +The interconnect provider binding is intended to represent the interconnect +controllers in the system. Each provider registers a set of interconnect +nodes, which expose the interconnect related capabilities of the interconnect +to consumer drivers. These capabilities can be throughput, latency, priority +etc. The consumer drivers set constraints on interconnect path (or endpoints) +depending on the use case. Interconnect providers can also be interconnect +consumers, such as in the case where two network-on-chip fabrics interface +directly + +Required properties: +- compatible : contains the interconnect provider compatible string +- #interconnect-cells : number of cells in a interconnect specifier needed to + encode the interconnect node id + +Example: + + snoc: snoc@580000 { + compatible = "qcom,msm8916-snoc"; + #interconnect-cells = <1>; + reg = <0x580000 0x14000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, + <&rpmcc RPM_SMD_SNOC_A_CLK>; + }; + + += interconnect consumers = + +The interconnect consumers are device nodes which dynamically express their +bandwidth requirements along interconnect paths they are connected to. There +can be multiple interconnect providers on a SoC and the consumer may consume +multiple paths from different providers depending on use case and the +components it has to interact with. + +Required properties: +interconnects : Pairs of phandles and interconnect provider specifier to denote + the edge source and destination ports of the interconnect path. + +Optional properties: +interconnect-names : List of interconnect path name strings sorted in the same + order as the interconnects property. Consumers drivers will use + interconnect-names to match interconnect paths with interconnect + specifiers. + +Example: + + sdhci@7864000 { + ... + interconnects = <&pnoc MASTER_SDCC_1 &bimc SLAVE_EBI_CH0>; + interconnect-names = "ddr"; + }; From patchwork Fri Aug 31 14:01:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Georgi Djakov X-Patchwork-Id: 145652 Delivered-To: patch@linaro.org Received: by 2002:a2e:1648:0:0:0:0:0 with SMTP id 8-v6csp819707ljw; Fri, 31 Aug 2018 07:02:10 -0700 (PDT) X-Google-Smtp-Source: ANB0VdZvfqqv0GDMilOqkm87mQJIFd87u9HjUeEGr7EWUCoVn6YQOUDASHArj99zWei8HvZcBOxi X-Received: by 2002:a17:902:bd86:: with SMTP id q6-v6mr8746691pls.35.1535724130206; Fri, 31 Aug 2018 07:02:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1535724130; cv=none; d=google.com; s=arc-20160816; b=e029TjgIu3B0gxh56wWayxWoG/3SUVc3I4/E1U+IbX2shZ9UnoYx9Uh7w5ffEQXJNb aDxJim1vzTQzLhrPImjzghL/1Gkebnk3vOEmlMI1Xx9IB01ZyVDgCyUrucCuRWHM+Y7v aJb8IsYa5nios1aZycjUk4C8AndEu5LLmHKmMTEHz+pfkGmxKedW/pSUIm7AReeDeO+O QyrCnE4FuLNhUh7BG3MTTyL20l2NHAOL9NHFEcNlnT+itaQmt7QvHoK0niLYfHyaAn5f mnGXM7gkZcQ4p39aw0byC+FA4LIGRzFcnDMug4Nt7f1Vwir5LBAuiS9pJq7TlO1m/pE6 JfPg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=X0xVA0TCt7wBSet/Kqt22Pwihkmvcl6u+Lwi5by2s5w=; b=YThVfmw2vPr6MJtSVUj2gj5nxR6Vc/hLjMDhvppNq9LEr3/AoUeUgLX4qsbhao8o64 cA4EGjBXP5EcVQtCceCQbJclQonXpE+1Iz7SLEaNKM0iJzx4M1mlsXNFZ8+GSJvLbUY1 6tyde0lSdht0jFKFDOV/o4vv6Pq5opPbqhe4AuMmVAqA3b5EkDs8Huv62J7o97CtQd0G hMAuzA0W4THUcIgtTYWo8dGaa10ZSND7/FZDySr7yV16YnLjv6GVVKHGWqHW3PJV6a4j rVVodu44ZkIvTLQkZ/xMfJTFEApAERVWZ6F/gSgN+yueqrSxg5RqYLzht7bVuFKUor+s 0NoA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rp2Uxdf7; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c126-v6si10499491pfa.130.2018.08.31.07.02.09; Fri, 31 Aug 2018 07:02:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Rp2Uxdf7; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728774AbeHaSJq (ORCPT + 6 others); Fri, 31 Aug 2018 14:09:46 -0400 Received: from mail-wm0-f68.google.com ([74.125.82.68]:39047 "EHLO mail-wm0-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728743AbeHaSJq (ORCPT ); Fri, 31 Aug 2018 14:09:46 -0400 Received: by mail-wm0-f68.google.com with SMTP id q8-v6so5475506wmq.4 for ; Fri, 31 Aug 2018 07:02:06 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=X0xVA0TCt7wBSet/Kqt22Pwihkmvcl6u+Lwi5by2s5w=; b=Rp2Uxdf7wG/dFXmBWzDJxRLQu3c7Gc6Vkv+fOQLHThgsJRukc0jLheov4T0dsQiPd7 1XEOpL24OF3plBW7xKNtYtBotm/YMJWn+sn3Rr7DMM0LdYeDbMRa85R8H6gqxcwjXRGa in75crreXWWbwst6hwR+WNmneUrTMoLeypyrE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=X0xVA0TCt7wBSet/Kqt22Pwihkmvcl6u+Lwi5by2s5w=; b=U4s/H7VVct7ysTJ5bq4Scs64H8MRvz3hiY6QebWLoKp0puLs2L9d6CVH0c8nRt7mKy L6+b8t6b18FUsO78GuftJLCXt+h056OaCVPS1xNvwO+pob9DTrHGaGZsdmqbvJeowawY 7L8PA1CPmzklayumO9vgwwICQDeSS84yAlCZlt3JVcZxBya+pzNBH2QYxgu65n2Jb/O8 JKRcG5mA2tuNkDgdHOMZTZrgajsv5nfXXeaLjmXSUXURqpve34inSyPO88vDxoJxVBUA 1jQx4/q876NZj9oVVdhvi0HtRDyA9SoyKPxfD8UskBSTJuMuHgDSJNWV/yXLqNwCDfGD 3uQA== X-Gm-Message-State: APzg51BfUmOBnn47/tT5vaXF7XQXJnaNI5LxfDCvOIlqhhsAbf9ppIgO 6DOD7zO4tHTCGZNcrsyj197zYg== X-Received: by 2002:a1c:cb4d:: with SMTP id b74-v6mr5254514wmg.123.1535724125974; Fri, 31 Aug 2018 07:02:05 -0700 (PDT) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id m68-v6sm8624513wmb.10.2018.08.31.07.02.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 31 Aug 2018 07:02:05 -0700 (PDT) From: Georgi Djakov To: linux-pm@vger.kernel.org, gregkh@linuxfoundation.org Cc: rjw@rjwysocki.net, robh+dt@kernel.org, mturquette@baylibre.com, khilman@baylibre.com, vincent.guittot@linaro.org, skannan@codeaurora.org, bjorn.andersson@linaro.org, amit.kucheria@linaro.org, seansw@qti.qualcomm.com, daidavid1@codeaurora.org, evgreen@chromium.org, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, abailon@baylibre.com, maxime.ripard@bootlin.com, arnd@arndb.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH v9 6/8] dt-bindings: interconnect: Document qcom, msm8916 NoC bindings Date: Fri, 31 Aug 2018 17:01:49 +0300 Message-Id: <20180831140151.13972-7-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180831140151.13972-1-georgi.djakov@linaro.org> References: <20180831140151.13972-1-georgi.djakov@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Document the device-tree bindings of the Network-On-Chip interconnect hardware found on Qualcomm msm8916 platforms. Signed-off-by: Georgi Djakov --- .../bindings/interconnect/qcom-msm8916.txt | 41 ++++++++ include/dt-bindings/interconnect/qcom.h | 98 +++++++++++++++++++ 2 files changed, 139 insertions(+) create mode 100644 Documentation/devicetree/bindings/interconnect/qcom-msm8916.txt create mode 100644 include/dt-bindings/interconnect/qcom.h diff --git a/Documentation/devicetree/bindings/interconnect/qcom-msm8916.txt b/Documentation/devicetree/bindings/interconnect/qcom-msm8916.txt new file mode 100644 index 000000000000..744df51df4ed --- /dev/null +++ b/Documentation/devicetree/bindings/interconnect/qcom-msm8916.txt @@ -0,0 +1,41 @@ +Qualcomm MSM8916 Network-On-Chip interconnect driver binding +---------------------------------------------------- + +Required properties : +- compatible : shall contain only one of the following: + "qcom,msm8916-bimc" + "qcom,msm8916-pnoc" + "qcom,msm8916-snoc" +- #interconnect-cells : should contain 1 +- reg : shall contain base register location and length + +Optional properties : +clocks : list of phandles and specifiers to all interconnect bus clocks +clock-names : clock names should include both "bus_clk" and "bus_a_clk" + +Examples: + + snoc: snoc@580000 { + compatible = "qcom,msm8916-snoc"; + #interconnect-cells = <1>; + reg = <0x580000 0x14000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_SNOC_CLK>, + <&rpmcc RPM_SMD_SNOC_A_CLK>; + }; + bimc: bimc@400000 { + compatible = "qcom,msm8916-bimc"; + #interconnect-cells = <1>; + reg = <0x400000 0x62000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_BIMC_CLK>, + <&rpmcc RPM_SMD_BIMC_A_CLK>; + }; + pnoc: pnoc@500000 { + compatible = "qcom,msm8916-pnoc"; + #interconnect-cells = <1>; + reg = <0x500000 0x11000>; + clock-names = "bus_clk", "bus_a_clk"; + clocks = <&rpmcc RPM_SMD_PCNOC_CLK>, + <&rpmcc RPM_SMD_PCNOC_A_CLK>; + }; diff --git a/include/dt-bindings/interconnect/qcom.h b/include/dt-bindings/interconnect/qcom.h new file mode 100644 index 000000000000..48f944b30e5d --- /dev/null +++ b/include/dt-bindings/interconnect/qcom.h @@ -0,0 +1,98 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Qualcomm interconnect IDs + * + * Copyright (c) 2018, Linaro Ltd. + * Author: Georgi Djakov + */ + +#ifndef __DT_BINDINGS_INTERCONNECT_QCOM_H +#define __DT_BINDINGS_INTERCONNECT_QCOM_H + +#define BIMC_SNOC_MAS 1 +#define BIMC_SNOC_SLV 2 +#define MASTER_AMPSS_M0 3 +#define MASTER_BLSP_1 4 +#define MASTER_CRYPTO_CORE0 5 +#define MASTER_DEHR 6 +#define MASTER_GRAPHICS_3D 7 +#define MASTER_JPEG 8 +#define MASTER_LPASS 9 +#define MASTER_MDP_PORT0 10 +#define MASTER_QDSS_BAM 11 +#define MASTER_QDSS_ETR 12 +#define MASTER_SDCC_1 13 +#define MASTER_SDCC_2 14 +#define MASTER_SNOC_CFG 15 +#define MASTER_SPDM 16 +#define MASTER_TCU_0 17 +#define MASTER_TCU_1 18 +#define MASTER_USB_HS 19 +#define MASTER_VFE 20 +#define MASTER_VIDEO_P0 21 +#define PNOC_INT_0 22 +#define PNOC_INT_1 23 +#define PNOC_M_0 24 +#define PNOC_M_1 25 +#define PNOC_SLV_0 26 +#define PNOC_SLV_1 27 +#define PNOC_SLV_2 28 +#define PNOC_SLV_3 29 +#define PNOC_SLV_4 30 +#define PNOC_SLV_8 31 +#define PNOC_SLV_9 32 +#define PNOC_SNOC_MAS 33 +#define PNOC_SNOC_SLV 34 +#define SLAVE_AMPSS_L2 35 +#define SLAVE_BIMC_CFG 36 +#define SLAVE_BLSP_1 37 +#define SLAVE_BOOT_ROM 38 +#define SLAVE_CAMERA_CFG 39 +#define SLAVE_CATS_128 40 +#define SLAVE_CLK_CTL 41 +#define SLAVE_CRYPTO_0_CFG 42 +#define SLAVE_DEHR_CFG 43 +#define SLAVE_DISPLAY_CFG 44 +#define SLAVE_EBI_CH0 45 +#define SLAVE_GRAPHICS_3D_CFG 46 +#define SLAVE_IMEM_CFG 47 +#define SLAVE_LPASS 48 +#define SLAVE_MPM 49 +#define SLAVE_MSM_PDM 50 +#define SLAVE_MSM_TCSR 51 +#define SLAVE_MSS 52 +#define SLAVE_OCMEM_64 53 +#define SLAVE_PMIC_ARB 54 +#define SLAVE_PNOC_CFG 55 +#define SLAVE_PRNG 56 +#define SLAVE_QDSS_CFG 57 +#define SLAVE_QDSS_STM 58 +#define SLAVE_RBCPR_CFG 59 +#define SLAVE_RPM_MSG_RAM 60 +#define SLAVE_SDCC_1 61 +#define SLAVE_SDCC_4 62 +#define SLAVE_SECURITY 63 +#define SLAVE_SERVICE_SNOC 64 +#define SLAVE_SNOC_CFG 65 +#define SLAVE_SPDM 66 +#define SLAVE_SYSTEM_IMEM 67 +#define SLAVE_TLMM 68 +#define SLAVE_USB_HS 69 +#define SLAVE_VENUS_CFG 70 +#define SNOC_BIMC_0_MAS 71 +#define SNOC_BIMC_0_SLV 72 +#define SNOC_BIMC_1_MAS 73 +#define SNOC_BIMC_1_SLV 74 +#define SNOC_INT_0 75 +#define SNOC_INT_1 76 +#define SNOC_INT_BIMC 77 +#define SNOC_MM_INT_0 78 +#define SNOC_MM_INT_1 79 +#define SNOC_MM_INT_2 80 +#define SNOC_MM_INT_BIMC 81 +#define SNOC_PNOC_MAS 82 +#define SNOC_PNOC_SLV 83 +#define SNOC_QDSS_INT 84 +#define SYSTEM_SLAVE_FAB_APPS 85 + +#endif From patchwork Fri Aug 31 14:01:51 2018 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id d11-v6si10076748pgh.564.2018.08.31.07.02.15; Fri, 31 Aug 2018 07:02:15 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=WFJy8Xpl; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728771AbeHaSJu (ORCPT + 6 others); Fri, 31 Aug 2018 14:09:50 -0400 Received: from mail-wm0-f65.google.com ([74.125.82.65]:52348 "EHLO mail-wm0-f65.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728792AbeHaSJu (ORCPT ); Fri, 31 Aug 2018 14:09:50 -0400 Received: by mail-wm0-f65.google.com with SMTP id y139-v6so5336198wmc.2 for ; Fri, 31 Aug 2018 07:02:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=GvibLTos2iRsFWhqzFGfkbbHNao2ZWAAN5J5ThtpGnM=; b=WFJy8Xplyb9TbUqRLchk4ERo0o692kPTIDP52h/Dr0gZsDkfdiJ5q/ehxHJK7qCLkM 49WYPO30QKmoibniH5Cp4ycGiDz8ajUq3RHCLXyu4LbnlQPfh9CPmAEgN9X9mXjV5MsR qahfN6x0LDEhtlfKJzUkYhln86LRDeFHibwO8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=GvibLTos2iRsFWhqzFGfkbbHNao2ZWAAN5J5ThtpGnM=; b=h2eNSUABIHviQzXaF8kvnfqNr0kpwT44wvSVLD/OVBuvK4JOqVKD6ptyzQ0mJYFjRg R5sZwU/gDrL9nKVmSfr02/E/NnKdPCG/4pJ0Ex2tQ6J8KetUKiX6YED71iKT2hGaw3QI rGter/LTGauXazQ+TnOFGLUyTDxpur7Gu5u2xGivyPD9wWCxnjGnQbmQGmglrqsoZLVP ZvnRe84Og7HW1mcfNfyOTTdCfyfbybIym+gRV/kTOFbDdQdWxYL5icT8RciL2J/7f1Gt QfrrKaDHwBVpyKbctcf3XB7ofOsNuipZJ2TfJPxJFhJ7GWJeHeWfUOqYQKtgbwHnVk0c 2AdQ== X-Gm-Message-State: APzg51CR5zfPzh+LrfJ/VOS71DG+5VFELGEWzdOGzBXbkJlzapwkrM3C YevcglT4hRoNiTKp08Q907QiMA== X-Received: by 2002:a1c:2807:: with SMTP id o7-v6mr4850377wmo.60.1535724129807; Fri, 31 Aug 2018 07:02:09 -0700 (PDT) Received: from localhost.localdomain ([212.45.67.2]) by smtp.googlemail.com with ESMTPSA id m68-v6sm8624513wmb.10.2018.08.31.07.02.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 31 Aug 2018 07:02:08 -0700 (PDT) From: Georgi Djakov To: linux-pm@vger.kernel.org, gregkh@linuxfoundation.org Cc: rjw@rjwysocki.net, robh+dt@kernel.org, mturquette@baylibre.com, khilman@baylibre.com, vincent.guittot@linaro.org, skannan@codeaurora.org, bjorn.andersson@linaro.org, amit.kucheria@linaro.org, seansw@qti.qualcomm.com, daidavid1@codeaurora.org, evgreen@chromium.org, mark.rutland@arm.com, lorenzo.pieralisi@arm.com, abailon@baylibre.com, maxime.ripard@bootlin.com, arnd@arndb.de, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, georgi.djakov@linaro.org Subject: [PATCH v9 8/8] MAINTAINERS: add a maintainer for the interconnect API Date: Fri, 31 Aug 2018 17:01:51 +0300 Message-Id: <20180831140151.13972-9-georgi.djakov@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180831140151.13972-1-georgi.djakov@linaro.org> References: <20180831140151.13972-1-georgi.djakov@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add myself as a maintainer of the interconnect API. Signed-off-by: Georgi Djakov --- MAINTAINERS | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index a5b256b25905..bdbab6a90c93 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -7578,6 +7578,16 @@ L: linux-gpio@vger.kernel.org S: Maintained F: drivers/gpio/gpio-intel-mid.c +INTERCONNECT API +M: Georgi Djakov +S: Maintained +F: Documentation/interconnect/ +F: Documentation/devicetree/bindings/interconnect/ +F: drivers/interconnect/ +F: include/dt-bindings/interconnect/ +F: include/linux/interconnect-provider.h +F: include/linux/interconnect.h + INVENSENSE MPU-3050 GYROSCOPE DRIVER M: Linus Walleij L: linux-iio@vger.kernel.org