From patchwork Tue Jul 20 04:36:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 481736 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 51CECC636C8 for ; Tue, 20 Jul 2021 04:37:39 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 336CE6113C for ; Tue, 20 Jul 2021 04:37:39 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346714AbhGTD47 (ORCPT ); Mon, 19 Jul 2021 23:56:59 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:29240 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1346747AbhGTD4q (ORCPT ); Mon, 19 Jul 2021 23:56:46 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1626755845; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=tw5Gimc5vYHVqMzKwZl/ULRttWcbwmcovLXK1CznnFM=; b=hqy+iQcx0pfWXyOhEoezA6SNbaEbkYVcZBc9ovi/2gocx52AHHyURVUjsQD4/3Nfxtyfuaoy wjPCgrrOmzNimWDp36ROaU2RG7GkWauVlMADRbGZF1DXnpmJTDP0FpDsuZ9uHgx2ESQp7n/l +VnM9qk5TltPDKnw52CrwRJ02TM= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-east-1.postgun.com with SMTP id 60f653054815712f3a5e7d37 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 20 Jul 2021 04:37:25 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 68DAEC4323A; Tue, 20 Jul 2021 04:37:24 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 77259C43460; Tue, 20 Jul 2021 04:37:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 77259C43460 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 01/13] dt-bindings: soc: qcom: aoss: Drop the load state power-domain Date: Tue, 20 Jul 2021 10:06:35 +0530 Message-Id: <1626755807-11865-2-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The power-domains exposed by AOSS QMP node are used to notify the Always on Subsystem (AOSS) that a particular co-processor is up/down. These co-processors enter low-power modes independent to that of the application processor and their states are expected to remain unaltered across system suspend/resume cycles. To achieve this behavior let's drop the load power-domain and replace them with generic qmp_send interface instead. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd Acked-by: Rob Herring --- v4: * Rebase patch due to the recent aoss-qmp yaml conversion (Dropping Rb). Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml | 11 +---------- 1 file changed, 1 insertion(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml index 93e4b737ee1b..c55e98fc14fa 100644 --- a/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,aoss-qmp.yaml @@ -19,8 +19,7 @@ description: The AOSS side channel exposes control over a set of resources, used to control a set of debug related clocks and to affect the low power state of resources - related to the secondary subsystems. These resources are exposed as a set of - power-domains. + related to the secondary subsystems. properties: compatible: @@ -57,13 +56,6 @@ properties: description: The single clock represents the QDSS clock. - "#power-domain-cells": - const: 1 - description: | - The provided power-domains are: - CDSP state (0), LPASS state (1), modem state (2), SLPI - state (3), SPSS state (4) and Venus state (5). - required: - compatible - reg @@ -101,7 +93,6 @@ examples: mboxes = <&apss_shared 0>; #clock-cells = <0>; - #power-domain-cells = <1>; cx_cdev: cx { #cooling-cells = <2>; From patchwork Tue Jul 20 04:36:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 483560 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1BF96C07E9B for ; Tue, 20 Jul 2021 04:37:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F0EBF6113C for ; Tue, 20 Jul 2021 04:37:57 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1346226AbhGTD5M (ORCPT ); Mon, 19 Jul 2021 23:57:12 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:10064 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S245575AbhGTD4y (ORCPT ); Mon, 19 Jul 2021 23:56:54 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1626755853; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=cCMxnGPXnUlWg5Wm/Z2bG0pfbepduQ9q/7nKqEhvC1U=; b=LlMdd76kVrPBSQUV303ZO3Dj8Xn9jsw34081owgVLSOXuX4WbQp35FQPJuoBP13oD+ydrk4g K0WWgRSgNTcB67OpqAR+8z6xk3tG2tfjEND1Hdl3EXE84ssr0jtk60uFmryi1cZhP05mJeTm Re64vwb2eDfMTb2sE4HEEiiag0A= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-east-1.postgun.com with SMTP id 60f6530c56871ded773817a2 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 20 Jul 2021 04:37:32 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 5013CC433F1; Tue, 20 Jul 2021 04:37:31 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 614AEC433D3; Tue, 20 Jul 2021 04:37:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 614AEC433D3 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 02/13] dt-bindings: remoteproc: qcom: pas: Add QMP property Date: Tue, 20 Jul 2021 10:06:36 +0530 Message-Id: <1626755807-11865-3-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The load state power-domain, used by the co-processors to notify the Always on Subsystem (AOSS) that a particular co-processor is up/down, suffers from the side-effect of changing states during suspend/resume. However the co-processors enter low-power modes independent to that of the application processor and their states are expected to remain unaltered across system suspend/resume cycles. To achieve this behavior let's drop the load state power-domain and replace them with the qmp property for all SoCs supporting low power mode signalling. Signed-off-by: Sibi Sankar --- v4: * Commit message change and sc8180x co-processor addition. [Rob/Bjorn] .../devicetree/bindings/remoteproc/qcom,adsp.yaml | 65 +++++++++++----------- 1 file changed, 33 insertions(+), 32 deletions(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml index c597ccced623..1182afb5f593 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml +++ b/Documentation/devicetree/bindings/remoteproc/qcom,adsp.yaml @@ -78,11 +78,11 @@ properties: power-domains: minItems: 1 - maxItems: 3 + maxItems: 2 power-domain-names: minItems: 1 - maxItems: 3 + maxItems: 2 firmware-name: $ref: /schemas/types.yaml#/definitions/string @@ -92,6 +92,10 @@ properties: maxItems: 1 description: Reference to the reserved-memory for the Hexagon core + qcom,qmp: + $ref: /schemas/types.yaml#/definitions/phandle + description: Reference to the AOSS side-channel message RAM. + qcom,smem-states: $ref: /schemas/types.yaml#/definitions/phandle-array description: States used by the AP to signal the Hexagon core @@ -368,13 +372,11 @@ allOf: properties: power-domains: items: - - description: Load State power domain - description: CX power domain - description: MX power domain - description: MSS power domain power-domain-names: items: - - const: load_state - const: cx - const: mx - const: mss @@ -390,43 +392,20 @@ allOf: properties: power-domains: items: - - description: Load State power domain - description: CX power domain - power-domain-names: - items: - - const: load_state - - const: cx - if: properties: compatible: contains: enum: + - qcom,sdx55-mpss-pas - qcom,sm8150-mpss-pas - qcom,sm8350-mpss-pas then: properties: power-domains: items: - - description: Load State power domain - - description: CX power domain - - description: MSS power domain - power-domain-names: - items: - - const: load_state - - const: cx - - const: mss - - - if: - properties: - compatible: - contains: - enum: - - qcom,sdx55-mpss-pas - then: - properties: - power-domains: - items: - description: CX power domain - description: MSS power domain power-domain-names: @@ -450,12 +429,10 @@ allOf: properties: power-domains: items: - - description: Load State power domain - description: LCX power domain - description: LMX power domain power-domain-names: items: - - const: load_state - const: lcx - const: lmx @@ -469,12 +446,10 @@ allOf: properties: power-domains: items: - - description: Load State power domain - description: CX power domain - description: MXC power domain power-domain-names: items: - - const: load_state - const: cx - const: mxc @@ -510,6 +485,32 @@ allOf: - const: mss_restart - const: pdc_reset + - if: + properties: + compatible: + contains: + enum: + - qcom,sc7180-mpss-pas + - qcom,sc8180x-adsp-pas + - qcom,sc8180x-cdsp-pas + - qcom,sc8180x-mpss-pas + - qcom,sm8150-adsp-pas + - qcom,sm8150-cdsp-pas + - qcom,sm8150-mpss-pas + - qcom,sm8150-slpi-pas + - qcom,sm8250-adsp-pas + - qcom,sm8250-cdsp-pas + - qcom,sm8250-slpi-pas + - qcom,sm8350-adsp-pas + - qcom,sm8350-cdsp-pas + - qcom,sm8350-mpss-pas + - qcom,sm8350-slpi-pas + then: + properties: + qcom,qmp: + items: + - description: Reference to the AOSS side-channel message RAM. + examples: - | #include From patchwork Tue Jul 20 04:36:37 2021 Content-Type: text/plain; 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Tue, 20 Jul 2021 04:37:31 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 864EBC4338A Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 03/13] dt-bindings: remoteproc: qcom: Add QMP property Date: Tue, 20 Jul 2021 10:06:37 +0530 Message-Id: <1626755807-11865-4-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add Qualcomm Mailbox Protocol (QMP) property to replace the power domain exposed by the AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd Acked-by: Rob Herring --- Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt index 69c49c7b2cff..494257010629 100644 --- a/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt +++ b/Documentation/devicetree/bindings/remoteproc/qcom,q6v5.txt @@ -174,7 +174,12 @@ For the compatible string below the following supplies are required: must be "cx", "mx" qcom,sc7180-mss-pil: qcom,sdm845-mss-pil: - must be "cx", "mx", "mss", "load_state" + must be "cx", "mx", "mss" + +- qcom,qmp: + Usage: optional + Value type: + Definition: reference to the AOSS side-channel message RAM. - qcom,smem-states: Usage: required From patchwork Tue Jul 20 04:36:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 483557 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 13BE4C07E95 for ; Tue, 20 Jul 2021 04:41:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F2B116101E for ; Tue, 20 Jul 2021 04:41:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347435AbhGTEBA (ORCPT ); Tue, 20 Jul 2021 00:01:00 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:19121 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347425AbhGTD5X (ORCPT ); Mon, 19 Jul 2021 23:57:23 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1626755881; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=btR1bm70kGsAfr2eJFwFZagNpiqYbcG4E9iJ9YX5TCs=; b=eWC9p+zJe3rc8lT4Ff5bTj+iQiD3iLbUZvwIewJry949gtyJ/Qn44rGOyx+F6pnlO3pGEuxX LKxwGrpHC17g6m/0yyXlgKOxP6KIQkUeTI+L9zNrUUCOri9am0jiSNBJn1OCgj91U3fPrhDS G6Hkxvo6Mg1A23BX6XHzY4tP6js= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n06.prod.us-east-1.postgun.com with SMTP id 60f6531f56871ded77383ed6 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 20 Jul 2021 04:37:50 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 44EEBC43144; Tue, 20 Jul 2021 04:37:50 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id E7BA5C4338A; Tue, 20 Jul 2021 04:37:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org E7BA5C4338A Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 04/13] remoteproc: qcom: q6v5: Use qmp_send to update co-processor load state Date: Tue, 20 Jul 2021 10:06:38 +0530 Message-Id: <1626755807-11865-5-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The power domains exposed by the AOSS QMP driver control the load state resources linked to modem, adsp, cdsp remoteprocs. These are used to notify the Always on Subsystem (AOSS) that a particular co-processor is up/down. AOSS uses this information to wait for the co-processors to suspend before starting its sleep sequence. These co-processors enter low-power modes independent to that of the application processor and the load state resources linked to them are expected to remain unaltered across system suspend/resume cycles. To achieve this behavior lets stop using the power-domains exposed by the AOSS QMP node and replace them with generic qmp_send interface instead. Signed-off-by: Sibi Sankar --- v4: * Drop unused pdev and kfree the load state string in q6v5_deinit /probe path for patch 4. [Matthias] drivers/remoteproc/qcom_q6v5.c | 57 ++++++++++++++++++++++++- drivers/remoteproc/qcom_q6v5.h | 7 ++- drivers/remoteproc/qcom_q6v5_adsp.c | 7 ++- drivers/remoteproc/qcom_q6v5_mss.c | 44 ++++--------------- drivers/remoteproc/qcom_q6v5_pas.c | 85 +++++++++---------------------------- drivers/remoteproc/qcom_q6v5_wcss.c | 4 +- 6 files changed, 96 insertions(+), 108 deletions(-) diff --git a/drivers/remoteproc/qcom_q6v5.c b/drivers/remoteproc/qcom_q6v5.c index 7e9244c748da..997ff21271f7 100644 --- a/drivers/remoteproc/qcom_q6v5.c +++ b/drivers/remoteproc/qcom_q6v5.c @@ -16,8 +16,28 @@ #include "qcom_common.h" #include "qcom_q6v5.h" +#define Q6V5_LOAD_STATE_MSG_LEN 64 #define Q6V5_PANIC_DELAY_MS 200 +static int q6v5_load_state_toggle(struct qcom_q6v5 *q6v5, bool enable) +{ + char buf[Q6V5_LOAD_STATE_MSG_LEN] = {}; + int ret; + + if (IS_ERR(q6v5->qmp)) + return 0; + + snprintf(buf, sizeof(buf), + "{class: image, res: load_state, name: %s, val: %s}", + q6v5->load_state, enable ? "on" : "off"); + + ret = qmp_send(q6v5->qmp, buf, sizeof(buf)); + if (ret) + dev_err(q6v5->dev, "failed to toggle load state\n"); + + return ret; +} + /** * qcom_q6v5_prepare() - reinitialize the qcom_q6v5 context before start * @q6v5: reference to qcom_q6v5 context to be reinitialized @@ -26,6 +46,12 @@ */ int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5) { + int ret; + + ret = q6v5_load_state_toggle(q6v5, true); + if (ret) + return ret; + reinit_completion(&q6v5->start_done); reinit_completion(&q6v5->stop_done); @@ -47,6 +73,7 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_prepare); int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5) { disable_irq(q6v5->handover_irq); + q6v5_load_state_toggle(q6v5, false); return !q6v5->handover_issued; } @@ -196,12 +223,13 @@ EXPORT_SYMBOL_GPL(qcom_q6v5_panic); * @pdev: platform_device reference for acquiring resources * @rproc: associated remoteproc instance * @crash_reason: SMEM id for crash reason string, or 0 if none + * @load_state: load state resource string * @handover: function to be called when proxy resources should be released * * Return: 0 on success, negative errno on failure */ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev, - struct rproc *rproc, int crash_reason, + struct rproc *rproc, int crash_reason, const char *load_state, void (*handover)(struct qcom_q6v5 *q6v5)) { int ret; @@ -286,9 +314,36 @@ int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev, return PTR_ERR(q6v5->state); } + q6v5->load_state = kstrdup_const(load_state, GFP_KERNEL); + q6v5->qmp = qmp_get(&pdev->dev); + if (IS_ERR(q6v5->qmp)) { + if (PTR_ERR(q6v5->qmp) != -ENODEV) { + if (PTR_ERR(q6v5->qmp) != -EPROBE_DEFER) + dev_err(&pdev->dev, "failed to acquire load state\n"); + kfree_const(q6v5->load_state); + return PTR_ERR(q6v5->qmp); + } + } else { + if (!q6v5->load_state) { + dev_err(&pdev->dev, "load state resource string empty\n"); + return -EINVAL; + } + } + return 0; } EXPORT_SYMBOL_GPL(qcom_q6v5_init); +/** + * qcom_q6v5_deinit() - deinitialize the q6v5 common struct + * @q6v5: reference to qcom_q6v5 context to be deinitialized + */ +void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5) +{ + kfree_const(q6v5->load_state); + qmp_put(q6v5->qmp); +} +EXPORT_SYMBOL_GPL(qcom_q6v5_deinit); + MODULE_LICENSE("GPL v2"); MODULE_DESCRIPTION("Qualcomm Peripheral Image Loader for Q6V5"); diff --git a/drivers/remoteproc/qcom_q6v5.h b/drivers/remoteproc/qcom_q6v5.h index 1c212f670cbc..f35e04471ed7 100644 --- a/drivers/remoteproc/qcom_q6v5.h +++ b/drivers/remoteproc/qcom_q6v5.h @@ -5,6 +5,7 @@ #include #include +#include struct rproc; struct qcom_smem_state; @@ -15,6 +16,8 @@ struct qcom_q6v5 { struct rproc *rproc; struct qcom_smem_state *state; + struct qmp *qmp; + unsigned stop_bit; int wdog_irq; @@ -32,12 +35,14 @@ struct qcom_q6v5 { bool running; + const char *load_state; void (*handover)(struct qcom_q6v5 *q6v5); }; int qcom_q6v5_init(struct qcom_q6v5 *q6v5, struct platform_device *pdev, - struct rproc *rproc, int crash_reason, + struct rproc *rproc, int crash_reason, const char *load_state, void (*handover)(struct qcom_q6v5 *q6v5)); +void qcom_q6v5_deinit(struct qcom_q6v5 *q6v5); int qcom_q6v5_prepare(struct qcom_q6v5 *q6v5); int qcom_q6v5_unprepare(struct qcom_q6v5 *q6v5); diff --git a/drivers/remoteproc/qcom_q6v5_adsp.c b/drivers/remoteproc/qcom_q6v5_adsp.c index 8b0d8bbacd2e..098362e6e233 100644 --- a/drivers/remoteproc/qcom_q6v5_adsp.c +++ b/drivers/remoteproc/qcom_q6v5_adsp.c @@ -185,7 +185,9 @@ static int adsp_start(struct rproc *rproc) int ret; unsigned int val; - qcom_q6v5_prepare(&adsp->q6v5); + ret = qcom_q6v5_prepare(&adsp->q6v5); + if (ret) + return ret; ret = clk_prepare_enable(adsp->xo); if (ret) @@ -465,7 +467,7 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto disable_pm; - ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, + ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, NULL, qcom_adsp_pil_handover); if (ret) goto disable_pm; @@ -500,6 +502,7 @@ static int adsp_remove(struct platform_device *pdev) rproc_del(adsp->rproc); + qcom_q6v5_deinit(&adsp->q6v5); qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); qcom_remove_sysmon_subdev(adsp->sysmon); qcom_remove_ssr_subdev(adsp->rproc, &adsp->ssr_subdev); diff --git a/drivers/remoteproc/qcom_q6v5_mss.c b/drivers/remoteproc/qcom_q6v5_mss.c index 423b31dfa574..7a1422bd7925 100644 --- a/drivers/remoteproc/qcom_q6v5_mss.c +++ b/drivers/remoteproc/qcom_q6v5_mss.c @@ -137,7 +137,6 @@ struct rproc_hexagon_res { char **proxy_clk_names; char **reset_clk_names; char **active_clk_names; - char **active_pd_names; char **proxy_pd_names; int version; bool need_mem_protection; @@ -169,12 +168,10 @@ struct q6v5 { struct clk *active_clks[8]; struct clk *reset_clks[4]; struct clk *proxy_clks[4]; - struct device *active_pds[1]; struct device *proxy_pds[3]; int active_clk_count; int reset_clk_count; int proxy_clk_count; - int active_pd_count; int proxy_pd_count; struct reg_info active_regs[1]; @@ -895,18 +892,14 @@ static int q6v5_mba_load(struct q6v5 *qproc) int xfermemop_ret; bool mba_load_err = false; - qcom_q6v5_prepare(&qproc->q6v5); - - ret = q6v5_pds_enable(qproc, qproc->active_pds, qproc->active_pd_count); - if (ret < 0) { - dev_err(qproc->dev, "failed to enable active power domains\n"); - goto disable_irqs; - } + ret = qcom_q6v5_prepare(&qproc->q6v5); + if (ret) + return ret; ret = q6v5_pds_enable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); if (ret < 0) { dev_err(qproc->dev, "failed to enable proxy power domains\n"); - goto disable_active_pds; + goto disable_irqs; } ret = q6v5_regulator_enable(qproc, qproc->fallback_proxy_regs, @@ -1039,8 +1032,6 @@ static int q6v5_mba_load(struct q6v5 *qproc) qproc->fallback_proxy_reg_count); disable_proxy_pds: q6v5_pds_disable(qproc, qproc->proxy_pds, qproc->proxy_pd_count); -disable_active_pds: - q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); disable_irqs: qcom_q6v5_unprepare(&qproc->q6v5); @@ -1076,7 +1067,6 @@ static void q6v5_mba_reclaim(struct q6v5 *qproc) qproc->active_clk_count); q6v5_regulator_disable(qproc, qproc->active_regs, qproc->active_reg_count); - q6v5_pds_disable(qproc, qproc->active_pds, qproc->active_pd_count); /* In case of failure or coredump scenario where reclaiming MBA memory * could not happen reclaim it here. @@ -1756,14 +1746,6 @@ static int q6v5_probe(struct platform_device *pdev) } qproc->active_reg_count = ret; - ret = q6v5_pds_attach(&pdev->dev, qproc->active_pds, - desc->active_pd_names); - if (ret < 0) { - dev_err(&pdev->dev, "Failed to attach active power domains\n"); - goto free_rproc; - } - qproc->active_pd_count = ret; - ret = q6v5_pds_attach(&pdev->dev, qproc->proxy_pds, desc->proxy_pd_names); /* Fallback to regulators for old device trees */ @@ -1773,12 +1755,12 @@ static int q6v5_probe(struct platform_device *pdev) desc->fallback_proxy_supply); if (ret < 0) { dev_err(&pdev->dev, "Failed to get fallback proxy regulators.\n"); - goto detach_active_pds; + goto free_rproc; } qproc->fallback_proxy_reg_count = ret; } else if (ret < 0) { dev_err(&pdev->dev, "Failed to init power domains\n"); - goto detach_active_pds; + goto free_rproc; } else { qproc->proxy_pd_count = ret; } @@ -1792,7 +1774,7 @@ static int q6v5_probe(struct platform_device *pdev) qproc->need_mem_protection = desc->need_mem_protection; qproc->has_mba_logs = desc->has_mba_logs; - ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, + ret = qcom_q6v5_init(&qproc->q6v5, pdev, rproc, MPSS_CRASH_REASON_SMEM, "modem", qcom_msa_handover); if (ret) goto detach_proxy_pds; @@ -1822,8 +1804,6 @@ static int q6v5_probe(struct platform_device *pdev) qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); detach_proxy_pds: q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); -detach_active_pds: - q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); free_rproc: rproc_free(rproc); @@ -1837,13 +1817,13 @@ static int q6v5_remove(struct platform_device *pdev) rproc_del(rproc); + qcom_q6v5_deinit(&qproc->q6v5); qcom_remove_sysmon_subdev(qproc->sysmon); qcom_remove_ssr_subdev(rproc, &qproc->ssr_subdev); qcom_remove_smd_subdev(rproc, &qproc->smd_subdev); qcom_remove_glink_subdev(rproc, &qproc->glink_subdev); q6v5_pds_detach(qproc, qproc->proxy_pds, qproc->proxy_pd_count); - q6v5_pds_detach(qproc, qproc->active_pds, qproc->active_pd_count); rproc_free(rproc); @@ -1867,10 +1847,6 @@ static const struct rproc_hexagon_res sc7180_mss = { "nav", NULL }, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", "mx", @@ -1903,10 +1879,6 @@ static const struct rproc_hexagon_res sdm845_mss = { "mnoc_axi", NULL }, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", "mx", diff --git a/drivers/remoteproc/qcom_q6v5_pas.c b/drivers/remoteproc/qcom_q6v5_pas.c index a79bee901e9b..333a072121fb 100644 --- a/drivers/remoteproc/qcom_q6v5_pas.c +++ b/drivers/remoteproc/qcom_q6v5_pas.c @@ -37,9 +37,9 @@ struct adsp_data { bool has_aggre2_clk; bool auto_boot; - char **active_pd_names; char **proxy_pd_names; + const char *load_state; const char *ssr_name; const char *sysmon_name; int ssctl_id; @@ -57,10 +57,8 @@ struct qcom_adsp { struct regulator *cx_supply; struct regulator *px_supply; - struct device *active_pds[1]; struct device *proxy_pds[3]; - int active_pd_count; int proxy_pd_count; int pas_id; @@ -149,15 +147,13 @@ static int adsp_start(struct rproc *rproc) struct qcom_adsp *adsp = (struct qcom_adsp *)rproc->priv; int ret; - qcom_q6v5_prepare(&adsp->q6v5); - - ret = adsp_pds_enable(adsp, adsp->active_pds, adsp->active_pd_count); - if (ret < 0) - goto disable_irqs; + ret = qcom_q6v5_prepare(&adsp->q6v5); + if (ret) + return ret; ret = adsp_pds_enable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); if (ret < 0) - goto disable_active_pds; + goto disable_irqs; ret = clk_prepare_enable(adsp->xo); if (ret) @@ -201,8 +197,6 @@ static int adsp_start(struct rproc *rproc) clk_disable_unprepare(adsp->xo); disable_proxy_pds: adsp_pds_disable(adsp, adsp->proxy_pds, adsp->proxy_pd_count); -disable_active_pds: - adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count); disable_irqs: qcom_q6v5_unprepare(&adsp->q6v5); @@ -234,7 +228,6 @@ static int adsp_stop(struct rproc *rproc) if (ret) dev_err(adsp->dev, "failed to shutdown: %d\n", ret); - adsp_pds_disable(adsp, adsp->active_pds, adsp->active_pd_count); handover = qcom_q6v5_unprepare(&adsp->q6v5); if (handover) qcom_pas_handover(&adsp->q6v5); @@ -456,19 +449,13 @@ static int adsp_probe(struct platform_device *pdev) if (ret) goto free_rproc; - ret = adsp_pds_attach(&pdev->dev, adsp->active_pds, - desc->active_pd_names); - if (ret < 0) - goto free_rproc; - adsp->active_pd_count = ret; - ret = adsp_pds_attach(&pdev->dev, adsp->proxy_pds, desc->proxy_pd_names); if (ret < 0) - goto detach_active_pds; + goto free_rproc; adsp->proxy_pd_count = ret; - ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, + ret = qcom_q6v5_init(&adsp->q6v5, pdev, rproc, desc->crash_reason_smem, desc->load_state, qcom_pas_handover); if (ret) goto detach_proxy_pds; @@ -492,8 +479,6 @@ static int adsp_probe(struct platform_device *pdev) detach_proxy_pds: adsp_pds_detach(adsp, adsp->proxy_pds, adsp->proxy_pd_count); -detach_active_pds: - adsp_pds_detach(adsp, adsp->active_pds, adsp->active_pd_count); free_rproc: rproc_free(rproc); @@ -506,6 +491,7 @@ static int adsp_remove(struct platform_device *pdev) rproc_del(adsp->rproc); + qcom_q6v5_deinit(&adsp->q6v5); qcom_remove_glink_subdev(adsp->rproc, &adsp->glink_subdev); qcom_remove_sysmon_subdev(adsp->sysmon); qcom_remove_smd_subdev(adsp->rproc, &adsp->smd_subdev); @@ -532,14 +518,11 @@ static const struct adsp_data sm8150_adsp_resource = { .pas_id = 1, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "adsp", .ssr_name = "lpass", .sysmon_name = "adsp", .ssctl_id = 0x14, @@ -551,15 +534,12 @@ static const struct adsp_data sm8250_adsp_resource = { .pas_id = 1, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "adsp", .ssr_name = "lpass", .sysmon_name = "adsp", .ssctl_id = 0x14, @@ -571,15 +551,12 @@ static const struct adsp_data sm8350_adsp_resource = { .pas_id = 1, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "adsp", .ssr_name = "lpass", .sysmon_name = "adsp", .ssctl_id = 0x14, @@ -617,14 +594,11 @@ static const struct adsp_data sm8150_cdsp_resource = { .pas_id = 18, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "cdsp", .ssr_name = "cdsp", .sysmon_name = "cdsp", .ssctl_id = 0x17, @@ -636,14 +610,11 @@ static const struct adsp_data sm8250_cdsp_resource = { .pas_id = 18, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "cdsp", .ssr_name = "cdsp", .sysmon_name = "cdsp", .ssctl_id = 0x17, @@ -655,14 +626,11 @@ static const struct adsp_data sm8350_cdsp_resource = { .pas_id = 18, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "cdsp", .ssr_name = "cdsp", .sysmon_name = "cdsp", .ssctl_id = 0x17, @@ -675,15 +643,12 @@ static const struct adsp_data mpss_resource_init = { .minidump_id = 3, .has_aggre2_clk = false, .auto_boot = false, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", "mss", NULL }, + .load_state = "modem", .ssr_name = "mpss", .sysmon_name = "modem", .ssctl_id = 0x12, @@ -695,14 +660,11 @@ static const struct adsp_data sc8180x_mpss_resource = { .pas_id = 4, .has_aggre2_clk = false, .auto_boot = false, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "cx", NULL }, + .load_state = "modem", .ssr_name = "mpss", .sysmon_name = "modem", .ssctl_id = 0x12, @@ -725,15 +687,12 @@ static const struct adsp_data sm8150_slpi_resource = { .pas_id = 12, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "slpi", .ssr_name = "dsps", .sysmon_name = "slpi", .ssctl_id = 0x16, @@ -745,15 +704,12 @@ static const struct adsp_data sm8250_slpi_resource = { .pas_id = 12, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "slpi", .ssr_name = "dsps", .sysmon_name = "slpi", .ssctl_id = 0x16, @@ -765,15 +721,12 @@ static const struct adsp_data sm8350_slpi_resource = { .pas_id = 12, .has_aggre2_clk = false, .auto_boot = true, - .active_pd_names = (char*[]){ - "load_state", - NULL - }, .proxy_pd_names = (char*[]){ "lcx", "lmx", NULL }, + .load_state = "slpi", .ssr_name = "dsps", .sysmon_name = "slpi", .ssctl_id = 0x16, diff --git a/drivers/remoteproc/qcom_q6v5_wcss.c b/drivers/remoteproc/qcom_q6v5_wcss.c index 20d50ec7eff1..0689288a2425 100644 --- a/drivers/remoteproc/qcom_q6v5_wcss.c +++ b/drivers/remoteproc/qcom_q6v5_wcss.c @@ -1044,8 +1044,7 @@ static int q6v5_wcss_probe(struct platform_device *pdev) if (ret) goto free_rproc; - ret = qcom_q6v5_init(&wcss->q6v5, pdev, rproc, desc->crash_reason_smem, - NULL); + ret = qcom_q6v5_init(&wcss->q6v5, pdev, rproc, desc->crash_reason_smem, NULL, NULL); if (ret) goto free_rproc; @@ -1075,6 +1074,7 @@ static int q6v5_wcss_remove(struct platform_device *pdev) { struct rproc *rproc = platform_get_drvdata(pdev); + qcom_q6v5_deinit(&qproc->q6v5); rproc_del(rproc); rproc_free(rproc); From patchwork Tue Jul 20 04:36:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 481733 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3BF28C07E95 for ; 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Tue, 20 Jul 2021 04:37:55 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 36680C43145; Tue, 20 Jul 2021 04:37:55 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 197DBC43460; Tue, 20 Jul 2021 04:37:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 197DBC43460 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 05/13] arm64: dts: qcom: sc7180: Use QMP property to control load state Date: Tue, 20 Jul 2021 10:06:39 +0530 Message-Id: <1626755807-11865-6-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SC7180 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd Reviewed-by: Matthias Kaehlcke --- arch/arm64/boot/dts/qcom/sc7180.dtsi | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7180.dtsi b/arch/arm64/boot/dts/qcom/sc7180.dtsi index a5d58eb92896..d3e5b67afcb4 100644 --- a/arch/arm64/boot/dts/qcom/sc7180.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7180.dtsi @@ -15,7 +15,6 @@ #include #include #include -#include #include #include #include @@ -1893,14 +1892,15 @@ clock-names = "iface", "bus", "nav", "snoc_axi", "mnoc_axi", "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, - <&rpmhpd SC7180_CX>, + power-domains = <&rpmhpd SC7180_CX>, <&rpmhpd SC7180_MX>, <&rpmhpd SC7180_MSS>; - power-domain-names = "load_state", "cx", "mx", "mss"; + power-domain-names = "cx", "mx", "mss"; memory-region = <&mpss_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -3116,7 +3116,6 @@ mboxes = <&apss_shared 0>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { From patchwork Tue Jul 20 04:36:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 483554 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E667BC07E9B for ; Tue, 20 Jul 2021 04:42:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CEDD5610CC for ; Tue, 20 Jul 2021 04:42:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241558AbhGTEBD (ORCPT ); Tue, 20 Jul 2021 00:01:03 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:63848 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347680AbhGTD5m (ORCPT ); Mon, 19 Jul 2021 23:57:42 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1626755901; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=ALcIxj4ZxJOfR9Z9KgiHTXuV9d3iWT4nii00oofe8PE=; b=qQwpv0fORoj53QqZIFliWgf7yzLY7N22C9f68eTClKN3I/MmwS9FBoR+FiiwyBCvpo8i08Xz dqv9KuU1AbL7ZrsFC8GHw7af/h5S5ifyxZqfEooCM6i4h3/Qtvpro88CCq5KiVd1UxHMmTQA kZQT5T0iN8mFhtg5iTjk6QwqujI= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n03.prod.us-east-1.postgun.com with SMTP id 60f6532ac923fb7e09ecde31 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 20 Jul 2021 04:38:02 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 22A02C43144; Tue, 20 Jul 2021 04:38:02 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 1A307C4360C; Tue, 20 Jul 2021 04:37:54 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 1A307C4360C Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 06/13] arm64: dts: qcom: sc7280: Use QMP property to control load state Date: Tue, 20 Jul 2021 10:06:40 +0530 Message-Id: <1626755807-11865-7-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SC7280 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sc7280.dtsi | 2 -- 1 file changed, 2 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sc7280.dtsi b/arch/arm64/boot/dts/qcom/sc7280.dtsi index a8c274ad74c4..d1adf64e21e9 100644 --- a/arch/arm64/boot/dts/qcom/sc7280.dtsi +++ b/arch/arm64/boot/dts/qcom/sc7280.dtsi @@ -9,7 +9,6 @@ #include #include #include -#include #include #include #include @@ -1149,7 +1148,6 @@ IPCC_MPROC_SIGNAL_GLINK_QMP>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { From patchwork Tue Jul 20 04:36:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 481734 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0CF6DC07E95 for ; Tue, 20 Jul 2021 04:41:34 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id CA0DB6101E for ; Tue, 20 Jul 2021 04:41:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347661AbhGTD65 (ORCPT ); Mon, 19 Jul 2021 23:58:57 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:12007 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347605AbhGTD5d (ORCPT ); Mon, 19 Jul 2021 23:57:33 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1626755892; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=uDOLRdnlPFXUPeHXMyghmFKs4MVCRbX8Ir6GeasgSFM=; b=iAEWiIDsDP5wzymtqzUtwXvw9TDQlrEp+QFKVE2H57NoopoEcLClBqsyICh5M3JPRlc3k7Kr i7BkCrmDbb0arsoogF7qDccHf1zJEUQ4MMErgP3uQeMUwSZfCLWfUhFM/AIN+VbyCJuZ6W1j 3CN/pyybtIleSiEYP47ZsXmpG74= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n02.prod.us-west-2.postgun.com with SMTP id 60f65330fcf9fe7b78d89f65 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 20 Jul 2021 04:38:08 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id BEE4BC4338A; Tue, 20 Jul 2021 04:38:08 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id EA31EC43460; Tue, 20 Jul 2021 04:38:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org EA31EC43460 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 07/13] arm64: dts: qcom: sdm845: Use QMP property to control load state Date: Tue, 20 Jul 2021 10:06:41 +0530 Message-Id: <1626755807-11865-8-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SDM845 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sdm845.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi b/arch/arm64/boot/dts/qcom/sdm845.dtsi index 1796ae8372be..8c3601810fb2 100644 --- a/arch/arm64/boot/dts/qcom/sdm845.dtsi +++ b/arch/arm64/boot/dts/qcom/sdm845.dtsi @@ -2984,6 +2984,8 @@ clock-names = "iface", "bus", "mem", "gpll0_mss", "snoc_axi", "mnoc_axi", "prng", "xo"; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -2993,11 +2995,10 @@ qcom,halt-regs = <&tcsr_mutex_regs 0x23000 0x25000 0x24000>; - power-domains = <&aoss_qmp 2>, - <&rpmhpd SDM845_CX>, + power-domains = <&rpmhpd SDM845_CX>, <&rpmhpd SDM845_MX>, <&rpmhpd SDM845_MSS>; - power-domain-names = "load_state", "cx", "mx", "mss"; + power-domain-names = "cx", "mx", "mss"; mba { memory-region = <&mba_region>; @@ -4582,7 +4583,6 @@ mboxes = <&apss_shared 0>; #clock-cells = <0>; - #power-domain-cells = <1>; cx_cdev: cx { #cooling-cells = <2>; From patchwork Tue Jul 20 04:36:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 483559 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 06DE4C07E95 for ; Tue, 20 Jul 2021 04:39:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id DF71261165 for ; Tue, 20 Jul 2021 04:39:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347742AbhGTD54 (ORCPT ); Mon, 19 Jul 2021 23:57:56 -0400 Received: from m43-7.mailgun.net ([69.72.43.7]:24004 "EHLO m43-7.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347691AbhGTD5j (ORCPT ); Mon, 19 Jul 2021 23:57:39 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1626755898; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=cpUIm3+j2CRpePwfmRiIipwJKPjEvhc8C6XVVmb5SB4=; b=B9+LGr6sVNBUO+eOZr/0VwZazob/3ImykLiIxxFs0ipDfzn5/VHf11o+a0XwZgaQQkcNcihp 50Blv8V3ZIDNwMwvxH1TOCZb5+m7Vtq6dTmYwXQStYc1jSL0U6okMFfuYOQeiJBHsH0sfYeq iLdknh80yAqWuudDLs213nplTA4= X-Mailgun-Sending-Ip: 69.72.43.7 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n07.prod.us-east-1.postgun.com with SMTP id 60f653394815712f3a5eddf3 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 20 Jul 2021 04:38:17 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 4FCC8C43217; Tue, 20 Jul 2021 04:38:16 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id C0E6BC43217; Tue, 20 Jul 2021 04:38:08 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org C0E6BC43217 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 08/13] arm64: dts: qcom: sm8150: Use QMP property to control load state Date: Tue, 20 Jul 2021 10:06:42 +0530 Message-Id: <1626755807-11865-9-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8150 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8150.dtsi | 28 ++++++++++++++-------------- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 612dda0fef43..7a040b74ef5a 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -6,7 +6,6 @@ #include #include -#include #include #include #include @@ -1110,13 +1109,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, - <&rpmhpd 3>, + power-domains = <&rpmhpd 3>, <&rpmhpd 2>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&slpi_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&slpi_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -1560,13 +1560,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, - <&rpmhpd 7>, + power-domains = <&rpmhpd 7>, <&rpmhpd 0>; - power-domain-names = "load_state", "cx", "mss"; + power-domain-names = "cx", "mss"; memory-region = <&mpss_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&modem_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -2186,12 +2187,12 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, - <&rpmhpd 7>; - power-domain-names = "load_state", "cx"; + power-domains = <&rpmhpd 7>; memory-region = <&cdsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&cdsp_smp2p_out 0>; qcom,smem-state-names = "stop"; @@ -2415,7 +2416,6 @@ mboxes = <&apss_shared 0>; #clock-cells = <0>; - #power-domain-cells = <1>; }; tsens0: thermal-sensor@c263000 { @@ -2562,12 +2562,12 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, - <&rpmhpd 7>; - power-domain-names = "load_state", "cx"; + power-domains = <&rpmhpd 7>; memory-region = <&adsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&adsp_smp2p_out 0>; qcom,smem-state-names = "stop"; From patchwork Tue Jul 20 04:36:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 481732 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8BD69C07E9B for ; Tue, 20 Jul 2021 04:41:48 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 73617610CC for ; Tue, 20 Jul 2021 04:41:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242058AbhGTEBG (ORCPT ); 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Tue, 20 Jul 2021 04:38:23 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id B0D1EC4338A; Tue, 20 Jul 2021 04:38:23 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 27C3AC4338A; Tue, 20 Jul 2021 04:38:15 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 27C3AC4338A Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 09/13] arm64: dts: qcom: sm8250: Use QMP property to control load state Date: Tue, 20 Jul 2021 10:06:43 +0530 Message-Id: <1626755807-11865-10-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8250 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8250.dtsi | 22 +++++++++++----------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8250.dtsi b/arch/arm64/boot/dts/qcom/sm8250.dtsi index 4798368b02ef..535b488575f1 100644 --- a/arch/arm64/boot/dts/qcom/sm8250.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8250.dtsi @@ -13,7 +13,6 @@ #include #include #include -#include #include #include #include @@ -1968,13 +1967,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, - <&rpmhpd SM8250_LCX>, + power-domains = <&rpmhpd SM8250_LCX>, <&rpmhpd SM8250_LMX>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&slpi_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_slpi_out 0>; qcom,smem-state-names = "stop"; @@ -2034,12 +2034,12 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, - <&rpmhpd SM8250_CX>; - power-domain-names = "load_state", "cx"; + power-domains = <&rpmhpd SM8250_CX>; memory-region = <&cdsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_cdsp_out 0>; qcom,smem-state-names = "stop"; @@ -2782,7 +2782,6 @@ IPCC_MPROC_SIGNAL_GLINK_QMP>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { @@ -3699,13 +3698,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, - <&rpmhpd SM8250_LCX>, + power-domains = <&rpmhpd SM8250_LCX>, <&rpmhpd SM8250_LMX>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&adsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-state-names = "stop"; From patchwork Tue Jul 20 04:36:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 481731 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 19471C636CA for ; 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Tue, 20 Jul 2021 04:38:30 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id D719FC4338A; Tue, 20 Jul 2021 04:38:30 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 7D083C433D3; Tue, 20 Jul 2021 04:38:23 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 7D083C433D3 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 10/13] arm64: dts: qcom: sm8350: Use QMP property to control load state Date: Tue, 20 Jul 2021 10:06:44 +0530 Message-Id: <1626755807-11865-11-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Use the Qualcomm Mailbox Protocol (QMP) property to control the load state resources on SM8350 SoCs and drop deprecated power-domains exposed by AOSS QMP node. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd --- arch/arm64/boot/dts/qcom/sm8350.dtsi | 30 ++++++++++++++++-------------- 1 file changed, 16 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/qcom/sm8350.dtsi b/arch/arm64/boot/dts/qcom/sm8350.dtsi index 0d16392bb976..2d78a55f33c2 100644 --- a/arch/arm64/boot/dts/qcom/sm8350.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8350.dtsi @@ -8,7 +8,6 @@ #include #include #include -#include #include #include #include @@ -703,15 +702,16 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_MODEM>, - <&rpmhpd 0>, + power-domains = <&rpmhpd 0>, <&rpmhpd 12>; - power-domain-names = "load_state", "cx", "mss"; + power-domain-names = "cx", "mss"; interconnects = <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>; memory-region = <&pil_modem_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_modem_out 0>; qcom,smem-state-names = "stop"; @@ -771,7 +771,6 @@ mboxes = <&ipcc IPCC_CLIENT_AOP IPCC_MPROC_SIGNAL_GLINK_QMP>; #clock-cells = <0>; - #power-domain-cells = <1>; }; spmi_bus: spmi@c440000 { @@ -1070,13 +1069,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_SLPI>, - <&rpmhpd 4>, + power-domains = <&rpmhpd 4>, <&rpmhpd 5>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&pil_slpi_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_slpi_out 0>; qcom,smem-state-names = "stop"; @@ -1110,15 +1110,16 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_CDSP>, - <&rpmhpd 0>, + power-domains = <&rpmhpd 0>, <&rpmhpd 10>; - power-domain-names = "load_state", "cx", "mxc"; + power-domain-names = "cx", "mxc"; interconnects = <&compute_noc MASTER_CDSP_PROC &mc_virt SLAVE_EBI1>; memory-region = <&pil_cdsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_cdsp_out 0>; qcom,smem-state-names = "stop"; @@ -1344,13 +1345,14 @@ clocks = <&rpmhcc RPMH_CXO_CLK>; clock-names = "xo"; - power-domains = <&aoss_qmp AOSS_QMP_LS_LPASS>, - <&rpmhpd 4>, + power-domains = <&rpmhpd 4>, <&rpmhpd 5>; - power-domain-names = "load_state", "lcx", "lmx"; + power-domain-names = "lcx", "lmx"; memory-region = <&pil_adsp_mem>; + qcom,qmp = <&aoss_qmp>; + qcom,smem-states = <&smp2p_adsp_out 0>; qcom,smem-state-names = "stop"; From patchwork Tue Jul 20 04:36:45 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 483555 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id DA570C07E9B for ; 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Tue, 20 Jul 2021 04:38:39 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id A2CEFC43143; Tue, 20 Jul 2021 04:38:38 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id CFE98C433F1; Tue, 20 Jul 2021 04:38:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org CFE98C433F1 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 11/13] soc: qcom: aoss: Drop power domain support Date: Tue, 20 Jul 2021 10:06:45 +0530 Message-Id: <1626755807-11865-12-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Strip out the load state power-domain support from the driver since the low power mode signalling for the co-processors is now accessible through the direct qmp message send interface. Signed-off-by: Sibi Sankar --- v4: * Commit message change and drop incorrect cleanup on cooling device probe failures. [Matthias] drivers/soc/qcom/qcom_aoss.c | 107 ------------------------------------------- 1 file changed, 107 deletions(-) diff --git a/drivers/soc/qcom/qcom_aoss.c b/drivers/soc/qcom/qcom_aoss.c index 3f588921a7b1..dccc5d96fe0a 100644 --- a/drivers/soc/qcom/qcom_aoss.c +++ b/drivers/soc/qcom/qcom_aoss.c @@ -2,7 +2,6 @@ /* * Copyright (c) 2019, Linaro Ltd */ -#include #include #include #include @@ -11,7 +10,6 @@ #include #include #include -#include #include #include #include @@ -68,7 +66,6 @@ struct qmp_cooling_device { * @event: wait_queue for synchronization with the IRQ * @tx_lock: provides synchronization between multiple callers of qmp_send() * @qdss_clk: QDSS clock hw struct - * @pd_data: genpd data * @cooling_devs: thermal cooling devices */ struct qmp { @@ -88,20 +85,12 @@ struct qmp { struct mutex tx_lock; struct clk_hw qdss_clk; - struct genpd_onecell_data pd_data; struct qmp_cooling_device *cooling_devs; #if IS_ENABLED(CONFIG_DEBUG_FS) struct dentry *debugfs_file; #endif /* CONFIG_DEBUG_FS */ }; -struct qmp_pd { - struct qmp *qmp; - struct generic_pm_domain pd; -}; - -#define to_qmp_pd_resource(res) container_of(res, struct qmp_pd, pd) - static void qmp_kick(struct qmp *qmp) { mbox_send_message(qmp->mbox_chan, NULL); @@ -330,95 +319,6 @@ static void qmp_qdss_clk_remove(struct qmp *qmp) clk_hw_unregister(&qmp->qdss_clk); } -static int qmp_pd_power_toggle(struct qmp_pd *res, bool enable) -{ - char buf[QMP_MSG_LEN] = {}; - - snprintf(buf, sizeof(buf), - "{class: image, res: load_state, name: %s, val: %s}", - res->pd.name, enable ? "on" : "off"); - return qmp_send(res->qmp, buf, sizeof(buf)); -} - -static int qmp_pd_power_on(struct generic_pm_domain *domain) -{ - return qmp_pd_power_toggle(to_qmp_pd_resource(domain), true); -} - -static int qmp_pd_power_off(struct generic_pm_domain *domain) -{ - return qmp_pd_power_toggle(to_qmp_pd_resource(domain), false); -} - -static const char * const sdm845_resources[] = { - [AOSS_QMP_LS_CDSP] = "cdsp", - [AOSS_QMP_LS_LPASS] = "adsp", - [AOSS_QMP_LS_MODEM] = "modem", - [AOSS_QMP_LS_SLPI] = "slpi", - [AOSS_QMP_LS_SPSS] = "spss", - [AOSS_QMP_LS_VENUS] = "venus", -}; - -static int qmp_pd_add(struct qmp *qmp) -{ - struct genpd_onecell_data *data = &qmp->pd_data; - struct device *dev = qmp->dev; - struct qmp_pd *res; - size_t num = ARRAY_SIZE(sdm845_resources); - int ret; - int i; - - res = devm_kcalloc(dev, num, sizeof(*res), GFP_KERNEL); - if (!res) - return -ENOMEM; - - data->domains = devm_kcalloc(dev, num, sizeof(*data->domains), - GFP_KERNEL); - if (!data->domains) - return -ENOMEM; - - for (i = 0; i < num; i++) { - res[i].qmp = qmp; - res[i].pd.name = sdm845_resources[i]; - res[i].pd.power_on = qmp_pd_power_on; - res[i].pd.power_off = qmp_pd_power_off; - - ret = pm_genpd_init(&res[i].pd, NULL, true); - if (ret < 0) { - dev_err(dev, "failed to init genpd\n"); - goto unroll_genpds; - } - - data->domains[i] = &res[i].pd; - } - - data->num_domains = i; - - ret = of_genpd_add_provider_onecell(dev->of_node, data); - if (ret < 0) - goto unroll_genpds; - - return 0; - -unroll_genpds: - for (i--; i >= 0; i--) - pm_genpd_remove(data->domains[i]); - - return ret; -} - -static void qmp_pd_remove(struct qmp *qmp) -{ - struct genpd_onecell_data *data = &qmp->pd_data; - struct device *dev = qmp->dev; - int i; - - of_genpd_del_provider(dev->of_node); - - for (i = 0; i < data->num_domains; i++) - pm_genpd_remove(data->domains[i]); -} - static int qmp_cdev_get_max_state(struct thermal_cooling_device *cdev, unsigned long *state) { @@ -650,10 +550,6 @@ static int qmp_probe(struct platform_device *pdev) if (ret) goto err_close_qmp; - ret = qmp_pd_add(qmp); - if (ret) - goto err_remove_qdss_clk; - ret = qmp_cooling_devices_register(qmp); if (ret) dev_err(&pdev->dev, "failed to register aoss cooling devices\n"); @@ -669,8 +565,6 @@ static int qmp_probe(struct platform_device *pdev) return 0; -err_remove_qdss_clk: - qmp_qdss_clk_remove(qmp); err_close_qmp: qmp_close(qmp); err_free_mbox: @@ -689,7 +583,6 @@ static int qmp_remove(struct platform_device *pdev) #endif /* CONFIG_DEBUG_FS */ qmp_qdss_clk_remove(qmp); - qmp_pd_remove(qmp); qmp_cooling_devices_remove(qmp); qmp_close(qmp); From patchwork Tue Jul 20 04:36:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 483556 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 47259C07E95 for ; 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Tue, 20 Jul 2021 04:38:45 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 1FF7CC433F1; Tue, 20 Jul 2021 04:38:45 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 337AAC433D3; Tue, 20 Jul 2021 04:38:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 337AAC433D3 Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 12/13] dt-bindings: msm/dp: Remove aoss-qmp header Date: Tue, 20 Jul 2021 10:06:46 +0530 Message-Id: <1626755807-11865-13-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Remove the unused aoss-qmp header from the list of includes. Signed-off-by: Sibi Sankar Acked-by: Rob Herring Reviewed-by: Stephen Boyd --- Documentation/devicetree/bindings/display/msm/dp-controller.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index 64d8d9e5e47a..d89b3c510c27 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -95,7 +95,6 @@ examples: - | #include #include - #include #include displayport-controller@ae90000 { From patchwork Tue Jul 20 04:36:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sibi Sankar X-Patchwork-Id: 481730 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.7 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 154B8C07E95 for ; Tue, 20 Jul 2021 04:42:01 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id F1A6D610CC for ; Tue, 20 Jul 2021 04:42:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348746AbhGTEBO (ORCPT ); Tue, 20 Jul 2021 00:01:14 -0400 Received: from so254-9.mailgun.net ([198.61.254.9]:47394 "EHLO so254-9.mailgun.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347903AbhGTD7C (ORCPT ); Mon, 19 Jul 2021 23:59:02 -0400 DKIM-Signature: a=rsa-sha256; v=1; c=relaxed/relaxed; d=mg.codeaurora.org; q=dns/txt; s=smtp; t=1626755981; h=References: In-Reply-To: Message-Id: Date: Subject: Cc: To: From: Sender; bh=Ja0ch2BKFqV8Z+kWiGBFMXL83Jhiecq8a/U0GuvQfuI=; b=xlVv4nDs+QcR9HlnPbWdJP0x/0vAEvt62Zf5JzjlbYlvBTXdTmg80XdmEIpmcz9BXAFtJFdm Vv4ibrbxBVIYlzPZjDFl3mcbS3Ohhm4BPOfPpTTHXf5d4CXzdrIAuyI2wYKQMFtMg8j35UVZ GLNFSqLJUUnFybv0d94JluVjkWg= X-Mailgun-Sending-Ip: 198.61.254.9 X-Mailgun-Sid: WyI1YmJiNiIsICJkZXZpY2V0cmVlQHZnZXIua2VybmVsLm9yZyIsICJiZTllNGEiXQ== Received: from smtp.codeaurora.org (ec2-35-166-182-171.us-west-2.compute.amazonaws.com [35.166.182.171]) by smtp-out-n01.prod.us-east-1.postgun.com with SMTP id 60f6536856871ded7738df60 (version=TLS1.2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256); Tue, 20 Jul 2021 04:39:04 GMT Sender: sibis=codeaurora.org@mg.codeaurora.org Received: by smtp.codeaurora.org (Postfix, from userid 1001) id 9CFEBC433D3; Tue, 20 Jul 2021 04:39:03 +0000 (UTC) Received: from blr-ubuntu-87.qualcomm.com (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com [103.229.18.19]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-SHA256 (128/128 bits)) (No client certificate requested) (Authenticated sender: sibis) by smtp.codeaurora.org (Postfix) with ESMTPSA id 84E89C4323A; Tue, 20 Jul 2021 04:38:45 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 smtp.codeaurora.org 84E89C4323A Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; dmarc=none (p=none dis=none) header.from=codeaurora.org Authentication-Results: aws-us-west-2-caf-mail-1.web.codeaurora.org; spf=fail smtp.mailfrom=sibis@codeaurora.org From: Sibi Sankar To: mka@chromium.org, swboyd@chromium.org, bjorn.andersson@linaro.org, robh+dt@kernel.org Cc: ulf.hansson@linaro.org, rjw@rjwysocki.net, agross@kernel.org, ohad@wizery.com, mathieu.poirier@linaro.org, linux-arm-msm@vger.kernel.org, linux-remoteproc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dianders@chromium.org, rishabhb@codeaurora.org, sidgup@codeaurora.org, Sibi Sankar Subject: [PATCH v4 13/13] dt-bindings: soc: qcom: aoss: Delete unused power-domain definitions Date: Tue, 20 Jul 2021 10:06:47 +0530 Message-Id: <1626755807-11865-14-git-send-email-sibis@codeaurora.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> References: <1626755807-11865-1-git-send-email-sibis@codeaurora.org> Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Delete unused power-domain definitions exposed by AOSS QMP. Signed-off-by: Sibi Sankar Reviewed-by: Stephen Boyd Acked-by: Rob Herring Reviewed-by: Matthias Kaehlcke --- include/dt-bindings/power/qcom-aoss-qmp.h | 14 -------------- 1 file changed, 14 deletions(-) delete mode 100644 include/dt-bindings/power/qcom-aoss-qmp.h diff --git a/include/dt-bindings/power/qcom-aoss-qmp.h b/include/dt-bindings/power/qcom-aoss-qmp.h deleted file mode 100644 index ec336d31dee4..000000000000 --- a/include/dt-bindings/power/qcom-aoss-qmp.h +++ /dev/null @@ -1,14 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* Copyright (c) 2018, Linaro Ltd. */ - -#ifndef __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H -#define __DT_BINDINGS_POWER_QCOM_AOSS_QMP_H - -#define AOSS_QMP_LS_CDSP 0 -#define AOSS_QMP_LS_LPASS 1 -#define AOSS_QMP_LS_MODEM 2 -#define AOSS_QMP_LS_SLPI 3 -#define AOSS_QMP_LS_SPSS 4 -#define AOSS_QMP_LS_VENUS 5 - -#endif