From patchwork Wed May 17 08:37:34 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 99909 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp127166qge; Wed, 17 May 2017 01:38:21 -0700 (PDT) X-Received: by 10.98.252.8 with SMTP id e8mr2519689pfh.190.1495010301163; Wed, 17 May 2017 01:38:21 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495010301; cv=none; d=google.com; s=arc-20160816; b=SlWRiD/xjVJmxWzovUMfCO+rQKaYq2Ne5peX71UsubdNu2szas4d+NTMSh0zYPG/vO IIV7NPRQpB/9x4zIak2wpw9Tn7Vc9jCg2bIlpFiflCdggRSC5d/Bp44o0X3ieydYv5Dw aQBPFYUCk91f/9ymU8Yvc8UBp1HBQkyqcK/PqlhcovOFF5kJt+UkH0pOJ1nhroWTevx0 WDrsjMlvMGSw9Yv/wYAHoWe327DJzgksKNcJAU2XXtAsdNkS6RIguOE5XY2ws/erlQEM QEhgn2DD3Nx5LnlfMFqu7HW4kFsGHfsENTG/ozFHsdD49TeydtUGbqOYwouGqi4JrNjq Y12w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=aniLv65LvCpqqhgda1kxGW94M/sZ60vROqtypSgM7QU=; b=msLWwcJk9M1qPV9dp8B3qkQB6YCz/d1cPnv0DmhwIKpWsh+a1+ajvDOv74WEqd8/s/ tXxXt4lc+sBZbsJef0pSxrHE2tBEDtQkIbX1qxX9uQ8s40nk5ZeoJyIjGmQJ5YVsJXPV XppKTQyTGfrYxt5OFktw0T/cDomv0/O8wcppLE6yLx/1vNSX4GvFnvv40rW4fW/gMmck ltD2hpjYMFpNwf+R40BJ+vvL+H0XVigHKoNUPhggku6kqt8t5ZtFSWYQ3emiYEOSWii0 wxnYGVeyL5IziXjAA8LEVRVPr4CFcwH9hrnVkv0xOd/PdwaRXej+A6SWraMP3z2iL6Zc QC3w== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id 69si1440484pgc.164.2017.05.17.01.38.20; Wed, 17 May 2017 01:38:21 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753013AbdEQIiP (ORCPT + 7 others); Wed, 17 May 2017 04:38:15 -0400 Received: from mail-pf0-f175.google.com ([209.85.192.175]:33704 "EHLO mail-pf0-f175.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754132AbdEQIiL (ORCPT ); Wed, 17 May 2017 04:38:11 -0400 Received: by mail-pf0-f175.google.com with SMTP id e193so4001325pfh.0 for ; Wed, 17 May 2017 01:38:11 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kEvPqM9gt2KC76PKZZNkenZm9zlwpYosS1XmYfKEJLg=; b=AEPK4VhCjn/++D0vqz8LceRShw3JMI3MdKyFcYPhJ+Ab1bScgg2RYnTFbE6whkRdWB 8ozi6zHIGsDd3MZ5L68oKXRlZRtrQw9dSz5RAhA/3XQiA5P3vKkRJjFxk/CQ7br3FBui rpLSaTtRVLgP6VJ6u09C2aDGVMb3P04Kuqiq4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kEvPqM9gt2KC76PKZZNkenZm9zlwpYosS1XmYfKEJLg=; b=nhzYhdjdlc4VZyEW+RqMD194tu/n8Fy3Ut/aHTjkVReTXKkOSL3I0zKd46b1nDJvG0 c9QuwzsWeQYbkX9Mm3MssZC37Sl13hwqleJy2qLNEB8sCkNX46bKP3T5/VZoDmQ/p2gF AfYxFDyn8Gp4ft+2tHCZQ0q0UhIRqSOSDY5CSIuVGKzNfzVEQau21C5HPKSZx5A/8n5D X5AdUuKHfyYP8OXg8fWhvpppgklWNchbPDSgn2KNlFYTtmgmMWsvdU3j9zW2e0uCGEY8 HbZQprzr9EV3ROREgR3cslm6OcN0F3UfvNSyylGEwS6nMh9ffLipPuyXeH7dS68oTLRS AMjQ== X-Gm-Message-State: AODbwcCCdLjopkWl73YwwVekBTkBrJWsNQ24sv9sVb0n0XlUZP0yWkmB jlqRISTwKxe/zi2o X-Received: by 10.98.217.154 with SMTP id b26mr2469783pfl.136.1495010290256; Wed, 17 May 2017 01:38:10 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.164]) by smtp.gmail.com with ESMTPSA id u9sm3029519pgn.55.2017.05.17.01.38.06 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 May 2017 01:38:09 -0700 (PDT) From: Guodong Xu To: robh+dt@kernel.org, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, wangkefeng.wang@huawei.com, puck.chen@hisilicon.com, xuejiancheng@hisilicon.com, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Guodong Xu Subject: [PATCH 01/12] dt-bindings: arm: hisilicon: add bindings for HiKey960 board Date: Wed, 17 May 2017 16:37:34 +0800 Message-Id: <20170517083745.24479-2-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170517083745.24479-1-guodong.xu@linaro.org> References: <20170517083745.24479-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add bindings for HiKey960 Board. Signed-off-by: Guodong Xu --- Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt | 4 ++++ 1 file changed, 4 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Acked-by: Rob Herring diff --git a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt index 2e73215..7111fbc8 100644 --- a/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt +++ b/Documentation/devicetree/bindings/arm/hisilicon/hisilicon.txt @@ -4,6 +4,10 @@ Hi3660 SoC Required root node properties: - compatible = "hisilicon,hi3660"; +HiKey960 Board +Required root node properties: + - compatible = "hisilicon,hi3660-hikey960", "hisilicon,hi3660"; + Hi3798cv200 SoC Required root node properties: - compatible = "hisilicon,hi3798cv200"; From patchwork Wed May 17 08:37:39 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 99920 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp128058qge; Wed, 17 May 2017 01:41:14 -0700 (PDT) X-Received: by 10.84.224.1 with SMTP id r1mr2891108plj.78.1495010474851; Wed, 17 May 2017 01:41:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495010474; cv=none; d=google.com; s=arc-20160816; b=gjlxIP7IjpYfYjCeTXgxa3XWRXTRwc2OI7SKIydK799VNb55SDRsC6O3sa2hGGcJb8 hWPM9nIlppJg4nfKIij2Zf68cVj2Y1wyoIX25B+fwMfokUBJrImotniPSVF6Me1sW/Nb 0Veql4Elz9M9u6560A0ZeSp0KB1ldxNqmOWELWG4nZd4kc1r3U+4uC98LX3+zBEmz38d uKAyQ6MREPuaFIS/2ALS54BjekLs9z6Y7HAg1TKyWjhbHE3awCRvCop+USe/pRjJgJw7 xu/o9cEJByHlcNq69elBRIjUeCiPT4h9td1lyFETtxsKKtgwpnJIg6MG5lqCkch+LyqX 6aJQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=akQdd9Yf/5FtgpP1C5aOXaj+91+W2LYeUvCTJXwwYMk=; b=rQ0QXF1na53msbHIPRKbftnLmfgG8ndlDvpaip2WGB3k24NKMOYDTLt3M3mYIVxM0p yLhEUuWjwYjTESufjxWdrHJmADHOPtoUv6rxVVL86Gz+kgj3npxXz5uKYirQHyyBz1K9 lIdH19WYqz9xcKZsjfrmkx5TyTnmR4qY445Jsvxukl0Mw5o/zYED+Y+QfPirb6eIDSDH w5KDKBeejB7h7k3rmWJq9930nlMkWeHJitqmgKQ2HA0JA78uP4eOewVKwwscX/8kYsI1 1yVTowxiaPtK85oaDqSLPnHk3RIxfgg1LtwhYsgX6P8dNd/W1mGwiGncCrcE0Nnb2bXZ hFxA== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id l69si1468627pfc.226.2017.05.17.01.41.14; Wed, 17 May 2017 01:41:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753140AbdEQIlN (ORCPT + 7 others); Wed, 17 May 2017 04:41:13 -0400 Received: from mail-pf0-f181.google.com ([209.85.192.181]:36457 "EHLO mail-pf0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753820AbdEQIin (ORCPT ); Wed, 17 May 2017 04:38:43 -0400 Received: by mail-pf0-f181.google.com with SMTP id m17so3950930pfg.3 for ; Wed, 17 May 2017 01:38:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kj5q9rumKkNX26LaF94Lna6h3gHprFbUjS0oraq+lxw=; b=P+j0PQmMxqej4ckXXdy1sCKPRUsyBqAs6xg6WuC8JmfSJ9HK7hq06/o3flrGF6UNhi Vk2A41WZet3tS/HdCiByKC2i0gEFyf1EoQi+LMMG5W9xUHRfc6MaVdegE0XVhj+h+4/+ viNE1NmgnvPYBaIVB3gPtPqZJvCeiJSjTH4Ro= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kj5q9rumKkNX26LaF94Lna6h3gHprFbUjS0oraq+lxw=; b=CljoQIRzRbr7RVt3XCq7IyYPPOZLYMIcDFgQWzpehCsR8GQf7EIIR2a6v5WAiHprOL FGBCGGmMqkeCN0mBRtQTooae4BHnnrmVEgEAUe9HzlDRf0NcPJKyzzIOTb63LKS4gDmv ZghtQYRsWjroYn5x4zqmaLjxO1nAzTdPvc3+dJdqZ+mWVzJiJlwqdBnEaC//MCkK3n45 eVwEvH74Bo8301yH+j+5fJaBhvyXlDdoxV8JOM0ZcyHTQlXCqJ64wQ4mnLQovQTvrl/o bi0U5LGnEoF806pyLjpW5BZirP66i73XjDmBQC8chBthbwxAm+uNQ20PdGQg/i2noMiE 2LZQ== X-Gm-Message-State: AODbwcB9KqHgSvRvCn2nfoYcZjrvNfLKTk3quMbiOQPg7Ez1wpkpZzPC AvCA9GP4XP7mJza6 X-Received: by 10.99.116.82 with SMTP id e18mr2464838pgn.1.1495010322660; Wed, 17 May 2017 01:38:42 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.164]) by smtp.gmail.com with ESMTPSA id u9sm3029519pgn.55.2017.05.17.01.38.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 May 2017 01:38:42 -0700 (PDT) From: Guodong Xu To: robh+dt@kernel.org, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, wangkefeng.wang@huawei.com, puck.chen@hisilicon.com, xuejiancheng@hisilicon.com, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Wang Xiaoyin Subject: [PATCH 06/12] arm64: dts: hi3660: add gpio dtsi file for Hisilicon Hi3660 SOC Date: Wed, 17 May 2017 16:37:39 +0800 Message-Id: <20170517083745.24479-7-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170517083745.24479-1-guodong.xu@linaro.org> References: <20170517083745.24479-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Wang Xiaoyin This patch adds pl061 device nodes for Hi3660 SoC. Signed-off-by: Wang Xiaoyin --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 409 ++++++++++++++++++++++++++++++ 1 file changed, 409 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index f217c9d..3bea0d2 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -251,5 +251,414 @@ clock-names = "uartclk", "apb_pclk"; status = "disabled"; }; + + gpio0: gpio@e8a0b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 1 0 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO0>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio1: gpio@e8a0c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 1 7 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO1>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio2: gpio@e8a0d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 14 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO2>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio3: gpio@e8a0e000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0e000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 22 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO3>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio4: gpio@e8a0f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a0f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 30 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO4>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio5: gpio@e8a10000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a10000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 38 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO5>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio6: gpio@e8a11000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a11000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 46 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO6>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio7: gpio@e8a12000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a12000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 54 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO7>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio8: gpio@e8a13000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a13000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 62 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO8>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio9: gpio@e8a14000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a14000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 70 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO9>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio10: gpio@e8a15000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a15000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 78 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO10>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio11: gpio@e8a16000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a16000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 86 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO11>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio12: gpio@e8a17000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a17000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 94 3 &pmx0 7 101 1>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO12>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio13: gpio@e8a18000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a18000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 102 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO13>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio14: gpio@e8a19000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a19000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 110 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO14>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio15: gpio@e8a1a000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1a000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx0 0 118 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO15>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio16: gpio@e8a1b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO16>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio17: gpio@e8a1c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO17>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio18: gpio@ff3b4000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xff3b4000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx2 0 0 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO18>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio19: gpio@ff3b5000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xff3b5000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx2 0 8 4>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO19>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio20: gpio@e8a1f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a1f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + gpio-ranges = <&pmx1 0 0 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO20>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio21: gpio@e8a20000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xe8a20000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + gpio-ranges = <&pmx3 0 0 6>; + clocks = <&crg_ctrl HI3660_PCLK_GPIO21>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio22: gpio@fff0b000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0b000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO176 */ + gpio-ranges = <&pmx4 2 0 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO0>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio23: gpio@fff0c000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0c000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO184 */ + gpio-ranges = <&pmx4 0 6 7>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO1>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio24: gpio@fff0d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO192 */ + gpio-ranges = <&pmx4 0 13 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO2>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio25: gpio@fff0e000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0e000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO200 */ + gpio-ranges = <&pmx4 0 21 4 &pmx4 5 25 3>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO3>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio26: gpio@fff0f000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff0f000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO208 */ + gpio-ranges = <&pmx4 0 28 8>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO4>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio27: gpio@fff10000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff10000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + /* GPIO216 */ + gpio-ranges = <&pmx4 0 36 6>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO5>; + clock-names = "apb_pclk"; + status = "ok"; + }; + + gpio28: gpio@fff1d000 { + compatible = "arm,pl061", "arm,primecell"; + reg = <0 0xfff1d000 0 0x1000>; + interrupts = ; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + clocks = <&sctrl HI3660_PCLK_AO_GPIO6>; + clock-names = "apb_pclk"; + status = "ok"; + }; }; }; From patchwork Wed May 17 08:37:42 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 99916 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp127460qge; Wed, 17 May 2017 01:39:17 -0700 (PDT) X-Received: by 10.98.76.155 with SMTP id e27mr2372526pfj.77.1495010357729; Wed, 17 May 2017 01:39:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495010357; cv=none; d=google.com; s=arc-20160816; b=q4cShNcfO/avIL2VLccArLgPtatqH2ubaD7bayEADdBvYldF9VB8C56EJTxBzqI6sK GEzYauU+73oyGAwK5nKEC/unTwN7BIA3kdnko+wqBVOI1DEJL+3hnSVdoQpVoTCQu3ku wqe3KCV+FcmxJXJpa3mLfZFigi86JAt1pDbbrDnFq8ayUNJ5n8rB9NLecqxtoyPkOoqE mJuN1Lzk1xLEPvZLuRypj34DhyqQkNbpqudoVC6z9LfIBLN8ijCSDn5JnHrmZh0F/WPc a50GKfsqE5SgodIaJRfr36fqWE9w4jhmWXS2b9iYcwxdabCpAMGh4gtg90aEnKy08rf1 3JVg== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id r3si1477579pgn.278.2017.05.17.01.39.17; Wed, 17 May 2017 01:39:17 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754258AbdEQIjI (ORCPT + 7 others); Wed, 17 May 2017 04:39:08 -0400 Received: from mail-pf0-f176.google.com ([209.85.192.176]:34449 "EHLO mail-pf0-f176.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754253AbdEQIjF (ORCPT ); Wed, 17 May 2017 04:39:05 -0400 Received: by mail-pf0-f176.google.com with SMTP id 9so3988158pfj.1 for ; Wed, 17 May 2017 01:38:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MaWtk0a219bSgeAxf5iAA+S+LWJIRwcYukAEE0hna30=; b=FFGAe/6s3W92oDBpwIgPADjOMovDrAzDvXHYT31TOb9VxaWvcYH+iENJOALV40NK64 D2/DzgL23hHzzH3z8QZDWaumRKY8Gd061dB7MNCsG20CFsv+LrTthDApFU8uY5e3Oi8w eKxUhjNm1x0dSucZIklCjbXaMnBajO7DLZpqE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MaWtk0a219bSgeAxf5iAA+S+LWJIRwcYukAEE0hna30=; b=ub6gLG2sQWdqUVTIXqQK4aNnojuV3tz8CHHn/sFTVTSCA8f9899Ine8h294g1WKOic icsTQeU+yvFGxNmu3j5nn/uj4mlonQ8MCR6v4w9pKDECx9qqbBx4xB0nBuwQBiv0zZYg SABQzv+7+izKg2YjPWh9TzcEIjydkcKAg7W/6Yd4WrHWcghLqtfHSDI140DfKX12bM2/ EfLm9O9qZvapnBqkaVy/8kE2OLJhQYKizSQaXx/epbRJG8/8KIBcw1fwkp4vzPPsjsyS X8rt1uLIioP90yeBisvjgwho+3Qo95VpkYj7+1edcdpezfgTObKMXweGgwwxTW/dFGvA e3QQ== X-Gm-Message-State: AODbwcDBSOpPkxobrWCLJ5WgVgZ2/kAh24M+nosvKqZgAogel44LNi7D EcE6kVviIwmDtlMP X-Received: by 10.99.150.1 with SMTP id c1mr2547783pge.160.1495010335065; Wed, 17 May 2017 01:38:55 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.164]) by smtp.gmail.com with ESMTPSA id u9sm3029519pgn.55.2017.05.17.01.38.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 May 2017 01:38:54 -0700 (PDT) From: Guodong Xu To: robh+dt@kernel.org, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, wangkefeng.wang@huawei.com, puck.chen@hisilicon.com, xuejiancheng@hisilicon.com, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 09/12] arm64: dts: hi3660: Add pl031 rtc node Date: Wed, 17 May 2017 16:37:42 +0800 Message-Id: <20170517083745.24479-10-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170517083745.24479-1-guodong.xu@linaro.org> References: <20170517083745.24479-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chen Feng Add dts node to enable pl031 rtc. Signed-off-by: Chen Feng --- arch/arm64/boot/dts/hisilicon/hi3660.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi index 0951a29..c2bca5d 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi3660.dtsi @@ -312,6 +312,14 @@ status = "disabled"; }; + rtc0: rtc@fff04000 { + compatible = "arm,pl031", "arm,primecell"; + reg = <0x0 0Xfff04000 0x0 0x1000>; + interrupts = ; + clocks = <&crg_ctrl HI3660_PCLK>; + clock-names = "apb_pclk"; + }; + gpio0: gpio@e8a0b000 { compatible = "arm,pl061", "arm,primecell"; reg = <0 0xe8a0b000 0 0x1000>; From patchwork Wed May 17 08:37:44 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 99918 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp127470qge; Wed, 17 May 2017 01:39:18 -0700 (PDT) X-Received: by 10.98.133.145 with SMTP id m17mr2511880pfk.164.1495010358710; Wed, 17 May 2017 01:39:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495010358; cv=none; d=google.com; s=arc-20160816; b=Z/2kXLL11+RDr9VNc1vprIeTWr9pwt40n7REfyOM+fc2Hv+H8Qg5jib2bdzYGW1l+4 rCAte0z30TKN/3KPdipYKbe8LP45cdC07Lp1PZZln69hzyJmNJ3HSMVhYKIeUE6POcFR YhOI01HpwH5MfY3D87IRHYeDtHkmTWBsdYxxaFiV06Uwd5FFLo03dr//M7mJ4f9qwKJh deSThcEShklVLDdCcI2KbFIQ3dt1/mMMoUWvHEeQgJkR44z2oR5cuh1GFyNksY+21i56 OozHx0/i1SXyDfw8OXl/3KjumeHEJWLux4JzfTZXJFGmaW6FOynamIWfkn6SlrNSyNw/ XewQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=YSt6xsUMRjxFB75t1KHJc8EQwlo/ePt6kqa+nJetclY=; b=NIWHjFXlb08kBCpmOiM20N/wyha+r4We+LZ3Sd+O3/fKRELcMO/AH6pp5YFOax7NFC S/7rkSxiL1dD2QvGXZy/XAlRTJcgKOP759WST3k9KHPztEhXdW2YWbmJouzYhi/CaypA MFEBpRNJv7paenMHnGKTUtwUE0a67X1QXuu2OwLzSMnAM24wTygJBiipymEgvuiDYvEv 0YOFq6cqDhQxACob+sEVUIjsl7hKHSc5XpKhO9qxBDrNoFBkt4e8Y2dXWI+1HdESY694 7LxoljnOiK2eetCfgPBcmgz1sVTuoEMaoYd6nvkZ8HvkUj4aPkqNeJIztegJy1TKCHiM IS/Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r3si1477579pgn.278.2017.05.17.01.39.18; Wed, 17 May 2017 01:39:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754253AbdEQIjQ (ORCPT + 7 others); Wed, 17 May 2017 04:39:16 -0400 Received: from mail-pf0-f179.google.com ([209.85.192.179]:32925 "EHLO mail-pf0-f179.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754261AbdEQIjJ (ORCPT ); Wed, 17 May 2017 04:39:09 -0400 Received: by mail-pf0-f179.google.com with SMTP id e193so4012938pfh.0 for ; Wed, 17 May 2017 01:39:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=F6OLmxIzmdyqckKq3Xddnw9jIsLgpUabHF1SQLJRRI4=; b=EcAqdmqIvomS2Vm/kLcYUbhmAVNt6StR8uWi+E4cC9AvhgYaiMzLGagzAqClPCA1zv 6gVZQrx9QMq/zxx8l+TmctX+VY59oqwdK7X9zNebHJKjCV3k2RR5bndu+N++wCMRouCf XRqUqyyQ6iTOkaXVaQtt7qG18Y6R/KhSIYGoo= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=F6OLmxIzmdyqckKq3Xddnw9jIsLgpUabHF1SQLJRRI4=; b=SeYEGpTFUwh2Ntj8lLlQ3+f38uUU2SwCzmHa9jhHpPGxR8zPTTd9bKFtjeQ77wLduF YoJkteA0TEwvg2SVk6c75JIaqyAJieI3YPmFCQAF3VEN9LsYHD+pEGV+FsqCWWDFzWXc SxQqd9yhXWHHjAsv9A1axNlWhF3/fPvIQqJ5l+6wmVWCt3EKH8d1h720hBfBMdIXjsyz Zumlulv+fjmDZ6kdgXcMERrSCw5xQCrpsF14VZsJNNhJSgWRsM4ytXMU93a0BYB64ON1 zb8zvCJ4TKTVNCINQvtGPyU2lh0+aRiOCfPWB9gL/veP+bYCy/Aw2FwlH/pBomeg5YZ5 kA3Q== X-Gm-Message-State: AODbwcDAdhh0d7NGvvfgqUhI+8gCuQFVD3ybmv9raatDctTRQQlsPXk0 +Ql4TJbJmLg5nzrn X-Received: by 10.99.127.73 with SMTP id p9mr2531878pgn.169.1495010344061; Wed, 17 May 2017 01:39:04 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.164]) by smtp.gmail.com with ESMTPSA id u9sm3029519pgn.55.2017.05.17.01.38.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 May 2017 01:39:03 -0700 (PDT) From: Guodong Xu To: robh+dt@kernel.org, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, wangkefeng.wang@huawei.com, puck.chen@hisilicon.com, xuejiancheng@hisilicon.com, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Chen Jun , John Stultz , Guodong Xu Subject: [PATCH 11/12] arm64: dts: hi3660: add power key dts node Date: Wed, 17 May 2017 16:37:44 +0800 Message-Id: <20170517083745.24479-12-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170517083745.24479-1-guodong.xu@linaro.org> References: <20170517083745.24479-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org From: Chen Jun We use gpio_034 as power key on hikey960, and set gpio with pull-up state, when key press the voltage on the gpio will come to lower, and power key event will be reported. Signed-off-by: Chen Jun Signed-off-by: John Stultz Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 79735ee..6de86c0 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -10,6 +10,8 @@ #include "hi3660.dtsi" #include "hikey960-pinctrl.dtsi" #include +#include +#include / { model = "HiKey960"; @@ -32,6 +34,21 @@ /* rewrite this at bootloader */ reg = <0x0 0x0 0x0 0x0>; }; + + soc { + keys: gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pwr_key_pmx_func &pwr_key_cfg_func>; + + power { + wakeup-source; + gpios = <&gpio4 2 GPIO_ACTIVE_LOW>; + label = "GPIO Power"; + linux,code = ; + }; + }; + }; }; &i2c0 { From patchwork Wed May 17 08:37:45 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guodong Xu X-Patchwork-Id: 99917 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp127469qge; Wed, 17 May 2017 01:39:18 -0700 (PDT) X-Received: by 10.84.236.12 with SMTP id q12mr2880411plk.123.1495010358413; Wed, 17 May 2017 01:39:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495010358; cv=none; d=google.com; s=arc-20160816; b=LOdsCDbIvG9XE9CYOSmHS6gtDlXvIuKUzbhDn+VmM77CdN4RsFknqeRMVEQggW4wfO cgcnxDnOqw3qDb1/0ib9cYdP/Xi13aNS9Oe4VmOeYrIm2sPl6QFJV2HU1RAPPEI4/sM/ cdY6wkDR/5SAHCBLDcvFw1hm+dnpFSfvjOK75dc2qG0EKwI0ov1DfVQLmMbcgXN0h/xL oG4QuhxSZL51pjkECOhhhGq8upi+PnumE9JfQ+VQpuZhf2an91V9boKlKpgukxle5TnV SgVhu8RMBiuQpDmNy9Ock8DGTltcGGOfcVlbR6+PHN8AkfwyKf8AQbDrCQ+uK4TmsJz0 5EsQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=vpIl6UTioqscPZ/6Y5AHCaOTAxoIgL5KilOwruZ7UfA=; b=DoHA/iEzEarpwALRvDM6AVMVi6YSO3zUtqwyKnOwo95rwyPYVpt1kRyfouZPWPfsU1 M1r6amG4D+dvWbqsrRahsKrcwSO9iqrI4p14f2TQKJNIWleuikMLWJSadJgxzt/i9s+D hKzmc0H3J7AnCRQug7ZexjDWLe49gSm7NIHuI3zq0QX/qTyeOYBEnpVChUPbJbCLt/Tp NAbI6ieZbMBSPLALULQ1I8DbA9Dud03rlIROpvca4bcz/3N5LZdu1WbLCmCk+gfu44vm fBvxCIen5gjBy43R9q1jVORy8a0+/t4zEkUmRNAhz9CBfrsAV9231e+V2IlRXl/Ba8F+ 5znw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r3si1477579pgn.278.2017.05.17.01.39.18; Wed, 17 May 2017 01:39:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754266AbdEQIjO (ORCPT + 7 others); Wed, 17 May 2017 04:39:14 -0400 Received: from mail-pf0-f182.google.com ([209.85.192.182]:36564 "EHLO mail-pf0-f182.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754260AbdEQIjJ (ORCPT ); Wed, 17 May 2017 04:39:09 -0400 Received: by mail-pf0-f182.google.com with SMTP id m17so3956161pfg.3 for ; Wed, 17 May 2017 01:39:09 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XQG3jLNAKCdaavzcr5ZRCJk5/GVomXK3lU+SfAZlrio=; b=Q1hy1QPlVk5m3dkyYSHhIJfVOMD7ISy+3KPbwZ0Cz8mLqYYs0duv9PuIDscx0Aw5YG 0PpoWOUhPn/hsZ9/tFIPKspZFl5Gr4PC0GlQ46nm3bR0w9OGwEtG5TI99vfcsTVAnolW FJM47tGnbnb1rlk8FOS/l6XnWU/NF7G9Y0DsY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XQG3jLNAKCdaavzcr5ZRCJk5/GVomXK3lU+SfAZlrio=; b=ERb8aNZuHIjF3whuiBVEdn1YIdyhYzc94ZJPOABSQqdpYssskd13QuRxoamccuxn/g B4vAuZG2Q/pRz9iJHXTpUe2h1gIsCaYCSmRSZIP74tgzRKb6A2wCqtiC/jAkzYJw07Ky 86wpTOAbpmFy8ZiHmT5QrtgiU+6zEmox9Idl5ndlYYCKHcOvpD/K1DqpRRSWvT3UN9mQ nAiDzjVJ5lHeJK9ZfbgmosELw0h1moEcRayfnwG+f8/QNnpGr5zYlpPrCEQ/Yh8Do+jB jatUxpDAkHeDBqwHoQ+03gakneTm3Ivxz3+4xJUUD0wy1ato66Slh6AncUY/qwNm3ueH vqog== X-Gm-Message-State: AODbwcBaNLT05m0NgZHhVpPS3YNztiio1UfEnRNbmuTHnnuOn0bQlkGc r5syQ2ER3AFHesvD X-Received: by 10.98.222.133 with SMTP id h127mr2384121pfg.63.1495010348183; Wed, 17 May 2017 01:39:08 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.164]) by smtp.gmail.com with ESMTPSA id u9sm3029519pgn.55.2017.05.17.01.39.04 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 17 May 2017 01:39:07 -0700 (PDT) From: Guodong Xu To: robh+dt@kernel.org, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, wangkefeng.wang@huawei.com, puck.chen@hisilicon.com, xuejiancheng@hisilicon.com, devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Guodong Xu Subject: [PATCH 12/12] arm64: dts: hikey960: add LED nodes Date: Wed, 17 May 2017 16:37:45 +0800 Message-Id: <20170517083745.24479-13-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170517083745.24479-1-guodong.xu@linaro.org> References: <20170517083745.24479-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org HiKey960 has four user LEDs, and two special purpose LEDs: WiFi and BT respectively. All of them are implemented as GPIO. Signed-off-by: Guodong Xu --- arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts | 48 +++++++++++++++++++++++ 1 file changed, 48 insertions(+) -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts index 6de86c0..4839885 100644 --- a/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts +++ b/arch/arm64/boot/dts/hisilicon/hi3660-hikey960.dts @@ -48,6 +48,54 @@ linux,code = ; }; }; + + leds { + compatible = "gpio-leds"; + status = "disabled"; + user_led1 { + label = "user_led1"; + /* gpio_150_user_led1 */ + gpios = <&gpio18 6 0>; + linux,default-trigger = "heartbeat"; + }; + + user_led2 { + label = "user_led2"; + /* gpio_151_user_led2 */ + gpios = <&gpio18 7 0>; + linux,default-trigger = "mmc0"; + }; + + user_led3 { + label = "user_led3"; + /* gpio_189_user_led3 */ + gpios = <&gpio23 5 0>; + default-state = "off"; + }; + + user_led4 { + label = "user_led4"; + /* gpio_190_user_led4 */ + gpios = <&gpio23 6 0>; + linux,default-trigger = "cpu0"; + }; + + wlan_active_led { + label = "wifi_active"; + /* gpio_205_wifi_active */ + gpios = <&gpio25 5 0>; + linux,default-trigger = "phy0tx"; + default-state = "off"; + }; + + bt_active_led { + label = "bt_active"; + gpios = <&gpio25 7 0>; + /* gpio_207_user_led1 */ + linux,default-trigger = "hci0rx"; + default-state = "off"; + }; + }; }; };