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Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.4; Fri, 30 Jul 2021 16:19:07 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:07 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 00E8245D; Fri, 30 Jul 2021 15:19:06 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 02/27] ALSA: hda/cs8409: Move arrays of configuration to a new file Date: Fri, 30 Jul 2021 16:18:19 +0100 Message-ID: <20210730151844.7873-3-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: xAt8I9x5fJ8SIAiQPodGRrxZZIvOEOuh X-Proofpoint-ORIG-GUID: xAt8I9x5fJ8SIAiQPodGRrxZZIvOEOuh X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Lucas Tanure X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Lucas Tanure Signed-off-by: Lucas Tanure Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/Makefile | 2 +- sound/pci/hda/patch_cs8409-tables.c | 220 ++++++++++++++++++++++++++++ sound/pci/hda/patch_cs8409.c | 218 +-------------------------- sound/pci/hda/patch_cs8409.h | 19 +++ 4 files changed, 241 insertions(+), 218 deletions(-) create mode 100644 sound/pci/hda/patch_cs8409-tables.c diff --git a/sound/pci/hda/Makefile b/sound/pci/hda/Makefile index 1b73e08dc563..b8fa682ce66a 100644 --- a/sound/pci/hda/Makefile +++ b/sound/pci/hda/Makefile @@ -20,7 +20,7 @@ snd-hda-codec-analog-objs := patch_analog.o snd-hda-codec-idt-objs := patch_sigmatel.o snd-hda-codec-si3054-objs := patch_si3054.o snd-hda-codec-cirrus-objs := patch_cirrus.o -snd-hda-codec-cs8409-objs := patch_cs8409.o +snd-hda-codec-cs8409-objs := patch_cs8409.o patch_cs8409-tables.o snd-hda-codec-ca0110-objs := patch_ca0110.o snd-hda-codec-ca0132-objs := patch_ca0132.o snd-hda-codec-conexant-objs := patch_conexant.o diff --git a/sound/pci/hda/patch_cs8409-tables.c b/sound/pci/hda/patch_cs8409-tables.c new file mode 100644 index 000000000000..4adc7a4c4a25 --- /dev/null +++ b/sound/pci/hda/patch_cs8409-tables.c @@ -0,0 +1,220 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * patch_cs8409-tables.c -- HD audio interface patch for Cirrus Logic CS8409 HDA bridge chip + * + * Copyright (C) 2021 Cirrus Logic, Inc. and + * Cirrus Logic International Semiconductor Ltd. + * + * Author: Lucas Tanure + */ + +#include "patch_cs8409.h" + +/* Dell Inspiron platforms + * with cs8409 bridge and cs42l42 codec + */ +const struct snd_pci_quirk cs8409_fixup_tbl[] = { + SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A24, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A25, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A29, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A2A, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A2B, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0AB0, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB2, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB1, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB3, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB4, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB5, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AD9, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0ADA, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0ADB, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0ADC, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AF4, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AF5, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0A77, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A78, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A79, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A7A, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A7D, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A7E, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A7F, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A80, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0ADF, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AE0, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AE1, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AE2, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AE9, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEA, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEB, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEC, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AED, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG), + {} /* terminator */ +}; + +/* Dell Inspiron models with cs8409/cs42l42 */ +const struct hda_model_fixup cs8409_models[] = { + { .id = CS8409_BULLSEYE, .name = "bullseye" }, + { .id = CS8409_WARLOCK, .name = "warlock" }, + { .id = CS8409_CYBORG, .name = "cyborg" }, + {} +}; + +const struct hda_fixup cs8409_fixups[] = { + [CS8409_BULLSEYE] = { + .type = HDA_FIXUP_PINS, + .v.pins = cs8409_cs42l42_pincfgs, + .chained = true, + .chain_id = CS8409_FIXUPS, + }, + [CS8409_WARLOCK] = { + .type = HDA_FIXUP_PINS, + .v.pins = cs8409_cs42l42_pincfgs, + .chained = true, + .chain_id = CS8409_FIXUPS, + }, + [CS8409_CYBORG] = { + .type = HDA_FIXUP_PINS, + .v.pins = cs8409_cs42l42_pincfgs, + .chained = true, + .chain_id = CS8409_FIXUPS, + }, + [CS8409_FIXUPS] = { + .type = HDA_FIXUP_FUNC, + .v.func = cs8409_cs42l42_fixups, + }, +}; + +const struct hda_verb cs8409_cs42l42_init_verbs[] = { + { 0x01, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */ + { 0x47, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */ + { 0x47, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */ + { 0x47, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */ + { 0x47, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */ + { 0x47, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */ + {} /* terminator */ +}; + +const struct hda_pintbl cs8409_cs42l42_pincfgs[] = { + { 0x24, 0x042120f0 }, /* ASP-1-TX */ + { 0x34, 0x04a12050 }, /* ASP-1-RX */ + { 0x2c, 0x901000f0 }, /* ASP-2-TX */ + { 0x44, 0x90a00090 }, /* DMIC-1 */ + {} /* terminator */ +}; + +/* Vendor specific HW configuration for CS42L42 */ +const struct cs8409_i2c_param cs42l42_init_reg_seq[] = { + { 0x1010, 0xB0 }, + { 0x1D01, 0x00 }, + { 0x1D02, 0x06 }, + { 0x1D03, 0x00 }, + { 0x1107, 0x01 }, + { 0x1009, 0x02 }, + { 0x1007, 0x03 }, + { 0x1201, 0x00 }, + { 0x1208, 0x13 }, + { 0x1205, 0xFF }, + { 0x1206, 0x00 }, + { 0x1207, 0x20 }, + { 0x1202, 0x0D }, + { 0x2A02, 0x02 }, + { 0x2A03, 0x00 }, + { 0x2A04, 0x00 }, + { 0x2A05, 0x02 }, + { 0x2A06, 0x00 }, + { 0x2A07, 0x20 }, + { 0x2A08, 0x02 }, + { 0x2A09, 0x00 }, + { 0x2A0A, 0x80 }, + { 0x2A0B, 0x02 }, + { 0x2A0C, 0x00 }, + { 0x2A0D, 0xA0 }, + { 0x2A01, 0x0C }, + { 0x2902, 0x01 }, + { 0x2903, 0x02 }, + { 0x2904, 0x00 }, + { 0x2905, 0x00 }, + { 0x2901, 0x01 }, + { 0x1101, 0x0A }, + { 0x1102, 0x84 }, + { 0x2301, 0x00 }, + { 0x2303, 0x00 }, + { 0x2302, 0x3f }, + { 0x2001, 0x03 }, + { 0x1B75, 0xB6 }, + { 0x1B73, 0xC2 }, + { 0x1129, 0x01 }, + { 0x1121, 0xF3 }, + { 0x1103, 0x20 }, + { 0x1105, 0x00 }, + { 0x1112, 0xC0 }, + { 0x1113, 0x80 }, + { 0x1C03, 0xC0 }, + { 0x1105, 0x00 }, + { 0x1112, 0xC0 }, + { 0x1101, 0x02 }, + {} /* Terminator */ +}; + +/* Vendor specific hw configuration for CS8409 */ +const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = { + { 0x47, 0x00, 0xb008 }, /* +PLL1/2_EN, +I2C_EN */ + { 0x47, 0x01, 0x0002 }, /* ASP1/2_EN=0, ASP1_STP=1 */ + { 0x47, 0x02, 0x0a80 }, /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */ + { 0x47, 0x19, 0x0800 }, /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ + { 0x47, 0x1a, 0x0820 }, /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */ + { 0x47, 0x29, 0x0800 }, /* ASP2.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ + { 0x47, 0x2a, 0x2800 }, /* ASP2.A: TX.RAP=1, TX.RSZ=24 bits, TX.RCS=0 */ + { 0x47, 0x39, 0x0800 }, /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */ + { 0x47, 0x3a, 0x0800 }, /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */ + { 0x47, 0x03, 0x8000 }, /* ASP1: LCHI = 00h */ + { 0x47, 0x04, 0x28ff }, /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */ + { 0x47, 0x05, 0x0062 }, /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */ + { 0x47, 0x06, 0x801f }, /* ASP2: LCHI=1Fh */ + { 0x47, 0x07, 0x283f }, /* ASP2: MC/SC_SRCSEL=PLL1, LCPR=3Fh */ + { 0x47, 0x08, 0x805c }, /* ASP2: 5050=1, MCEN=0, FSD=010, SCPOL_IN/OUT=1, SCDIV=1:16 */ + { 0x47, 0x09, 0x0023 }, /* DMIC1_MO=10b, DMIC1/2_SR=1 */ + { 0x47, 0x0a, 0x0000 }, /* ASP1/2_BEEP=0 */ + { 0x47, 0x01, 0x0062 }, /* ASP1/2_EN=1, ASP1_STP=1 */ + { 0x47, 0x00, 0x9008 }, /* -PLL2_EN */ + { 0x47, 0x68, 0x0000 }, /* TX2.A: pre-scale att.=0 dB */ + { 0x47, 0x82, 0xfc03 }, /* ASP1/2_xxx_EN=1, ASP1/2_MCLK_EN=0, DMIC1_SCL_EN=1 */ + { 0x47, 0xc0, 0x9999 }, /* test mode on */ + { 0x47, 0xc5, 0x0000 }, /* GPIO hysteresis = 30 us */ + { 0x47, 0xc0, 0x0000 }, /* test mode off */ + {} /* Terminator */ +}; + +const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[] = { + { 0x47, 0x65, 0x4000 }, /* EQ_SEL=1, EQ1/2_EN=0 */ + { 0x47, 0x64, 0x4000 }, /* +EQ_ACC */ + { 0x47, 0x65, 0x4010 }, /* +EQ2_EN */ + { 0x47, 0x63, 0x0647 }, /* EQ_DATA_HI=0x0647 */ + { 0x47, 0x64, 0xc0c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=0, EQ_DATA_LO=0x67 */ + { 0x47, 0x63, 0x0647 }, /* EQ_DATA_HI=0x0647 */ + { 0x47, 0x64, 0xc1c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=1, EQ_DATA_LO=0x67 */ + { 0x47, 0x63, 0xf370 }, /* EQ_DATA_HI=0xf370 */ + { 0x47, 0x64, 0xc271 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=2, EQ_DATA_LO=0x71 */ + { 0x47, 0x63, 0x1ef8 }, /* EQ_DATA_HI=0x1ef8 */ + { 0x47, 0x64, 0xc348 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=3, EQ_DATA_LO=0x48 */ + { 0x47, 0x63, 0xc110 }, /* EQ_DATA_HI=0xc110 */ + { 0x47, 0x64, 0xc45a }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=4, EQ_DATA_LO=0x5a */ + { 0x47, 0x63, 0x1f29 }, /* EQ_DATA_HI=0x1f29 */ + { 0x47, 0x64, 0xc574 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=5, EQ_DATA_LO=0x74 */ + { 0x47, 0x63, 0x1d7a }, /* EQ_DATA_HI=0x1d7a */ + { 0x47, 0x64, 0xc653 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=6, EQ_DATA_LO=0x53 */ + { 0x47, 0x63, 0xc38c }, /* EQ_DATA_HI=0xc38c */ + { 0x47, 0x64, 0xc714 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=7, EQ_DATA_LO=0x14 */ + { 0x47, 0x63, 0x1ca3 }, /* EQ_DATA_HI=0x1ca3 */ + { 0x47, 0x64, 0xc8c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=8, EQ_DATA_LO=0xc7 */ + { 0x47, 0x63, 0xc38c }, /* EQ_DATA_HI=0xc38c */ + { 0x47, 0x64, 0xc914 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=9, EQ_DATA_LO=0x14 */ + { 0x47, 0x64, 0x0000 }, /* -EQ_ACC, -EQ_WRT */ + {} /* Terminator */ +}; diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 9b16f1b5b828..b56fc89ad2cd 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -11,13 +11,6 @@ #include #include #include -#include -#include -#include -#include "hda_local.h" -#include "hda_auto_parser.h" -#include "hda_jack.h" -#include "hda_generic.h" #include "patch_cs8409.h" @@ -52,79 +45,6 @@ static int cs8409_parse_auto_config(struct hda_codec *codec) return 0; } -/* Dell Inspiron models with cs8409/cs42l42 */ -static const struct hda_model_fixup cs8409_models[] = { - { .id = CS8409_BULLSEYE, .name = "bullseye" }, - { .id = CS8409_WARLOCK, .name = "warlock" }, - { .id = CS8409_CYBORG, .name = "cyborg" }, - {} -}; - -/* Dell Inspiron platforms - * with cs8409 bridge and cs42l42 codec - */ -static const struct snd_pci_quirk cs8409_fixup_tbl[] = { - SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A24, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A25, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A29, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A2A, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A2B, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0AB0, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB2, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB1, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB3, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB4, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB5, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AD9, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0ADA, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0ADB, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0ADC, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AF4, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AF5, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0A77, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A78, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A79, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A7A, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A7D, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A7E, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A7F, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A80, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0ADF, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AE0, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AE1, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AE2, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AE9, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEA, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEB, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEC, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AED, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG), - {} /* terminator */ -}; - -static const struct hda_verb cs8409_cs42l42_init_verbs[] = { - { 0x01, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */ - { 0x47, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */ - { 0x47, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */ - { 0x47, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */ - { 0x47, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */ - { 0x47, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */ - {} /* terminator */ -}; - -static const struct hda_pintbl cs8409_cs42l42_pincfgs[] = { - { 0x24, 0x042120f0 }, /* ASP-1-TX */ - { 0x34, 0x04a12050 }, /* ASP-1-RX */ - { 0x2c, 0x901000f0 }, /* ASP-2-TX */ - { 0x44, 0x90a00090 }, /* DMIC-1 */ - {} /* terminator */ -}; - static struct cs8409_spec *cs8409_alloc_spec(struct hda_codec *codec) { struct cs8409_spec *spec; @@ -139,117 +59,6 @@ static struct cs8409_spec *cs8409_alloc_spec(struct hda_codec *codec) return spec; } -/* Vendor specific HW configuration for CS42L42 */ -static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = { - { 0x1010, 0xB0 }, - { 0x1D01, 0x00 }, - { 0x1D02, 0x06 }, - { 0x1D03, 0x00 }, - { 0x1107, 0x01 }, - { 0x1009, 0x02 }, - { 0x1007, 0x03 }, - { 0x1201, 0x00 }, - { 0x1208, 0x13 }, - { 0x1205, 0xFF }, - { 0x1206, 0x00 }, - { 0x1207, 0x20 }, - { 0x1202, 0x0D }, - { 0x2A02, 0x02 }, - { 0x2A03, 0x00 }, - { 0x2A04, 0x00 }, - { 0x2A05, 0x02 }, - { 0x2A06, 0x00 }, - { 0x2A07, 0x20 }, - { 0x2A08, 0x02 }, - { 0x2A09, 0x00 }, - { 0x2A0A, 0x80 }, - { 0x2A0B, 0x02 }, - { 0x2A0C, 0x00 }, - { 0x2A0D, 0xA0 }, - { 0x2A01, 0x0C }, - { 0x2902, 0x01 }, - { 0x2903, 0x02 }, - { 0x2904, 0x00 }, - { 0x2905, 0x00 }, - { 0x2901, 0x01 }, - { 0x1101, 0x0A }, - { 0x1102, 0x84 }, - { 0x2301, 0x00 }, - { 0x2303, 0x00 }, - { 0x2302, 0x3f }, - { 0x2001, 0x03 }, - { 0x1B75, 0xB6 }, - { 0x1B73, 0xC2 }, - { 0x1129, 0x01 }, - { 0x1121, 0xF3 }, - { 0x1103, 0x20 }, - { 0x1105, 0x00 }, - { 0x1112, 0xC0 }, - { 0x1113, 0x80 }, - { 0x1C03, 0xC0 }, - { 0x1105, 0x00 }, - { 0x1112, 0xC0 }, - { 0x1101, 0x02 }, - {} /* Terminator */ -}; - -/* Vendor specific hw configuration for CS8409 */ -static const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = { - { 0x47, 0x00, 0xb008 }, /* +PLL1/2_EN, +I2C_EN */ - { 0x47, 0x01, 0x0002 }, /* ASP1/2_EN=0, ASP1_STP=1 */ - { 0x47, 0x02, 0x0a80 }, /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */ - { 0x47, 0x19, 0x0800 }, /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ - { 0x47, 0x1a, 0x0820 }, /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */ - { 0x47, 0x29, 0x0800 }, /* ASP2.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ - { 0x47, 0x2a, 0x2800 }, /* ASP2.A: TX.RAP=1, TX.RSZ=24 bits, TX.RCS=0 */ - { 0x47, 0x39, 0x0800 }, /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */ - { 0x47, 0x3a, 0x0800 }, /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */ - { 0x47, 0x03, 0x8000 }, /* ASP1: LCHI = 00h */ - { 0x47, 0x04, 0x28ff }, /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */ - { 0x47, 0x05, 0x0062 }, /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */ - { 0x47, 0x06, 0x801f }, /* ASP2: LCHI=1Fh */ - { 0x47, 0x07, 0x283f }, /* ASP2: MC/SC_SRCSEL=PLL1, LCPR=3Fh */ - { 0x47, 0x08, 0x805c }, /* ASP2: 5050=1, MCEN=0, FSD=010, SCPOL_IN/OUT=1, SCDIV=1:16 */ - { 0x47, 0x09, 0x0023 }, /* DMIC1_MO=10b, DMIC1/2_SR=1 */ - { 0x47, 0x0a, 0x0000 }, /* ASP1/2_BEEP=0 */ - { 0x47, 0x01, 0x0062 }, /* ASP1/2_EN=1, ASP1_STP=1 */ - { 0x47, 0x00, 0x9008 }, /* -PLL2_EN */ - { 0x47, 0x68, 0x0000 }, /* TX2.A: pre-scale att.=0 dB */ - { 0x47, 0x82, 0xfc03 }, /* ASP1/2_xxx_EN=1, ASP1/2_MCLK_EN=0, DMIC1_SCL_EN=1 */ - { 0x47, 0xc0, 0x9999 }, /* test mode on */ - { 0x47, 0xc5, 0x0000 }, /* GPIO hysteresis = 30 us */ - { 0x47, 0xc0, 0x0000 }, /* test mode off */ - {} /* Terminator */ -}; - -static const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[] = { - { 0x47, 0x65, 0x4000 }, /* EQ_SEL=1, EQ1/2_EN=0 */ - { 0x47, 0x64, 0x4000 }, /* +EQ_ACC */ - { 0x47, 0x65, 0x4010 }, /* +EQ2_EN */ - { 0x47, 0x63, 0x0647 }, /* EQ_DATA_HI=0x0647 */ - { 0x47, 0x64, 0xc0c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=0, EQ_DATA_LO=0x67 */ - { 0x47, 0x63, 0x0647 }, /* EQ_DATA_HI=0x0647 */ - { 0x47, 0x64, 0xc1c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=1, EQ_DATA_LO=0x67 */ - { 0x47, 0x63, 0xf370 }, /* EQ_DATA_HI=0xf370 */ - { 0x47, 0x64, 0xc271 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=2, EQ_DATA_LO=0x71 */ - { 0x47, 0x63, 0x1ef8 }, /* EQ_DATA_HI=0x1ef8 */ - { 0x47, 0x64, 0xc348 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=3, EQ_DATA_LO=0x48 */ - { 0x47, 0x63, 0xc110 }, /* EQ_DATA_HI=0xc110 */ - { 0x47, 0x64, 0xc45a }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=4, EQ_DATA_LO=0x5a */ - { 0x47, 0x63, 0x1f29 }, /* EQ_DATA_HI=0x1f29 */ - { 0x47, 0x64, 0xc574 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=5, EQ_DATA_LO=0x74 */ - { 0x47, 0x63, 0x1d7a }, /* EQ_DATA_HI=0x1d7a */ - { 0x47, 0x64, 0xc653 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=6, EQ_DATA_LO=0x53 */ - { 0x47, 0x63, 0xc38c }, /* EQ_DATA_HI=0xc38c */ - { 0x47, 0x64, 0xc714 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=7, EQ_DATA_LO=0x14 */ - { 0x47, 0x63, 0x1ca3 }, /* EQ_DATA_HI=0x1ca3 */ - { 0x47, 0x64, 0xc8c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=8, EQ_DATA_LO=0xc7 */ - { 0x47, 0x63, 0xc38c }, /* EQ_DATA_HI=0xc38c */ - { 0x47, 0x64, 0xc914 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=9, EQ_DATA_LO=0x14 */ - { 0x47, 0x64, 0x0000 }, /* -EQ_ACC, -EQ_WRT */ - {} /* Terminator */ -}; - static inline int cs8409_vendor_coef_get(struct hda_codec *codec, unsigned int idx) { snd_hda_codec_write(codec, CS8409_VENDOR_NID, 0, AC_VERB_SET_COEF_INDEX, idx); @@ -908,7 +717,7 @@ static int cs8409_cs42l42_exec_verb(struct hdac_device *dev, unsigned int cmd, u return spec->exec_verb(dev, cmd, flags, res); } -static void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int action) +void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int action) { struct cs8409_spec *spec = codec->spec; int caps; @@ -995,31 +804,6 @@ static void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixu } } -static const struct hda_fixup cs8409_fixups[] = { - [CS8409_BULLSEYE] = { - .type = HDA_FIXUP_PINS, - .v.pins = cs8409_cs42l42_pincfgs, - .chained = true, - .chain_id = CS8409_FIXUPS, - }, - [CS8409_WARLOCK] = { - .type = HDA_FIXUP_PINS, - .v.pins = cs8409_cs42l42_pincfgs, - .chained = true, - .chain_id = CS8409_FIXUPS, - }, - [CS8409_CYBORG] = { - .type = HDA_FIXUP_PINS, - .v.pins = cs8409_cs42l42_pincfgs, - .chained = true, - .chain_id = CS8409_FIXUPS, - }, - [CS8409_FIXUPS] = { - .type = HDA_FIXUP_FUNC, - .v.func = cs8409_cs42l42_fixups, - }, -}; - static int patch_cs8409(struct hda_codec *codec) { int err; diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index 2ab02a520f5a..516123a411db 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -9,6 +9,14 @@ #ifndef __CS8409_PATCH_H #define __CS8409_PATCH_H +#include +#include +#include +#include "hda_local.h" +#include "hda_auto_parser.h" +#include "hda_jack.h" +#include "hda_generic.h" + /* Cirrus Logic CS8409 HDA bridge with * companion codec CS42L42 */ @@ -88,4 +96,15 @@ struct cs8409_spec { unsigned int *res); }; +extern const struct snd_pci_quirk cs8409_fixup_tbl[]; +extern const struct hda_model_fixup cs8409_models[]; +extern const struct hda_fixup cs8409_fixups[]; +extern const struct hda_verb cs8409_cs42l42_init_verbs[]; +extern const struct hda_pintbl cs8409_cs42l42_pincfgs[]; +extern const struct cs8409_i2c_param cs42l42_init_reg_seq[]; +extern const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[]; +extern const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[]; + +void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int action); + #endif From patchwork Fri Jul 30 15:18:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489357 Return-Path: X-Spam-Checker-Version: SpamAssassin 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Transport; Fri, 30 Jul 2021 16:19:07 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 3AE032BA; Fri, 30 Jul 2021 15:19:07 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 03/27] ALSA: hda/cs8409: Use enums for register names and coefficients Date: Fri, 30 Jul 2021 16:18:20 +0100 Message-ID: <20210730151844.7873-4-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: L8DEocHvLVfzfKJBFAFmR0eFG-EeD5TR X-Proofpoint-ORIG-GUID: L8DEocHvLVfzfKJBFAFmR0eFG-EeD5TR X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Stefan Binding Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3 - No changes sound/pci/hda/patch_cs8409-tables.c | 164 ++++++++++++------- sound/pci/hda/patch_cs8409.c | 49 +++--- sound/pci/hda/patch_cs8409.h | 239 ++++++++++++++++++++++++---- 3 files changed, 343 insertions(+), 109 deletions(-) diff --git a/sound/pci/hda/patch_cs8409-tables.c b/sound/pci/hda/patch_cs8409-tables.c index 4adc7a4c4a25..5766433325a9 100644 --- a/sound/pci/hda/patch_cs8409-tables.c +++ b/sound/pci/hda/patch_cs8409-tables.c @@ -91,20 +91,20 @@ const struct hda_fixup cs8409_fixups[] = { }; const struct hda_verb cs8409_cs42l42_init_verbs[] = { - { 0x01, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */ - { 0x47, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */ - { 0x47, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */ - { 0x47, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */ - { 0x47, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */ - { 0x47, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */ + { CS8409_PIN_AFG, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */ {} /* terminator */ }; const struct hda_pintbl cs8409_cs42l42_pincfgs[] = { - { 0x24, 0x042120f0 }, /* ASP-1-TX */ - { 0x34, 0x04a12050 }, /* ASP-1-RX */ - { 0x2c, 0x901000f0 }, /* ASP-2-TX */ - { 0x44, 0x90a00090 }, /* DMIC-1 */ + { CS8409_PIN_ASP1_TRANSMITTER_A, 0x042120f0 }, /* ASP-1-TX */ + { CS8409_PIN_ASP1_RECEIVER_A, 0x04a12050 }, /* ASP-1-RX */ + { CS8409_PIN_ASP2_TRANSMITTER_A, 0x901000f0 }, /* ASP-2-TX */ + { CS8409_PIN_DMIC1_IN, 0x90a00090 }, /* DMIC-1 */ {} /* terminator */ }; @@ -164,57 +164,105 @@ const struct cs8409_i2c_param cs42l42_init_reg_seq[] = { /* Vendor specific hw configuration for CS8409 */ const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[] = { - { 0x47, 0x00, 0xb008 }, /* +PLL1/2_EN, +I2C_EN */ - { 0x47, 0x01, 0x0002 }, /* ASP1/2_EN=0, ASP1_STP=1 */ - { 0x47, 0x02, 0x0a80 }, /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */ - { 0x47, 0x19, 0x0800 }, /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ - { 0x47, 0x1a, 0x0820 }, /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */ - { 0x47, 0x29, 0x0800 }, /* ASP2.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ - { 0x47, 0x2a, 0x2800 }, /* ASP2.A: TX.RAP=1, TX.RSZ=24 bits, TX.RCS=0 */ - { 0x47, 0x39, 0x0800 }, /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */ - { 0x47, 0x3a, 0x0800 }, /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */ - { 0x47, 0x03, 0x8000 }, /* ASP1: LCHI = 00h */ - { 0x47, 0x04, 0x28ff }, /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */ - { 0x47, 0x05, 0x0062 }, /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */ - { 0x47, 0x06, 0x801f }, /* ASP2: LCHI=1Fh */ - { 0x47, 0x07, 0x283f }, /* ASP2: MC/SC_SRCSEL=PLL1, LCPR=3Fh */ - { 0x47, 0x08, 0x805c }, /* ASP2: 5050=1, MCEN=0, FSD=010, SCPOL_IN/OUT=1, SCDIV=1:16 */ - { 0x47, 0x09, 0x0023 }, /* DMIC1_MO=10b, DMIC1/2_SR=1 */ - { 0x47, 0x0a, 0x0000 }, /* ASP1/2_BEEP=0 */ - { 0x47, 0x01, 0x0062 }, /* ASP1/2_EN=1, ASP1_STP=1 */ - { 0x47, 0x00, 0x9008 }, /* -PLL2_EN */ - { 0x47, 0x68, 0x0000 }, /* TX2.A: pre-scale att.=0 dB */ - { 0x47, 0x82, 0xfc03 }, /* ASP1/2_xxx_EN=1, ASP1/2_MCLK_EN=0, DMIC1_SCL_EN=1 */ - { 0x47, 0xc0, 0x9999 }, /* test mode on */ - { 0x47, 0xc5, 0x0000 }, /* GPIO hysteresis = 30 us */ - { 0x47, 0xc0, 0x0000 }, /* test mode off */ + /* +PLL1/2_EN, +I2C_EN */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0xb008 }, + /* ASP1/2_EN=0, ASP1_STP=1 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0002 }, + /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG3, 0x0a80 }, + /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL1, 0x0800 }, + /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL2, 0x0820 }, + /* ASP2.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ + { CS8409_PIN_VENDOR_WIDGET, ASP2_A_TX_CTRL1, 0x0800 }, + /* ASP2.A: TX.RAP=1, TX.RSZ=24 bits, TX.RCS=0 */ + { CS8409_PIN_VENDOR_WIDGET, ASP2_A_TX_CTRL2, 0x2800 }, + /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL1, 0x0800 }, + /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL2, 0x0800 }, + /* ASP1: LCHI = 00h */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL1, 0x8000 }, + /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL2, 0x28ff }, + /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL3, 0x0062 }, + /* ASP2: LCHI=1Fh */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL1, 0x801f }, + /* ASP2: MC/SC_SRCSEL=PLL1, LCPR=3Fh */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL2, 0x283f }, + /* ASP2: 5050=1, MCEN=0, FSD=010, SCPOL_IN/OUT=1, SCDIV=1:16 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP2_CLK_CTRL3, 0x805c }, + /* DMIC1_MO=10b, DMIC1/2_SR=1 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DMIC_CFG, 0x0023 }, + /* ASP1/2_BEEP=0 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_BEEP_CFG, 0x0000 }, + /* ASP1/2_EN=1, ASP1_STP=1 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0062 }, + /* -PLL2_EN */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0x9008 }, + /* TX2.A: pre-scale att.=0 dB */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PRE_SCALE_ATTN2, 0x0000 }, + /* ASP1/2_xxx_EN=1, ASP1/2_MCLK_EN=0, DMIC1_SCL_EN=1 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PAD_CFG_SLW_RATE_CTRL, 0xfc03 }, + /* test mode on */ + { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x9999 }, + /* GPIO hysteresis = 30 us */ + { CS8409_PIN_VENDOR_WIDGET, 0xc5, 0x0000 }, + /* test mode off */ + { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x0000 }, {} /* Terminator */ }; const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[] = { - { 0x47, 0x65, 0x4000 }, /* EQ_SEL=1, EQ1/2_EN=0 */ - { 0x47, 0x64, 0x4000 }, /* +EQ_ACC */ - { 0x47, 0x65, 0x4010 }, /* +EQ2_EN */ - { 0x47, 0x63, 0x0647 }, /* EQ_DATA_HI=0x0647 */ - { 0x47, 0x64, 0xc0c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=0, EQ_DATA_LO=0x67 */ - { 0x47, 0x63, 0x0647 }, /* EQ_DATA_HI=0x0647 */ - { 0x47, 0x64, 0xc1c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=1, EQ_DATA_LO=0x67 */ - { 0x47, 0x63, 0xf370 }, /* EQ_DATA_HI=0xf370 */ - { 0x47, 0x64, 0xc271 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=2, EQ_DATA_LO=0x71 */ - { 0x47, 0x63, 0x1ef8 }, /* EQ_DATA_HI=0x1ef8 */ - { 0x47, 0x64, 0xc348 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=3, EQ_DATA_LO=0x48 */ - { 0x47, 0x63, 0xc110 }, /* EQ_DATA_HI=0xc110 */ - { 0x47, 0x64, 0xc45a }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=4, EQ_DATA_LO=0x5a */ - { 0x47, 0x63, 0x1f29 }, /* EQ_DATA_HI=0x1f29 */ - { 0x47, 0x64, 0xc574 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=5, EQ_DATA_LO=0x74 */ - { 0x47, 0x63, 0x1d7a }, /* EQ_DATA_HI=0x1d7a */ - { 0x47, 0x64, 0xc653 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=6, EQ_DATA_LO=0x53 */ - { 0x47, 0x63, 0xc38c }, /* EQ_DATA_HI=0xc38c */ - { 0x47, 0x64, 0xc714 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=7, EQ_DATA_LO=0x14 */ - { 0x47, 0x63, 0x1ca3 }, /* EQ_DATA_HI=0x1ca3 */ - { 0x47, 0x64, 0xc8c7 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=8, EQ_DATA_LO=0xc7 */ - { 0x47, 0x63, 0xc38c }, /* EQ_DATA_HI=0xc38c */ - { 0x47, 0x64, 0xc914 }, /* +EQ_WRT, +EQ_ACC, EQ_ADR=9, EQ_DATA_LO=0x14 */ - { 0x47, 0x64, 0x0000 }, /* -EQ_ACC, -EQ_WRT */ + /* EQ_SEL=1, EQ1/2_EN=0 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_CTRL1, 0x4000 }, + /* +EQ_ACC */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x4000 }, + /* +EQ2_EN */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_CTRL1, 0x4010 }, + /* EQ_DATA_HI=0x0647 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x0647 }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=0, EQ_DATA_LO=0x67 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc0c7 }, + /* EQ_DATA_HI=0x0647 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x0647 }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=1, EQ_DATA_LO=0x67 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc1c7 }, + /* EQ_DATA_HI=0xf370 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xf370 }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=2, EQ_DATA_LO=0x71 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc271 }, + /* EQ_DATA_HI=0x1ef8 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1ef8 }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=3, EQ_DATA_LO=0x48 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc348 }, + /* EQ_DATA_HI=0xc110 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc110 }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=4, EQ_DATA_LO=0x5a */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc45a }, + /* EQ_DATA_HI=0x1f29 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1f29 }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=5, EQ_DATA_LO=0x74 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc574 }, + /* EQ_DATA_HI=0x1d7a */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1d7a }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=6, EQ_DATA_LO=0x53 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc653 }, + /* EQ_DATA_HI=0xc38c */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc38c }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=7, EQ_DATA_LO=0x14 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc714 }, + /* EQ_DATA_HI=0x1ca3 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0x1ca3 }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=8, EQ_DATA_LO=0xc7 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc8c7 }, + /* EQ_DATA_HI=0xc38c */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W1, 0xc38c }, + /* +EQ_WRT, +EQ_ACC, EQ_ADR=9, EQ_DATA_LO=0x14 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0xc914 }, + /* -EQ_ACC, -EQ_WRT */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x0000 }, {} /* Terminator */ }; diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index b56fc89ad2cd..e4319a0b9cf6 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -61,15 +61,15 @@ static struct cs8409_spec *cs8409_alloc_spec(struct hda_codec *codec) static inline int cs8409_vendor_coef_get(struct hda_codec *codec, unsigned int idx) { - snd_hda_codec_write(codec, CS8409_VENDOR_NID, 0, AC_VERB_SET_COEF_INDEX, idx); - return snd_hda_codec_read(codec, CS8409_VENDOR_NID, 0, AC_VERB_GET_PROC_COEF, 0); + snd_hda_codec_write(codec, CS8409_PIN_VENDOR_WIDGET, 0, AC_VERB_SET_COEF_INDEX, idx); + return snd_hda_codec_read(codec, CS8409_PIN_VENDOR_WIDGET, 0, AC_VERB_GET_PROC_COEF, 0); } static inline void cs8409_vendor_coef_set(struct hda_codec *codec, unsigned int idx, unsigned int coef) { - snd_hda_codec_write(codec, CS8409_VENDOR_NID, 0, AC_VERB_SET_COEF_INDEX, idx); - snd_hda_codec_write(codec, CS8409_VENDOR_NID, 0, AC_VERB_SET_PROC_COEF, coef); + snd_hda_codec_write(codec, CS8409_PIN_VENDOR_WIDGET, 0, AC_VERB_SET_COEF_INDEX, idx); + snd_hda_codec_write(codec, CS8409_PIN_VENDOR_WIDGET, 0, AC_VERB_SET_PROC_COEF, coef); } /** @@ -102,7 +102,7 @@ static int cs8409_i2c_wait_complete(struct hda_codec *codec) unsigned int retval; do { - retval = cs8409_vendor_coef_get(codec, CIR_I2C_STATUS); + retval = cs8409_vendor_coef_get(codec, CS8409_I2C_STS); if ((retval & 0x18) != 0x18) { usleep_range(2000, 4000); --repeat; @@ -131,10 +131,10 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un unsigned int read_data; cs8409_enable_i2c_clock(codec, 1); - cs8409_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address); + cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address); if (paged) { - cs8409_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8); + cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg >> 8); if (cs8409_i2c_wait_complete(codec) < 0) { codec_err(codec, "%s() Paged Transaction Failed 0x%02x : 0x%04x\n", __func__, i2c_address, i2c_reg); @@ -143,7 +143,7 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un } i2c_reg_data = (i2c_reg << 8) & 0x0ffff; - cs8409_vendor_coef_set(codec, CIR_I2C_QREAD, i2c_reg_data); + cs8409_vendor_coef_set(codec, CS8409_I2C_QREAD, i2c_reg_data); if (cs8409_i2c_wait_complete(codec) < 0) { codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n", __func__, i2c_address, i2c_reg); @@ -151,7 +151,7 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un } /* Register in bits 15-8 and the data in 7-0 */ - read_data = cs8409_vendor_coef_get(codec, CIR_I2C_QREAD); + read_data = cs8409_vendor_coef_get(codec, CS8409_I2C_QREAD); cs8409_enable_i2c_clock(codec, 0); @@ -175,10 +175,10 @@ static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, u unsigned int i2c_reg_data; cs8409_enable_i2c_clock(codec, 1); - cs8409_vendor_coef_set(codec, CIR_I2C_ADDR, i2c_address); + cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address); if (paged) { - cs8409_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg >> 8); + cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg >> 8); if (cs8409_i2c_wait_complete(codec) < 0) { codec_err(codec, "%s() Paged Transaction Failed 0x%02x : 0x%04x\n", __func__, i2c_address, i2c_reg); @@ -187,7 +187,7 @@ static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, u } i2c_reg_data = ((i2c_reg << 8) & 0x0ff00) | (i2c_data & 0x0ff); - cs8409_vendor_coef_set(codec, CIR_I2C_QWRITE, i2c_reg_data); + cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg_data); if (cs8409_i2c_wait_complete(codec) < 0) { codec_err(codec, "%s() Transaction Failed 0x%02x : 0x%04x\n", @@ -363,11 +363,11 @@ static void cs8409_cs42l42_reset(struct hda_codec *codec) struct cs8409_spec *spec = codec->spec; /* Assert RTS# line */ - snd_hda_codec_write(codec, codec->core.afg, 0, AC_VERB_SET_GPIO_DATA, 0); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0); /* wait ~10ms */ usleep_range(10000, 15000); /* Release RTS# line */ - snd_hda_codec_write(codec, codec->core.afg, 0, AC_VERB_SET_GPIO_DATA, GPIO5_INT); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, CS8409_CS42L42_RESET); /* wait ~10ms */ usleep_range(10000, 15000); @@ -471,7 +471,7 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) * registers in previous cs8409_jack_unsol_event() call. * We don't need to handle this event, ignoring... */ - if ((res & (1 << 4))) + if (res & CS8409_CS42L42_INT) return; mutex_lock(&spec->cs8409_i2c_mux); @@ -568,7 +568,7 @@ static int cs8409_suspend(struct hda_codec *codec) cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1101, 0xfe, 1); mutex_unlock(&spec->cs8409_i2c_mux); /* Assert CS42L42 RTS# line */ - snd_hda_codec_write(codec, codec->core.afg, 0, AC_VERB_SET_GPIO_DATA, 0); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0); snd_hda_shutup_pins(codec); @@ -580,10 +580,10 @@ static int cs8409_suspend(struct hda_codec *codec) static void cs8409_enable_ur(struct hda_codec *codec, int flag) { /* GPIO4 INT# and GPIO3 WAKE# */ - snd_hda_codec_write(codec, codec->core.afg, 0, AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, - flag ? (GPIO3_INT | GPIO4_INT) : 0); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, + flag ? CS8409_CS42L42_INT : 0); - snd_hda_codec_write(codec, codec->core.afg, 0, AC_VERB_SET_UNSOLICITED_ENABLE, + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_UNSOLICITED_ENABLE, flag ? AC_UNSOL_ENABLED : 0); } @@ -598,9 +598,12 @@ static void cs8409_cs42l42_hw_init(struct hda_codec *codec) struct cs8409_spec *spec = codec->spec; if (spec->gpio_mask) { - snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_MASK, spec->gpio_mask); - snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DIRECTION, spec->gpio_dir); - snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, spec->gpio_data); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_MASK, + spec->gpio_mask); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DIRECTION, + spec->gpio_dir); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, + spec->gpio_data); } for (; seq->nid; seq++) @@ -738,7 +741,7 @@ void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, spec->gen.suppress_vmaster = 1; /* GPIO 5 out, 3,4 in */ - spec->gpio_dir = GPIO5_INT; + spec->gpio_dir = CS8409_CS42L42_RESET; spec->gpio_data = 0; spec->gpio_mask = 0x03f; diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index 516123a411db..1d3ce28415fa 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -17,38 +17,206 @@ #include "hda_jack.h" #include "hda_generic.h" -/* Cirrus Logic CS8409 HDA bridge with - * companion codec CS42L42 - */ -#define CS42L42_HP_CH (2U) -#define CS42L42_HS_MIC_CH (1U) - -#define CS8409_VENDOR_NID 0x47 +/* CS8409 Specific Definitions */ -#define CS8409_CS42L42_HP_PIN_NID 0x24 -#define CS8409_CS42L42_SPK_PIN_NID 0x2c -#define CS8409_CS42L42_AMIC_PIN_NID 0x34 -#define CS8409_CS42L42_DMIC_PIN_NID 0x44 -#define CS8409_CS42L42_DMIC_ADC_PIN_NID 0x22 - -#define CS42L42_HSDET_AUTO_DONE 0x02 -#define CS42L42_HSTYPE_MASK 0x03 - -#define CS42L42_JACK_INSERTED 0x0C -#define CS42L42_JACK_REMOVED 0x00 +enum cs8409_pins { + CS8409_PIN_ROOT, + CS8409_PIN_AFG, + CS8409_PIN_ASP1_OUT_A, + CS8409_PIN_ASP1_OUT_B, + CS8409_PIN_ASP1_OUT_C, + CS8409_PIN_ASP1_OUT_D, + CS8409_PIN_ASP1_OUT_E, + CS8409_PIN_ASP1_OUT_F, + CS8409_PIN_ASP1_OUT_G, + CS8409_PIN_ASP1_OUT_H, + CS8409_PIN_ASP2_OUT_A, + CS8409_PIN_ASP2_OUT_B, + CS8409_PIN_ASP2_OUT_C, + CS8409_PIN_ASP2_OUT_D, + CS8409_PIN_ASP2_OUT_E, + CS8409_PIN_ASP2_OUT_F, + CS8409_PIN_ASP2_OUT_G, + CS8409_PIN_ASP2_OUT_H, + CS8409_PIN_ASP1_IN_A, + CS8409_PIN_ASP1_IN_B, + CS8409_PIN_ASP1_IN_C, + CS8409_PIN_ASP1_IN_D, + CS8409_PIN_ASP1_IN_E, + CS8409_PIN_ASP1_IN_F, + CS8409_PIN_ASP1_IN_G, + CS8409_PIN_ASP1_IN_H, + CS8409_PIN_ASP2_IN_A, + CS8409_PIN_ASP2_IN_B, + CS8409_PIN_ASP2_IN_C, + CS8409_PIN_ASP2_IN_D, + CS8409_PIN_ASP2_IN_E, + CS8409_PIN_ASP2_IN_F, + CS8409_PIN_ASP2_IN_G, + CS8409_PIN_ASP2_IN_H, + CS8409_PIN_DMIC1, + CS8409_PIN_DMIC2, + CS8409_PIN_ASP1_TRANSMITTER_A, + CS8409_PIN_ASP1_TRANSMITTER_B, + CS8409_PIN_ASP1_TRANSMITTER_C, + CS8409_PIN_ASP1_TRANSMITTER_D, + CS8409_PIN_ASP1_TRANSMITTER_E, + CS8409_PIN_ASP1_TRANSMITTER_F, + CS8409_PIN_ASP1_TRANSMITTER_G, + CS8409_PIN_ASP1_TRANSMITTER_H, + CS8409_PIN_ASP2_TRANSMITTER_A, + CS8409_PIN_ASP2_TRANSMITTER_B, + CS8409_PIN_ASP2_TRANSMITTER_C, + CS8409_PIN_ASP2_TRANSMITTER_D, + CS8409_PIN_ASP2_TRANSMITTER_E, + CS8409_PIN_ASP2_TRANSMITTER_F, + CS8409_PIN_ASP2_TRANSMITTER_G, + CS8409_PIN_ASP2_TRANSMITTER_H, + CS8409_PIN_ASP1_RECEIVER_A, + CS8409_PIN_ASP1_RECEIVER_B, + CS8409_PIN_ASP1_RECEIVER_C, + CS8409_PIN_ASP1_RECEIVER_D, + CS8409_PIN_ASP1_RECEIVER_E, + CS8409_PIN_ASP1_RECEIVER_F, + CS8409_PIN_ASP1_RECEIVER_G, + CS8409_PIN_ASP1_RECEIVER_H, + CS8409_PIN_ASP2_RECEIVER_A, + CS8409_PIN_ASP2_RECEIVER_B, + CS8409_PIN_ASP2_RECEIVER_C, + CS8409_PIN_ASP2_RECEIVER_D, + CS8409_PIN_ASP2_RECEIVER_E, + CS8409_PIN_ASP2_RECEIVER_F, + CS8409_PIN_ASP2_RECEIVER_G, + CS8409_PIN_ASP2_RECEIVER_H, + CS8409_PIN_DMIC1_IN, + CS8409_PIN_DMIC2_IN, + CS8409_PIN_BEEP_GEN, + CS8409_PIN_VENDOR_WIDGET +}; -#define GPIO3_INT (1 << 3) -#define GPIO4_INT (1 << 4) -#define GPIO5_INT (1 << 5) +enum cs8409_coefficient_index_registers { + CS8409_DEV_CFG1, + CS8409_DEV_CFG2, + CS8409_DEV_CFG3, + CS8409_ASP1_CLK_CTRL1, + CS8409_ASP1_CLK_CTRL2, + CS8409_ASP1_CLK_CTRL3, + CS8409_ASP2_CLK_CTRL1, + CS8409_ASP2_CLK_CTRL2, + CS8409_ASP2_CLK_CTRL3, + CS8409_DMIC_CFG, + CS8409_BEEP_CFG, + ASP1_RX_NULL_INS_RMV, + ASP1_Rx_RATE1, + ASP1_Rx_RATE2, + ASP1_Tx_NULL_INS_RMV, + ASP1_Tx_RATE1, + ASP1_Tx_RATE2, + ASP2_Rx_NULL_INS_RMV, + ASP2_Rx_RATE1, + ASP2_Rx_RATE2, + ASP2_Tx_NULL_INS_RMV, + ASP2_Tx_RATE1, + ASP2_Tx_RATE2, + ASP1_SYNC_CTRL, + ASP2_SYNC_CTRL, + ASP1_A_TX_CTRL1, + ASP1_A_TX_CTRL2, + ASP1_B_TX_CTRL1, + ASP1_B_TX_CTRL2, + ASP1_C_TX_CTRL1, + ASP1_C_TX_CTRL2, + ASP1_D_TX_CTRL1, + ASP1_D_TX_CTRL2, + ASP1_E_TX_CTRL1, + ASP1_E_TX_CTRL2, + ASP1_F_TX_CTRL1, + ASP1_F_TX_CTRL2, + ASP1_G_TX_CTRL1, + ASP1_G_TX_CTRL2, + ASP1_H_TX_CTRL1, + ASP1_H_TX_CTRL2, + ASP2_A_TX_CTRL1, + ASP2_A_TX_CTRL2, + ASP2_B_TX_CTRL1, + ASP2_B_TX_CTRL2, + ASP2_C_TX_CTRL1, + ASP2_C_TX_CTRL2, + ASP2_D_TX_CTRL1, + ASP2_D_TX_CTRL2, + ASP2_E_TX_CTRL1, + ASP2_E_TX_CTRL2, + ASP2_F_TX_CTRL1, + ASP2_F_TX_CTRL2, + ASP2_G_TX_CTRL1, + ASP2_G_TX_CTRL2, + ASP2_H_TX_CTRL1, + ASP2_H_TX_CTRL2, + ASP1_A_RX_CTRL1, + ASP1_A_RX_CTRL2, + ASP1_B_RX_CTRL1, + ASP1_B_RX_CTRL2, + ASP1_C_RX_CTRL1, + ASP1_C_RX_CTRL2, + ASP1_D_RX_CTRL1, + ASP1_D_RX_CTRL2, + ASP1_E_RX_CTRL1, + ASP1_E_RX_CTRL2, + ASP1_F_RX_CTRL1, + ASP1_F_RX_CTRL2, + ASP1_G_RX_CTRL1, + ASP1_G_RX_CTRL2, + ASP1_H_RX_CTRL1, + ASP1_H_RX_CTRL2, + ASP2_A_RX_CTRL1, + ASP2_A_RX_CTRL2, + ASP2_B_RX_CTRL1, + ASP2_B_RX_CTRL2, + ASP2_C_RX_CTRL1, + ASP2_C_RX_CTRL2, + ASP2_D_RX_CTRL1, + ASP2_D_RX_CTRL2, + ASP2_E_RX_CTRL1, + ASP2_E_RX_CTRL2, + ASP2_F_RX_CTRL1, + ASP2_F_RX_CTRL2, + ASP2_G_RX_CTRL1, + ASP2_G_RX_CTRL2, + ASP2_H_RX_CTRL1, + ASP2_H_RX_CTRL2, + CS8409_I2C_ADDR, + CS8409_I2C_DATA, + CS8409_I2C_CTRL, + CS8409_I2C_STS, + CS8409_I2C_QWRITE, + CS8409_I2C_QREAD, + CS8409_SPI_CTRL, + CS8409_SPI_TX_DATA, + CS8409_SPI_RX_DATA, + CS8409_SPI_STS, + CS8409_PFE_COEF_W1, /* Parametric filter engine coefficient write 1*/ + CS8409_PFE_COEF_W2, + CS8409_PFE_CTRL1, + CS8409_PFE_CTRL2, + CS8409_PRE_SCALE_ATTN1, + CS8409_PRE_SCALE_ATTN2, + CS8409_PFE_COEF_MON1, /* Parametric filter engine coefficient monitor 1*/ + CS8409_PFE_COEF_MON2, + CS8409_ASP1_INTRN_STS, + CS8409_ASP2_INTRN_STS, + CS8409_ASP1_RX_SCLK_COUNT, + CS8409_ASP1_TX_SCLK_COUNT, + CS8409_ASP2_RX_SCLK_COUNT, + CS8409_ASP2_TX_SCLK_COUNT, + CS8409_ASP_UNS_RESP_MASK, + CS8409_LOOPBACK_CTRL = 0x80, + CS8409_PAD_CFG_SLW_RATE_CTRL = 0x82, /* Pad Config and Slew Rate Control (CIR = 0x0082) */ +}; -#define CS42L42_I2C_ADDR (0x48 << 1) +/* CS42L42 Specific Definitions */ -#define CIR_I2C_ADDR 0x0059 -#define CIR_I2C_DATA 0x005A -#define CIR_I2C_CTRL 0x005B -#define CIR_I2C_STATUS 0x005C -#define CIR_I2C_QWRITE 0x005D -#define CIR_I2C_QREAD 0x005E +#define CS42L42_HP_CH (2U) +#define CS42L42_HS_MIC_CH (1U) #define CS8409_CS42L42_HP_VOL_REAL_MIN (-63) #define CS8409_CS42L42_HP_VOL_REAL_MAX (0) @@ -57,6 +225,21 @@ #define CS8409_CS42L42_REG_HS_VOLUME_CHA (0x2301) #define CS8409_CS42L42_REG_HS_VOLUME_CHB (0x2303) #define CS8409_CS42L42_REG_AMIC_VOLUME (0x1D03) +#define CS42L42_HSDET_AUTO_DONE (0x02) +#define CS42L42_HSTYPE_MASK (0x03) +#define CS42L42_JACK_INSERTED (0x0C) +#define CS42L42_JACK_REMOVED (0x00) + +/* Dell BULLSEYE / WARLOCK / CYBORG Specific Definitions */ + +#define CS42L42_I2C_ADDR (0x48 << 1) +#define CS8409_CS42L42_RESET GENMASK(5, 5) /* CS8409_GPIO5 */ +#define CS8409_CS42L42_INT GENMASK(4, 4) /* CS8409_GPIO4 */ +#define CS8409_CS42L42_HP_PIN_NID CS8409_PIN_ASP1_TRANSMITTER_A +#define CS8409_CS42L42_SPK_PIN_NID CS8409_PIN_ASP2_TRANSMITTER_A +#define CS8409_CS42L42_AMIC_PIN_NID CS8409_PIN_ASP1_RECEIVER_A +#define CS8409_CS42L42_DMIC_PIN_NID CS8409_PIN_DMIC1_IN +#define CS8409_CS42L42_DMIC_ADC_PIN_NID CS8409_PIN_DMIC1 enum { CS8409_BULLSEYE, From patchwork Fri Jul 30 15:18:23 2021 Content-Type: text/plain; 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Fri, 30 Jul 2021 16:19:08 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id E67F62BA; Fri, 30 Jul 2021 15:19:07 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 06/27] ALSA: hda/cs8409: Disable unnecessary Ring Sense for Cyborg/Warlock/Bullseye Date: Fri, 30 Jul 2021 16:18:23 +0100 Message-ID: <20210730151844.7873-7-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: iRLKhLFLB28fYKSb43zMDf0mY4HhnM7w X-Proofpoint-ORIG-GUID: iRLKhLFLB28fYKSb43zMDf0mY4HhnM7w X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Stefan Binding Also remove unnecessary repeated register writes. Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409-tables.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/sound/pci/hda/patch_cs8409-tables.c b/sound/pci/hda/patch_cs8409-tables.c index 91b6a5b2824a..07d3ae28c105 100644 --- a/sound/pci/hda/patch_cs8409-tables.c +++ b/sound/pci/hda/patch_cs8409-tables.c @@ -153,11 +153,9 @@ const struct cs8409_i2c_param cs42l42_init_reg_seq[] = { { 0x1121, 0xF3 }, { 0x1103, 0x20 }, { 0x1105, 0x00 }, - { 0x1112, 0xC0 }, + { 0x1112, 0x00 }, { 0x1113, 0x80 }, { 0x1C03, 0xC0 }, - { 0x1105, 0x00 }, - { 0x1112, 0xC0 }, { 0x1101, 0x02 }, { 0x1316, 0xff }, { 0x1317, 0xff }, From patchwork Fri Jul 30 15:18:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489350 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7DD84C432BE for ; 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Fri, 30 Jul 2021 16:19:08 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:08 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 3509245D; Fri, 30 Jul 2021 15:19:08 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 07/27] ALSA: hda/cs8409: Disable unsolicited responses during suspend Date: Fri, 30 Jul 2021 16:18:24 +0100 Message-ID: <20210730151844.7873-8-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: zFd4Bgtw-Iwn67I9jovgG-GMJAn_fMlw X-Proofpoint-ORIG-GUID: zFd4Bgtw-Iwn67I9jovgG-GMJAn_fMlw X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Stefan Binding Ensure unsolicited responses cannot occur whilst the sub codecs are being disabled. Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409.c | 26 ++++++++++++++------------ 1 file changed, 14 insertions(+), 12 deletions(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 1745f8b188c6..4906d2913603 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -563,12 +563,26 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) } } +/* Enable/Disable Unsolicited Response for gpio(s) 3,4 */ +static void cs8409_enable_ur(struct hda_codec *codec, int flag) +{ + /* GPIO4 INT# and GPIO3 WAKE# */ + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, + flag ? CS8409_CS42L42_INT : 0); + + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_UNSOLICITED_ENABLE, + flag ? AC_UNSOL_ENABLED : 0); + +} + #ifdef CONFIG_PM /* Manage PDREF, when transition to D3hot */ static int cs8409_suspend(struct hda_codec *codec) { struct cs8409_spec *spec = codec->spec; + cs8409_enable_ur(codec, 0); + mutex_lock(&spec->cs8409_i2c_mux); /* Power down CS42L42 ASP/EQ/MIX/HP */ cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1101, 0xfe, 1); @@ -582,18 +596,6 @@ static int cs8409_suspend(struct hda_codec *codec) } #endif -/* Enable/Disable Unsolicited Response for gpio(s) 3,4 */ -static void cs8409_enable_ur(struct hda_codec *codec, int flag) -{ - /* GPIO4 INT# and GPIO3 WAKE# */ - snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, - flag ? CS8409_CS42L42_INT : 0); - - snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_UNSOLICITED_ENABLE, - flag ? AC_UNSOL_ENABLED : 0); - -} - /* Vendor specific HW configuration * PLL, ASP, I2C, SPI, GPIOs, DMIC etc... */ From patchwork Fri Jul 30 15:18:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 305A4C4338F for ; Fri, 30 Jul 2021 15:23:41 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id A9FE660F46 for ; Fri, 30 Jul 2021 15:23:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.4.1 mail.kernel.org A9FE660F46 Authentication-Results: mail.kernel.org; dmarc=fail (p=reject dis=none) header.from=opensource.cirrus.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alsa-project.org Received: from alsa1.perex.cz (alsa1.perex.cz [207.180.221.201]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by alsa0.perex.cz (Postfix) with ESMTPS id 53A7C1F98; Fri, 30 Jul 2021 17:22:49 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa0.perex.cz 53A7C1F98 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=alsa-project.org; s=default; t=1627658619; bh=p7pxk6L85sZFs+9EnI+0ul7uQsPS9+H3uiy+QFWZGcY=; h=From:To:Subject:Date:In-Reply-To:References:Cc:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From; b=VLGfBx8mc1fn1nF9+Y2R5Gvj2AfSxz6WUu9x8T9YTYXVqjJBX2llqmzb0PL/XVboz alPQro+sanzFta78Nd7fYdTnOgEAolCZpktCLotlLv/pfzRZN7cYsTmMNBVEIoPpI1 bZpNfi4BAu0drue+4unq1MGNgfvS+PM7CQYVdPcA= Received: from alsa1.perex.cz (localhost.localdomain [127.0.0.1]) by alsa1.perex.cz (Postfix) with ESMTP id 63B81F80538; Fri, 30 Jul 2021 17:19:44 +0200 (CEST) Received: by alsa1.perex.cz (Postfix, from userid 50401) id 6DFA8F8051B; Fri, 30 Jul 2021 17:19:37 +0200 (CEST) Received: from mx0b-001ae601.pphosted.com (mx0a-001ae601.pphosted.com [67.231.149.25]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by alsa1.perex.cz (Postfix) with ESMTPS id 03DE9F804DF for ; Fri, 30 Jul 2021 17:19:18 +0200 (CEST) DKIM-Filter: OpenDKIM Filter v2.11.0 alsa1.perex.cz 03DE9F804DF Authentication-Results: alsa1.perex.cz; dkim=pass (2048-bit key) header.d=cirrus.com header.i=@cirrus.com header.b="oF89afQO" Received: from pps.filterd (m0077473.ppops.net [127.0.0.1]) by mx0a-001ae601.pphosted.com (8.16.1.2/8.16.1.2) with SMTP id 16UEL0de003614; Fri, 30 Jul 2021 10:19:17 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=cirrus.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=PODMain02222019; bh=qXnhA08RtU4zCi8AoDT0rgBXkwBCgCERbCi2OvDOJpY=; b=oF89afQO6kTdjyBg2dgJY2SrRxmeDKrOod/EJmTo7u1rGPWaAeaiFrQmcH+r9IoUY1oK xmPOlnzGReg0aRjUFBmi+6S38pHexmLQZrLg+r4ep294tfiyu0qZqJB4WjTC+eXVuuQv PxRFLZrNI9cdIVjF0UchNRrvaQlyYUU3oYmOqQrwLgTOm7zsbnjyBGg1nNTbVTxXqpYi fibldAUPmu7MZxeBy9536HOZiZax+Cu9nUyzmvjRVAiJQu/kIFL6AGr8dTwgQ+07bKqY e+H0U7vbPrvaLWxmgq0v6lVZvxOaXyEzoMBsabgEMJx0mgNeEmEjt20kCnFHNfxF7kU4 5A== Received: from ediex01.ad.cirrus.com ([87.246.76.36]) by mx0a-001ae601.pphosted.com with ESMTP id 3a41wd181n-5 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128 verify=NOT); Fri, 30 Jul 2021 10:19:17 -0500 Received: from EDIEX01.ad.cirrus.com (198.61.84.80) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2242.4; Fri, 30 Jul 2021 16:19:09 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:09 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id E2C5046E; Fri, 30 Jul 2021 15:19:08 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 10/27] ALSA: hda/cs8409: Simplify CS42L42 jack detect. Date: Fri, 30 Jul 2021 16:18:27 +0100 Message-ID: <20210730151844.7873-11-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: BX0fg_c5JvuheRCoVMrj8VuI8GhuKuuT X-Proofpoint-ORIG-GUID: BX0fg_c5JvuheRCoVMrj8VuI8GhuKuuT X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=839 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Stefan Binding Cleanup interrupt masks. Remove unnecessary read/writes. Ensure Tip Sense/Type Detection interrupts are enabled/disabled when needed. Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index f4401c1e8572..4ad832f5c4ba 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -406,10 +406,8 @@ static void cs8409_cs42l42_enable_jack_detect(struct hda_codec *codec) cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b71, 0x00C0, 1); /* Clear interrupts status */ cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1); - cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b7b, 1); /* Enable interrupt */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0x03, 1); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b79, 0x00, 1); + cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0xF3, 1); mutex_unlock(&spec->cs8409_i2c_mux); } @@ -424,11 +422,13 @@ static void cs8409_cs42l42_run_jack_detect(struct hda_codec *codec) /* Clear interrupts */ cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308, 1); cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b77, 1); + cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0xFF, 1); + cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1); cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1102, 0x87, 1); cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1f06, 0x86, 1); cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b74, 0x07, 1); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x131b, 0x01, 1); + cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x131b, 0xFD, 1); cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1120, 0x80, 1); /* Wait ~110ms*/ usleep_range(110000, 200000); @@ -487,9 +487,6 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) reg_hs_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1124, 1); reg_ts_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f, 1); - /* Clear interrupts, by reading interrupt status registers */ - cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b7b, 1); - mutex_unlock(&spec->cs8409_i2c_mux); /* If status values are < 0, read error has occurred. */ @@ -499,6 +496,11 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) /* HSDET_AUTO_DONE */ if (reg_cdc_status & CS42L42_HSDET_AUTO_DONE) { + mutex_lock(&spec->cs8409_i2c_mux); + /* Disable HSDET_AUTO_DONE */ + cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x131b, 0xFF, 1); + mutex_unlock(&spec->cs8409_i2c_mux); + type = ((reg_hs_status & CS42L42_HSTYPE_MASK) + 1); /* CS42L42 reports optical jack as type 4 * We don't handle optical jack @@ -521,6 +523,11 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) } } + mutex_lock(&spec->cs8409_i2c_mux); + /* Re-Enable Tip Sense Interrupt */ + cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0xF3, 1); + mutex_unlock(&spec->cs8409_i2c_mux); + } else { /* TIP_SENSE INSERT/REMOVE */ switch (reg_ts_status) { From patchwork Fri Jul 30 15:18:28 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489354 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BE459C4338F for ; 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Fri, 30 Jul 2021 16:19:09 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:09 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 22DEB45D; Fri, 30 Jul 2021 15:19:09 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 11/27] ALSA: hda/cs8409: Prevent I2C access during suspend time Date: Fri, 30 Jul 2021 16:18:28 +0100 Message-ID: <20210730151844.7873-12-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: GVslHpCjrnPGDDMmvazMJ7M8BKSt3lkv X-Proofpoint-ORIG-GUID: GVslHpCjrnPGDDMmvazMJ7M8BKSt3lkv X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Lucas Tanure X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Lucas Tanure Signed-off-by: Lucas Tanure Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409.c | 14 ++++++++++++++ sound/pci/hda/patch_cs8409.h | 1 + 2 files changed, 15 insertions(+) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 4ad832f5c4ba..0b13bcecd778 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -127,9 +127,13 @@ static int cs8409_i2c_wait_complete(struct hda_codec *codec) static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, unsigned int i2c_reg, unsigned int paged) { + struct cs8409_spec *spec = codec->spec; unsigned int i2c_reg_data; unsigned int read_data; + if (spec->cs42l42_suspended) + return -EPERM; + cs8409_enable_i2c_clock(codec, 1); cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address); @@ -172,8 +176,12 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, unsigned int i2c_reg, unsigned int i2c_data, unsigned int paged) { + struct cs8409_spec *spec = codec->spec; unsigned int i2c_reg_data; + if (spec->cs42l42_suspended) + return -EPERM; + cs8409_enable_i2c_clock(codec, 1); cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address); @@ -371,6 +379,8 @@ static void cs8409_cs42l42_reset(struct hda_codec *codec) /* wait ~10ms */ usleep_range(10000, 15000); + spec->cs42l42_suspended = 0; + mutex_lock(&spec->cs8409_i2c_mux); /* Clear interrupts, by reading interrupt status registers */ @@ -594,6 +604,9 @@ static int cs8409_suspend(struct hda_codec *codec) /* Power down CS42L42 ASP/EQ/MIX/HP */ cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1101, 0xfe, 1); mutex_unlock(&spec->cs8409_i2c_mux); + + spec->cs42l42_suspended = 1; + /* Assert CS42L42 RTS# line */ snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0); @@ -759,6 +772,7 @@ void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, spec->cs42l42_hp_jack_in = 0; spec->cs42l42_mic_jack_in = 0; + spec->cs42l42_suspended = 1; /* Basic initial sequence for specific hw configuration */ snd_hda_sequence_write(codec, cs8409_cs42l42_init_verbs); diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index 1d3ce28415fa..0f2084b6ec8e 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -269,6 +269,7 @@ struct cs8409_spec { unsigned int cs42l42_hp_jack_in:1; unsigned int cs42l42_mic_jack_in:1; unsigned int cs42l42_volume_init:1; + unsigned int cs42l42_suspended:1; char cs42l42_hp_volume[CS42L42_HP_CH]; char cs42l42_hs_mic_volume[CS42L42_HS_MIC_CH]; From patchwork Fri Jul 30 15:18:30 2021 Content-Type: text/plain; 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Fri, 30 Jul 2021 16:19:09 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 8D10246E; Fri, 30 Jul 2021 15:19:09 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 13/27] ALSA: hda/cs8409: Dont disable I2C clock between consecutive accesses Date: Fri, 30 Jul 2021 16:18:30 +0100 Message-ID: <20210730151844.7873-14-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: c1JEct2FLvZptsQHDHbNQn4lAWAHNWgZ X-Proofpoint-ORIG-GUID: c1JEct2FLvZptsQHDHbNQn4lAWAHNWgZ X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Lucas Tanure , Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Lucas Tanure Only disable I2C clock 25 ms after not being used. The current implementation enables and disables the I2C clock for each I2C transaction. Each enable/disable call requires two verb transactions. This means each I2C transaction requires a total of four verb transactions to enable and disable the clock. However, if there are multiple consecutive I2C transactions, it is not necessary to enable and disable the clock each time, instead it is more efficient to enable the clock for the first transaction, and disable it after the final transaction, which would improve performance. This is achieved by using a timeout which disables the clock if no request to enable the clock has occurred for 25 ms. Signed-off-by: Lucas Tanure Signed-off-by: Vitaly Rodionov Signed-off-by: Stefan Binding --- Changes in v2: - Improved delayed work start/cancel implementation, and re-worked commit message adding more explanation why this was required. Changes in v3: - Cancel the disable timer, but do not wait for any running disable functions to finish. If the disable timer runs out before cancel, the delayed work thread will be blocked, waiting for the mutex to become unlocked. This mutex will be locked for the duration of any i2c transaction, so the disable function will run to completion immediately afterwards in the scenario. The next enable call will re-enable the clock, regardless. sound/pci/hda/patch_cs8409.c | 64 ++++++++++++++++++++++++++---------- sound/pci/hda/patch_cs8409.h | 4 +++ 2 files changed, 51 insertions(+), 17 deletions(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 08205c19698c..1c75aa262ebc 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -53,7 +53,9 @@ static struct cs8409_spec *cs8409_alloc_spec(struct hda_codec *codec) if (!spec) return NULL; codec->spec = spec; + spec->codec = codec; codec->power_save_node = 1; + INIT_DELAYED_WORK(&spec->i2c_clk_work, cs8409_disable_i2c_clock); snd_hda_gen_spec_init(&spec->gen); return spec; @@ -72,21 +74,45 @@ static inline void cs8409_vendor_coef_set(struct hda_codec *codec, unsigned int snd_hda_codec_write(codec, CS8409_PIN_VENDOR_WIDGET, 0, AC_VERB_SET_PROC_COEF, coef); } -/** +/* + * cs8409_disable_i2c_clock - Worker that disable the I2C Clock after 25ms without use + */ +static void cs8409_disable_i2c_clock(struct work_struct *work) +{ + struct cs8409_spec *spec = container_of(work, struct cs8409_spec, i2c_clk_work.work); + + mutex_lock(&spec->cs8409_i2c_mux); + if (spec->i2c_clck_enabled) { + cs8409_vendor_coef_set(spec->codec, 0x0, + cs8409_vendor_coef_get(spec->codec, 0x0) & 0xfffffff7); + spec->i2c_clck_enabled = 0; + } + mutex_unlock(&spec->cs8409_i2c_mux); +} + +/* * cs8409_enable_i2c_clock - Enable I2C clocks * @codec: the codec instance - * @enable: Enable or disable I2C clocks - * * Enable or Disable I2C clocks. + * This must be called when the i2c mutex is locked. */ -static void cs8409_enable_i2c_clock(struct hda_codec *codec, unsigned int enable) +static void cs8409_enable_i2c_clock(struct hda_codec *codec) { - unsigned int retval; - unsigned int newval; + struct cs8409_spec *spec = codec->spec; + + /* Cancel the disable timer, but do not wait for any running disable functions to finish. + * If the disable timer runs out before cancel, the delayed work thread will be blocked, + * waiting for the mutex to become unlocked. This mutex will be locked for the duration of + * any i2c transaction, so the disable function will run to completion immediately + * afterwards in the scenario. The next enable call will re-enable the clock, regardless. + */ + cancel_delayed_work(&spec->i2c_clk_work); - retval = cs8409_vendor_coef_get(codec, 0x0); - newval = (enable) ? (retval | 0x8) : (retval & 0xfffffff7); - cs8409_vendor_coef_set(codec, 0x0, newval); + if (!spec->i2c_clck_enabled) { + cs8409_vendor_coef_set(codec, 0x0, cs8409_vendor_coef_get(codec, 0x0) | 0x8); + spec->i2c_clck_enabled = 1; + } + queue_delayed_work(system_power_efficient_wq, &spec->i2c_clk_work, msecs_to_jiffies(25)); } /** @@ -134,7 +160,7 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un if (spec->cs42l42_suspended) return -EPERM; - cs8409_enable_i2c_clock(codec, 1); + cs8409_enable_i2c_clock(codec); cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address); if (paged) { @@ -157,8 +183,6 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un /* Register in bits 15-8 and the data in 7-0 */ read_data = cs8409_vendor_coef_get(codec, CS8409_I2C_QREAD); - cs8409_enable_i2c_clock(codec, 0); - return read_data & 0x0ff; } @@ -182,7 +206,7 @@ static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, u if (spec->cs42l42_suspended) return -EPERM; - cs8409_enable_i2c_clock(codec, 1); + cs8409_enable_i2c_clock(codec); cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address); if (paged) { @@ -203,8 +227,6 @@ static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, u return -EIO; } - cs8409_enable_i2c_clock(codec, 0); - return 0; } @@ -551,6 +573,14 @@ static int cs8409_suspend(struct hda_codec *codec) } #endif +static void cs8409_free(struct hda_codec *codec) +{ + struct cs8409_spec *spec = codec->spec; + + cancel_delayed_work_sync(&spec->i2c_clk_work); + snd_hda_gen_free(codec); +} + /* Vendor specific HW configuration * PLL, ASP, I2C, SPI, GPIOs, DMIC etc... */ @@ -633,7 +663,7 @@ static const struct hda_codec_ops cs8409_cs42l42_patch_ops = { .build_controls = cs8409_build_controls, .build_pcms = snd_hda_gen_build_pcms, .init = cs8409_cs42l42_init, - .free = snd_hda_gen_free, + .free = cs8409_free, .unsol_event = cs8409_jack_unsol_event, #ifdef CONFIG_PM .suspend = cs8409_suspend, @@ -785,7 +815,7 @@ static int patch_cs8409(struct hda_codec *codec) err = cs8409_parse_auto_config(codec); if (err < 0) { - snd_hda_gen_free(codec); + cs8409_free(codec); return err; } diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index bf0e8a4cc4cc..542582c213d2 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -11,6 +11,7 @@ #include #include +#include #include #include "hda_local.h" #include "hda_auto_parser.h" @@ -267,6 +268,7 @@ struct cs8409_cir_param { struct cs8409_spec { struct hda_gen_spec gen; + struct hda_codec *codec; unsigned int gpio_mask; unsigned int gpio_dir; @@ -278,6 +280,8 @@ struct cs8409_spec { s8 vol[CS42L42_VOLUMES]; struct mutex cs8409_i2c_mux; + unsigned int i2c_clck_enabled; + struct delayed_work i2c_clk_work; /* verb exec op override */ int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, unsigned int flags, From patchwork Fri Jul 30 15:18:31 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489349 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92D37C4338F for ; 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Fri, 30 Jul 2021 16:19:09 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:09 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id C566A2BA; Fri, 30 Jul 2021 15:19:09 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 14/27] ALSA: hda/cs8409: Avoid setting the same I2C address for every access Date: Fri, 30 Jul 2021 16:18:31 +0100 Message-ID: <20210730151844.7873-15-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: lezbnKcJAK_6LBqL-CjEP85LtiXl-b3e X-Proofpoint-ORIG-GUID: lezbnKcJAK_6LBqL-CjEP85LtiXl-b3e X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=983 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Lucas Tanure X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Lucas Tanure Signed-off-by: Lucas Tanure Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409.c | 19 +++++++++++++++++-- sound/pci/hda/patch_cs8409.h | 1 + 2 files changed, 18 insertions(+), 2 deletions(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 1c75aa262ebc..194d336cb060 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -140,6 +140,21 @@ static int cs8409_i2c_wait_complete(struct hda_codec *codec) return -1; } +/** + * cs8409_set_i2c_dev_addr - Set i2c address for transaction + * @codec: the codec instance + * @addr: I2C Address + */ +static void cs8409_set_i2c_dev_addr(struct hda_codec *codec, unsigned int addr) +{ + struct cs8409_spec *spec = codec->spec; + + if (spec->dev_addr != addr) { + cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, addr); + spec->dev_addr = addr; + } +} + /** * cs8409_i2c_read - CS8409 I2C Read. * @codec: the codec instance @@ -161,7 +176,7 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un return -EPERM; cs8409_enable_i2c_clock(codec); - cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address); + cs8409_set_i2c_dev_addr(codec, i2c_address); if (paged) { cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg >> 8); @@ -207,7 +222,7 @@ static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, u return -EPERM; cs8409_enable_i2c_clock(codec); - cs8409_vendor_coef_set(codec, CS8409_I2C_ADDR, i2c_address); + cs8409_set_i2c_dev_addr(codec, i2c_address); if (paged) { cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg >> 8); diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index 542582c213d2..c2c208218e34 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -281,6 +281,7 @@ struct cs8409_spec { struct mutex cs8409_i2c_mux; unsigned int i2c_clck_enabled; + unsigned int dev_addr; struct delayed_work i2c_clk_work; /* verb exec op override */ From patchwork Fri Jul 30 15:18:35 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489351 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 16731C4338F for ; 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Fri, 30 Jul 2021 16:19:11 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:11 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id BD01545D; Fri, 30 Jul 2021 15:19:10 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 18/27] ALSA: hda/cs8409: Move codec properties to its own struct Date: Fri, 30 Jul 2021 16:18:35 +0100 Message-ID: <20210730151844.7873-19-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: RLhzP2K0xPeHTrXQWRbubq6S20yQytTD X-Proofpoint-ORIG-GUID: RLhzP2K0xPeHTrXQWRbubq6S20yQytTD X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Lucas Tanure X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Lucas Tanure To accommodate move, cs42l42_resume has been added to mirror the existing function cs42l42_suspend. Function cs42l42_reset is no longer required, since cs42l42_resume and cs42l42_suspend perform the same operations. Signed-off-by: Lucas Tanure Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409-tables.c | 183 ++++++++-------- sound/pci/hda/patch_cs8409.c | 312 ++++++++++++++-------------- sound/pci/hda/patch_cs8409.h | 39 +++- 3 files changed, 284 insertions(+), 250 deletions(-) diff --git a/sound/pci/hda/patch_cs8409-tables.c b/sound/pci/hda/patch_cs8409-tables.c index 77a7b2f42128..117c70536ff0 100644 --- a/sound/pci/hda/patch_cs8409-tables.c +++ b/sound/pci/hda/patch_cs8409-tables.c @@ -28,7 +28,7 @@ const struct snd_kcontrol_new cs42l42_dac_volume_mixer = { .get = cs42l42_volume_get, .put = cs42l42_volume_put, .tlv = { .p = cs42l42_dac_db_scale }, - .private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_TRANSMITTER_A, 3, 0, + .private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_TRANSMITTER_A, 3, CS8409_CODEC0, HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE }; @@ -41,89 +41,14 @@ const struct snd_kcontrol_new cs42l42_adc_volume_mixer = { .get = cs42l42_volume_get, .put = cs42l42_volume_put, .tlv = { .p = cs42l42_adc_db_scale }, - .private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_RECEIVER_A, 1, 0, + .private_value = HDA_COMPOSE_AMP_VAL_OFS(CS8409_PIN_ASP1_RECEIVER_A, 1, CS8409_CODEC0, HDA_INPUT, CS42L42_VOL_ADC) | HDA_AMP_VAL_MIN_MUTE }; -/* Dell Inspiron platforms - * with cs8409 bridge and cs42l42 codec - */ -const struct snd_pci_quirk cs8409_fixup_tbl[] = { - SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A24, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A25, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A29, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A2A, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0A2B, "Bullseye", CS8409_BULLSEYE), - SND_PCI_QUIRK(0x1028, 0x0AB0, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB2, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB1, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB3, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB4, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AB5, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AD9, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0ADA, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0ADB, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0ADC, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AF4, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0AF5, "Warlock", CS8409_WARLOCK), - SND_PCI_QUIRK(0x1028, 0x0A77, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A78, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A79, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A7A, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A7D, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A7E, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A7F, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0A80, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0ADF, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AE0, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AE1, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AE2, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AE9, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEA, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEB, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEC, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AED, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG), - SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG), - {} /* terminator */ -}; - -/* Dell Inspiron models with cs8409/cs42l42 */ -const struct hda_model_fixup cs8409_models[] = { - { .id = CS8409_BULLSEYE, .name = "bullseye" }, - { .id = CS8409_WARLOCK, .name = "warlock" }, - { .id = CS8409_CYBORG, .name = "cyborg" }, - {} -}; - -const struct hda_fixup cs8409_fixups[] = { - [CS8409_BULLSEYE] = { - .type = HDA_FIXUP_PINS, - .v.pins = cs8409_cs42l42_pincfgs, - .chained = true, - .chain_id = CS8409_FIXUPS, - }, - [CS8409_WARLOCK] = { - .type = HDA_FIXUP_PINS, - .v.pins = cs8409_cs42l42_pincfgs, - .chained = true, - .chain_id = CS8409_FIXUPS, - }, - [CS8409_CYBORG] = { - .type = HDA_FIXUP_PINS, - .v.pins = cs8409_cs42l42_pincfgs, - .chained = true, - .chain_id = CS8409_FIXUPS, - }, - [CS8409_FIXUPS] = { - .type = HDA_FIXUP_FUNC, - .v.func = cs8409_cs42l42_fixups, - }, -}; +/****************************************************************************** + * BULLSEYE / WARLOCK / CYBORG Specific Arrays + * CS8409/CS42L42 + ******************************************************************************/ const struct hda_verb cs8409_cs42l42_init_verbs[] = { { CS8409_PIN_AFG, AC_VERB_SET_GPIO_WAKE_MASK, 0x0018 }, /* WAKE from GPIO 3,4 */ @@ -144,7 +69,7 @@ const struct hda_pintbl cs8409_cs42l42_pincfgs[] = { }; /* Vendor specific HW configuration for CS42L42 */ -const struct cs8409_i2c_param cs42l42_init_reg_seq[CS42L42_INIT_REG_SEQ_SIZE] = { +static const struct cs8409_i2c_param cs42l42_init_reg_seq[] = { { 0x1010, 0xB0 }, { 0x1D01, 0x00 }, { 0x1D02, 0x06 }, @@ -310,3 +235,97 @@ const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[] = { { CS8409_PIN_VENDOR_WIDGET, CS8409_PFE_COEF_W2, 0x0000 }, {} /* Terminator */ }; + +struct sub_codec cs8409_cs42l42_codec = { + .addr = CS42L42_I2C_ADDR, + .reset_gpio = CS8409_CS42L42_RESET, + .irq_mask = CS8409_CS42L42_INT, + .init_seq = cs42l42_init_reg_seq, + .init_seq_num = ARRAY_SIZE(cs42l42_init_reg_seq), + .hp_jack_in = 0, + .mic_jack_in = 0, + .paged = 1, + .suspended = 1, +}; + +/****************************************************************************** + * CS8409 Patch Driver Structs + * Arrays Used for all projects using CS8409 + ******************************************************************************/ + +const struct snd_pci_quirk cs8409_fixup_tbl[] = { + SND_PCI_QUIRK(0x1028, 0x0A11, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A12, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A23, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A24, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A25, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A29, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A2A, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0A2B, "Bullseye", CS8409_BULLSEYE), + SND_PCI_QUIRK(0x1028, 0x0AB0, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB2, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB1, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB3, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB4, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AB5, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AD9, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0ADA, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0ADB, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0ADC, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AF4, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0AF5, "Warlock", CS8409_WARLOCK), + SND_PCI_QUIRK(0x1028, 0x0A77, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A78, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A79, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A7A, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A7D, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A7E, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A7F, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0A80, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0ADF, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AE0, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AE1, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AE2, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AE9, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEA, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEB, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEC, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AED, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG), + {} /* terminator */ +}; + +/* Dell Inspiron models with cs8409/cs42l42 */ +const struct hda_model_fixup cs8409_models[] = { + { .id = CS8409_BULLSEYE, .name = "bullseye" }, + { .id = CS8409_WARLOCK, .name = "warlock" }, + { .id = CS8409_CYBORG, .name = "cyborg" }, + {} +}; + +const struct hda_fixup cs8409_fixups[] = { + [CS8409_BULLSEYE] = { + .type = HDA_FIXUP_PINS, + .v.pins = cs8409_cs42l42_pincfgs, + .chained = true, + .chain_id = CS8409_FIXUPS, + }, + [CS8409_WARLOCK] = { + .type = HDA_FIXUP_PINS, + .v.pins = cs8409_cs42l42_pincfgs, + .chained = true, + .chain_id = CS8409_FIXUPS, + }, + [CS8409_CYBORG] = { + .type = HDA_FIXUP_PINS, + .v.pins = cs8409_cs42l42_pincfgs, + .chained = true, + .chain_id = CS8409_FIXUPS, + }, + [CS8409_FIXUPS] = { + .type = HDA_FIXUP_FUNC, + .v.func = cs8409_cs42l42_fixups, + }, +}; diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 257dd9006786..4b4f4dc54617 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -164,20 +164,20 @@ static void cs8409_set_i2c_dev_addr(struct hda_codec *codec, unsigned int addr) /** * cs8409_i2c_set_page - CS8409 I2C set page register. - * @codec: the codec instance + * @scodec: the codec instance * @i2c_reg: Page register * * Returns negative on error. */ -static int cs8409_i2c_set_page(struct hda_codec *codec, unsigned int i2c_reg) +static int cs8409_i2c_set_page(struct sub_codec *scodec, unsigned int i2c_reg) { - struct cs8409_spec *spec = codec->spec; + struct hda_codec *codec = scodec->codec; - if (spec->paged && (spec->last_page != (i2c_reg >> 8))) { + if (scodec->paged && (scodec->last_page != (i2c_reg >> 8))) { cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg >> 8); if (cs8409_i2c_wait_complete(codec) < 0) return -EIO; - spec->last_page = i2c_reg >> 8; + scodec->last_page = i2c_reg >> 8; } return 0; @@ -185,31 +185,27 @@ static int cs8409_i2c_set_page(struct hda_codec *codec, unsigned int i2c_reg) /** * cs8409_i2c_read - CS8409 I2C Read. - * @codec: the codec instance - * @i2c_address: I2C Address + * @scodec: the codec instance * @addr: Register to read * - * CS8409 I2C Read. * Returns negative on error, otherwise returns read value in bits 0-7. */ -static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, unsigned int addr) +static int cs8409_i2c_read(struct sub_codec *scodec, unsigned int addr) { + struct hda_codec *codec = scodec->codec; struct cs8409_spec *spec = codec->spec; unsigned int i2c_reg_data; unsigned int read_data; - if (spec->cs42l42_suspended) + if (scodec->suspended) return -EPERM; mutex_lock(&spec->i2c_mux); cs8409_enable_i2c_clock(codec); - cs8409_set_i2c_dev_addr(codec, i2c_address); + cs8409_set_i2c_dev_addr(codec, scodec->addr); - if (cs8409_i2c_set_page(codec, addr)) { - codec_err(codec, "%s() Paged Transaction Failed 0x%02x : 0x%04x\n", - __func__, i2c_address, addr); - return -EIO; - } + if (cs8409_i2c_set_page(scodec, addr)) + goto error; i2c_reg_data = (addr << 8) & 0x0ffff; cs8409_vendor_coef_set(codec, CS8409_I2C_QREAD, i2c_reg_data); @@ -224,34 +220,34 @@ static int cs8409_i2c_read(struct hda_codec *codec, unsigned int i2c_address, un error: mutex_unlock(&spec->i2c_mux); - codec_err(codec, "%s() Failed 0x%02x : 0x%04x\n", __func__, i2c_address, addr); + codec_err(codec, "%s() Failed 0x%02x : 0x%04x\n", __func__, scodec->addr, addr); return -EIO; } /** * cs8409_i2c_bulk_read - CS8409 I2C Read Sequence. - * @codec: the codec instance + * @scodec: the codec instance * @seq: Register Sequence to read * @count: Number of registeres to read * * Returns negative on error, values are read into value element of cs8409_i2c_param sequence. */ -static int cs8409_i2c_bulk_read(struct hda_codec *codec, unsigned int i2c_address, - struct cs8409_i2c_param *seq, int count) +static int cs8409_i2c_bulk_read(struct sub_codec *scodec, struct cs8409_i2c_param *seq, int count) { + struct hda_codec *codec = scodec->codec; struct cs8409_spec *spec = codec->spec; unsigned int i2c_reg_data; int i; - if (spec->cs42l42_suspended) + if (scodec->suspended) return -EPERM; mutex_lock(&spec->i2c_mux); - cs8409_set_i2c_dev_addr(codec, i2c_address); + cs8409_set_i2c_dev_addr(codec, scodec->addr); for (i = 0; i < count; i++) { cs8409_enable_i2c_clock(codec); - if (cs8409_i2c_set_page(codec, seq[i].addr)) + if (cs8409_i2c_set_page(scodec, seq[i].addr)) goto error; i2c_reg_data = (seq[i].addr << 8) & 0x0ffff; @@ -269,39 +265,34 @@ static int cs8409_i2c_bulk_read(struct hda_codec *codec, unsigned int i2c_addres error: mutex_unlock(&spec->i2c_mux); - codec_err(codec, "I2C Bulk Write Failed 0x%02x\n", i2c_address); + codec_err(codec, "I2C Bulk Write Failed 0x%02x\n", scodec->addr); return -EIO; } /** * cs8409_i2c_write - CS8409 I2C Write. - * @codec: the codec instance - * @i2c_address: I2C Address + * @scodec: the codec instance * @addr: Register to write to * @value: Data to write * - * CS8409 I2C Write. * Returns negative on error, otherwise returns 0. */ -static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, unsigned int addr, - unsigned int value) +static int cs8409_i2c_write(struct sub_codec *scodec, unsigned int addr, unsigned int value) { + struct hda_codec *codec = scodec->codec; struct cs8409_spec *spec = codec->spec; unsigned int i2c_reg_data; - if (spec->cs42l42_suspended) + if (scodec->suspended) return -EPERM; mutex_lock(&spec->i2c_mux); cs8409_enable_i2c_clock(codec); - cs8409_set_i2c_dev_addr(codec, i2c_address); + cs8409_set_i2c_dev_addr(codec, scodec->addr); - if (cs8409_i2c_set_page(codec, addr)) { - codec_err(codec, "%s() Paged Transaction Failed 0x%02x : 0x%04x\n", - __func__, i2c_address, addr); - return -EIO; - } + if (cs8409_i2c_set_page(scodec, addr)) + goto error; i2c_reg_data = ((addr << 8) & 0x0ff00) | (value & 0x0ff); cs8409_vendor_coef_set(codec, CS8409_I2C_QWRITE, i2c_reg_data); @@ -314,34 +305,35 @@ static int cs8409_i2c_write(struct hda_codec *codec, unsigned int i2c_address, u error: mutex_unlock(&spec->i2c_mux); - codec_err(codec, "%s() Failed 0x%02x : 0x%04x\n", __func__, i2c_address, addr); + codec_err(codec, "%s() Failed 0x%02x : 0x%04x\n", __func__, scodec->addr, addr); return -EIO; } /** * cs8409_i2c_bulk_write - CS8409 I2C Write Sequence. - * @codec: the codec instance + * @scodec: the codec instance * @seq: Register Sequence to write * @count: Number of registeres to write * * Returns negative on error. */ -static int cs8409_i2c_bulk_write(struct hda_codec *codec, unsigned int i2c_address, - const struct cs8409_i2c_param *seq, int count) +static int cs8409_i2c_bulk_write(struct sub_codec *scodec, const struct cs8409_i2c_param *seq, + int count) { + struct hda_codec *codec = scodec->codec; struct cs8409_spec *spec = codec->spec; unsigned int i2c_reg_data; int i; - if (spec->cs42l42_suspended) + if (scodec->suspended) return -EPERM; mutex_lock(&spec->i2c_mux); - cs8409_set_i2c_dev_addr(codec, i2c_address); + cs8409_set_i2c_dev_addr(codec, scodec->addr); for (i = 0; i < count; i++) { cs8409_enable_i2c_clock(codec); - if (cs8409_i2c_set_page(codec, seq[i].addr)) + if (cs8409_i2c_set_page(scodec, seq[i].addr)) goto error; i2c_reg_data = ((seq[i].addr << 8) & 0x0ff00) | (seq[i].value & 0x0ff); @@ -357,7 +349,7 @@ static int cs8409_i2c_bulk_write(struct hda_codec *codec, unsigned int i2c_addre error: mutex_unlock(&spec->i2c_mux); - codec_err(codec, "I2C Bulk Write Failed 0x%02x\n", i2c_address); + codec_err(codec, "I2C Bulk Write Failed 0x%02x\n", scodec->addr); return -EIO; } @@ -450,6 +442,7 @@ int cs42l42_volume_get(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uc { struct hda_codec *codec = snd_kcontrol_chip(kctrl); struct cs8409_spec *spec = codec->spec; + struct sub_codec *cs42l42 = spec->scodecs[get_amp_index(kctrl)]; int chs = get_amp_channels(kctrl); unsigned int ofs = get_amp_offset(kctrl); long *valp = uctrl->value.integer.value; @@ -457,13 +450,13 @@ int cs42l42_volume_get(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uc switch (ofs) { case CS42L42_VOL_DAC: if (chs & BIT(0)) - *valp++ = spec->vol[ofs]; + *valp++ = cs42l42->vol[ofs]; if (chs & BIT(1)) - *valp = spec->vol[ofs+1]; + *valp = cs42l42->vol[ofs+1]; break; case CS42L42_VOL_ADC: if (chs & BIT(0)) - *valp = spec->vol[ofs]; + *valp = cs42l42->vol[ofs]; break; default: break; @@ -476,6 +469,7 @@ int cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uc { struct hda_codec *codec = snd_kcontrol_chip(kctrl); struct cs8409_spec *spec = codec->spec; + struct sub_codec *cs42l42 = spec->scodecs[get_amp_index(kctrl)]; int chs = get_amp_channels(kctrl); unsigned int ofs = get_amp_offset(kctrl); long *valp = uctrl->value.integer.value; @@ -483,23 +477,23 @@ int cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uc switch (ofs) { case CS42L42_VOL_DAC: if (chs & BIT(0)) { - spec->vol[ofs] = *valp; - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS42L42_REG_HS_VOL_CHA, - -(spec->vol[ofs]) & CS42L42_REG_HS_VOL_MASK); + cs42l42->vol[ofs] = *valp; + cs8409_i2c_write(cs42l42, CS42L42_REG_HS_VOL_CHA, + -(cs42l42->vol[ofs]) & CS42L42_REG_HS_VOL_MASK); } if (chs & BIT(1)) { ofs++; valp++; - spec->vol[ofs] = *valp; - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS42L42_REG_HS_VOL_CHB, - -(spec->vol[ofs]) & CS42L42_REG_HS_VOL_MASK); + cs42l42->vol[ofs] = *valp; + cs8409_i2c_write(cs42l42, CS42L42_REG_HS_VOL_CHB, + -(cs42l42->vol[ofs]) & CS42L42_REG_HS_VOL_MASK); } break; case CS42L42_VOL_ADC: if (chs & BIT(0)) { - spec->vol[ofs] = *valp; - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS42L42_REG_AMIC_VOL, - spec->vol[ofs] & CS42L42_REG_AMIC_VOL_MASK); + cs42l42->vol[ofs] = *valp; + cs8409_i2c_write(cs42l42, CS42L42_REG_AMIC_VOL, + cs42l42->vol[ofs] & CS42L42_REG_AMIC_VOL_MASK); } break; default: @@ -510,54 +504,45 @@ int cs42l42_volume_put(struct snd_kcontrol *kctrl, struct snd_ctl_elem_value *uc } /* Configure CS42L42 slave codec for jack autodetect */ -static void cs42l42_enable_jack_detect(struct hda_codec *codec) +static void cs42l42_enable_jack_detect(struct sub_codec *cs42l42) { - /* Set TIP_SENSE_EN for analog front-end of tip sense. - * Additionally set HSBIAS_SENSE_EN for some variants. - */ - if (codec->fixup_id == CS8409_WARLOCK || codec->fixup_id == CS8409_BULLSEYE) - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b70, 0x0020); - else - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b70, 0x00a0); - + cs8409_i2c_write(cs42l42, 0x1b70, cs42l42->hsbias_hiz); /* Clear WAKE# */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b71, 0x00C1); + cs8409_i2c_write(cs42l42, 0x1b71, 0x00C1); /* Wait ~2.5ms */ usleep_range(2500, 3000); /* Set mode WAKE# output follows the combination logic directly */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b71, 0x00C0); + cs8409_i2c_write(cs42l42, 0x1b71, 0x00C0); /* Clear interrupts status */ - cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f); + cs8409_i2c_read(cs42l42, 0x130f); /* Enable interrupt */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0xF3); + cs8409_i2c_write(cs42l42, 0x1320, 0xF3); } /* Enable and run CS42L42 slave codec jack auto detect */ -static void cs42l42_run_jack_detect(struct hda_codec *codec) +static void cs42l42_run_jack_detect(struct sub_codec *cs42l42) { /* Clear interrupts */ - cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308); - cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1b77); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0xFF); - cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f); - - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1102, 0x87); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1f06, 0x86); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1b74, 0x07); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x131b, 0xFD); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1120, 0x80); + cs8409_i2c_read(cs42l42, 0x1308); + cs8409_i2c_read(cs42l42, 0x1b77); + cs8409_i2c_write(cs42l42, 0x1320, 0xFF); + cs8409_i2c_read(cs42l42, 0x130f); + + cs8409_i2c_write(cs42l42, 0x1102, 0x87); + cs8409_i2c_write(cs42l42, 0x1f06, 0x86); + cs8409_i2c_write(cs42l42, 0x1b74, 0x07); + cs8409_i2c_write(cs42l42, 0x131b, 0xFD); + cs8409_i2c_write(cs42l42, 0x1120, 0x80); /* Wait ~110ms*/ usleep_range(110000, 200000); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x111f, 0x77); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1120, 0xc0); + cs8409_i2c_write(cs42l42, 0x111f, 0x77); + cs8409_i2c_write(cs42l42, 0x1120, 0xc0); /* Wait ~10ms */ usleep_range(10000, 25000); - } -static int cs42l42_jack_unsol_event(struct hda_codec *codec) +static int cs42l42_jack_unsol_event(struct sub_codec *cs42l42) { - struct cs8409_spec *spec = codec->spec; int status_changed = 0; int reg_cdc_status; int reg_hs_status; @@ -565,9 +550,9 @@ static int cs42l42_jack_unsol_event(struct hda_codec *codec) int type; /* Read jack detect status registers */ - reg_cdc_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1308); - reg_hs_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x1124); - reg_ts_status = cs8409_i2c_read(codec, CS42L42_I2C_ADDR, 0x130f); + reg_cdc_status = cs8409_i2c_read(cs42l42, 0x1308); + reg_hs_status = cs8409_i2c_read(cs42l42, 0x1124); + reg_ts_status = cs8409_i2c_read(cs42l42, 0x130f); /* If status values are < 0, read error has occurred. */ if (reg_cdc_status < 0 || reg_hs_status < 0 || reg_ts_status < 0) @@ -577,45 +562,45 @@ static int cs42l42_jack_unsol_event(struct hda_codec *codec) if (reg_cdc_status & CS42L42_HSDET_AUTO_DONE) { /* Disable HSDET_AUTO_DONE */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x131b, 0xFF); + cs8409_i2c_write(cs42l42, 0x131b, 0xFF); type = ((reg_hs_status & CS42L42_HSTYPE_MASK) + 1); /* CS42L42 reports optical jack as type 4 * We don't handle optical jack */ if (type != 4) { - if (!spec->cs42l42_hp_jack_in) { + if (!cs42l42->hp_jack_in) { status_changed = 1; - spec->cs42l42_hp_jack_in = 1; + cs42l42->hp_jack_in = 1; } /* type = 3 has no mic */ - if ((!spec->cs42l42_mic_jack_in) && (type != 3)) { + if ((!cs42l42->mic_jack_in) && (type != 3)) { status_changed = 1; - spec->cs42l42_mic_jack_in = 1; + cs42l42->mic_jack_in = 1; } } else { - if (spec->cs42l42_hp_jack_in || spec->cs42l42_mic_jack_in) { + if (cs42l42->hp_jack_in || cs42l42->mic_jack_in) { status_changed = 1; - spec->cs42l42_hp_jack_in = 0; - spec->cs42l42_mic_jack_in = 0; + cs42l42->hp_jack_in = 0; + cs42l42->mic_jack_in = 0; } } /* Re-Enable Tip Sense Interrupt */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1320, 0xF3); + cs8409_i2c_write(cs42l42, 0x1320, 0xF3); } else { /* TIP_SENSE INSERT/REMOVE */ switch (reg_ts_status) { case CS42L42_JACK_INSERTED: - cs42l42_run_jack_detect(codec); + cs42l42_run_jack_detect(cs42l42); break; case CS42L42_JACK_REMOVED: - if (spec->cs42l42_hp_jack_in || spec->cs42l42_mic_jack_in) { + if (cs42l42->hp_jack_in || cs42l42->mic_jack_in) { status_changed = 1; - spec->cs42l42_hp_jack_in = 0; - spec->cs42l42_mic_jack_in = 0; + cs42l42->hp_jack_in = 0; + cs42l42->mic_jack_in = 0; } break; @@ -629,10 +614,8 @@ static int cs42l42_jack_unsol_event(struct hda_codec *codec) return status_changed; } -/* Assert/release RTS# line to CS42L42 */ -static void cs42l42_reset(struct hda_codec *codec) +static void cs42l42_resume(struct sub_codec *cs42l42) { - struct cs8409_spec *spec = codec->spec; struct cs8409_i2c_param irq_regs[] = { { 0x1308, 0x00 }, { 0x1309, 0x00 }, @@ -640,27 +623,35 @@ static void cs42l42_reset(struct hda_codec *codec) { 0x130F, 0x00 }, }; - /* Assert RTS# line */ - snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0); - /* wait ~10ms */ - usleep_range(10000, 15000); - /* Release RTS# line */ - snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, CS8409_CS42L42_RESET); - /* wait ~10ms */ - usleep_range(10000, 15000); + cs42l42->suspended = 0; - spec->cs42l42_suspended = 0; - spec->last_page = 0; + /* Initialize CS42L42 companion codec */ + cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num); /* Clear interrupts, by reading interrupt status registers */ - cs8409_i2c_bulk_read(codec, CS42L42_I2C_ADDR, irq_regs, ARRAY_SIZE(irq_regs)); + cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs)); + + /* Restore Volumes after Resume */ + cs8409_i2c_write(cs42l42, CS42L42_REG_HS_VOL_CHA, + -(cs42l42->vol[1]) & CS42L42_REG_HS_VOL_MASK); + cs8409_i2c_write(cs42l42, CS42L42_REG_HS_VOL_CHB, + -(cs42l42->vol[2]) & CS42L42_REG_HS_VOL_MASK); + cs8409_i2c_write(cs42l42, CS42L42_REG_AMIC_VOL, + cs42l42->vol[0] & CS42L42_REG_AMIC_VOL_MASK); + + if (cs42l42->full_scale_vol) + cs8409_i2c_write(cs42l42, 0x2001, 0x01); + + cs42l42_enable_jack_detect(cs42l42); } #ifdef CONFIG_PM -static void cs42l42_suspend(struct hda_codec *codec) +static void cs42l42_suspend(struct sub_codec *cs42l42) { /* Power down CS42L42 ASP/EQ/MIX/HP */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x1101, 0xfe); + cs8409_i2c_write(cs42l42, 0x1101, 0xfe); + cs42l42->suspended = 1; + cs42l42->last_page = 0; } #endif @@ -684,9 +675,10 @@ static void cs8409_free(struct hda_codec *codec) * generic snd_hda_jack_unsol_event(), read CS42L42 jack detect status registers * and then notify status via generic snd_hda_jack_unsol_event() call. */ -static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) +static void cs8409_cs42l42_jack_unsol_event(struct hda_codec *codec, unsigned int res) { struct cs8409_spec *spec = codec->spec; + struct sub_codec *cs42l42 = spec->scodecs[CS8409_CODEC0]; struct hda_jack_tbl *jk; /* jack_unsol_event() will be called every time gpio line changing state. @@ -694,12 +686,12 @@ static void cs8409_jack_unsol_event(struct hda_codec *codec, unsigned int res) * registers in previous cs8409_jack_unsol_event() call. * We don't need to handle this event, ignoring... */ - if (res & CS8409_CS42L42_INT) + if (res & cs42l42->irq_mask) return; - if (cs42l42_jack_unsol_event(codec)) { + if (cs42l42_jack_unsol_event(cs42l42)) { snd_hda_set_pin_ctl(codec, CS8409_CS42L42_SPK_PIN_NID, - spec->cs42l42_hp_jack_in ? 0 : PIN_OUT); + cs42l42->hp_jack_in ? 0 : PIN_OUT); /* Report jack*/ jk = snd_hda_jack_tbl_get_mst(codec, CS8409_CS42L42_HP_PIN_NID, 0); if (jk) @@ -721,9 +713,7 @@ static int cs8409_cs42l42_suspend(struct hda_codec *codec) cs8409_enable_ur(codec, 0); - cs42l42_suspend(codec); - - spec->cs42l42_suspended = 1; + cs42l42_suspend(spec->scodecs[CS8409_CODEC0]); /* Assert CS42L42 RTS# line */ snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0); @@ -742,6 +732,7 @@ static void cs8409_cs42l42_hw_init(struct hda_codec *codec) const struct cs8409_cir_param *seq = cs8409_cs42l42_hw_cfg; const struct cs8409_cir_param *seq_bullseye = cs8409_cs42l42_bullseye_atn; struct cs8409_spec *spec = codec->spec; + struct sub_codec *cs42l42 = spec->scodecs[CS8409_CODEC0]; if (spec->gpio_mask) { snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_MASK, @@ -755,33 +746,21 @@ static void cs8409_cs42l42_hw_init(struct hda_codec *codec) for (; seq->nid; seq++) cs8409_vendor_coef_set(codec, seq->cir, seq->coeff); - if (codec->fixup_id == CS8409_BULLSEYE) + if (codec->fixup_id == CS8409_BULLSEYE) { for (; seq_bullseye->nid; seq_bullseye++) cs8409_vendor_coef_set(codec, seq_bullseye->cir, seq_bullseye->coeff); + } - /* Reset CS42L42 */ - cs42l42_reset(codec); - - /* Initialise CS42L42 companion codec */ - cs8409_i2c_bulk_write(codec, CS42L42_I2C_ADDR, cs42l42_init_reg_seq, - CS42L42_INIT_REG_SEQ_SIZE); - - if (codec->fixup_id == CS8409_WARLOCK || codec->fixup_id == CS8409_CYBORG) { - /* FULL_SCALE_VOL = 0 for Warlock / Cyborg */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, 0x2001, 0x01); - /* DMIC1_MO=00b, DMIC1/2_SR=1 */ + /* DMIC1_MO=00b, DMIC1/2_SR=1 */ + if (codec->fixup_id == CS8409_WARLOCK || codec->fixup_id == CS8409_CYBORG) cs8409_vendor_coef_set(codec, 0x09, 0x0003); - } - /* Restore Volumes after Resume */ - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS42L42_REG_HS_VOL_CHA, - -(spec->vol[1]) & CS42L42_REG_HS_VOL_MASK); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS42L42_REG_HS_VOL_CHB, - -(spec->vol[2]) & CS42L42_REG_HS_VOL_MASK); - cs8409_i2c_write(codec, CS42L42_I2C_ADDR, CS42L42_REG_AMIC_VOL, - spec->vol[0] & CS42L42_REG_AMIC_VOL_MASK); + /* Release RTS# line */ + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, CS8409_CS42L42_RESET); + /* wait ~10ms */ + usleep_range(10000, 15000); - cs42l42_enable_jack_detect(codec); + cs42l42_resume(cs42l42); /* Enable Unsolicited Response */ cs8409_enable_ur(codec, 1); @@ -792,7 +771,7 @@ static const struct hda_codec_ops cs8409_cs42l42_patch_ops = { .build_pcms = snd_hda_gen_build_pcms, .init = cs8409_init, .free = cs8409_free, - .unsol_event = cs8409_jack_unsol_event, + .unsol_event = cs8409_cs42l42_jack_unsol_event, #ifdef CONFIG_PM .suspend = cs8409_cs42l42_suspend, #endif @@ -803,6 +782,7 @@ static int cs8409_cs42l42_exec_verb(struct hdac_device *dev, unsigned int cmd, u { struct hda_codec *codec = container_of(dev, struct hda_codec, core); struct cs8409_spec *spec = codec->spec; + struct sub_codec *cs42l42 = spec->scodecs[CS8409_CODEC0]; unsigned int nid = ((cmd >> 20) & 0x07f); unsigned int verb = ((cmd >> 8) & 0x0fff); @@ -815,18 +795,16 @@ static int cs8409_cs42l42_exec_verb(struct hdac_device *dev, unsigned int cmd, u switch (nid) { case CS8409_CS42L42_HP_PIN_NID: if (verb == AC_VERB_GET_PIN_SENSE) { - *res = (spec->cs42l42_hp_jack_in) ? AC_PINSENSE_PRESENCE : 0; + *res = (cs42l42->hp_jack_in) ? AC_PINSENSE_PRESENCE : 0; return 0; } break; - case CS8409_CS42L42_AMIC_PIN_NID: if (verb == AC_VERB_GET_PIN_SENSE) { - *res = (spec->cs42l42_mic_jack_in) ? AC_PINSENSE_PRESENCE : 0; + *res = (cs42l42->mic_jack_in) ? AC_PINSENSE_PRESENCE : 0; return 0; } break; - default: break; } @@ -845,6 +823,9 @@ void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, spec->exec_verb = codec->core.exec_verb; codec->core.exec_verb = cs8409_cs42l42_exec_verb; + spec->scodecs[CS8409_CODEC0] = &cs8409_cs42l42_codec; + spec->num_scodecs = 1; + spec->scodecs[CS8409_CODEC0]->codec = codec; codec->patch_ops = cs8409_cs42l42_patch_ops; spec->gen.suppress_auto_mute = 1; @@ -852,21 +833,38 @@ void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, spec->gen.suppress_vmaster = 1; /* GPIO 5 out, 3,4 in */ - spec->gpio_dir = CS8409_CS42L42_RESET; + spec->gpio_dir = spec->scodecs[CS8409_CODEC0]->reset_gpio; spec->gpio_data = 0; spec->gpio_mask = 0x03f; - spec->cs42l42_hp_jack_in = 0; - spec->cs42l42_mic_jack_in = 0; - spec->cs42l42_suspended = 1; - spec->paged = 1; - /* Basic initial sequence for specific hw configuration */ snd_hda_sequence_write(codec, cs8409_cs42l42_init_verbs); cs8409_fix_caps(codec, CS8409_CS42L42_HP_PIN_NID); cs8409_fix_caps(codec, CS8409_CS42L42_AMIC_PIN_NID); + /* Set TIP_SENSE_EN for analog front-end of tip sense. + * Additionally set HSBIAS_SENSE_EN and Full Scale volume for some variants. + */ + switch (codec->fixup_id) { + case CS8409_WARLOCK: + spec->scodecs[CS8409_CODEC0]->hsbias_hiz = 0x0020; + spec->scodecs[CS8409_CODEC0]->full_scale_vol = 1; + break; + case CS8409_BULLSEYE: + spec->scodecs[CS8409_CODEC0]->hsbias_hiz = 0x0020; + spec->scodecs[CS8409_CODEC0]->full_scale_vol = 0; + break; + case CS8409_CYBORG: + spec->scodecs[CS8409_CODEC0]->hsbias_hiz = 0x00a0; + spec->scodecs[CS8409_CODEC0]->full_scale_vol = 1; + break; + default: + spec->scodecs[CS8409_CODEC0]->hsbias_hiz = 0x0003; + spec->scodecs[CS8409_CODEC0]->full_scale_vol = 1; + break; + } + break; case HDA_FIXUP_ACT_PROBE: /* Set initial DMIC volume to -26 dB */ @@ -890,7 +888,7 @@ void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, * been already plugged in. * Run immediately after init. */ - cs42l42_run_jack_detect(codec); + cs42l42_run_jack_detect(spec->scodecs[CS8409_CODEC0]); usleep_range(100000, 150000); break; default: diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index ac68cca2bc11..817df295d594 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -216,8 +216,8 @@ enum cs8409_coefficient_index_registers { /* CS42L42 Specific Definitions */ +#define CS8409_MAX_CODECS 8 #define CS42L42_VOLUMES (4U) - #define CS42L42_HP_VOL_REAL_MIN (-63) #define CS42L42_HP_VOL_REAL_MAX (0) #define CS42L42_AMIC_VOL_REAL_MIN (-97) @@ -243,8 +243,6 @@ enum cs8409_coefficient_index_registers { #define CS8409_CS42L42_DMIC_PIN_NID CS8409_PIN_DMIC1_IN #define CS8409_CS42L42_DMIC_ADC_PIN_NID CS8409_PIN_DMIC1 -#define CS42L42_INIT_REG_SEQ_SIZE 59 - enum { CS8409_BULLSEYE, CS8409_WARLOCK, @@ -252,6 +250,10 @@ enum { CS8409_FIXUPS, }; +enum { + CS8409_CODEC0, +}; + enum { CS42L42_VOL_ADC, CS42L42_VOL_DAC, @@ -268,25 +270,40 @@ struct cs8409_cir_param { unsigned int coeff; }; +struct sub_codec { + struct hda_codec *codec; + unsigned int addr; + unsigned int reset_gpio; + unsigned int irq_mask; + const struct cs8409_i2c_param *init_seq; + unsigned int init_seq_num; + + unsigned int hp_jack_in:1; + unsigned int mic_jack_in:1; + unsigned int suspended:1; + unsigned int paged:1; + unsigned int last_page; + unsigned int hsbias_hiz; + unsigned int full_scale_vol:1; + + s8 vol[CS42L42_VOLUMES]; +}; + struct cs8409_spec { struct hda_gen_spec gen; struct hda_codec *codec; + struct sub_codec *scodecs[CS8409_MAX_CODECS]; + unsigned int num_scodecs; + unsigned int gpio_mask; unsigned int gpio_dir; unsigned int gpio_data; - unsigned int cs42l42_hp_jack_in:1; - unsigned int cs42l42_mic_jack_in:1; - unsigned int cs42l42_suspended:1; - s8 vol[CS42L42_VOLUMES]; - struct mutex i2c_mux; unsigned int i2c_clck_enabled; unsigned int dev_addr; struct delayed_work i2c_clk_work; - unsigned int paged; - unsigned int last_page; /* verb exec op override */ int (*exec_verb)(struct hdac_device *dev, unsigned int cmd, unsigned int flags, @@ -305,9 +322,9 @@ extern const struct hda_model_fixup cs8409_models[]; extern const struct hda_fixup cs8409_fixups[]; extern const struct hda_verb cs8409_cs42l42_init_verbs[]; extern const struct hda_pintbl cs8409_cs42l42_pincfgs[]; -extern const struct cs8409_i2c_param cs42l42_init_reg_seq[CS42L42_INIT_REG_SEQ_SIZE]; extern const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[]; extern const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[]; +extern struct sub_codec cs8409_cs42l42_codec; void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int action); From patchwork Fri Jul 30 15:18:36 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489347 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id D3340C432BE for ; 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Fri, 30 Jul 2021 16:19:11 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:11 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 5A6B32BA; Fri, 30 Jul 2021 15:19:11 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 19/27] ALSA: hda/cs8409: Support multiple sub_codecs for Suspend/Resume/Unsol events Date: Fri, 30 Jul 2021 16:18:36 +0100 Message-ID: <20210730151844.7873-20-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: L_3Mi8aOWv7Jp1Bo-vtN2NCpEgxf38c3 X-Proofpoint-ORIG-GUID: L_3Mi8aOWv7Jp1Bo-vtN2NCpEgxf38c3 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Stefan Binding Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409.c | 41 ++++++++++++++++++++++++------------ 1 file changed, 28 insertions(+), 13 deletions(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 4b4f4dc54617..8b048ff12eb7 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -375,16 +375,21 @@ static int cs8409_build_controls(struct hda_codec *codec) return 0; } -/* Enable/Disable Unsolicited Response for gpio(s) 3,4 */ +/* Enable/Disable Unsolicited Response */ static void cs8409_enable_ur(struct hda_codec *codec, int flag) { - /* GPIO4 INT# and GPIO3 WAKE# */ + struct cs8409_spec *spec = codec->spec; + unsigned int ur_gpios = 0; + int i; + + for (i = 0; i < spec->num_scodecs; i++) + ur_gpios |= spec->scodecs[i]->irq_mask; + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_UNSOLICITED_RSP_MASK, - flag ? CS8409_CS42L42_INT : 0); + flag ? ur_gpios : 0); snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_UNSOLICITED_ENABLE, flag ? AC_UNSOL_ENABLED : 0); - } static void cs8409_fix_caps(struct hda_codec *codec, unsigned int nid) @@ -616,6 +621,8 @@ static int cs42l42_jack_unsol_event(struct sub_codec *cs42l42) static void cs42l42_resume(struct sub_codec *cs42l42) { + struct hda_codec *codec = cs42l42->codec; + unsigned int gpio_data; struct cs8409_i2c_param irq_regs[] = { { 0x1308, 0x00 }, { 0x1309, 0x00 }, @@ -623,6 +630,12 @@ static void cs42l42_resume(struct sub_codec *cs42l42) { 0x130F, 0x00 }, }; + /* Bring CS42L42 out of Reset */ + gpio_data = snd_hda_codec_read(codec, CS8409_PIN_AFG, 0, AC_VERB_GET_GPIO_DATA, 0); + gpio_data |= cs42l42->reset_gpio; + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, gpio_data); + usleep_range(10000, 15000); + cs42l42->suspended = 0; /* Initialize CS42L42 companion codec */ @@ -648,10 +661,18 @@ static void cs42l42_resume(struct sub_codec *cs42l42) #ifdef CONFIG_PM static void cs42l42_suspend(struct sub_codec *cs42l42) { + struct hda_codec *codec = cs42l42->codec; + unsigned int gpio_data; + /* Power down CS42L42 ASP/EQ/MIX/HP */ cs8409_i2c_write(cs42l42, 0x1101, 0xfe); cs42l42->suspended = 1; cs42l42->last_page = 0; + + /* Put CS42L42 into Reset */ + gpio_data = snd_hda_codec_read(codec, CS8409_PIN_AFG, 0, AC_VERB_GET_GPIO_DATA, 0); + gpio_data &= ~cs42l42->reset_gpio; + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, gpio_data); } #endif @@ -710,13 +731,12 @@ static void cs8409_cs42l42_jack_unsol_event(struct hda_codec *codec, unsigned in static int cs8409_cs42l42_suspend(struct hda_codec *codec) { struct cs8409_spec *spec = codec->spec; + int i; cs8409_enable_ur(codec, 0); - cs42l42_suspend(spec->scodecs[CS8409_CODEC0]); - - /* Assert CS42L42 RTS# line */ - snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, 0); + for (i = 0; i < spec->num_scodecs; i++) + cs42l42_suspend(spec->scodecs[i]); snd_hda_shutup_pins(codec); @@ -755,11 +775,6 @@ static void cs8409_cs42l42_hw_init(struct hda_codec *codec) if (codec->fixup_id == CS8409_WARLOCK || codec->fixup_id == CS8409_CYBORG) cs8409_vendor_coef_set(codec, 0x09, 0x0003); - /* Release RTS# line */ - snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, CS8409_CS42L42_RESET); - /* wait ~10ms */ - usleep_range(10000, 15000); - cs42l42_resume(cs42l42); /* Enable Unsolicited Response */ From patchwork Fri Jul 30 15:18:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489348 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8C60FC4338F for ; Fri, 30 Jul 2021 15:27:33 +0000 (UTC) Received: from alsa0.perex.cz (alsa0.perex.cz [77.48.224.243]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 0DCFF6052B for ; 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Fri, 30 Jul 2021 16:19:12 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id C40852BA; Fri, 30 Jul 2021 15:19:11 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 21/27] ALSA: hda/cs8409: Add support for dolphin Date: Fri, 30 Jul 2021 16:18:38 +0100 Message-ID: <20210730151844.7873-22-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: iz6vEgeOO3EkrgNToVlRDGP1iGQnR-rB X-Proofpoint-ORIG-GUID: iz6vEgeOO3EkrgNToVlRDGP1iGQnR-rB X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Lucas Tanure , Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Lucas Tanure Dolphin devices have CS8409 HDA Bridge connected to two CS42L42 codecs. Codec 1 supports Headphone and Headset Mic. Codec 2 supports Line Out. Features: - Front and Read Jacks appear as separate jacks; Removal or connection of on jack should not affect the connection of the other. - Front Jack only shows up on jack detection. - Rear Jack is Phantom Jack. - Separate Volume Controls for each Jack Signed-off-by: Stefan Binding Signed-off-by: Lucas Tanure Signed-off-by: Vitaly Rodionov --- Changes in v2: - Fixed sparse warnings : Reported-by: kernel test robot sound/pci/hda/patch_cs8409.c:1061:59: sparse: sparse: Using plain integer as NULL pointer Changes in v3: - No changes sound/pci/hda/patch_cs8409-tables.c | 220 ++++++++++++++++++++++++++++ sound/pci/hda/patch_cs8409.c | 196 +++++++++++++++++++++++++ sound/pci/hda/patch_cs8409.h | 24 +++ 3 files changed, 440 insertions(+) diff --git a/sound/pci/hda/patch_cs8409-tables.c b/sound/pci/hda/patch_cs8409-tables.c index be9feb84aaa2..6453a7ec3856 100644 --- a/sound/pci/hda/patch_cs8409-tables.c +++ b/sound/pci/hda/patch_cs8409-tables.c @@ -249,6 +249,210 @@ struct sub_codec cs8409_cs42l42_codec = { .no_type_dect = 0, }; +/****************************************************************************** + * Dolphin Specific Arrays + * CS8409/ 2 X CS42L42 + ******************************************************************************/ + +const struct hda_verb dolphin_init_verbs[] = { + { 0x01, AC_VERB_SET_GPIO_WAKE_MASK, DOLPHIN_WAKE }, /* WAKE from GPIO 0,4 */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_STATE, 0x0001 }, /* Enable VPW processing */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x0002 }, /* Configure GPIO 6,7 */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0080 }, /* I2C mode */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_COEF_INDEX, 0x005b }, /* Set I2C bus speed */ + { CS8409_PIN_VENDOR_WIDGET, AC_VERB_SET_PROC_COEF, 0x0200 }, /* 100kHz I2C_STO = 2 */ + {} /* terminator */ +}; + +const struct hda_pintbl dolphin_pincfgs[] = { + { 0x24, 0x022210f0 }, /* ASP-1-TX-A */ + { 0x25, 0x010240f0 }, /* ASP-1-TX-B */ + { 0x34, 0x02a21050 }, /* ASP-1-RX */ + {} /* terminator */ +}; + +/* Vendor specific HW configuration for CS42L42 */ +static const struct cs8409_i2c_param dolphin_c0_init_reg_seq[] = { + { 0x1010, 0xB0 }, + { 0x1D01, 0x00 }, + { 0x1D02, 0x06 }, + { 0x1D03, 0x00 }, + { 0x1107, 0x01 }, + { 0x1009, 0x02 }, + { 0x1007, 0x03 }, + { 0x1201, 0x00 }, + { 0x1208, 0x13 }, + { 0x1205, 0xFF }, + { 0x1206, 0x00 }, + { 0x1207, 0x20 }, + { 0x1202, 0x0D }, + { 0x2A02, 0x02 }, + { 0x2A03, 0x00 }, + { 0x2A04, 0x00 }, + { 0x2A05, 0x02 }, + { 0x2A06, 0x00 }, + { 0x2A07, 0x20 }, + { 0x2A01, 0x0C }, + { 0x2902, 0x01 }, + { 0x2903, 0x02 }, + { 0x2904, 0x00 }, + { 0x2905, 0x00 }, + { 0x2901, 0x01 }, + { 0x1101, 0x0A }, + { 0x1102, 0x84 }, + { 0x2301, 0x00 }, + { 0x2303, 0x00 }, + { 0x2302, 0x3f }, + { 0x2001, 0x03 }, + { 0x1B75, 0xB6 }, + { 0x1B73, 0xC2 }, + { 0x1129, 0x01 }, + { 0x1121, 0xF3 }, + { 0x1103, 0x20 }, + { 0x1105, 0x00 }, + { 0x1112, 0x00 }, + { 0x1113, 0x80 }, + { 0x1C03, 0xC0 }, + { 0x1101, 0x02 }, + { 0x1316, 0xff }, + { 0x1317, 0xff }, + { 0x1318, 0xff }, + { 0x1319, 0xff }, + { 0x131a, 0xff }, + { 0x131b, 0xff }, + { 0x131c, 0xff }, + { 0x131e, 0xff }, + { 0x131f, 0xff }, + { 0x1320, 0xff }, + { 0x1b79, 0xff }, + { 0x1b7a, 0xff } +}; + +static const struct cs8409_i2c_param dolphin_c1_init_reg_seq[] = { + { 0x1010, 0xB0 }, + { 0x1D01, 0x00 }, + { 0x1D02, 0x06 }, + { 0x1D03, 0x00 }, + { 0x1107, 0x01 }, + { 0x1009, 0x02 }, + { 0x1007, 0x03 }, + { 0x1201, 0x00 }, + { 0x1208, 0x13 }, + { 0x1205, 0xFF }, + { 0x1206, 0x00 }, + { 0x1207, 0x20 }, + { 0x1202, 0x0D }, + { 0x2A02, 0x02 }, + { 0x2A03, 0x00 }, + { 0x2A04, 0x80 }, + { 0x2A05, 0x02 }, + { 0x2A06, 0x00 }, + { 0x2A07, 0xA0 }, + { 0x2A01, 0x0C }, + { 0x2902, 0x00 }, + { 0x2903, 0x02 }, + { 0x2904, 0x00 }, + { 0x2905, 0x00 }, + { 0x2901, 0x00 }, + { 0x1101, 0x0E }, + { 0x1102, 0x84 }, + { 0x2301, 0x00 }, + { 0x2303, 0x00 }, + { 0x2302, 0x3f }, + { 0x2001, 0x03 }, + { 0x1B75, 0xB6 }, + { 0x1B73, 0xC2 }, + { 0x1129, 0x01 }, + { 0x1121, 0xF3 }, + { 0x1103, 0x20 }, + { 0x1105, 0x00 }, + { 0x1112, 0x00 }, + { 0x1113, 0x80 }, + { 0x1C03, 0xC0 }, + { 0x1101, 0x02 }, + { 0x1316, 0xff }, + { 0x1317, 0xff }, + { 0x1318, 0xff }, + { 0x1319, 0xff }, + { 0x131a, 0xff }, + { 0x131b, 0xff }, + { 0x131c, 0xff }, + { 0x131e, 0xff }, + { 0x131f, 0xff }, + { 0x1320, 0xff }, + { 0x1b79, 0xff }, + { 0x1b7a, 0xff } +}; + +/* Vendor specific hw configuration for CS8409 */ +const struct cs8409_cir_param dolphin_hw_cfg[] = { + /* +PLL1/2_EN, +I2C_EN */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0xb008 }, + /* ASP1_EN=0, ASP1_STP=1 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0002 }, + /* ASP1/2_BUS_IDLE=10, +GPIO_I2C */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG3, 0x0a80 }, + /* ASP1.A: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=0 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL1, 0x0800 }, + /* ASP1.A: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=32 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_A_TX_CTRL2, 0x0820 }, + /* ASP1.B: TX.LAP=0, TX.LSZ=24 bits, TX.LCS=128 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_B_TX_CTRL1, 0x0880 }, + /* ASP1.B: TX.RAP=0, TX.RSZ=24 bits, TX.RCS=160 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_B_TX_CTRL2, 0x08a0 }, + /* ASP1.A: RX.LAP=0, RX.LSZ=24 bits, RX.LCS=0 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL1, 0x0800 }, + /* ASP1.A: RX.RAP=0, RX.RSZ=24 bits, RX.RCS=0 */ + { CS8409_PIN_VENDOR_WIDGET, ASP1_A_RX_CTRL2, 0x0800 }, + /* ASP1: LCHI = 00h */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL1, 0x8000 }, + /* ASP1: MC/SC_SRCSEL=PLL1, LCPR=FFh */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL2, 0x28ff }, + /* ASP1: MCEN=0, FSD=011, SCPOL_IN/OUT=0, SCDIV=1:4 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_ASP1_CLK_CTRL3, 0x0062 }, + /* ASP1/2_BEEP=0 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_BEEP_CFG, 0x0000 }, + /* ASP1_EN=1, ASP1_STP=1 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG2, 0x0022 }, + /* -PLL2_EN */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_DEV_CFG1, 0x9008 }, + /* ASP1_xxx_EN=1, ASP1_MCLK_EN=0 */ + { CS8409_PIN_VENDOR_WIDGET, CS8409_PAD_CFG_SLW_RATE_CTRL, 0x5400 }, + /* test mode on */ + { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x9999 }, + /* GPIO hysteresis = 30 us */ + { CS8409_PIN_VENDOR_WIDGET, 0xc5, 0x0000 }, + /* test mode off */ + { CS8409_PIN_VENDOR_WIDGET, 0xc0, 0x0000 }, + {} /* Terminator */ +}; + +struct sub_codec dolphin_cs42l42_0 = { + .addr = DOLPHIN_C0_I2C_ADDR, + .reset_gpio = DOLPHIN_C0_RESET, + .irq_mask = DOLPHIN_C0_INT, + .init_seq = dolphin_c0_init_reg_seq, + .init_seq_num = ARRAY_SIZE(dolphin_c0_init_reg_seq), + .hp_jack_in = 0, + .mic_jack_in = 0, + .paged = 1, + .suspended = 1, + .no_type_dect = 0, +}; + +struct sub_codec dolphin_cs42l42_1 = { + .addr = DOLPHIN_C1_I2C_ADDR, + .reset_gpio = DOLPHIN_C1_RESET, + .irq_mask = DOLPHIN_C1_INT, + .init_seq = dolphin_c1_init_reg_seq, + .init_seq_num = ARRAY_SIZE(dolphin_c1_init_reg_seq), + .hp_jack_in = 0, + .mic_jack_in = 0, + .paged = 1, + .suspended = 1, + .no_type_dect = 1, +}; + /****************************************************************************** * CS8409 Patch Driver Structs * Arrays Used for all projects using CS8409 @@ -295,6 +499,11 @@ const struct snd_pci_quirk cs8409_fixup_tbl[] = { SND_PCI_QUIRK(0x1028, 0x0AEE, "Cyborg", CS8409_CYBORG), SND_PCI_QUIRK(0x1028, 0x0AEF, "Cyborg", CS8409_CYBORG), SND_PCI_QUIRK(0x1028, 0x0AF0, "Cyborg", CS8409_CYBORG), + SND_PCI_QUIRK(0x1028, 0x0AD0, "Dolphin", CS8409_DOLPHIN), + SND_PCI_QUIRK(0x1028, 0x0AD1, "Dolphin", CS8409_DOLPHIN), + SND_PCI_QUIRK(0x1028, 0x0AD2, "Dolphin", CS8409_DOLPHIN), + SND_PCI_QUIRK(0x1028, 0x0AD3, "Dolphin", CS8409_DOLPHIN), + SND_PCI_QUIRK(0x1028, 0x0ACF, "Dolphin", CS8409_DOLPHIN), {} /* terminator */ }; @@ -303,6 +512,7 @@ const struct hda_model_fixup cs8409_models[] = { { .id = CS8409_BULLSEYE, .name = "bullseye" }, { .id = CS8409_WARLOCK, .name = "warlock" }, { .id = CS8409_CYBORG, .name = "cyborg" }, + { .id = CS8409_DOLPHIN, .name = "dolphin" }, {} }; @@ -329,4 +539,14 @@ const struct hda_fixup cs8409_fixups[] = { .type = HDA_FIXUP_FUNC, .v.func = cs8409_cs42l42_fixups, }, + [CS8409_DOLPHIN] = { + .type = HDA_FIXUP_PINS, + .v.pins = dolphin_pincfgs, + .chained = true, + .chain_id = CS8409_DOLPHIN_FIXUPS, + }, + [CS8409_DOLPHIN_FIXUPS] = { + .type = HDA_FIXUP_FUNC, + .v.func = dolphin_fixups, + }, }; diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 10903bcc3fcd..42192d83b361 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -921,6 +921,202 @@ void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, } } +/****************************************************************************** + * Dolphin Specific Functions + * CS8409/ 2 X CS42L42 + ******************************************************************************/ + +/* + * In the case of CS8409 we do not have unsolicited events when + * hs mic and hp are connected. Companion codec CS42L42 will + * generate interrupt via irq_mask to notify jack events. We have to overwrite + * generic snd_hda_jack_unsol_event(), read CS42L42 jack detect status registers + * and then notify status via generic snd_hda_jack_unsol_event() call. + */ +static void dolphin_jack_unsol_event(struct hda_codec *codec, unsigned int res) +{ + struct cs8409_spec *spec = codec->spec; + struct sub_codec *cs42l42; + struct hda_jack_tbl *jk; + + cs42l42 = spec->scodecs[CS8409_CODEC0]; + if (!cs42l42->suspended && (~res & cs42l42->irq_mask) && + cs42l42_jack_unsol_event(cs42l42)) { + jk = snd_hda_jack_tbl_get_mst(codec, DOLPHIN_HP_PIN_NID, 0); + if (jk) + snd_hda_jack_unsol_event(codec, + (jk->tag << AC_UNSOL_RES_TAG_SHIFT) & + AC_UNSOL_RES_TAG); + + jk = snd_hda_jack_tbl_get_mst(codec, DOLPHIN_AMIC_PIN_NID, 0); + if (jk) + snd_hda_jack_unsol_event(codec, + (jk->tag << AC_UNSOL_RES_TAG_SHIFT) & + AC_UNSOL_RES_TAG); + } + + cs42l42 = spec->scodecs[CS8409_CODEC1]; + if (!cs42l42->suspended && (~res & cs42l42->irq_mask) && + cs42l42_jack_unsol_event(cs42l42)) { + jk = snd_hda_jack_tbl_get_mst(codec, DOLPHIN_LO_PIN_NID, 0); + if (jk) + snd_hda_jack_unsol_event(codec, + (jk->tag << AC_UNSOL_RES_TAG_SHIFT) & + AC_UNSOL_RES_TAG); + } +} + +/* Vendor specific HW configuration + * PLL, ASP, I2C, SPI, GPIOs, DMIC etc... + */ +static void dolphin_hw_init(struct hda_codec *codec) +{ + const struct cs8409_cir_param *seq = dolphin_hw_cfg; + struct cs8409_spec *spec = codec->spec; + struct sub_codec *cs42l42; + int i; + + if (spec->gpio_mask) { + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_MASK, + spec->gpio_mask); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DIRECTION, + spec->gpio_dir); + snd_hda_codec_write(codec, CS8409_PIN_AFG, 0, AC_VERB_SET_GPIO_DATA, + spec->gpio_data); + } + + for (; seq->nid; seq++) + cs8409_vendor_coef_set(codec, seq->cir, seq->coeff); + + for (i = 0; i < spec->num_scodecs; i++) { + cs42l42 = spec->scodecs[i]; + cs42l42_resume(cs42l42); + } + + /* Enable Unsolicited Response */ + cs8409_enable_ur(codec, 1); +} + +static const struct hda_codec_ops cs8409_dolphin_patch_ops = { + .build_controls = cs8409_build_controls, + .build_pcms = snd_hda_gen_build_pcms, + .init = cs8409_init, + .free = snd_hda_gen_free, + .unsol_event = dolphin_jack_unsol_event, +#ifdef CONFIG_PM + .suspend = cs8409_cs42l42_suspend, +#endif +}; + +static int dolphin_exec_verb(struct hdac_device *dev, unsigned int cmd, unsigned int flags, + unsigned int *res) +{ + struct hda_codec *codec = container_of(dev, struct hda_codec, core); + struct cs8409_spec *spec = codec->spec; + struct sub_codec *cs42l42 = spec->scodecs[CS8409_CODEC0]; + + unsigned int nid = ((cmd >> 20) & 0x07f); + unsigned int verb = ((cmd >> 8) & 0x0fff); + + /* CS8409 pins have no AC_PINSENSE_PRESENCE + * capabilities. We have to intercept calls for CS42L42 pins + * and return correct pin sense values for read_pin_sense() call from + * hda_jack based on CS42L42 jack detect status. + */ + switch (nid) { + case DOLPHIN_HP_PIN_NID: + case DOLPHIN_LO_PIN_NID: + if (nid == DOLPHIN_LO_PIN_NID) + cs42l42 = spec->scodecs[CS8409_CODEC1]; + if (verb == AC_VERB_GET_PIN_SENSE) { + *res = (cs42l42->hp_jack_in) ? AC_PINSENSE_PRESENCE : 0; + return 0; + } + break; + case DOLPHIN_AMIC_PIN_NID: + if (verb == AC_VERB_GET_PIN_SENSE) { + *res = (cs42l42->mic_jack_in) ? AC_PINSENSE_PRESENCE : 0; + return 0; + } + break; + default: + break; + } + + return spec->exec_verb(dev, cmd, flags, res); +} + +void dolphin_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int action) +{ + struct cs8409_spec *spec = codec->spec; + struct snd_kcontrol_new *kctrl; + int i; + + switch (action) { + case HDA_FIXUP_ACT_PRE_PROBE: + snd_hda_add_verbs(codec, dolphin_init_verbs); + /* verb exec op override */ + spec->exec_verb = codec->core.exec_verb; + codec->core.exec_verb = dolphin_exec_verb; + + spec->scodecs[CS8409_CODEC0] = &dolphin_cs42l42_0; + spec->scodecs[CS8409_CODEC0]->codec = codec; + spec->scodecs[CS8409_CODEC1] = &dolphin_cs42l42_1; + spec->scodecs[CS8409_CODEC1]->codec = codec; + spec->num_scodecs = 2; + + codec->patch_ops = cs8409_dolphin_patch_ops; + + /* GPIO 1,5 out, 0,4 in */ + spec->gpio_dir = spec->scodecs[CS8409_CODEC0]->reset_gpio | + spec->scodecs[CS8409_CODEC1]->reset_gpio; + spec->gpio_data = 0; + spec->gpio_mask = 0x03f; + + /* Basic initial sequence for specific hw configuration */ + snd_hda_sequence_write(codec, dolphin_init_verbs); + + snd_hda_jack_add_kctl(codec, DOLPHIN_LO_PIN_NID, "Line Out", true, + SND_JACK_HEADPHONE, NULL); + + cs8409_fix_caps(codec, DOLPHIN_HP_PIN_NID); + cs8409_fix_caps(codec, DOLPHIN_LO_PIN_NID); + cs8409_fix_caps(codec, DOLPHIN_AMIC_PIN_NID); + + break; + case HDA_FIXUP_ACT_PROBE: + snd_hda_gen_add_kctl(&spec->gen, "Headphone Playback Volume", + &cs42l42_dac_volume_mixer); + snd_hda_gen_add_kctl(&spec->gen, "Mic Capture Volume", &cs42l42_adc_volume_mixer); + kctrl = snd_hda_gen_add_kctl(&spec->gen, "Line Out Playback Volume", + &cs42l42_dac_volume_mixer); + /* Update Line Out kcontrol template */ + kctrl->private_value = HDA_COMPOSE_AMP_VAL_OFS(DOLPHIN_HP_PIN_NID, 3, CS8409_CODEC1, + HDA_OUTPUT, CS42L42_VOL_DAC) | HDA_AMP_VAL_MIN_MUTE; + cs8409_enable_ur(codec, 0); + dolphin_hw_init(codec); + snd_hda_codec_set_name(codec, "CS8409/CS42L42"); + break; + case HDA_FIXUP_ACT_INIT: + dolphin_hw_init(codec); + fallthrough; + case HDA_FIXUP_ACT_BUILD: + /* Run jack auto detect first time on boot + * after controls have been added, to check if jack has + * been already plugged in. + * Run immediately after init. + */ + for (i = 0; i < spec->num_scodecs; i++) { + cs42l42_run_jack_detect(spec->scodecs[i]); + usleep_range(100000, 150000); + } + + break; + default: + break; + } +} + static int patch_cs8409(struct hda_codec *codec) { int err; diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index a105c3c9023d..1b5a8d04ba0f 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -243,15 +243,32 @@ enum cs8409_coefficient_index_registers { #define CS8409_CS42L42_DMIC_PIN_NID CS8409_PIN_DMIC1_IN #define CS8409_CS42L42_DMIC_ADC_PIN_NID CS8409_PIN_DMIC1 +/* Dolphin */ + +#define DOLPHIN_C0_I2C_ADDR (0x48 << 1) +#define DOLPHIN_C1_I2C_ADDR (0x49 << 1) +#define DOLPHIN_HP_PIN_NID CS8409_PIN_ASP1_TRANSMITTER_A +#define DOLPHIN_LO_PIN_NID CS8409_PIN_ASP1_TRANSMITTER_B +#define DOLPHIN_AMIC_PIN_NID CS8409_PIN_ASP1_RECEIVER_A + +#define DOLPHIN_C0_INT GENMASK(4, 4) +#define DOLPHIN_C1_INT GENMASK(0, 0) +#define DOLPHIN_C0_RESET GENMASK(5, 5) +#define DOLPHIN_C1_RESET GENMASK(1, 1) +#define DOLPHIN_WAKE (DOLPHIN_C0_INT | DOLPHIN_C1_INT) + enum { CS8409_BULLSEYE, CS8409_WARLOCK, CS8409_CYBORG, CS8409_FIXUPS, + CS8409_DOLPHIN, + CS8409_DOLPHIN_FIXUPS, }; enum { CS8409_CODEC0, + CS8409_CODEC1 }; enum { @@ -327,6 +344,13 @@ extern const struct cs8409_cir_param cs8409_cs42l42_hw_cfg[]; extern const struct cs8409_cir_param cs8409_cs42l42_bullseye_atn[]; extern struct sub_codec cs8409_cs42l42_codec; +extern const struct hda_verb dolphin_init_verbs[]; +extern const struct hda_pintbl dolphin_pincfgs[]; +extern const struct cs8409_cir_param dolphin_hw_cfg[]; +extern struct sub_codec dolphin_cs42l42_0; +extern struct sub_codec dolphin_cs42l42_1; + void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int action); +void dolphin_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int action); #endif From patchwork Fri Jul 30 15:18:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489344 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A7BCC4338F for ; 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Fri, 30 Jul 2021 16:19:12 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:12 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id 7E43146E; Fri, 30 Jul 2021 15:19:12 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 24/27] ALSA: hda/cs8409: Use timeout rather than retries for I2C transaction waits Date: Fri, 30 Jul 2021 16:18:41 +0100 Message-ID: <20210730151844.7873-25-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: g2E6px2xx8VCJX5M10O9Jj-EMNcz6Bri X-Proofpoint-ORIG-GUID: g2E6px2xx8VCJX5M10O9Jj-EMNcz6Bri X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Stefan Binding Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409.c | 16 +++------------- sound/pci/hda/patch_cs8409.h | 2 ++ 2 files changed, 5 insertions(+), 13 deletions(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index 08e991a33344..b53653ef73cb 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -127,24 +127,14 @@ static void cs8409_enable_i2c_clock(struct hda_codec *codec) * @codec: the codec instance * * Wait for I2C transaction to complete. - * Return -1 if transaction wait times out. + * Return -ETIMEDOUT if transaction wait times out. */ static int cs8409_i2c_wait_complete(struct hda_codec *codec) { - int repeat = 5; unsigned int retval; - do { - retval = cs8409_vendor_coef_get(codec, CS8409_I2C_STS); - if ((retval & 0x18) != 0x18) { - usleep_range(2000, 4000); - --repeat; - } else - return 0; - - } while (repeat); - - return -1; + return read_poll_timeout(cs8409_vendor_coef_get, retval, retval & 0x18, + CS42L42_I2C_SLEEP_US, CS42L42_I2C_TIMEOUT_US, false, codec, CS8409_I2C_STS); } /** diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index 2208be2ffad1..71dbbd8e2f3b 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -231,6 +231,8 @@ enum cs8409_coefficient_index_registers { #define CS42L42_HSTYPE_MASK (0x03) #define CS42L42_JACK_INSERTED (0x0C) #define CS42L42_JACK_REMOVED (0x00) +#define CS42L42_I2C_TIMEOUT_US (20000) +#define CS42L42_I2C_SLEEP_US (2000) /* Dell BULLSEYE / WARLOCK / CYBORG Specific Definitions */ From patchwork Fri Jul 30 15:18:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489346 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 829ACC4338F for ; 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Fri, 30 Jul 2021 16:19:12 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:12 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id B3FAF45D; Fri, 30 Jul 2021 15:19:12 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 25/27] ALSA: hda/cs8409: Remove unnecessary delays Date: Fri, 30 Jul 2021 16:18:42 +0100 Message-ID: <20210730151844.7873-26-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: bi2sux3K20pdjOJ-Qq8iaea1evZ0nCap X-Proofpoint-ORIG-GUID: bi2sux3K20pdjOJ-Qq8iaea1evZ0nCap X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=984 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Stefan Binding Since delays when starting jack detection after initialization have been reduced/removed, it is necessary to add back in an extra 20ms delay after the init sequence to allow the CS42L42 to power up correctly. Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index b53653ef73cb..f4c53088fa4e 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -528,12 +528,10 @@ static void cs42l42_run_jack_detect(struct sub_codec *cs42l42) cs8409_i2c_write(cs42l42, 0x1b74, 0x07); cs8409_i2c_write(cs42l42, 0x131b, 0xFD); cs8409_i2c_write(cs42l42, 0x1120, 0x80); - /* Wait ~110ms*/ - usleep_range(110000, 200000); + /* Wait ~100us*/ + usleep_range(100, 200); cs8409_i2c_write(cs42l42, 0x111f, 0x77); cs8409_i2c_write(cs42l42, 0x1120, 0xc0); - /* Wait ~10ms */ - usleep_range(10000, 25000); } static int cs42l42_handle_tip_sense(struct sub_codec *cs42l42, unsigned int reg_ts_status) @@ -640,6 +638,7 @@ static void cs42l42_resume(struct sub_codec *cs42l42) /* Initialize CS42L42 companion codec */ cs8409_i2c_bulk_write(cs42l42, cs42l42->init_seq, cs42l42->init_seq_num); + usleep_range(20000, 25000); /* Clear interrupts, by reading interrupt status registers */ cs8409_i2c_bulk_read(cs42l42, irq_regs, ARRAY_SIZE(irq_regs)); @@ -907,7 +906,6 @@ void cs8409_cs42l42_fixups(struct hda_codec *codec, const struct hda_fixup *fix, * Run immediately after init. */ cs42l42_run_jack_detect(spec->scodecs[CS8409_CODEC0]); - usleep_range(100000, 150000); break; default: break; @@ -1102,10 +1100,8 @@ void dolphin_fixups(struct hda_codec *codec, const struct hda_fixup *fix, int ac * been already plugged in. * Run immediately after init. */ - for (i = 0; i < spec->num_scodecs; i++) { + for (i = 0; i < spec->num_scodecs; i++) cs42l42_run_jack_detect(spec->scodecs[i]); - usleep_range(100000, 150000); - } break; default: From patchwork Fri Jul 30 15:18:43 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vitaly Rodionov X-Patchwork-Id: 489345 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-16.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id CE7C3C4338F for ; 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Fri, 30 Jul 2021 16:19:13 +0100 Received: from ediswmail.ad.cirrus.com (198.61.86.93) by EDIEX01.ad.cirrus.com (198.61.84.80) with Microsoft SMTP Server id 15.1.2242.4 via Frontend Transport; Fri, 30 Jul 2021 16:19:13 +0100 Received: from vitaly-Inspiron-5415.ad.cirrus.com (unknown [198.90.238.32]) by ediswmail.ad.cirrus.com (Postfix) with ESMTP id E929E2BA; Fri, 30 Jul 2021 15:19:12 +0000 (UTC) From: Vitaly Rodionov To: Jaroslav Kysela , Takashi Iwai Subject: [PATCH v3 26/27] ALSA: hda/cs8409: Follow correct CS42L42 power down sequence for suspend Date: Fri, 30 Jul 2021 16:18:43 +0100 Message-ID: <20210730151844.7873-27-vitalyr@opensource.cirrus.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> References: <20210730151844.7873-1-vitalyr@opensource.cirrus.com> MIME-Version: 1.0 X-Proofpoint-GUID: QiTiCKMmOJBVHkvvB2CvqiVZ7OkRSQc4 X-Proofpoint-ORIG-GUID: QiTiCKMmOJBVHkvvB2CvqiVZ7OkRSQc4 X-Proofpoint-Spam-Details: rule=notspam policy=default score=0 priorityscore=1501 impostorscore=0 spamscore=0 clxscore=1015 mlxscore=0 mlxlogscore=999 lowpriorityscore=0 malwarescore=0 phishscore=0 bulkscore=0 suspectscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2107300102 Cc: patches@opensource.cirrus.com, alsa-devel@alsa-project.org, linux-kernel@vger.kernel.org, Stefan Binding X-BeenThere: alsa-devel@alsa-project.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: "Alsa-devel mailing list for ALSA developers - http://www.alsa-project.org" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: alsa-devel-bounces@alsa-project.org Sender: "Alsa-devel" From: Stefan Binding Signed-off-by: Stefan Binding Signed-off-by: Vitaly Rodionov --- Changes in v2: - No changes Changes in v3: - No changes sound/pci/hda/patch_cs8409.c | 23 ++++++++++++++++++++++- sound/pci/hda/patch_cs8409.h | 2 ++ 2 files changed, 24 insertions(+), 1 deletion(-) diff --git a/sound/pci/hda/patch_cs8409.c b/sound/pci/hda/patch_cs8409.c index f4c53088fa4e..b42ef3c3e447 100644 --- a/sound/pci/hda/patch_cs8409.c +++ b/sound/pci/hda/patch_cs8409.c @@ -11,6 +11,7 @@ #include #include #include +#include #include "patch_cs8409.h" @@ -206,6 +207,7 @@ static int cs8409_i2c_read(struct sub_codec *scodec, unsigned int addr) read_data = cs8409_vendor_coef_get(codec, CS8409_I2C_QREAD); mutex_unlock(&spec->i2c_mux); + return read_data & 0x0ff; error: @@ -662,9 +664,28 @@ static void cs42l42_suspend(struct sub_codec *cs42l42) { struct hda_codec *codec = cs42l42->codec; unsigned int gpio_data; + int reg_cdc_status = 0; + const struct cs8409_i2c_param cs42l42_pwr_down_seq[] = { + { 0x2301, 0x3F }, + { 0x2302, 0x3F }, + { 0x2303, 0x3F }, + { 0x2001, 0x0F }, + { 0x2A01, 0x00 }, + { 0x1207, 0x00 }, + { 0x1101, 0xFE }, + { 0x1102, 0x8C }, + { 0x1101, 0xFF }, + }; + + cs8409_i2c_bulk_write(cs42l42, cs42l42_pwr_down_seq, ARRAY_SIZE(cs42l42_pwr_down_seq)); + + if (read_poll_timeout(cs8409_i2c_read, reg_cdc_status, + (reg_cdc_status & 0x1), CS42L42_PDN_SLEEP_US, CS42L42_PDN_TIMEOUT_US, + true, cs42l42, 0x1308) < 0) + codec_warn(codec, "Timeout waiting for PDN_DONE for CS42L42\n"); /* Power down CS42L42 ASP/EQ/MIX/HP */ - cs8409_i2c_write(cs42l42, 0x1101, 0xfe); + cs8409_i2c_write(cs42l42, 0x1102, 0x9C); cs42l42->suspended = 1; cs42l42->last_page = 0; diff --git a/sound/pci/hda/patch_cs8409.h b/sound/pci/hda/patch_cs8409.h index 71dbbd8e2f3b..09987daa9cbf 100644 --- a/sound/pci/hda/patch_cs8409.h +++ b/sound/pci/hda/patch_cs8409.h @@ -233,6 +233,8 @@ enum cs8409_coefficient_index_registers { #define CS42L42_JACK_REMOVED (0x00) #define CS42L42_I2C_TIMEOUT_US (20000) #define CS42L42_I2C_SLEEP_US (2000) +#define CS42L42_PDN_TIMEOUT_US (250000) +#define CS42L42_PDN_SLEEP_US (2000) /* Dell BULLSEYE / WARLOCK / CYBORG Specific Definitions */