From patchwork Fri Jul 30 15:46:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 489390 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 27AB7C4320A for ; Fri, 30 Jul 2021 15:46:51 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 12AD861042 for ; Fri, 30 Jul 2021 15:46:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234196AbhG3Pqy (ORCPT ); Fri, 30 Jul 2021 11:46:54 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33716 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233230AbhG3Pqs (ORCPT ); Fri, 30 Jul 2021 11:46:48 -0400 Received: from mail-pl1-x629.google.com (mail-pl1-x629.google.com [IPv6:2607:f8b0:4864:20::629]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E3D9DC0613D3 for ; Fri, 30 Jul 2021 08:46:42 -0700 (PDT) Received: by mail-pl1-x629.google.com with SMTP id k1so11529711plt.12 for ; Fri, 30 Jul 2021 08:46:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HGNj9GKkPcNlrQ3u81KWmc1E6wLr3PhoH6cMUoSxMIY=; b=aFkHg2l6yaOdtV8Ca6Onrbf74caIFdI1DKRYCrMMfbe0xGMSMWUNHQ4PiC2Xz+tAkK dFnu5/uRUjjZXlmmpBrzCG1skLJiZEb43HD8O+P7iqHf+jDgRtvaGx+ms/elJxST3cVZ lNHsdsBrtQMtOVLrLmb0BtNeapnEzZ8LT8nuE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HGNj9GKkPcNlrQ3u81KWmc1E6wLr3PhoH6cMUoSxMIY=; b=hYv7DT85baesBBXMYpdFFBnK38/AaIsFY4sKBDLhTEeAHrNbAnIVyHU7g9EqiQvED3 ESR1A0i8/vEDQgz30bwil5cSKHE/wxrseLPf1JDCn062J84I5JvGeoz5qyFaHUb1HLU6 1AawbtpQxLYFcwHn0IF8diHyWUyqwdR3TQYPDlIScNjtx5CEXP1P86kGO8A5gyHaP05u k2RyXkMeFeU2WOA+k929Yt0jLsQVU/Ox7WXEC7j9PVSjumSYpleent20rURjB63gXG6s shp0apmbH4BbMFAySgl1V0QFJGZD/wqzQgubgS7AYrzdYdYCmHrkDxb41hrrgwoJFnrk rkqg== X-Gm-Message-State: AOAM533b6Oclzh+S/6WXl90MUYDS39GtL5g14DDpg55E0Z+0Mj2kZTUY FaSpEtUYWFL8exBKkXEzH0v1Nw== X-Google-Smtp-Source: ABdhPJx+3y28Ce4LyY9cSNNhWVuXUoPdutEn+sS5mEWeDERMUSHe6T3XxxsIUu92Fq4H0NEbRcTjBQ== X-Received: by 2002:a17:90a:d595:: with SMTP id v21mr3832821pju.50.1627660002461; Fri, 30 Jul 2021 08:46:42 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:3424:e0ac:5a92:d061]) by smtp.gmail.com with ESMTPSA id u188sm3175621pfc.115.2021.07.30.08.46.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jul 2021 08:46:41 -0700 (PDT) From: Douglas Anderson To: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org, steev@kali.org, robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com, bjorn.andersson@linaro.org, daniel@ffwll.ch, airlied@linux.ie, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, rodrigo.vivi@intel.com, sam@ravnborg.org, jonas@kwiboo.se, mripard@kernel.org, thierry.reding@gmail.com, lyude@redhat.com, linus.walleij@linaro.org, rajeevny@codeaurora.org, linux-arm-msm@vger.kernel.org, a.hajda@samsung.com, tzimmermann@suse.de, narmstrong@baylibre.com, Douglas Anderson , Sean Paul , Sandeep Panda , linux-kernel@vger.kernel.org Subject: [PATCH v2 2/6] drm/bridge: ti-sn65dsi86: Fix power off sequence Date: Fri, 30 Jul 2021 08:46:01 -0700 Message-Id: <20210730084534.v2.2.If8a8ec3bf1855cf0dbb62c005a71d6698c99c125@changeid> X-Mailer: git-send-email 2.32.0.554.ge1b32706d8-goog In-Reply-To: <20210730154605.2843418-1-dianders@chromium.org> References: <20210730154605.2843418-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org When testing with a panel that's apparently a little more persnickety about the correct power sequence (specifically Samsung ATNA33XC20), we found that the ti-sn65dsi86 was doing things just slightly wrong. Looking closely at the ti-sn65dsi86's datasheet, the power off sequence is supposed to be: 1. Clear VSTREAM_ENABLE bit 2. Stop DSI stream from GPU. DSI lanes must be placed in LP11 state. 3. Program the ML_TX_MODE to 0x0 (OFF) 4. Program the DP_NUM_LANES register to 0x0 5. Clear the DP_PLL_EN bit. 6. Deassert the EN pin. 7. Remove power from supply pins Since we were doing the whole sequence in the "disable", I believe that step #2 (stopping the DSI stream from the GPU) wasn't happening. We also weren't setting DP_NUM_LANES to 0. Let's fix this. NOTE: things are a little asymmetric now. For instance, we turn the PLL on in "enable" but now we're not turning it off until "post_disable". It would seem to make sense to move the PLL turning on to "pre_enable" to match. Unfortunately, I don't believe that's allowed. It looks as if (in the non-refclk mode which probably nobody is using) we have to wait until the MIPI clock is there before we can enable the PLL. In any case, the way it is here won't really hurt--it'll just leave the PLL on a little longer. Fixes: a095f15c00e2 ("drm/bridge: add support for sn65dsi86 bridge driver") Signed-off-by: Douglas Anderson Acked-by: Robert Foss Reviewed-by: Sean Paul --- (no changes since v1) drivers/gpu/drm/bridge/ti-sn65dsi86.c | 11 +++++++---- 1 file changed, 7 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c b/drivers/gpu/drm/bridge/ti-sn65dsi86.c index 9bf889302bcc..5e932070a1c3 100644 --- a/drivers/gpu/drm/bridge/ti-sn65dsi86.c +++ b/drivers/gpu/drm/bridge/ti-sn65dsi86.c @@ -766,10 +766,6 @@ static void ti_sn_bridge_disable(struct drm_bridge *bridge) /* disable video stream */ regmap_update_bits(pdata->regmap, SN_ENH_FRAME_REG, VSTREAM_ENABLE, 0); - /* semi auto link training mode OFF */ - regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0); - /* disable DP PLL */ - regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); } static void ti_sn_bridge_set_dsi_rate(struct ti_sn65dsi86 *pdata) @@ -1106,6 +1102,13 @@ static void ti_sn_bridge_post_disable(struct drm_bridge *bridge) { struct ti_sn65dsi86 *pdata = bridge_to_ti_sn65dsi86(bridge); + /* semi auto link training mode OFF */ + regmap_write(pdata->regmap, SN_ML_TX_MODE_REG, 0); + /* Num lanes to 0 as per power sequencing in data sheet */ + regmap_update_bits(pdata->regmap, SN_SSC_CONFIG_REG, DP_NUM_LANES_MASK, 0); + /* disable DP PLL */ + regmap_write(pdata->regmap, SN_PLL_ENABLE_REG, 0); + if (!pdata->refclk) ti_sn65dsi86_disable_comms(pdata); From patchwork Fri Jul 30 15:46:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 489388 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFA68C43216 for ; Fri, 30 Jul 2021 15:46:58 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AA2A861052 for ; Fri, 30 Jul 2021 15:46:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233155AbhG3PrB (ORCPT ); Fri, 30 Jul 2021 11:47:01 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33770 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233735AbhG3Pqx (ORCPT ); Fri, 30 Jul 2021 11:46:53 -0400 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 07202C0617A3 for ; Fri, 30 Jul 2021 08:46:47 -0700 (PDT) Received: by mail-pj1-x1033.google.com with SMTP id o44-20020a17090a0a2fb0290176ca3e5a2fso14882323pjo.1 for ; Fri, 30 Jul 2021 08:46:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=kl6+GkZ/OKkP0xJnn1y99V9xopk73LCBvTHbkA/Bkd0=; b=BMKp3Z7fNd+oGrTH2hjbLyOQ4KTpld6JQO9wD9sUs0MP8uIdv0lbiHDVaSd1rIe9P0 Jh6NwnKZVsN4zORtpKIU1/8wcm7QKWwK5uV/0u/v2Qvif4se5khYD5YniHtsv7vteMAM mwd8YBrjYIcqI5cmIY7uAkjuJd4yQZ5qJftWQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=kl6+GkZ/OKkP0xJnn1y99V9xopk73LCBvTHbkA/Bkd0=; b=s3G7nX3EvKiDR2qVc9eqVmiBtCYAd8O3N+E2GhzcrjsscB069nUfY/kL3Rx5ORRt1S Ch3Q2jwklovRFE8U6CbR+mcXXi2MAw5ceQvqYVXLX9Wu00WMP1ZmV54ep1y50wCWgHTh c7MjuYqc6xeRSxm+3XkkprBTR9XPHY/jmdUZvuO4BfCbP8fH/zYEVyvAmEU+JtOeayxp pZyqdyOFN8+1a5hgJ40cRu3YDKzp6AH8KNSFG3r4uh4H5q7wOMOXwdlFk4K/n06oBi9r +37K9cDrUo+F1q+14wQsm/UHAvHSMuRWKbRI06poHX310/CW1kpBayLT/JZ3cD0XE2E8 szlA== X-Gm-Message-State: AOAM530MD+TuiNulix9EIkp7wN85TXEQacv5a4/MxXUvCshfqoikcGHF 0QLyyeItelZLbcWtonhlV5quow== X-Google-Smtp-Source: ABdhPJxVmKC0pz06PCqHIYT8Ni8XG5vasskSnhyHFguG3nqlN3vvbWQ4/R5UzFpvf3J7FH9R3lBjmA== X-Received: by 2002:a17:903:308b:b029:12b:c7ec:998d with SMTP id u11-20020a170903308bb029012bc7ec998dmr2901646plc.78.1627660006592; Fri, 30 Jul 2021 08:46:46 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:3424:e0ac:5a92:d061]) by smtp.gmail.com with ESMTPSA id u188sm3175621pfc.115.2021.07.30.08.46.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jul 2021 08:46:46 -0700 (PDT) From: Douglas Anderson To: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org, steev@kali.org, robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com, bjorn.andersson@linaro.org, daniel@ffwll.ch, airlied@linux.ie, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, rodrigo.vivi@intel.com, sam@ravnborg.org, jonas@kwiboo.se, mripard@kernel.org, thierry.reding@gmail.com, lyude@redhat.com, linus.walleij@linaro.org, rajeevny@codeaurora.org, linux-arm-msm@vger.kernel.org, a.hajda@samsung.com, tzimmermann@suse.de, narmstrong@baylibre.com, Douglas Anderson , Sean Paul , linux-kernel@vger.kernel.org Subject: [PATCH v2 4/6] Revert "drm/panel-simple: Add Samsung ATNA33XC20" Date: Fri, 30 Jul 2021 08:46:03 -0700 Message-Id: <20210730084534.v2.4.Id9f076ec5f35633f8ce931051af268a04c45c075@changeid> X-Mailer: git-send-email 2.32.0.554.ge1b32706d8-goog In-Reply-To: <20210730154605.2843418-1-dianders@chromium.org> References: <20210730154605.2843418-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This reverts commit 4bfe6c8f7c23b01719671b69fd29b87a35ccd9d6. This panel's power sequencing really can't be handled properly by panel-simple because of the special sequencing needed for the EL_ON3 GPIO. The only way it was sorta working in the past was by trying to jam that signal into the "enable-gpio", but that really wasn't a good fit. We'll add a custom panel driver for this panel to do it right. Signed-off-by: Douglas Anderson Reviewed-by: Sean Paul --- (no changes since v1) drivers/gpu/drm/panel/panel-simple.c | 33 ---------------------------- 1 file changed, 33 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index 9b286bd4444f..c8694f7f8e0f 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -3621,36 +3621,6 @@ static const struct panel_desc rocktech_rk101ii01d_ct = { .connector_type = DRM_MODE_CONNECTOR_LVDS, }; -static const struct drm_display_mode samsung_atna33xc20_mode = { - .clock = 138770, - .hdisplay = 1920, - .hsync_start = 1920 + 48, - .hsync_end = 1920 + 48 + 32, - .htotal = 1920 + 48 + 32 + 80, - .vdisplay = 1080, - .vsync_start = 1080 + 8, - .vsync_end = 1080 + 8 + 8, - .vtotal = 1080 + 8 + 8 + 16, - .flags = DRM_MODE_FLAG_PHSYNC | DRM_MODE_FLAG_NVSYNC, -}; - -static const struct panel_desc samsung_atna33xc20 = { - .modes = &samsung_atna33xc20_mode, - .num_modes = 1, - .bpc = 10, - .size = { - .width = 294, - .height = 165, - }, - .delay = { - .disable_to_power_off = 200, - .power_to_enable = 400, - .hpd_absent_delay = 200, - .unprepare = 500, - }, - .connector_type = DRM_MODE_CONNECTOR_eDP, -}; - static const struct drm_display_mode samsung_lsn122dl01_c01_mode = { .clock = 271560, .hdisplay = 2560, @@ -4657,9 +4627,6 @@ static const struct of_device_id platform_of_match[] = { }, { .compatible = "rocktech,rk101ii01d-ct", .data = &rocktech_rk101ii01d_ct, - }, { - .compatible = "samsung,atna33xc20", - .data = &samsung_atna33xc20, }, { .compatible = "samsung,lsn122dl01-c01", .data = &samsung_lsn122dl01_c01, From patchwork Fri Jul 30 15:46:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Doug Anderson X-Patchwork-Id: 489389 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-19.5 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS, INCLUDES_CR_TRAILER, INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, URIBL_BLOCKED, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2EC54C4320A for ; Fri, 30 Jul 2021 15:46:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1BC4460F4A for ; Fri, 30 Jul 2021 15:46:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232719AbhG3Pq5 (ORCPT ); Fri, 30 Jul 2021 11:46:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:33776 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233957AbhG3Pqx (ORCPT ); Fri, 30 Jul 2021 11:46:53 -0400 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E41EBC0613D5 for ; Fri, 30 Jul 2021 08:46:48 -0700 (PDT) Received: by mail-pj1-x102f.google.com with SMTP id mt6so15822288pjb.1 for ; Fri, 30 Jul 2021 08:46:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=jwSmr0q+48EViXZc4b851/kYEl2MZkqBSTHsZnuCGcY=; b=Wc9iTLv1yDwhUiq6FWBNiGYr5MFcjpXlCNCpQ3PnDblf13m1r884dznPr11ikMX5C1 n9iaL1HlwkK2Js+t1r07ILEa60uHXYrFIh08FjIyuFQNaM97mN9e1SvYtXflxSSU2lK8 /kcrUiPpIjJ7Mv5WSdn+VyCX5it4xNVmxHKQ4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=jwSmr0q+48EViXZc4b851/kYEl2MZkqBSTHsZnuCGcY=; b=AAOHYbqr32uyZPHLxLcpkVa6ZMzpOwYutyhOQcmCTnN36DlIkhFyPnZIbcsMl88yk0 Zl+uEDXdtvFeMXrOxt0o0YpLPNFdLSUkxO8LwNDuF2xYeLjq3U+oQZlc9cipJCgB/kjB Ud/f9neLPSGIfvaU0wPKFdW3GiZyLpdK6BqM4b9LWyPyUUg1YNJGeyLeCqD8V3jxvN+O UAErsvUO1IxWONZO92m88vsAm+tOy5PElYnRDjT2+mnL1ueqvoIG1Tu3i9lMlM7G/U0P sjPZHMMoGuBH3tbksqqyXaMajIuTjZht8rDNF2HBsMOwmrCqbG5K4aXkaGnHQSj/qYND pJzw== X-Gm-Message-State: AOAM5326IedkmXiX+8EcXxPx/QzkR5SwzIaf/wZkf8EQdyJNggLk5sVi ayFTO4/TDwf79A3uLtrIT3k1NA== X-Google-Smtp-Source: ABdhPJwjl27iD+vmi5M/7UAYGZcp6sUU3Ey9VAipZ2ohmnSSJey59HYr9WFQy6cwWyRdHXbjvtERJQ== X-Received: by 2002:a63:5a42:: with SMTP id k2mr2947631pgm.301.1627660008493; Fri, 30 Jul 2021 08:46:48 -0700 (PDT) Received: from tictac2.mtv.corp.google.com ([2620:15c:202:201:3424:e0ac:5a92:d061]) by smtp.gmail.com with ESMTPSA id u188sm3175621pfc.115.2021.07.30.08.46.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 30 Jul 2021 08:46:48 -0700 (PDT) From: Douglas Anderson To: dri-devel@lists.freedesktop.org Cc: devicetree@vger.kernel.org, steev@kali.org, robert.foss@linaro.org, Laurent.pinchart@ideasonboard.com, bjorn.andersson@linaro.org, daniel@ffwll.ch, airlied@linux.ie, jernej.skrabec@gmail.com, maarten.lankhorst@linux.intel.com, rodrigo.vivi@intel.com, sam@ravnborg.org, jonas@kwiboo.se, mripard@kernel.org, thierry.reding@gmail.com, lyude@redhat.com, linus.walleij@linaro.org, rajeevny@codeaurora.org, linux-arm-msm@vger.kernel.org, a.hajda@samsung.com, tzimmermann@suse.de, narmstrong@baylibre.com, Douglas Anderson , Sean Paul , linux-kernel@vger.kernel.org Subject: [PATCH v2 5/6] Revert "drm/panel-simple: Support for delays between GPIO & regulator" Date: Fri, 30 Jul 2021 08:46:04 -0700 Message-Id: <20210730084534.v2.5.Ie44e3e5b7a926392541d575ca84c56931596513f@changeid> X-Mailer: git-send-email 2.32.0.554.ge1b32706d8-goog In-Reply-To: <20210730154605.2843418-1-dianders@chromium.org> References: <20210730154605.2843418-1-dianders@chromium.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This reverts commit 18a1488bf1e13fc3fc96d7948466b2166067c6c8. Those delays were added to support the Samsung ATNA33XC20 panel. However, we've moving that to its own panel driver and out of panel-simple. That means we don't need the ability to specify this delay. NOTE: it's unlikely we want to keep this delay "just in case" some other panel needs it. The enable-gpio and the power supply are really supposed to be different ways to specify the same thing: the main enable of the panel. Supporting a delay between them doesn't really make sense. Signed-off-by: Douglas Anderson Reviewed-by: Sean Paul --- (no changes since v1) drivers/gpu/drm/panel/panel-simple.c | 28 ---------------------------- 1 file changed, 28 deletions(-) diff --git a/drivers/gpu/drm/panel/panel-simple.c b/drivers/gpu/drm/panel/panel-simple.c index c8694f7f8e0f..ff8b59471c71 100644 --- a/drivers/gpu/drm/panel/panel-simple.c +++ b/drivers/gpu/drm/panel/panel-simple.c @@ -132,22 +132,6 @@ struct panel_desc { */ unsigned int prepare_to_enable; - /** - * @delay.power_to_enable: Time for the power to enable the display on. - * - * The time (in milliseconds) to wait after powering up the display - * before asserting its enable pin. - */ - unsigned int power_to_enable; - - /** - * @delay.disable_to_power_off: Time for the disable to power the display off. - * - * The time (in milliseconds) to wait before powering off the display - * after deasserting its enable pin. - */ - unsigned int disable_to_power_off; - /** * @delay.enable: Time for the panel to display a valid frame. * @@ -363,10 +347,6 @@ static int panel_simple_suspend(struct device *dev) struct panel_simple *p = dev_get_drvdata(dev); gpiod_set_value_cansleep(p->enable_gpio, 0); - - if (p->desc->delay.disable_to_power_off) - msleep(p->desc->delay.disable_to_power_off); - regulator_disable(p->supply); p->unprepared_time = ktime_get(); @@ -427,9 +407,6 @@ static int panel_simple_prepare_once(struct panel_simple *p) return err; } - if (p->desc->delay.power_to_enable) - msleep(p->desc->delay.power_to_enable); - gpiod_set_value_cansleep(p->enable_gpio, 1); delay = p->desc->delay.prepare; @@ -803,11 +780,6 @@ static int panel_simple_probe(struct device *dev, const struct panel_desc *desc, break; } - if (!panel->enable_gpio && desc->delay.disable_to_power_off) - dev_warn(dev, "Need a delay after disabling panel GPIO, but a GPIO wasn't provided\n"); - if (!panel->enable_gpio && desc->delay.power_to_enable) - dev_warn(dev, "Need a delay before enabling panel GPIO, but a GPIO wasn't provided\n"); - dev_set_drvdata(dev, panel); /*