From patchwork Mon Aug 2 05:12:46 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490298 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600274jas; Sun, 1 Aug 2021 22:13:23 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxI8HeANZGRnCfFe2G497szRc0Pu3X6kGWaHwK68lHVovJM51kOzma0U6audSaSoMW4qRj1 X-Received: by 2002:a02:2348:: with SMTP id u69mr2203563jau.141.1627881203019; Sun, 01 Aug 2021 22:13:23 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627881203; cv=none; d=google.com; s=arc-20160816; b=BXA+N+6bZ60CHCkzVkv1BDJU5C1uwjrnJewdyU9Mo+T9nFcNMm95mxU6qdpU6WwSJM ixPvV3tC7WmS/YyJsG9Gjq9XpJT4Qeq6NBXDWrFcS++5V9LZ9gNVenaercJ3JAVmUJH5 9TW3WALSGzNZsz1EKyWuy9BmPHOlNI09cHwXlr9d4ZzwPn74qARbzIXDvylGeOFmeMC6 WogJ9Uj59B0trwGqhRcGWwgn+fqrwF5uljz1uOeABTPgQsKCTo/uv+zkYqb1c0+D0QF4 Hkv5VC9hNq5O115KusF72xF9OM4BAPgtLTNO+R1vtreXkHwGOQMJgao00JB90VfTm0Zj CgwQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=sGOXL06SjbERdU63V7RXxi5PCz4bgx6hAXgHjEBKUvQ=; b=XhSPHiAzaOjCnXszXvT5VJvpL7MZmy/yyXdTa6yyAiyEfkDuzj/RC6x/54mv/Hlx0T SMaNDBhHW03g1w8dtJb4hV4cllYO+XW6eOw29p63gk4N2bO4iSjR9IjLaHNaYjFiQ98E GAWByg2nfkiSpg014yXiKb7hKb4oYP84VCkR2tgGroMiQUS92Gzhkp6l/GkSCz8zb3Zi EfBRW9e/JcjfVCzueOUPGtR8yJLClddmWluRmc9G5QE3kztY/+b12JnTARX3N6wrmlc7 ni9yeXVPtQ7c/2xINSuBemBFnS1ixWeKn20lWJGtYb0wGW4aYljM4zHCeFTMAxBhxr2b 6KcQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LM17YKqX; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id d12si12622586ilg.4.2021.08.01.22.13.22; Sun, 01 Aug 2021 22:13:23 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LM17YKqX; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231901AbhHBFNa (ORCPT + 17 others); Mon, 2 Aug 2021 01:13:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54828 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229472AbhHBFN3 (ORCPT ); Mon, 2 Aug 2021 01:13:29 -0400 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1224EC06175F for ; Sun, 1 Aug 2021 22:13:20 -0700 (PDT) Received: by mail-pj1-x1029.google.com with SMTP id nh14so11894569pjb.2 for ; Sun, 01 Aug 2021 22:13:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sGOXL06SjbERdU63V7RXxi5PCz4bgx6hAXgHjEBKUvQ=; b=LM17YKqXiGpPcdv6Q1BfTlUi3hYtGF+OJgTiqLG/jem+SpbKGz3Iqf+MLt+uMbzL/U JvJ4BZ8fQBPHUiRGFG7kgEgEOD/ovbxqJxjLW9KiddK7LbNSybVuLeTQHvf2yRQYW2VM 9YWn2Wb+phjlSCdGFU9VwlHVCDl794up5qbIEg/jJos7I1/iSBmvr6h3WBFLEHJ2V7yB Kdjxzuj80q5nN1C2naHM1Fp7BOK7PkrLoi7qugBJkZSgDbvODxnZSLA/TJIJ5heuiCF5 uUX3fl8lH2usd7/Jyw4VLTpFOcv7jP52FGxgBPgXz0P5FxevMU948BLoqYusmMTbsJQu lNrA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=sGOXL06SjbERdU63V7RXxi5PCz4bgx6hAXgHjEBKUvQ=; b=rLOohkbXwj93vjTnk41p+zU/XGOCx2pBAordOW8H5pf8y8Sa7Dc36AKkoo6LYrf3xq XjwV5aWjVpbEQya/UbbKmKvzUa89Q2h4rr75U02c6OS5dmNjUV79thHP/ilTXTPhdUBD W7UZaLqnVoHBif9TwrWdC+JV8knSLZoiH36APhMLFBPacgpzruS5nEPlhd5Fxo112VwR MdqE+HQVklCHoZIxJErcm/8oL3ipuQ+UTdC6+y19rKJpONOq2xnw556IUgT6pCw89ZPU Iw+A8kmr0WXMJIuQj+zrhqVa5eFUMDwH2PgZ2sdHt+aR40Tus7bbpRBTqiLijsmQq1AY 6eAQ== X-Gm-Message-State: AOAM533DMPlchz3lEy18QnNXGvilrUtMOvtuzGW6HpGQsi2DnNq1fvGX 6oxz4sXNjJluZM1ezc2k+PtY X-Received: by 2002:a63:682:: with SMTP id 124mr2283129pgg.299.1627881199578; Sun, 01 Aug 2021 22:13:19 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6e99:242f:6391:b1b4:1ad8:fbdf]) by smtp.gmail.com with ESMTPSA id x26sm9947000pfm.77.2021.08.01.22.13.15 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:13:19 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, Manivannan Sadhasivam , Jakub Kicinski Subject: [PATCH 01/10] bus: mhi: Add inbound buffers allocation flag Date: Mon, 2 Aug 2021 10:42:46 +0530 Message-Id: <20210802051255.5771-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> References: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Loic Poulain Currently, the MHI controller driver defines which channels should have their inbound buffers allocated and queued. But ideally, this is something that should be decided by the MHI device driver instead, which actually deals with that buffers. Add a flag parameter to mhi_prepare_for_transfer allowing to specify if buffers have to be allocated and queued by the MHI stack. Keep auto_queue flag for now, but should be removed at some point. Signed-off-by: Loic Poulain Tested-by: Bhaumik Bhatt Reviewed-by: Bhaumik Bhatt Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Acked-by: Jakub Kicinski Link: https://lore.kernel.org/r/1624566520-20406-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/internal.h | 2 +- drivers/bus/mhi/core/main.c | 9 ++++++--- drivers/net/mhi/net.c | 2 +- drivers/net/wwan/mhi_wwan_ctrl.c | 2 +- include/linux/mhi.h | 7 ++++++- net/qrtr/mhi.c | 2 +- 6 files changed, 16 insertions(+), 8 deletions(-) -- 2.25.1 diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h index 5b9ea66b92dc..bc239a11aa69 100644 --- a/drivers/bus/mhi/core/internal.h +++ b/drivers/bus/mhi/core/internal.h @@ -682,7 +682,7 @@ void mhi_rddm_prepare(struct mhi_controller *mhi_cntrl, struct image_info *img_info); void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl); int mhi_prepare_channel(struct mhi_controller *mhi_cntrl, - struct mhi_chan *mhi_chan); + struct mhi_chan *mhi_chan, unsigned int flags); int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan); void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl, diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index 22acde118bc3..69cd9dcde6d8 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -1423,7 +1423,7 @@ static void mhi_unprepare_channel(struct mhi_controller *mhi_cntrl, } int mhi_prepare_channel(struct mhi_controller *mhi_cntrl, - struct mhi_chan *mhi_chan) + struct mhi_chan *mhi_chan, unsigned int flags) { int ret = 0; struct device *dev = &mhi_chan->mhi_dev->dev; @@ -1448,6 +1448,9 @@ int mhi_prepare_channel(struct mhi_controller *mhi_cntrl, if (ret) goto error_pm_state; + if (mhi_chan->dir == DMA_FROM_DEVICE) + mhi_chan->pre_alloc = !!(flags & MHI_CH_INBOUND_ALLOC_BUFS); + /* Pre-allocate buffer for xfer ring */ if (mhi_chan->pre_alloc) { int nr_el = get_nr_avail_ring_elements(mhi_cntrl, @@ -1603,7 +1606,7 @@ void mhi_reset_chan(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan) } /* Move channel to start state */ -int mhi_prepare_for_transfer(struct mhi_device *mhi_dev) +int mhi_prepare_for_transfer(struct mhi_device *mhi_dev, unsigned int flags) { int ret, dir; struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; @@ -1614,7 +1617,7 @@ int mhi_prepare_for_transfer(struct mhi_device *mhi_dev) if (!mhi_chan) continue; - ret = mhi_prepare_channel(mhi_cntrl, mhi_chan); + ret = mhi_prepare_channel(mhi_cntrl, mhi_chan, flags); if (ret) goto error_open_chan; } diff --git a/drivers/net/mhi/net.c b/drivers/net/mhi/net.c index e60e38c1f09d..11be6bcdd551 100644 --- a/drivers/net/mhi/net.c +++ b/drivers/net/mhi/net.c @@ -335,7 +335,7 @@ static int mhi_net_newlink(void *ctxt, struct net_device *ndev, u32 if_id, u64_stats_init(&mhi_netdev->stats.tx_syncp); /* Start MHI channels */ - err = mhi_prepare_for_transfer(mhi_dev); + err = mhi_prepare_for_transfer(mhi_dev, 0); if (err) goto out_err; diff --git a/drivers/net/wwan/mhi_wwan_ctrl.c b/drivers/net/wwan/mhi_wwan_ctrl.c index 1bc6b69aa530..1e18420ce404 100644 --- a/drivers/net/wwan/mhi_wwan_ctrl.c +++ b/drivers/net/wwan/mhi_wwan_ctrl.c @@ -110,7 +110,7 @@ static int mhi_wwan_ctrl_start(struct wwan_port *port) int ret; /* Start mhi device's channel(s) */ - ret = mhi_prepare_for_transfer(mhiwwan->mhi_dev); + ret = mhi_prepare_for_transfer(mhiwwan->mhi_dev, 0); if (ret) return ret; diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 944aa3aa3035..5e08468854db 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -719,8 +719,13 @@ void mhi_device_put(struct mhi_device *mhi_dev); * host and device execution environments match and * channels are in a DISABLED state. * @mhi_dev: Device associated with the channels + * @flags: MHI channel flags */ -int mhi_prepare_for_transfer(struct mhi_device *mhi_dev); +int mhi_prepare_for_transfer(struct mhi_device *mhi_dev, + unsigned int flags); + +/* Automatically allocate and queue inbound buffers */ +#define MHI_CH_INBOUND_ALLOC_BUFS BIT(0) /** * mhi_unprepare_from_transfer - Reset UL and DL channels for data transfer. diff --git a/net/qrtr/mhi.c b/net/qrtr/mhi.c index fa611678af05..29b4fa3b72ab 100644 --- a/net/qrtr/mhi.c +++ b/net/qrtr/mhi.c @@ -79,7 +79,7 @@ static int qcom_mhi_qrtr_probe(struct mhi_device *mhi_dev, int rc; /* start channels */ - rc = mhi_prepare_for_transfer(mhi_dev); + rc = mhi_prepare_for_transfer(mhi_dev, MHI_CH_INBOUND_ALLOC_BUFS); if (rc) return rc; From patchwork Mon Aug 2 05:12:47 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490300 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600365jas; Sun, 1 Aug 2021 22:13:32 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyTXbaAdyZPqmzMXloaJU8ElnhCc8c+aSELp9gUli+Y+ZoeQzdNV95XnAi7c53zTMBPn5jN X-Received: by 2002:a02:a80f:: with SMTP id f15mr13226734jaj.142.1627881212857; Sun, 01 Aug 2021 22:13:32 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627881212; cv=none; d=google.com; s=arc-20160816; b=Q4ymcrXkoc2Rl2Ka/7CUdKubT8UEtTCBsd32q/aUPxoa2UHTe+uzKYZJuX3LLb//Si zabBt57cYf4BoeRErW+Yaqwlxc/M6jy56aZnMOevYQJqFvlO9/GRjAmNI5hgKqaGSUj8 AOesg46uMtn+wrevgbiW5YcufAYw2bRUxsyrm0SSvljHH4aMBVw5rT/SiF7JbNTpU8Pe 6rOBeg9WV2c2lP+kbA1rN/ip53DgOHonS6/MztQSJr4cIrTE07kTeCW1aw4EZs7atJCa hr449Yh5jwqbj27Y/GjWqH4wyFeT+1xoCDXPm69nM7Cfxq3P/KKdQzgUZoyKgyOY4Ltd 30ZQ== ARC-Message-Signature: i=1; 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[23.128.96.18]) by mx.google.com with ESMTP id b20si11948344jat.16.2021.08.01.22.13.32; Sun, 01 Aug 2021 22:13:32 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=BrpdnvIv; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232108AbhHBFNf (ORCPT + 17 others); Mon, 2 Aug 2021 01:13:35 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54860 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232123AbhHBFNe (ORCPT ); Mon, 2 Aug 2021 01:13:34 -0400 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 55430C061796 for ; Sun, 1 Aug 2021 22:13:24 -0700 (PDT) Received: by mail-pj1-x102b.google.com with SMTP id l19so23730947pjz.0 for ; Sun, 01 Aug 2021 22:13:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=H+g3xmhwvXvNwyFURwqnFUjz8KIxQ4PwLzCF4htxlpM=; b=BrpdnvIvatNHifnbl9+6Tk8b9r+2a8EpFYR/NJ+H8BQaqAS3QBizZJU0der+yaBVea kuIm2BUs9oGs0v5Rg5+O20kaZ2eALskHgi8nggs5G4TyUtHbjxneLRDz+v8dMzfoaW5B pUXCBGh7hWze5UL3Y7ygQsR+fJt4rJWueqKQirUQfPMpu30yWteYtMgWuO1I/CulPR+Z vgonfuCbpIVpXHDlljs8eMCluFsCx3ALdIbI4teiQ4qhgDmYIxs5mcfBdm/1asmlvHoM FycbgJvfNCevSxJoZw57YKXqzOT+Ruolas5rK0DB2T2jmaCCBN0eopDDC8+LKqJuI8J5 tElQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=H+g3xmhwvXvNwyFURwqnFUjz8KIxQ4PwLzCF4htxlpM=; b=MkZrPrAK6UIAPIn31MxzD9tvAMFeL9m5ltemUQn/bbWVglKpL5/2RqLOtuI8emXrbk 8IONEhog3+o6rb4/Pdf9W1eQMZEOUBnIrLYEXF3qTUlFSI+b3OWZjE0YjVkIsx4B0fLv uO/br3boZbybyX6edwjN02AcywR+WlwxDihkDYBw02NiLXO5jLH+6uxIYe4wZOC7Iirm W2G8QPxLSx8O2+p3WXHqZlSlEbbkZv5NfId2htxK8iyyJzrf/Kh3QJ+6EscZaK/Yw1j6 qI3K3SdcF12pLem2X79TXi4Q9kRtNEvvU+kr8HdkumDRfhizL4JO+q+/0A7Z4Pf4ZDX8 CJHA== X-Gm-Message-State: AOAM531a12kYCVXqWmqnrPfDzZ5qeUZa/HEyTORrnrp9lsEhgSLF5XAj 0E8zOene6a9getBsn3QfeeUL X-Received: by 2002:a63:7209:: with SMTP id n9mr1214830pgc.253.1627881203840; Sun, 01 Aug 2021 22:13:23 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6e99:242f:6391:b1b4:1ad8:fbdf]) by smtp.gmail.com with ESMTPSA id x26sm9947000pfm.77.2021.08.01.22.13.19 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:13:23 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, ULRICH Thomas , Manivannan Sadhasivam Subject: [PATCH 02/10] bus: mhi: pci_generic: Add Cinterion MV31-W PCIe to MHI Date: Mon, 2 Aug 2021 10:42:47 +0530 Message-Id: <20210802051255.5771-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> References: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: ULRICH Thomas This patch adds VendorID/ProductID and MBIM Channel Definitions for M.2 Modem Card (PCIe Variant) to MHI PCI generic controller driver. Cinterion MV31-W (by Thales) Additional information on such Modem Card (USB or PCIe variant) is available at: https://www.thalesgroup.com/en/markets/digital-identity-and-security/iot/iot-connectivity/products/iot-products/mv31-w-ultra-high Signed-off-by: ULRICH Thomas Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/PAZP264MB284690134DA010698E6B3BDDE60A9@PAZP264MB2846.FRAP264.PROD.OUTLOOK.COM [mani: fixed the subject, whitespace, and added sideband_wake field] Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 37 +++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) -- 2.25.1 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index ca3bc40427f8..6e1a86021b75 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -342,6 +342,40 @@ static const struct mhi_pci_dev_info mhi_foxconn_sdx55_info = { .dma_data_width = 32 }; +static const struct mhi_channel_config mhi_mv31_channels[] = { + MHI_CHANNEL_CONFIG_UL(0, "LOOPBACK", 64, 0), + MHI_CHANNEL_CONFIG_DL(1, "LOOPBACK", 64, 0), + /* MBIM Control Channel */ + MHI_CHANNEL_CONFIG_UL(12, "MBIM", 64, 0), + MHI_CHANNEL_CONFIG_DL(13, "MBIM", 64, 0), + /* MBIM Data Channel */ + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0_MBIM", 512, 2), + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0_MBIM", 512, 3), +}; + +static struct mhi_event_config mhi_mv31_events[] = { + MHI_EVENT_CONFIG_CTRL(0, 256), + MHI_EVENT_CONFIG_DATA(1, 256), + MHI_EVENT_CONFIG_HW_DATA(2, 1024, 100), + MHI_EVENT_CONFIG_HW_DATA(3, 1024, 101), +}; + +static const struct mhi_controller_config modem_mv31_config = { + .max_channels = 128, + .timeout_ms = 20000, + .num_channels = ARRAY_SIZE(mhi_mv31_channels), + .ch_cfg = mhi_mv31_channels, + .num_events = ARRAY_SIZE(mhi_mv31_events), + .event_cfg = mhi_mv31_events, +}; + +static const struct mhi_pci_dev_info mhi_mv31_info = { + .name = "cinterion-mv31", + .config = &modem_mv31_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, +}; + static const struct pci_device_id mhi_pci_id_table[] = { { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0306), .driver_data = (kernel_ulong_t) &mhi_qcom_sdx55_info }, @@ -362,6 +396,9 @@ static const struct pci_device_id mhi_pci_id_table[] = { /* DW5930e (sdx55), Non-eSIM, It's also T99W175 */ { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0b1), .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info }, + /* MV31-W (Cinterion) */ + { PCI_DEVICE(0x1269, 0x00b3), + .driver_data = (kernel_ulong_t) &mhi_mv31_info }, { } }; MODULE_DEVICE_TABLE(pci, mhi_pci_id_table); From patchwork Mon Aug 2 05:12:48 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490301 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600375jas; Sun, 1 Aug 2021 22:13:33 -0700 (PDT) X-Google-Smtp-Source: ABdhPJytz13efDA7fe23Yk3vxS6UHvVEk3jpOAENtcPXf5nGi8Am9JbO8KEuQLyYIhOcgEN7bbMZ X-Received: by 2002:a05:6e02:f05:: with SMTP id x5mr1000449ilj.268.1627881213748; Sun, 01 Aug 2021 22:13:33 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627881213; cv=none; d=google.com; s=arc-20160816; b=Kk91PkGvQfk48TEwHRbLlJtr7zcG7ta1qC95ltV+PwVF4Usi2KRQlNbyBUCUKAWdfe 6Ou64HLX/xU4T26aGkDi1iY9wQdN2nMVAOySZG5i7DrV4NPlpFZ0/HM3DHFG4RTyrdrJ 31GUrceXDtQYedKIJYe3W8mDzFSxt9DkQuNEDBxGS/3IkebSpfUuh4+mLfRlyY5h0Cf/ fJhxtf7Mdp5M5zOV9R4oryOSdigDtHhYw6qnRS7+hK/ZSOItB+v4gfWtipSfZl+QNkev fs+d98EiumTXMVgJ4XGsLwM8Pgn1nrNUg9v069l0wC4O+nqNGbu2ur9JN1F/jxP4Snqo DLuw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=26+KEZ0Hx72pvjQJfrOEoIc8ilnySOUXy/nlBhCQtpo=; b=WYvtKcva1uya0q06M/C++iMs7mnETKb+yLNjiIGI0vymsi1RGLdOzfRhbhyERRhrtT RRw3mToQtshwhARQWpYXVSMFRfJUrcyd2eXFVFaqxUq8s6q6v1oRi0FEsnDGozN9y8mX 7HNUt/Vj93sZppXM4VJZMV49XiOPcK+yAuXrF1OCQ2mTHxU55mOsNhwYnwf9ZM0YoUa+ lU84kZ+L7MFAqNx0vjMZ3+kVMeUal2HtFYDE3NAqvzwkui5XNhkO00OcYilDJwe6eO9p yrNIq7B8DD04rj3kgEgVr6IQaG00wg6/+g8qKLQhihngEA4X8WICgiwpo/IXktyHclk7 AWIg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Gc7k5WBL; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id b20si11948344jat.16.2021.08.01.22.13.33; Sun, 01 Aug 2021 22:13:33 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Gc7k5WBL; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231136AbhHBFNi (ORCPT + 17 others); Mon, 2 Aug 2021 01:13:38 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54884 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229881AbhHBFNi (ORCPT ); Mon, 2 Aug 2021 01:13:38 -0400 Received: from mail-pl1-x632.google.com (mail-pl1-x632.google.com [IPv6:2607:f8b0:4864:20::632]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 027A2C06175F for ; Sun, 1 Aug 2021 22:13:29 -0700 (PDT) Received: by mail-pl1-x632.google.com with SMTP id e21so18374731pla.5 for ; Sun, 01 Aug 2021 22:13:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=26+KEZ0Hx72pvjQJfrOEoIc8ilnySOUXy/nlBhCQtpo=; b=Gc7k5WBLgtQ3f+qEEwp+chkg6CWMWBQdmb3KztQKuqS4hsq0h+ov5dgY7wkXUmM72E UJ61Waltl0m9sCfuWXFyZFtgwDs7M+M/SCizhWWG4TptTA51EBv3xpiZynzf79h7lX1j yiTb3VaJTGmAbySaPey3W8cSlGOASFJ4ejm6HaLf7ZcnzOF1sPsW7Yy/u4HpzToJf3Dx y7BjK599UR0+KYI5neaYG7IzJZTgXiQs6r5IPKOWMOmqriSm+GgcfzMrBpc0TSzw0ZIp 9QW7xBCwF8VoW4hFdJnT0sgVPJPJ7eSCdwUv488ddPfdyhq5/Wi9JU1Yx5cMyCrL1ID9 WWpQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=26+KEZ0Hx72pvjQJfrOEoIc8ilnySOUXy/nlBhCQtpo=; b=I9vE6FYYNyMeNv74nrSaUFxgaJv/7dyHSnEpwl2k4+Qcz0x4L3orxIBaHvlr57ayJI IxvOL0JyN/njEVIqLtXkNttHBXyeF362pNQfYIfdvAfvPMVU77vK20wNitCX1VWDw3A6 Fws56JukF31RrE5EAG0ryvky3BE3l6QAeKzOE+ZxARFplQox+fgQrZzLu4qyJCiCy5C0 kS3/Utt3iaG41QaGe4BUDKh2Q0L5ApNFWIHkr3Yh/3J5pjZYjgYkRW030BVbDdC5jQlR HqTOo37e1ttxG7KTd9WqcflgamU2ZEzB8bj3plXW8IySZq1r6b8WGB03xyA/i2rji8BG V/+A== X-Gm-Message-State: AOAM530KI1q6UcpzayGAy2+hlkvpt8xh77yACnnKCgPJ4Hc/jdpIQnvH VntHZuVmavBf3XeOBeliVdg+ X-Received: by 2002:a17:90a:b10f:: with SMTP id z15mr6086796pjq.56.1627881208529; Sun, 01 Aug 2021 22:13:28 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6e99:242f:6391:b1b4:1ad8:fbdf]) by smtp.gmail.com with ESMTPSA id x26sm9947000pfm.77.2021.08.01.22.13.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:13:28 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, Jeffrey Hugo , Manivannan Sadhasivam Subject: [PATCH 03/10] bus: mhi: core: Set BHI/BHIe offsets on power up preparation Date: Mon, 2 Aug 2021 10:42:48 +0530 Message-Id: <20210802051255.5771-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> References: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bhaumik Bhatt Set the BHI and/or BHIe offsets in mhi_prepare_for_power_up(), rearrange the function, and remove the equivalent from mhi_async_power_up(). This helps consolidate multiple checks in different parts of the driver and can help MHI fail early on before power up begins if the offsets are not read correctly. Signed-off-by: Bhaumik Bhatt Reviewed-by: Jeffrey Hugo Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1620330705-40192-2-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/init.c | 42 ++++++++++++++++++++----------------- drivers/bus/mhi/core/pm.c | 28 ++++--------------------- 2 files changed, 27 insertions(+), 43 deletions(-) -- 2.25.1 diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index c81b377fca8f..11c7a3d3c9bf 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -1063,7 +1063,7 @@ EXPORT_SYMBOL_GPL(mhi_free_controller); int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) { struct device *dev = &mhi_cntrl->mhi_dev->dev; - u32 bhie_off; + u32 bhi_off, bhie_off; int ret; mutex_lock(&mhi_cntrl->pm_mutex); @@ -1072,29 +1072,36 @@ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) if (ret) goto error_dev_ctxt; - /* - * Allocate RDDM table if specified, this table is for debugging purpose - */ - if (mhi_cntrl->rddm_size) { - mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->rddm_image, - mhi_cntrl->rddm_size); + ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIOFF, &bhi_off); + if (ret) { + dev_err(dev, "Error getting BHI offset\n"); + goto error_reg_offset; + } + mhi_cntrl->bhi = mhi_cntrl->regs + bhi_off; - /* - * This controller supports RDDM, so we need to manually clear - * BHIE RX registers since POR values are undefined. - */ + if (mhi_cntrl->fbc_download || mhi_cntrl->rddm_size) { ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIEOFF, &bhie_off); if (ret) { dev_err(dev, "Error getting BHIE offset\n"); - goto bhie_error; + goto error_reg_offset; } - mhi_cntrl->bhie = mhi_cntrl->regs + bhie_off; + } + + if (mhi_cntrl->rddm_size) { + /* + * This controller supports RDDM, so we need to manually clear + * BHIE RX registers since POR values are undefined. + */ memset_io(mhi_cntrl->bhie + BHIE_RXVECADDR_LOW_OFFS, 0, BHIE_RXVECSTATUS_OFFS - BHIE_RXVECADDR_LOW_OFFS + 4); - + /* + * Allocate RDDM table for debugging purpose if specified + */ + mhi_alloc_bhie_table(mhi_cntrl, &mhi_cntrl->rddm_image, + mhi_cntrl->rddm_size); if (mhi_cntrl->rddm_image) mhi_rddm_prepare(mhi_cntrl, mhi_cntrl->rddm_image); } @@ -1103,11 +1110,8 @@ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) return 0; -bhie_error: - if (mhi_cntrl->rddm_image) { - mhi_free_bhie_table(mhi_cntrl, mhi_cntrl->rddm_image); - mhi_cntrl->rddm_image = NULL; - } +error_reg_offset: + mhi_deinit_dev_ctxt(mhi_cntrl); error_dev_ctxt: mutex_unlock(&mhi_cntrl->pm_mutex); diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index bbf6cd04861e..ff7cdc8653ef 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -1059,28 +1059,8 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) if (ret) goto error_setup_irq; - /* Setup BHI offset & INTVEC */ + /* Setup BHI INTVEC */ write_lock_irq(&mhi_cntrl->pm_lock); - ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIOFF, &val); - if (ret) { - write_unlock_irq(&mhi_cntrl->pm_lock); - goto error_bhi_offset; - } - - mhi_cntrl->bhi = mhi_cntrl->regs + val; - - /* Setup BHIE offset */ - if (mhi_cntrl->fbc_download) { - ret = mhi_read_reg(mhi_cntrl, mhi_cntrl->regs, BHIEOFF, &val); - if (ret) { - write_unlock_irq(&mhi_cntrl->pm_lock); - dev_err(dev, "Error reading BHIE offset\n"); - goto error_bhi_offset; - } - - mhi_cntrl->bhie = mhi_cntrl->regs + val; - } - mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0); mhi_cntrl->pm_state = MHI_PM_POR; mhi_cntrl->ee = MHI_EE_MAX; @@ -1091,7 +1071,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) if (!MHI_IN_PBL(current_ee) && current_ee != MHI_EE_AMSS) { dev_err(dev, "Not a valid EE for power on\n"); ret = -EIO; - goto error_bhi_offset; + goto error_async_power_up; } state = mhi_get_mhi_state(mhi_cntrl); @@ -1110,7 +1090,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) if (!ret) { ret = -EIO; dev_info(dev, "Failed to reset MHI due to syserr state\n"); - goto error_bhi_offset; + goto error_async_power_up; } /* @@ -1132,7 +1112,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) return 0; -error_bhi_offset: +error_async_power_up: mhi_deinit_free_irq(mhi_cntrl); error_setup_irq: From patchwork Mon Aug 2 05:12:49 2021 Content-Type: text/plain; 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[23.128.96.18]) by mx.google.com with ESMTP id z7si11282125ilq.32.2021.08.01.22.13.37; Sun, 01 Aug 2021 22:13:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=blOinbp2; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229881AbhHBFNn (ORCPT + 17 others); Mon, 2 Aug 2021 01:13:43 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54910 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232145AbhHBFNm (ORCPT ); Mon, 2 Aug 2021 01:13:42 -0400 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7D809C061799 for ; Sun, 1 Aug 2021 22:13:33 -0700 (PDT) Received: by mail-pj1-x102a.google.com with SMTP id l19so23731316pjz.0 for ; Sun, 01 Aug 2021 22:13:33 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=YH9RqDwj3Hxwa7+6WVhzvigR5j4AY8ETFRKdu6OaqBQ=; b=blOinbp2TXOPDqv6bdBdL2rd9HvkvFhk10+RA5xVfJb0q5wIFEquiNAQxfMLAFtb7R uPzskefIAJPHB2MiKNoBRURViB7EmYKTygEoSQ70T3hbWIjLGHdoCzXr/b2NqVvNAWLU 3xaw97BfrrpFv/PHOoCgvoQGKY9z3lzK2JghsIipMcHOChzRNSW3jLZMWAAKJew1E7Io 3NEb92j9eycwBW4azyxzIKrFb8jNrUUSFUu3J7GyBGKXi7YTtWRc92FzHUBMUiKaF/mR RucnPzfY17O2X/fcr8LnEgpBaw7hYczFGX2o1oq3QRWBrCWtS6XrrI9AnuNi27FeB3mc hhsg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=YH9RqDwj3Hxwa7+6WVhzvigR5j4AY8ETFRKdu6OaqBQ=; b=iOeimKDE1vIs/FL0DhI+rFjjwWM3dc+cK0m/kL0Y3Z0ZhUB8g6VcU5segQw5ZvJ3pr SNiCvIZV+i1g7k620oqEiEDqRUQCeaKbD50X6ZvSlIHtoLAUTQGATqLEEnlccfzSuMav p+NHU5cWkHEgbS+hbz93xTqnrTlKlMcjkhzYQcA3IVpCSNaJq2EGK8Alvv9DaOWVyZVR 2oo7YdQwIPG17qTsh7PFAk0HLtqRZUI59HibchH23DLlI/FQUElWF60vjJ360OlqZDSe 5/pp6QaNLm0oqUfOqzQLm2jjoV5UYvrPvJvuTcUXFemlKQ/S9jWw1M+iWf/Ry/V0Z/ef 6Xhg== X-Gm-Message-State: AOAM533mIrnkuTvejMrVDgXxprPudPjnUUOYFsYTuNM9qAcpL51pSthC EB1GJULSJTn7g/aTu3gAE2ML X-Received: by 2002:a17:90a:df05:: with SMTP id gp5mr15562702pjb.165.1627881213065; Sun, 01 Aug 2021 22:13:33 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6e99:242f:6391:b1b4:1ad8:fbdf]) by smtp.gmail.com with ESMTPSA id x26sm9947000pfm.77.2021.08.01.22.13.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:13:32 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, Jeffrey Hugo , Manivannan Sadhasivam Subject: [PATCH 04/10] bus: mhi: core: Set BHI and BHIe pointers to NULL in clean-up Date: Mon, 2 Aug 2021 10:42:49 +0530 Message-Id: <20210802051255.5771-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> References: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bhaumik Bhatt Set the BHI and BHIe pointers to NULL as part of clean-up. This makes sure that stale pointers are not accessed after powering MHI down. Suggested-by: Hemant Kumar Signed-off-by: Bhaumik Bhatt Reviewed-by: Jeffrey Hugo Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1620330705-40192-3-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/init.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.25.1 diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index 11c7a3d3c9bf..1cc2f225d3d1 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -1132,6 +1132,9 @@ void mhi_unprepare_after_power_down(struct mhi_controller *mhi_cntrl) mhi_cntrl->rddm_image = NULL; } + mhi_cntrl->bhi = NULL; + mhi_cntrl->bhie = NULL; + mhi_deinit_dev_ctxt(mhi_cntrl); } EXPORT_SYMBOL_GPL(mhi_unprepare_after_power_down); From patchwork Mon Aug 2 05:12:50 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490303 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600444jas; Sun, 1 Aug 2021 22:13:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxVgJfwy2kmeyqT4wTVbmSFCCxta3kdCA+618xgbyBwbU+XEfSTcQnQXK+mCg4qiPrpRaKp X-Received: by 2002:a92:d5cf:: with SMTP id d15mr5235579ilq.194.1627881222568; Sun, 01 Aug 2021 22:13:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627881222; cv=none; d=google.com; s=arc-20160816; b=mWp2NlyBTG5seOEVj8Xzdd6K/eAFUv+LWZjxPMXj2v1XSmdTk7rs+UI8Ckph517Ng6 PauzJ435G0xZi8THYDbFwdA/TI2ZGdk77G5ib2IyD5AkzuBnKjmbbuAed1YwR/NSI1AZ 6ZuHMrD7FC0HJN0FvJ5O+aSleE+PagNOrxk1/WY3R4VHlsCzXWxQCrTYAfGL6OYn3Gms ArrSM5RA7rJgoFk4SMdPZF/wz++czDBR9lrQylFTpbXyH3GbvruZTFgwkj8GLb4eL0VJ chkcCv9i9glvfYzJFqPjXuRljYN9s0pnVc5hmoUU/OcIeiy/KaV8Z2OgjAOFZhARkUkT tIsg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=4vCP14x51ZT3xHTsGRwNOFfupBHNf+HcNjz+uJv37tc=; b=xLy2JCSTScJC/CK8z3byKrwnTVUJYxPG2t6CbTYmLVrdWdaX/Mx9LB/6JDfHL5SywC W9F6ftdmRko+OLCfGRmNKeo5/MS58KzLHuWmjUMqs8OnutNjPDSYk+s/od90FKviBtve M9XlEVQ8Dn1rBS8HTPoXpfxC40WuAaXG1eosJDbn9/xikTy69ck4/ayhsZhQGyyILBFO 5qfFoH2fRgBxeGwHGBtG8Dbg2YGb2UZ6WNPKCfXJtFm8VrYvEGJEJsx+TsUcE4x+NWfA 2OpKBUmUMPAJ2HEVvqHW0CabEfsHJhuJO2Za1bp9SOw90eREcWjBLTq9yw2jsPr4mgfE Jhhw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="x/mIjNE+"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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This can help validate that offsets are in acceptable memory region or not and avoid any boot-up issues due to BHI or BHIe memory accesses. Signed-off-by: Bhaumik Bhatt Reviewed-by: Jeffrey Hugo Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1620330705-40192-4-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam --- include/linux/mhi.h | 2 ++ 1 file changed, 2 insertions(+) -- 2.25.1 diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 5e08468854db..b8ca6943f0b7 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -303,6 +303,7 @@ struct mhi_controller_config { * @rddm_size: RAM dump size that host should allocate for debugging purpose * @sbl_size: SBL image size downloaded through BHIe (optional) * @seg_len: BHIe vector size (optional) + * @reg_len: Length of the MHI MMIO region (required) * @fbc_image: Points to firmware image buffer * @rddm_image: Points to RAM dump buffer * @mhi_chan: Points to the channel configuration table @@ -386,6 +387,7 @@ struct mhi_controller { size_t rddm_size; size_t sbl_size; size_t seg_len; + size_t reg_len; struct image_info *fbc_image; struct image_info *rddm_image; struct mhi_chan *mhi_chan; From patchwork Mon Aug 2 05:12:51 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490304 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600516jas; Sun, 1 Aug 2021 22:13:51 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyRBqtGmzxsA5B7Qg5L0is5tJqcZCAwNO9x9pR0PdW+aWQPdEPKy5E+Qt/q8w+ppta3p0Pg X-Received: by 2002:a92:de09:: with SMTP id x9mr25961ilm.284.1627881231737; Sun, 01 Aug 2021 22:13:51 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627881231; cv=none; d=google.com; s=arc-20160816; b=BYdxwTySd6K2RtB9Iq8euZzCL++NdxTSABfPBpkDtA5ZAA8wSdxBmSiKFDdl9S6jQ6 b9OWr0ffoYXBytCQJZlJnaqAsCAjFFcC1Zb/kn1RIxx/RWyg54luffrKjZ+ybPV4gvkl 22JJA8DV7zu5+mIRCuVXGBVfYEkmnCE/1zXpWLFbjSarWOvbC5RKAtmon9o4XD/mYLhB eEmj7R0NdquO43prQHEjLr7KehcGJguM3OVKTzc87eX1eyccV9N5Hz78Q/YaKOFK8Q+I xeekDzRcnHqmXNDStugAH5VScjn9Sxl5VXGht3PVSF8kupjrWC+btAuY/aFSL9GjkfBo DMsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=7vND1lDijA1/aEOaxshYmLS5yaC8jR5VWy3q3nA4GNE=; b=TzfyjHEeN4sFGuN5vlpxFs8YiQfEPvVI9WJ1s1ZyRKj+MM+HY9IoFHr6Xf+nK7DwcK bfFdYSLO9df3VkTeFj06BG5hc5PyJr/a1zel3LdhY1Lri1CJymk8nt2oFjDK3DxPF4eM /MVe98x7RriB5L5dZPYL6Le7vmTNJbrUOlhDIZ517/ZbC1RkCUyWopvkCRed3A+J3Swn eqpQaR09n9o1G/Pahpa3O7HtvAQueQ7+kbVQ/PsDOEDbt9A4CsLHoaJ4VrMubOP6aXNm 1FFtFHxooNFKF0BLo5wtmgkSgA/XsdAMnqPvGKl9M5Q8bkNdgEQRPWMppj0cl4Mu/dSX IR0w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hrghld4p; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w21si3730678ior.60.2021.08.01.22.13.51; Sun, 01 Aug 2021 22:13:51 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=hrghld4p; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232257AbhHBFN5 (ORCPT + 17 others); Mon, 2 Aug 2021 01:13:57 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54962 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232128AbhHBFNy (ORCPT ); Mon, 2 Aug 2021 01:13:54 -0400 Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5B838C0613D5 for ; Sun, 1 Aug 2021 22:13:42 -0700 (PDT) Received: by mail-pj1-x102d.google.com with SMTP id s22-20020a17090a1c16b0290177caeba067so4059804pjs.0 for ; Sun, 01 Aug 2021 22:13:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7vND1lDijA1/aEOaxshYmLS5yaC8jR5VWy3q3nA4GNE=; b=hrghld4pcyQBlZRe951zP4r9uptCsjo/XXvCkJwCIMHQVXFfBf76tPU6On9SOzNoru R97CZYYRbSGauMMtk2/Jo4qUrAP6wsA8qkd6NnwagF6gJ7R8Si2Mbsd9oTm76wAl55Kx +UcDNU8ZIQI5TF2MyFeNFORdmZDfnjte0NrU6UsWU/RIiVI3+GoupTLDKfdrCzMkqATp vPYCvI5LhdB8p47Ws8OVQO/Bbex5ucjJUboL/+uOJMsdFpJUmBifHP94kuOiJ4zNeji8 TtHJkCxSTwosUMnnpmGT8K3z5UV4kppOSExWep9xZpNI9473I4svfdXY9XQqHM0m31yt 7y0Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7vND1lDijA1/aEOaxshYmLS5yaC8jR5VWy3q3nA4GNE=; b=ql718S0LgxetPfweZHlEJEX3vHXqyn764eZPetSyRaRih0yc34k+KkPuoUeDuaDnsE QirY5ek7NMinLAeKcuZPePGx+fNPjO9VTEj6MeNFAs8KpKkAmWTtdnD/8B6gGw9jdRVL pssqvIdCPBHZHKBHBnYHE2paOfMi1G4R9e/+atLw9IEu6JG/EIBftBFtwwKvgmwmIFAL cPCndAsfWLLcUw28vxgW34gx01EckV92VrrPABWO5xfRG5OxnemVaSQ8XCh5jQ93KIrD edTbSAwDG6z8laI0ENkvJ7IBLgQY4ohXYRqH8z9AYaPzPzSkqZ/tTCP/sc2USHBN7eep npwQ== X-Gm-Message-State: AOAM530eMXxqXpaSgbh8rJ+Sgb5kHQcX+j7fn88dArE6msSuYA3/d3I+ jNMU3IDqvr5N64f6086T9geDk9Fo5T/q2ZU= X-Received: by 2002:a17:902:bc82:b029:12b:a074:1fae with SMTP id bb2-20020a170902bc82b029012ba0741faemr11206329plb.29.1627881221879; Sun, 01 Aug 2021 22:13:41 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6e99:242f:6391:b1b4:1ad8:fbdf]) by smtp.gmail.com with ESMTPSA id x26sm9947000pfm.77.2021.08.01.22.13.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:13:41 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, Manivannan Sadhasivam , Kalle Valo Subject: [PATCH 06/10] ath11k: set register access length for MHI driver Date: Mon, 2 Aug 2021 10:42:51 +0530 Message-Id: <20210802051255.5771-7-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> References: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bhaumik Bhatt MHI driver requires register space length to add range checks and prevent memory region accesses outside of that for MMIO space. Set it before registering the MHI controller. Signed-off-by: Bhaumik Bhatt Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Acked-by: Kalle Valo Link: https://lore.kernel.org/r/1620330705-40192-5-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam --- drivers/net/wireless/ath/ath11k/mhi.c | 1 + 1 file changed, 1 insertion(+) -- 2.25.1 diff --git a/drivers/net/wireless/ath/ath11k/mhi.c b/drivers/net/wireless/ath/ath11k/mhi.c index 75cc2d80fde8..26c7ae242db6 100644 --- a/drivers/net/wireless/ath/ath11k/mhi.c +++ b/drivers/net/wireless/ath/ath11k/mhi.c @@ -330,6 +330,7 @@ int ath11k_mhi_register(struct ath11k_pci *ab_pci) mhi_ctrl->cntrl_dev = ab->dev; mhi_ctrl->fw_image = ab_pci->amss_path; mhi_ctrl->regs = ab->mem; + mhi_ctrl->reg_len = ab->mem_len; ret = ath11k_mhi_get_msi(ab_pci); if (ret) { From patchwork Mon Aug 2 05:12:52 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490305 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600548jas; Sun, 1 Aug 2021 22:13:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyPR5sz6nnbKcBNTZgb1Du0cwgvEVN+EHp+ZfxfNl1HGNHSMen8ozoQoTeTQxSvLn5DhwEr X-Received: by 2002:a5e:c311:: with SMTP id a17mr10633115iok.22.1627881237324; Sun, 01 Aug 2021 22:13:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627881237; cv=none; d=google.com; s=arc-20160816; b=VUDqi4Ty+J4gFe/0UIL4MHMTHjlHjLgYW0cbOumuyxXfsUEVB44EoNObnocC69O3E7 9hR4/MkGrV8/fGP08IbF6Rsu5XPsJ0GBWKLnrM0h/oECdbEdC2aAz1tf273zKuJe7Pvt 1BKbr41PAZW7+0lIqVeeyZ1qKyKCEXP3MBCO1ML+xlVzgZFIXpS0egpdncIVPXNRZYqN 3ikroXjp5E354Gss/k0QzqHgmQzA2DJJZ2evVPyo7qA+aVcANt+FCp8auRBInvdJOU0s Ezsr9snOa8S8RAHdDMY+BGpZe0zoBrYnRDjjOYo5ExIGkiVeEdiFca0SCEwAB8e2qaoG 231w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=d6QO+qoPrYnXm6doNgVAXn8uk9174Od4qwkAZLnqxu4=; b=oReub7OZ9DboRKDIQWIa9Jcq5iPM0nhL1oY59o91OxsPyoNji5UZyM4RvRcE6Fpvt9 tZKeQ3vk6VsJ+Ovata0bE+2rLJrEr7SKmxomavOJhCw70/NuPa9r0adNXHKBKJcC7JXv fS35C/J+5ZAD/K1M/xafLYdQbkiRA9YdWnwNfeABYZ74tRtK5SCVNtB0zJFLOY16JiQ2 R2Mz7tdSCqiWXU9aaaP/w2H/GxTDqH4J3gu9VsLW21qmACn1E9rjUehLN5fK7k0/3F4/ p4UKt6Cga1Wp/geSxDGM8FMieCyHOY+a06e8MtMPi8jmMfirDBNDDcNCKSBYJhiwCD8O Ig1Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ahF6JFhQ; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w21si3730678ior.60.2021.08.01.22.13.57; Sun, 01 Aug 2021 22:13:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ahF6JFhQ; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232298AbhHBFOE (ORCPT + 17 others); Mon, 2 Aug 2021 01:14:04 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:54998 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232234AbhHBFN5 (ORCPT ); Mon, 2 Aug 2021 01:13:57 -0400 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 80BE4C06179F for ; Sun, 1 Aug 2021 22:13:46 -0700 (PDT) Received: by mail-pj1-x1033.google.com with SMTP id m10-20020a17090a34cab0290176b52c60ddso23013844pjf.4 for ; Sun, 01 Aug 2021 22:13:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=d6QO+qoPrYnXm6doNgVAXn8uk9174Od4qwkAZLnqxu4=; b=ahF6JFhQyFCCm4IkDoUHiLUvKcqe/AAERTdsultW2Im879ODNJUz/Mw1T9ezNytBvq dPpiZ6tqpwXjZvDEP3CM5ENUSE+TaDkQEtzpymiFBa/r3E426u2d0Q8CBhf+lVULn0Hf SlLerKSkJJjnZxFHh1hPy1OuyVXzUYka7SHZy1tPvq+oik+4DqGb+ZwrR5zeEMqn/6PK +51Cc4U44FNvb5ahhEQx9UhGuGfk03RuTcoZ+raYa6x/+f+pBwpMq1Zhk9fNfiR3mmaQ MYVHBQ5rHaf7nE7nmhv/lgDiO6JqUvBvqXESYa2uHWet0HrCMNK7JVFuf9ueOW80YmOo 2Jhg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=d6QO+qoPrYnXm6doNgVAXn8uk9174Od4qwkAZLnqxu4=; b=RPUzrKYjT2lUX1eL/6dhdbyaUYuT/aUprCX2wNy5edZfXSIThJDeuCtX6ArCTQFTbt a21YvSFEyA9T9aE+rG2HbeKz+suGMv2NEBOwU6/hySZSWL/HthH4h8sCa0cU+G5+2fq6 NBmuGrr9TziJYCNNGOZWDXBlkfBnM+lyUtfskeMeIdxvQ33xXT1dWCvXkU4bMf0Ex7de LqtKENSD8yzSuRdwxa1+7ER9vrfYNAxQQla8Qqz5SYKXOjegSVF6mfpIaD6mftnfQ6FL gpD86/D3qvEV39jSr0w4U9Xn2NqGYXt+JfcnPuZNeK8oZX6RTQrp7kHJVNGGx2qziUoC 1kkg== X-Gm-Message-State: AOAM530QrdaErwtW2m6+JXwRJ3S1YS4dul5Nd1NyTJGEwanP84oF/YUC MbNt4Sw2YFRnuaxV1cUc/PWM X-Received: by 2002:a63:1155:: with SMTP id 21mr1053634pgr.346.1627881226039; Sun, 01 Aug 2021 22:13:46 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6e99:242f:6391:b1b4:1ad8:fbdf]) by smtp.gmail.com with ESMTPSA id x26sm9947000pfm.77.2021.08.01.22.13.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:13:45 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, Manivannan Sadhasivam Subject: [PATCH 07/10] bus: mhi: pci_generic: Set register access length for MHI driver Date: Mon, 2 Aug 2021 10:42:52 +0530 Message-Id: <20210802051255.5771-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> References: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bhaumik Bhatt MHI driver requires register space length to add range checks and prevent memory region accesses outside of that for MMIO space. Set it from the PCI generic controller driver before registering the MHI controller. Signed-off-by: Bhaumik Bhatt Reviewed-by: Hemant Kumar Reviewed-by: Loic Poulain Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1620330705-40192-6-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 1 + 1 file changed, 1 insertion(+) -- 2.25.1 diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 6e1a86021b75..c772d94025fe 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -500,6 +500,7 @@ static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, return err; } mhi_cntrl->regs = pcim_iomap_table(pdev)[bar_num]; + mhi_cntrl->reg_len = pci_resource_len(pdev, bar_num); err = pci_set_dma_mask(pdev, dma_mask); if (err) { From patchwork Mon Aug 2 05:12:53 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490306 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600558jas; Sun, 1 Aug 2021 22:13:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxAET4k9U5zHrsyxmQEUwXdThgu7BT2krAKJdCmZIeSAlQo4UBJjbmPDQJKy6y83ARpVXyO X-Received: by 2002:a5d:858d:: with SMTP id f13mr3072456ioj.197.1627881238004; Sun, 01 Aug 2021 22:13:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627881238; cv=none; d=google.com; s=arc-20160816; b=yUmbm1mQHWja/xRBqCzMtk3fHRsnrursNlnTEldDmSNgNtW7Gmu4EuQOCaT5R4oYAf hVp4hcMG9p9HI3JLZYVI5vjFI4J2z2Mko+G9weanL17rCTAVNjNZQURWqGcO/f3gjO6K 5eAjzRewVhy1Xa86iuFr3TXO9GcPyZ6LiQv9uUF8WMc8yceUG8JHnRzXmaFkcqyDtGkr rVQ5ZkBTEovWzFKpfV/zPltl8KNo9m0zeSxiHmce95MtxsCqPNOLDYMRpFjVyvaQoZaT JcQl54B8F+2jGgcIpkqxxr1WRkURMSkBLTg/v1UNUJrcGhwlmwf05L7ODs99vGmFoQ5H IWaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ONtT1ELTSrw1mSRZB+8b9XFyoudbRa+VTUtUIpf2uNg=; b=bQduiuf5NU9fKx/Pc2sANx4giHcdZFymA62XikM+G4fNIR37l6xFEcHGHsVV/NsfaE FH8X2x4k+PokRLnCCV3H7dAYtYptzcO/kQs61DgiGRNry+zhuluYNFcAn+SX/6+7DmZ+ y+j+3NjoIdFFDa9ao7rhlosfnnGxh8VhscEosbrOPtC4cWi6/Ob5+wGeZ0CJVmAiDfYf 5m+4J7qVTMT6046FALjzeOfl0bGxHV87qxoWma9bgV206MT9MLbnsvL91YEmn81Tfz3X ng3fk9ENMNVWS0ODz7B/4WhSohRAoOlX9L5TTlqG1WtQBSafrr/glfS7bHBlxtV4Sv1v qFvg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DzedpiaT; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id w21si3730678ior.60.2021.08.01.22.13.57; Sun, 01 Aug 2021 22:13:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=DzedpiaT; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232305AbhHBFOF (ORCPT + 17 others); Mon, 2 Aug 2021 01:14:05 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55020 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232265AbhHBFOA (ORCPT ); Mon, 2 Aug 2021 01:14:00 -0400 Received: from mail-pj1-x102f.google.com (mail-pj1-x102f.google.com [IPv6:2607:f8b0:4864:20::102f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 69B4BC06179A for ; Sun, 1 Aug 2021 22:13:51 -0700 (PDT) Received: by mail-pj1-x102f.google.com with SMTP id o44-20020a17090a0a2fb0290176ca3e5a2fso23065744pjo.1 for ; Sun, 01 Aug 2021 22:13:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ONtT1ELTSrw1mSRZB+8b9XFyoudbRa+VTUtUIpf2uNg=; b=DzedpiaTx+uN3cE29+JskCKaCIYbE1PXe9tyG8r+7l0n8M4de4F9xpexiAb6tNwZjj x4tKcBUQbJeAssfNpHdjZxfyVe6SOxlJ607aZTWCtfxt92cGZArt+850Wj/ttvemnuZ0 O9981KyVRdJF59tCQufl8p+5V+NkxrT9AyWjAjfs7Vwbl+uRn0xq0lkZb5/MeeaurhF8 N1co0lPEPpipBiDysNF9PFAF61MG4bPGuxk7KfXcgMabocPLA9kNLeF//oJqatzg+flC Lh3krxDMlkptHdV3Gja1s1JOCGl5sx1u/ugnXliYmGXan5QXJLW+vLvJYWrg+AjPloST y1Jw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ONtT1ELTSrw1mSRZB+8b9XFyoudbRa+VTUtUIpf2uNg=; b=b7Rl91rYUBs07Oh0qBO/48/S688AHl75G0gkQXVufo4fbJRzNXu1UoBgmU4UNR+YUQ pgGACn27m/iVLX/+tY+18HtHd6U57heCUUYhO3YWjFZEeiEAXddy97dYXUddtdOB7WDB bms+NWA1ErbLg5GE6JBncc62wJ2p6AjTNVk+zkUDCcE1A3WRAbbMBN148Si9UR7vJ7nP fln7LVyhO06wTPdHiBQkJgunSeN/1T99WrG7Fa9/TgmpwzMbAYvcE8wRS2IX2ln9LB0h HIdyFKMtTgbbyhgnh8Lqtza+GHECZnQPijkJFcGJ9s7BCCnvTTkKOKZCQXXWxBggRB+n Fb7A== X-Gm-Message-State: AOAM532JMYdZSPeIkYVB8MuHtFYFUwC12U49WaBN+kqfTIFVNEFILKsT iAbJ0g6K7ngrBsSTMHO4ElbWE9sbk+sgg2w= X-Received: by 2002:a65:6a01:: with SMTP id m1mr265063pgu.201.1627881230787; Sun, 01 Aug 2021 22:13:50 -0700 (PDT) Received: from localhost.localdomain ([2409:4072:6e99:242f:6391:b1b4:1ad8:fbdf]) by smtp.gmail.com with ESMTPSA id x26sm9947000pfm.77.2021.08.01.22.13.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 01 Aug 2021 22:13:50 -0700 (PDT) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: hemantk@codeaurora.org, bbhatt@codeaurora.org, linux-arm-msm@vger.kernel.org, jhugo@codeaurora.org, linux-kernel@vger.kernel.org, loic.poulain@linaro.org, Jeffrey Hugo , Manivannan Sadhasivam Subject: [PATCH 08/10] bus: mhi: core: Add range checks for BHI and BHIe Date: Mon, 2 Aug 2021 10:42:53 +0530 Message-Id: <20210802051255.5771-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> References: <20210802051255.5771-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bhaumik Bhatt When obtaining the BHI or BHIe offsets during the power up preparation phase, range checks are missing. These can help controller drivers avoid accessing any address outside of the MMIO region. Ensure that mhi_cntrl->reg_len is set before MHI registration as it is a required field and range checks will fail without it. Signed-off-by: Bhaumik Bhatt Reviewed-by: Jeffrey Hugo Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1620330705-40192-7-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/init.c | 18 +++++++++++++++++- 1 file changed, 17 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index 1cc2f225d3d1..aeb1e3c2cdc4 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -885,7 +885,8 @@ int mhi_register_controller(struct mhi_controller *mhi_cntrl, if (!mhi_cntrl || !mhi_cntrl->cntrl_dev || !mhi_cntrl->regs || !mhi_cntrl->runtime_get || !mhi_cntrl->runtime_put || !mhi_cntrl->status_cb || !mhi_cntrl->read_reg || - !mhi_cntrl->write_reg || !mhi_cntrl->nr_irqs || !mhi_cntrl->irq) + !mhi_cntrl->write_reg || !mhi_cntrl->nr_irqs || + !mhi_cntrl->irq || !mhi_cntrl->reg_len) return -EINVAL; ret = parse_config(mhi_cntrl, config); @@ -1077,6 +1078,13 @@ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) dev_err(dev, "Error getting BHI offset\n"); goto error_reg_offset; } + + if (bhi_off >= mhi_cntrl->reg_len) { + dev_err(dev, "BHI offset: 0x%x is out of range: 0x%zx\n", + bhi_off, mhi_cntrl->reg_len); + ret = -EINVAL; + goto error_reg_offset; + } mhi_cntrl->bhi = mhi_cntrl->regs + bhi_off; if (mhi_cntrl->fbc_download || mhi_cntrl->rddm_size) { @@ -1086,6 +1094,14 @@ int mhi_prepare_for_power_up(struct mhi_controller *mhi_cntrl) dev_err(dev, "Error getting BHIE offset\n"); goto error_reg_offset; } + + if (bhie_off >= mhi_cntrl->reg_len) { + dev_err(dev, + "BHIe offset: 0x%x is out of range: 0x%zx\n", + bhie_off, mhi_cntrl->reg_len); + ret = -EINVAL; + goto error_reg_offset; + } mhi_cntrl->bhie = mhi_cntrl->regs + bhie_off; } From patchwork Mon Aug 2 05:12:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490307 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600577jas; Sun, 1 Aug 2021 22:14:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyqWXtd1VCjm5MEiXXOtwq+/otNpJdxq9cST+Z7DLqV+YgLXDm67HKV0WXCEhhXJ8QxUE+h X-Received: by 2002:a05:6602:21d6:: with SMTP id c22mr664285ioc.69.1627881240272; Sun, 01 Aug 2021 22:14:00 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1627881240; cv=none; d=google.com; s=arc-20160816; b=rZILvsvs7b/FycehnT2dCjGzlqpwAdrJ6Pjq3cuu8qCaYkU/d0YWql/gbLISbBHlF8 PvDRwRhNLBHzb05TJuSzKhrH1osplqe3rJSSp7CxLzEVTgAQTdQODBgICijD0sToIbeK JJPXbmlSesR+3Ex4xgRvhwuZ+GD78jxniuFdCY7vdej+EtoCCS1weLKrDKYq9VcxnyDI i+EQTDB5Uy+vkFbaDz2wUTizTb37IGsjTTCl99risLV+f7DGEWOWQsw09j3qgzC9VBsy t08dcEYdNFoFq6GF1sbNVTIbjjaUVRiptbQ1oUEwlHhrtZF9EuvGEXVSJc68XJQJkgFD 4B+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=IqIs5ez0yorHF8hi6nCrdcbZPSdMhWpZ9fYEm1qjcAw=; b=P03jDEckSfcySTpfoow0x+wI0xxg/FP6oWpSMW4+5y+3eDUWU3e0mb+ILS+BRRph7X fFqlihRIjCU8vGaf0ZIvDldf3F5IZI/o6QQv53CHWEn+W/CsjaKDoAPwdgi0WWJ311kK crvhkYcVD8yollmCMqEUQKZzCegmh7+HLJNxRMLnkp8pADoxR+uhfMEOy5lBpeGBTzzJ 0aCDBaEbkkrvTxuckYSFBMNcdOh2hvSQ3yfRL6Kj/wn3D5g/mglgXsgjgUKxS2u5YiVP 0H30EczTVTsiaVyPa1SJNPA2GZW2nErHeLGkKaEbxGSVw8Do9Kn102KABNH10jS3uz00 5fWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="wOFZEb/W"; spf=pass (google.com: domain of linux-arm-msm-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=linux-arm-msm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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They only directly call the equivalent DMA allocation functions. Replace them with the original function calls such that the implementation is clear and direct. Signed-off-by: Bhaumik Bhatt Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1624392428-9328-1-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/boot.c | 17 +++++++++-------- drivers/bus/mhi/core/init.c | 32 ++++++++++++++++---------------- drivers/bus/mhi/core/internal.h | 20 -------------------- drivers/bus/mhi/core/main.c | 6 +++--- 4 files changed, 28 insertions(+), 47 deletions(-) -- 2.25.1 diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c index 8100cf51cd09..0a972620a403 100644 --- a/drivers/bus/mhi/core/boot.c +++ b/drivers/bus/mhi/core/boot.c @@ -302,8 +302,8 @@ void mhi_free_bhie_table(struct mhi_controller *mhi_cntrl, struct mhi_buf *mhi_buf = image_info->mhi_buf; for (i = 0; i < image_info->entries; i++, mhi_buf++) - mhi_free_coherent(mhi_cntrl, mhi_buf->len, mhi_buf->buf, - mhi_buf->dma_addr); + dma_free_coherent(mhi_cntrl->cntrl_dev, mhi_buf->len, + mhi_buf->buf, mhi_buf->dma_addr); kfree(image_info->mhi_buf); kfree(image_info); @@ -339,8 +339,8 @@ int mhi_alloc_bhie_table(struct mhi_controller *mhi_cntrl, vec_size = sizeof(struct bhi_vec_entry) * i; mhi_buf->len = vec_size; - mhi_buf->buf = mhi_alloc_coherent(mhi_cntrl, vec_size, - &mhi_buf->dma_addr, + mhi_buf->buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev, + vec_size, &mhi_buf->dma_addr, GFP_KERNEL); if (!mhi_buf->buf) goto error_alloc_segment; @@ -354,8 +354,8 @@ int mhi_alloc_bhie_table(struct mhi_controller *mhi_cntrl, error_alloc_segment: for (--i, --mhi_buf; i >= 0; i--, mhi_buf--) - mhi_free_coherent(mhi_cntrl, mhi_buf->len, mhi_buf->buf, - mhi_buf->dma_addr); + dma_free_coherent(mhi_cntrl->cntrl_dev, mhi_buf->len, + mhi_buf->buf, mhi_buf->dma_addr); error_alloc_mhi_buf: kfree(img_info); @@ -442,7 +442,8 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) if (size > firmware->size) size = firmware->size; - buf = mhi_alloc_coherent(mhi_cntrl, size, &dma_addr, GFP_KERNEL); + buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev, size, &dma_addr, + GFP_KERNEL); if (!buf) { release_firmware(firmware); goto error_fw_load; @@ -451,7 +452,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) /* Download image using BHI */ memcpy(buf, firmware->data, size); ret = mhi_fw_load_bhi(mhi_cntrl, dma_addr, size); - mhi_free_coherent(mhi_cntrl, size, buf, dma_addr); + dma_free_coherent(mhi_cntrl->cntrl_dev, size, buf, dma_addr); /* Error or in EDL mode, we're done */ if (ret) { diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index aeb1e3c2cdc4..5aaca6d0f52b 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -129,7 +129,7 @@ static int mhi_alloc_aligned_ring(struct mhi_controller *mhi_cntrl, u64 len) { ring->alloc_size = len + (len - 1); - ring->pre_aligned = mhi_alloc_coherent(mhi_cntrl, ring->alloc_size, + ring->pre_aligned = dma_alloc_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, &ring->dma_handle, GFP_KERNEL); if (!ring->pre_aligned) return -ENOMEM; @@ -221,13 +221,13 @@ void mhi_deinit_dev_ctxt(struct mhi_controller *mhi_cntrl) mhi_cmd = mhi_cntrl->mhi_cmd; for (i = 0; i < NR_OF_CMD_RINGS; i++, mhi_cmd++) { ring = &mhi_cmd->ring; - mhi_free_coherent(mhi_cntrl, ring->alloc_size, + dma_free_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, ring->pre_aligned, ring->dma_handle); ring->base = NULL; ring->iommu_base = 0; } - mhi_free_coherent(mhi_cntrl, + dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->cmd_ctxt) * NR_OF_CMD_RINGS, mhi_ctxt->cmd_ctxt, mhi_ctxt->cmd_ctxt_addr); @@ -237,17 +237,17 @@ void mhi_deinit_dev_ctxt(struct mhi_controller *mhi_cntrl) continue; ring = &mhi_event->ring; - mhi_free_coherent(mhi_cntrl, ring->alloc_size, + dma_free_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, ring->pre_aligned, ring->dma_handle); ring->base = NULL; ring->iommu_base = 0; } - mhi_free_coherent(mhi_cntrl, sizeof(*mhi_ctxt->er_ctxt) * + dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->er_ctxt) * mhi_cntrl->total_ev_rings, mhi_ctxt->er_ctxt, mhi_ctxt->er_ctxt_addr); - mhi_free_coherent(mhi_cntrl, sizeof(*mhi_ctxt->chan_ctxt) * + dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->chan_ctxt) * mhi_cntrl->max_chan, mhi_ctxt->chan_ctxt, mhi_ctxt->chan_ctxt_addr); @@ -275,7 +275,7 @@ int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl) return -ENOMEM; /* Setup channel ctxt */ - mhi_ctxt->chan_ctxt = mhi_alloc_coherent(mhi_cntrl, + mhi_ctxt->chan_ctxt = dma_alloc_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->chan_ctxt) * mhi_cntrl->max_chan, &mhi_ctxt->chan_ctxt_addr, @@ -307,7 +307,7 @@ int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl) } /* Setup event context */ - mhi_ctxt->er_ctxt = mhi_alloc_coherent(mhi_cntrl, + mhi_ctxt->er_ctxt = dma_alloc_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->er_ctxt) * mhi_cntrl->total_ev_rings, &mhi_ctxt->er_ctxt_addr, @@ -354,7 +354,7 @@ int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl) /* Setup cmd context */ ret = -ENOMEM; - mhi_ctxt->cmd_ctxt = mhi_alloc_coherent(mhi_cntrl, + mhi_ctxt->cmd_ctxt = dma_alloc_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->cmd_ctxt) * NR_OF_CMD_RINGS, &mhi_ctxt->cmd_ctxt_addr, @@ -389,10 +389,10 @@ int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl) for (--i, --mhi_cmd; i >= 0; i--, mhi_cmd--) { struct mhi_ring *ring = &mhi_cmd->ring; - mhi_free_coherent(mhi_cntrl, ring->alloc_size, + dma_free_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, ring->pre_aligned, ring->dma_handle); } - mhi_free_coherent(mhi_cntrl, + dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->cmd_ctxt) * NR_OF_CMD_RINGS, mhi_ctxt->cmd_ctxt, mhi_ctxt->cmd_ctxt_addr); i = mhi_cntrl->total_ev_rings; @@ -405,15 +405,15 @@ int mhi_init_dev_ctxt(struct mhi_controller *mhi_cntrl) if (mhi_event->offload_ev) continue; - mhi_free_coherent(mhi_cntrl, ring->alloc_size, + dma_free_coherent(mhi_cntrl->cntrl_dev, ring->alloc_size, ring->pre_aligned, ring->dma_handle); } - mhi_free_coherent(mhi_cntrl, sizeof(*mhi_ctxt->er_ctxt) * + dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->er_ctxt) * mhi_cntrl->total_ev_rings, mhi_ctxt->er_ctxt, mhi_ctxt->er_ctxt_addr); error_alloc_er_ctxt: - mhi_free_coherent(mhi_cntrl, sizeof(*mhi_ctxt->chan_ctxt) * + dma_free_coherent(mhi_cntrl->cntrl_dev, sizeof(*mhi_ctxt->chan_ctxt) * mhi_cntrl->max_chan, mhi_ctxt->chan_ctxt, mhi_ctxt->chan_ctxt_addr); @@ -567,7 +567,7 @@ void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl, if (!chan_ctxt->rbase) /* Already uninitialized */ return; - mhi_free_coherent(mhi_cntrl, tre_ring->alloc_size, + dma_free_coherent(mhi_cntrl->cntrl_dev, tre_ring->alloc_size, tre_ring->pre_aligned, tre_ring->dma_handle); vfree(buf_ring->base); @@ -610,7 +610,7 @@ int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl, buf_ring->base = vzalloc(buf_ring->len); if (!buf_ring->base) { - mhi_free_coherent(mhi_cntrl, tre_ring->alloc_size, + dma_free_coherent(mhi_cntrl->cntrl_dev, tre_ring->alloc_size, tre_ring->pre_aligned, tre_ring->dma_handle); return -ENOMEM; } diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h index bc239a11aa69..721739c5e0d5 100644 --- a/drivers/bus/mhi/core/internal.h +++ b/drivers/bus/mhi/core/internal.h @@ -690,26 +690,6 @@ void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl, void mhi_reset_chan(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan); -/* Memory allocation methods */ -static inline void *mhi_alloc_coherent(struct mhi_controller *mhi_cntrl, - size_t size, - dma_addr_t *dma_handle, - gfp_t gfp) -{ - void *buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev, size, dma_handle, - gfp); - - return buf; -} - -static inline void mhi_free_coherent(struct mhi_controller *mhi_cntrl, - size_t size, - void *vaddr, - dma_addr_t dma_handle) -{ - dma_free_coherent(mhi_cntrl->cntrl_dev, size, vaddr, dma_handle); -} - /* Event processing methods */ void mhi_ctrl_ev_task(unsigned long data); void mhi_ev_task(unsigned long data); diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index 69cd9dcde6d8..c67fd001ded1 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -193,7 +193,7 @@ int mhi_map_single_no_bb(struct mhi_controller *mhi_cntrl, int mhi_map_single_use_bb(struct mhi_controller *mhi_cntrl, struct mhi_buf_info *buf_info) { - void *buf = mhi_alloc_coherent(mhi_cntrl, buf_info->len, + void *buf = dma_alloc_coherent(mhi_cntrl->cntrl_dev, buf_info->len, &buf_info->p_addr, GFP_ATOMIC); if (!buf) @@ -220,8 +220,8 @@ void mhi_unmap_single_use_bb(struct mhi_controller *mhi_cntrl, if (buf_info->dir == DMA_FROM_DEVICE) memcpy(buf_info->v_addr, buf_info->bb_addr, buf_info->len); - mhi_free_coherent(mhi_cntrl, buf_info->len, buf_info->bb_addr, - buf_info->p_addr); + dma_free_coherent(mhi_cntrl->cntrl_dev, buf_info->len, + buf_info->bb_addr, buf_info->p_addr); } static int get_nr_avail_ring_elements(struct mhi_controller *mhi_cntrl, From patchwork Mon Aug 2 05:12:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 490308 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:1185:0:0:0:0 with SMTP id f5csp1600612jas; Sun, 1 Aug 2021 22:14:03 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw7OlUQ14y8TYKfbWMiUrt0DMc7uX/u3Iz/WjGK+h5F3AEueZoh9TwyOX3yhDOoSieOYE4G X-Received: by 2002:a6b:dd02:: with SMTP id f2mr3880072ioc.11.1627881243570; Sun, 01 Aug 2021 22:14:03 -0700 (PDT) ARC-Seal: i=1; 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Additionally, add a debug log to print the execution environment and MHI state before a power up is attempted to confirm if the device is in an expected state. This helps clarify reasons for power up failures such as the device being found in a PBL or Emergency Download Mode execution environment and the host expected a full power up with Pass-Through and no image loading involved. Signed-off-by: Bhaumik Bhatt Reviewed-by: Hemant Kumar Reviewed-by: Jeffrey Hugo Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1620072038-36160-1-git-send-email-bbhatt@codeaurora.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/pm.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) -- 2.25.1 diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index ff7cdc8653ef..fb99e3727155 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -1069,12 +1069,16 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) /* Confirm that the device is in valid exec env */ if (!MHI_IN_PBL(current_ee) && current_ee != MHI_EE_AMSS) { - dev_err(dev, "Not a valid EE for power on\n"); + dev_err(dev, "%s is not a valid EE for power on\n", + TO_MHI_EXEC_STR(current_ee)); ret = -EIO; goto error_async_power_up; } state = mhi_get_mhi_state(mhi_cntrl); + dev_dbg(dev, "Attempting power on with EE: %s, state: %s\n", + TO_MHI_EXEC_STR(current_ee), TO_MHI_STATE_STR(state)); + if (state == MHI_STATE_SYS_ERR) { mhi_set_mhi_state(mhi_cntrl, MHI_STATE_RESET); ret = wait_event_timeout(mhi_cntrl->state_event,