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Signed-off-by: Marek Szyprowski --- drivers/clocksource/exynos_mct.c | 4 ---- 1 file changed, 4 deletions(-) -- 2.17.1 diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 7a244b681876..43b335ff4a96 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -581,11 +581,7 @@ static int __init mct_init_dt(struct device_node *np, unsigned int int_type) * timer irqs are specified after the four global timer * irqs are specified. */ -#ifdef CONFIG_OF nr_irqs = of_irq_count(np); -#else - nr_irqs = 0; -#endif for (i = MCT_L0_IRQ; i < nr_irqs; i++) mct_irqs[i] = irq_of_parse_and_map(np, i); From patchwork Mon Oct 8 12:50:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 148361 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp3607901lji; Mon, 8 Oct 2018 05:50:54 -0700 (PDT) X-Google-Smtp-Source: ACcGV603syAoiSjXWLA4LXfJY9gJY4cbrHtzEalKEhK52UyiuBNBqqu5mwHNAVu22hWGrlplKpiE X-Received: by 2002:a62:7e81:: with SMTP id z123-v6mr24901116pfc.139.1539003054818; Mon, 08 Oct 2018 05:50:54 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539003054; cv=none; d=google.com; s=arc-20160816; b=nPI69B7GaTVAtq0coGT4ImPy4Zkh0POIPrIUR1DqTLfote1CqoZT+awkOqCnKW/H0E F1pV52GyVyPOONlTLoiOVwfdfZTNJa19ZTqFqdhBo5VmqYqZz6H9iAGRh2wMtkxLi3WO AfRe1LjKDXCQbzn6Vbzom11SBPtICrvEDAbpb34j8h2kiMDZmsFTVnNcL+108xk0RsbN M5kpcIlEOoiNSoPaNIT7lrNmiUEpNeJhMck07DPJ4k0+kyYjMXVrGTpKzJ1vtdq3U4EM kZEAQ4JYOmc+xSNrh1DvnCuZcVQ+5i0BmiTuKO7hg2UOf+ByvQAjlu/o1vBHbfP/ewhQ Rv1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-filter; bh=+hlh6tcQhN7aktr3PJyjEvqOPWD+APolECBd/LiiVuk=; b=jepEpU/Pa7K07YEx+WXNqcVX8UsUABVIyhyBeckBXtPRL21lDDIeLzgqVrfoqdJk+1 eWZ0qpwJiId+RDWBhbt4fnxVgLihNzzKnual5RjMF5iEzvcxufbSlKpdzcJYjBpqtkCD Qz7Ge8SB87wrTEKr98jj9SD25Bo0xug5vBGZZlMAPJOi637Sugfv2HR+FR/a9mab/dTK e0R20wnAfRfz6rCgB0Om0GdSuRD+9VoBAo8sqR73/GHPfmPGfTcTF/T2P6FlFIsMxVH2 qnuaBo/WD+g8Pk5goMp0+6B5z+Li20ngMh1d1J+x2T6i9HLlbvJfqVBHRV4KNSBRy6n/ cErQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@samsung.com header.s=mail20170921 header.b=syefbeFE; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Mon, 8 Oct 2018 12:50:47 +0000 (GMT) X-AuditID: cbfec7f2-5c9ff70000001159-b8-5bbb52a7ea54 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id 43.39.04128.7A25BBB5; Mon, 8 Oct 2018 13:50:47 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PGA006EA6BYW230@eusync1.samsung.com>; Mon, 08 Oct 2018 13:50:47 +0100 (BST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Will Deacon , Catalin Marinas , Marc Zyngier , Thomas Gleixner , Daniel Lezcano , Krzysztof Kozlowski , Chanwoo Choi , Bartlomiej Zolnierkiewicz , Inki Dae Subject: [PATCH 2/7] clocksource: exynos_mct: Add arch_timer cooperation mode for ARM64 Date: Mon, 08 Oct 2018 14:50:04 +0200 Message-id: <20181008125009.3721-3-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20181008125009.3721-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrPIsWRmVeSWpSXmKPExsWy7djP87rLg3ZHG/zttLTYOGM9q8X7ZT2M Fte/PGe1mPdZ1mLS/QksFufPb2C32PT4GqvF5V1z2CxmnN/HZLH2yF12i793/rFZbN40ldni 5ccTLA68HmvmrWH02LSqk83jzrU9bB7vzp1j99i8pN6jb8sqRo/Pm+QC2KO4bFJSczLLUov0 7RK4MjZt+MBYsEiqYt3Xo0wNjOtFuxg5OSQETCS+TPrO1MXIxSEksIJRYsqFhcwQzmdGiVnb j7PDVM0/uIUJxBYSWMYoMeNZCkRRA5NE148FYEVsAoYSXW+72EBsEYFsic7HDxhBbGaBRcwS B44Jg9jCApESD6evYwGxWQRUJe7vuAdm8wrYSEz9eJ8JYpm8xOoNB5hBbE4BW4knXatYQJZJ COxhk3g2czErRJGLxJeXZ6CuE5Z4dXwLlC0jcXlyN1RDM6NE+4xZ7BBOD6PE1jk72CCqrCUO H7/ICnEen8SkbdOB1nEAxXklOtqEIEwPiU27zSG+nMAocXzLTfYJjJILGBlWMYqnlhbnpqcW G+allusVJ+YWl+al6yXn525iBEbz6X/HP+1g/Hop6RCjAAejEg/vyoBd0UKsiWXFlbmHGCU4 mJVEeEW3A4V4UxIrq1KL8uOLSnNSiw8xSnOwKInzLpu3MVpIID2xJDU7NbUgtQgmy8TBKdXA WObywblocuTT+OKXlz1vGSwsmnKMc15fp8YE/QupVpsvdbjwJK6RvC/AZ+dYPPdMyYwF21/9 7BKWyp24K5Ftqsj8HRvTnyTb5fJ+OL1s4RFft4BJ8ys/OS9d8eHTH2+lA34zn0zZ8tpaSlF7 Y7D78YQOxzm7W1YEBAaqHs5Y4tzX/cDeRfDNciWW4oxEQy3mouJEAKshHbPiAgAA X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrDLMWRmVeSWpSXmKPExsVy+t/xy7rLg3ZHG2yZJm6xccZ6Vov3y3oY La5/ec5qMe+zrMWk+xNYLM6f38BusenxNVaLy7vmsFnMOL+PyWLtkbvsFn/v/GOz2LxpKrPF y48nWBx4PdbMW8PosWlVJ5vHnWt72DzenTvH7rF5Sb1H35ZVjB6fN8kFsEdx2aSk5mSWpRbp 2yVwZWza8IGxYJFUxbqvR5kaGNeLdjFyckgImEjMP7iFCcQWEljCKHHxEWcXIxeQ3cQkcXXd bkaQBJuAoUTX2y42EFtEIFti/t5udhCbWWAJs8TN+w4gtrBApMTHHetYQGwWAVWJ+zvugdm8 AjYSUz/eZ4JYJi+xesMBZhCbU8BW4knXKhaIxTYSvdMvsk5g5FnAyLCKUSS1tDg3PbfYSK84 Mbe4NC9dLzk/dxMjMAy3Hfu5ZQdj17vgQ4wCHIxKPLwrAnZFC7EmlhVX5h5ilOBgVhLhFd0O FOJNSaysSi3Kjy8qzUktPsQozcGiJM573qAySkggPbEkNTs1tSC1CCbLxMEp1cCYvorbfXP8 cW/Ljd3fO9lm3vFPMPqhLHnVbFpybUjRbx2ZyZ47r25kPfE8j/9qFcf+iwbBytN2O+3wZeU/ lrpg78oHJlOXP5wok3bwrduJlY8j9x6MjJ35cY9ygvTnVu/YChcLd/F+4w+Suw/bzex88ldi apDwLknfzTsE4sLKVrsKrv36c8N0JZbijERDLeai4kQAaEuZzj8CAAA= X-CMS-MailID: 20181008125047eucas1p23e520d778ad5f18aba57b21641d4cb4c X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181008125047eucas1p23e520d778ad5f18aba57b21641d4cb4c References: <20181008125009.3721-1-m.szyprowski@samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org To get ARM Architected Timers working on Samsung Exynos SoCs, one has to first configure and enable Exynos Multi-Core Timer, because they both share some common hardware blocks. This patch adds a mode of cooperation with arch_timer driver, so kernel can use CP15 based timer interface via arch_timer driver, which is mandatory on ARM64. In such mode driver only configures MCT registers and starts the timer but don't register any clocksource or events in the system. Those are left to be handled by arch_timer driver. Signed-off-by: Marek Szyprowski --- drivers/clocksource/exynos_mct.c | 28 ++++++++++++++++++++++------ 1 file changed, 22 insertions(+), 6 deletions(-) -- 2.17.1 diff --git a/drivers/clocksource/exynos_mct.c b/drivers/clocksource/exynos_mct.c index 43b335ff4a96..05b201ed8ef5 100644 --- a/drivers/clocksource/exynos_mct.c +++ b/drivers/clocksource/exynos_mct.c @@ -57,6 +57,7 @@ #define TICK_BASE_CNT 1 enum { + MCT_INT_NONE = 0, MCT_INT_SPI, MCT_INT_PPI }; @@ -238,6 +239,9 @@ static int __init exynos4_clocksource_init(void) { exynos4_mct_frc_start(); + if (!mct_int_type) + return 0; + #if defined(CONFIG_ARM) exynos4_delay_timer.read_current_timer = &exynos4_read_current_timer; exynos4_delay_timer.freq = clk_rate; @@ -343,6 +347,9 @@ static struct irqaction mct_comp_event_irq = { static int exynos4_clockevent_init(void) { + if (!mct_int_type) + return 0; + mct_comp_device.cpumask = cpumask_of(0); clockevents_config_and_register(&mct_comp_device, clk_rate, 0xf, 0xffffffff); @@ -476,12 +483,12 @@ static int exynos4_mct_starting_cpu(unsigned int cpu) irq_force_affinity(evt->irq, cpumask_of(cpu)); enable_irq(evt->irq); - } else { + } else if (mct_int_type == MCT_INT_PPI) { enable_percpu_irq(mct_irqs[MCT_L0_IRQ], 0); } - clockevents_config_and_register(evt, clk_rate / (TICK_BASE_CNT + 1), - 0xf, 0x7fffffff); - + if (mct_int_type) + clockevents_config_and_register(evt, + clk_rate / (TICK_BASE_CNT + 1), 0xf, 0x7fffffff); return 0; } @@ -496,7 +503,7 @@ static int exynos4_mct_dying_cpu(unsigned int cpu) if (evt->irq != -1) disable_irq_nosync(evt->irq); exynos4_mct_write(0x1, mevt->base + MCT_L_INT_CSTAT_OFFSET); - } else { + } else if (mct_int_type == MCT_INT_PPI) { disable_percpu_irq(mct_irqs[MCT_L0_IRQ]); } return 0; @@ -529,7 +536,7 @@ static int __init exynos4_timer_resources(struct device_node *np, void __iomem * &percpu_mct_tick); WARN(err, "MCT: can't request IRQ %d (%d)\n", mct_irqs[MCT_L0_IRQ], err); - } else { + } else if (mct_int_type == MCT_INT_SPI) { for_each_possible_cpu(cpu) { int mct_irq = mct_irqs[MCT_L0_IRQ + cpu]; struct mct_clock_event_device *pcpu_mevt = @@ -573,6 +580,15 @@ static int __init mct_init_dt(struct device_node *np, unsigned int int_type) mct_int_type = int_type; + if (IS_ENABLED(CONFIG_ARM64) && IS_ENABLED(CONFIG_ARM_ARCH_TIMER)) { + struct device_node *np = of_find_compatible_node(NULL, NULL, + "arm,armv8-timer"); + if (np) { + mct_int_type = MCT_INT_NONE; + of_node_put(np); + } + } + /* This driver uses only one global timer interrupt */ mct_irqs[MCT_G0_IRQ] = irq_of_parse_and_map(np, MCT_G0_IRQ); From patchwork Mon Oct 8 12:50:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 148366 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp3608263lji; Mon, 8 Oct 2018 05:51:15 -0700 (PDT) X-Google-Smtp-Source: ACcGV61/xoWgUv+GwFI7XVkLKj01owup6vZflfCBNA/inu3vTHBd6Ph1TZaZoEO/AlgbnyI0bWp3 X-Received: by 2002:a17:902:a5ca:: with SMTP id t10-v6mr23505255plq.113.1539003075724; Mon, 08 Oct 2018 05:51:15 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539003075; cv=none; d=google.com; s=arc-20160816; b=uQq0bqkkf8vVTDqPcuwKi2piqYBLjoGGRIoIy2PBnfGEGOzqHQquQjxKtPO6JyJ2Xz JVy9TPMt8+AHqQ2Hj5AM2q7OmJwl6CrqD82r043A3YM9WDbLMiIO+xTgkQkCb6O69URn O8+U8YHdp3i3nHouvHvhWwxyMuhurrNAMniVjVAqJ5yzBicyEp1yGSVh2Q2S5niegC+M PLD9b9xy0xT0DJFoAhwKUGC0lkxJOLIDd8FCkCpBlO+/XHZp6teqEutgItZUqNQIMVuM eSVHuHHjnN55LBualsqy6oSOk12+w+/EQXwF5j/q0KHGTrEkDgWUBpK1xmsKBYCy1zc2 s7vg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-filter; bh=u6Fux9B2+gCCVTDUtsb3Uk1X1p5dp09XsTAiT796EMU=; b=sdK2mS6PQelr5G/pL45eP1dfFy3KpB2wfzEKfilnEzg88YFNEgo/YCGHCpKyU9IhSa fsaVaTTPn5uRDE/+rr7K8HG8R5q1seEUKTRTe1i5rnhMWXvNeXbrdAoe971BQ6jN33OL cifrxQvaHjMM8JPXvul9HNg+uZoPHC8EI469jWwu/JO9iJpwzLWk1/oo8xlJ1UVfYbob bykn1t7HQiJLGd+Yv76plKfcePoX4ksC/tHK7J+mKFjpR6Dlkww7f8cv4wsOq14dZf23 UtnZ7RogugylD+Z2CRk3RIaRs0FoCzTi14aDPK/V6QTZYUgpaEukF6EabDgICKfQGqu4 dRCg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@samsung.com header.s=mail20170921 header.b=f0l1ajDB; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Mon, 8 Oct 2018 12:50:48 +0000 (GMT) X-AuditID: cbfec7f5-367ff700000012c6-85-5bbb52a8a3c7 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms2.samsung.com (EUCPMTA) with SMTP id C4.39.04128.8A25BBB5; Mon, 8 Oct 2018 13:50:48 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PGA006EA6BYW230@eusync1.samsung.com>; Mon, 08 Oct 2018 13:50:48 +0100 (BST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Will Deacon , Catalin Marinas , Marc Zyngier , Thomas Gleixner , Daniel Lezcano , Krzysztof Kozlowski , Chanwoo Choi , Bartlomiej Zolnierkiewicz , Inki Dae Subject: [PATCH 4/7] clocksource: arch_timer: Add support for not-fw-configured timer on ARM64 Date: Mon, 08 Oct 2018 14:50:06 +0200 Message-id: <20181008125009.3721-5-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20181008125009.3721-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFrrAIsWRmVeSWpSXmKPExsWy7djP87org3ZHG7yYwGSxccZ6Vov3y3oY La5/ec5qMe+zrMWk+xNYLM6f38BusenxNVaLy7vmsFnMOL+PyWLtkbvsFn/v/GOz2LxpKrPF y48nWBx4PdbMW8PosWlVJ5vHnWt72DzenTvH7rF5Sb1H35ZVjB6fN8kFsEdx2aSk5mSWpRbp 2yVwZUxZdoSx4LJ4xcnDAg2M74S7GDk5JARMJB5tnMbSxcjFISSwglFi8uz9rBDOZ0aJ859+ MsJU7f18CapqGaPEhatfoKoamCR+NW1jAqliEzCU6HrbxQZiiwhkS3Q+fgDWzSywiFniwDGw fcICCRKvN81jBrFZBFQlfu9pBrN5BWwkti7tg9omL7F6wwGwOKeArcSTrlVgmyUE9rBJtK7a ywpR5CKx/9A/ZghbWOLV8S3sELaMxOXJ3VANzYwS7TNmsUM4PYwSW+fsYIOospY4fPwiK8R5 fBKTtk0HmsQBFOeV6GgTgijxkHi2bhk7xJsTGCU2X2phncAouYCRYRWjeGppcW56arFxXmq5 XnFibnFpXrpecn7uJkZgPJ/+d/zrDsZ9f5IOMQpwMCrx8Ab47YoWYk0sK67MPcQowcGsJMIr uh0oxJuSWFmVWpQfX1Sak1p8iFGag0VJnHfZvI3RQgLpiSWp2ampBalFMFkmDk6pBsYgATn/ qtgFvbr2jv0pHnZTV7SU3o6yfaVU9sakRP6Jp8cyjdXfmpSiXs+dIcL08K8p95FfWpkmC1SX e96JmvN+/VKt9R5egX1G63+bFD7IVXyVdG4v6zvbw+f/+E7M3aa0qjXwz/dnKvsC1C43XW9V k1A5vHllpLlVjPW6gw7lt17P8F9htliJpTgj0VCLuag4EQA2zswz4wIAAA== X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrDLMWRmVeSWpSXmKPExsVy+t/xy7orgnZHG0zrkLHYOGM9q8X7ZT2M Fte/PGe1mPdZ1mLS/QksFufPb2C32PT4GqvF5V1z2CxmnN/HZLH2yF12i793/rFZbN40ldni 5ccTLA68HmvmrWH02LSqk83jzrU9bB7vzp1j99i8pN6jb8sqRo/Pm+QC2KO4bFJSczLLUov0 7RK4MqYsO8JYcFm84uRhgQbGd8JdjJwcEgImEns/X2LpYuTiEBJYwiix4+0cRginiUli6fKX 7CBVbAKGEl1vu9hAbBGBbIn5e7vB4swCS5glbt53ALGFBRIk7lyeygRiswioSvze08wMYvMK 2EhsXdrHCLFNXmL1hgNgcU4BW4knXatYQGwhoJre6RdZJzDyLGBkWMUoklpanJueW2ykV5yY W1yal66XnJ+7iREYhtuO/dyyg7HrXfAhRgEORiUe3hUBu6KFWBPLiitzDzFKcDArifCKbgcK 8aYkVlalFuXHF5XmpBYfYpTmYFES5z1vUBklJJCeWJKanZpakFoEk2Xi4JRqYOw4xb9Lcfrj gKS5K7582/f9142or1pbLJStRa4eFt9yxF0x4Pts6U9TEttKn3641Zcq19/+6o6Aqpr/gxVT dvR6Hz3Gt/3yHj7hxLehFgdleiY88zAr/3ttTnBkhZnKgZTzT/oOiMxZkn5ZeNayZ1wGX/fc Oliucahy8uy9J+oktt6SfXt/yeXnSizFGYmGWsxFxYkA/YrTkz8CAAA= X-CMS-MailID: 20181008125048eucas1p229a94c202596ddd0a65009c15d9e3001 X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181008125048eucas1p229a94c202596ddd0a65009c15d9e3001 References: <20181008125009.3721-1-m.szyprowski@samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use common infrastructure for ARM Architected Timers erratum to enable support for systems with broken CPU firmware (timer registers not properly configured). This mode has been already availabled on ARM (32bits) architecture. This enables to run Linux kernel on ARM64 boards using physical architected timers instead of the virtual ones. Examples of such system with broken firmware are Samsung Exynos5433 SoC based TM2(e) boards, which is already deployed for years and updating firmware is not possible. Signed-off-by: Marek Szyprowski --- drivers/clocksource/Kconfig | 11 +++++++++++ drivers/clocksource/arm_arch_timer.c | 15 ++++++++++++--- 2 files changed, 23 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index a11f4ba98b05..a30752579b03 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -364,6 +364,17 @@ config ARM64_ERRATUM_858921 The workaround will be dynamically enabled when an affected core is detected. +config ARCH_TIMER_REGISTERS_NOT_FW_CONFIGURED + bool "Workaround for arch timer registers not configured by firmware" + default y + select ARM_ARCH_TIMER_OOL_WORKAROUND + depends on ARM_ARCH_TIMER && ARM64 + help + This option enables a workaround for boards, on which arch timer + registers are not properly configured by the board firmware. + The workaround will be dynamically enabled when an affected + board is detected. + config ARM_GLOBAL_TIMER bool "Support for the ARM global timer" if COMPILE_TEST select TIMER_OF if OF diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 9a7d4dc00b6e..b6f109654daf 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -423,6 +423,14 @@ static const struct arch_timer_erratum_workaround ool_workarounds[] = { .read_cntvct_el0 = arm64_1188873_read_cntvct_el0, }, #endif +#ifdef CONFIG_ARCH_TIMER_REGISTERS_NOT_FW_CONFIGURED + { + .match_type = ate_match_dt, + .id = "arm,cpu-registers-not-fw-configured", + .desc = "broken CPU firmware (timer registers not configured)", + .read_cntvct_el0 = arch_counter_get_cntpct, + }, +#endif }; typedef bool (*ate_match_fn_t)(const struct arch_timer_erratum_workaround *, @@ -1234,9 +1242,10 @@ static int __init arch_timer_of_init(struct device_node *np) * If we cannot rely on firmware initializing the timer registers then * we should use the physical timers instead. */ - if (IS_ENABLED(CONFIG_ARM) && - of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) - arch_timer_uses_ppi = ARCH_TIMER_PHYS_SECURE_PPI; + if (of_property_read_bool(np, "arm,cpu-registers-not-fw-configured")) + arch_timer_uses_ppi = IS_ENABLED(CONFIG_ARM64) ? + ARCH_TIMER_PHYS_NONSECURE_PPI : + ARCH_TIMER_PHYS_SECURE_PPI; else arch_timer_uses_ppi = arch_timer_select_ppi(); From patchwork Mon Oct 8 12:50:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 148363 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp3607931lji; Mon, 8 Oct 2018 05:50:57 -0700 (PDT) X-Google-Smtp-Source: ACcGV62OB+YbJumlu/sen7VsvOHs/e2xajuaPe0JG3ZrBWHuohV7xt16ZaAeLhl3Vucf79VNbW3W X-Received: by 2002:a65:610e:: with SMTP id z14-v6mr12729699pgu.138.1539003057296; Mon, 08 Oct 2018 05:50:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539003057; cv=none; d=google.com; s=arc-20160816; b=WAJQ3UcjMBbWdM8UwwKBvcD3HX+clG/5TNgn0PKsx8HXl/BY4UsHe7sRpuzOoemAVz XsDOAMlg4YG5LmAxIE93lWdNBIx8cmai2pq5MYpEOcy/LEK2QDbYWPtLgqh7/A4jo54s eRzIAY4AusRVqTAp8aSm5+qr8BmcILx9Es3EG1bPz471LZXz9PXouXdGJEZXDQMmB6/3 3h42XrBdn9umy/hyP6KxWT/6e+XTzpsn0QYWxS/yw83pmzjxbAi2d418sJN3U8knDXjq uxz7TGs0YrHZ5r3zE/G9VSlu6Z+wIejNhyfsKl6D6FHV+Wvl3a4Sa+MyXP0FVPV/X5Jv 26PA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-filter; bh=vVM6CC5JF82bvFsbKaZtHMXQsiBL3UIIS0wEGFQbXQo=; b=RF6xkmJewYr6ADuoGtVsZ4CGFFP20IitAAuIcY5iIpdSIWLo2LhYVmFS1MgmcSRcB/ 5sZfVaqHfn/STUQlkRzyyvAnkmcCoTB3RWloRITVyTlY/ZT4Ju0lWKz68x8IXinn57d3 2GIowWjZfAwEmwuLhmkNcR+3VqWckfPNFB72zofoHwbzkUcNvzIOPQicC4LTRziGCuYc pggo+LR+UZNyE1xh/D/XZ9qmfskvQ5ahiy1Kgu2bHr1Lu+L6OB/gab8Ou4arjhaHuNIo m3TCzP+sdPlyJh49m7mRLWTAn11Ut5Cyp+vE1PPt8jmzX2Kid5PAxA1gPTvzuR2Fnp7n guvQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@samsung.com header.s=mail20170921 header.b=rCn8Pokz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Mon, 8 Oct 2018 12:50:50 +0000 (GMT) X-AuditID: cbfec7f2-5c9ff70000001159-c3-5bbb52aa3507 Received: from eusync1.samsung.com ( [203.254.199.211]) by eusmgms1.samsung.com (EUCPMTA) with SMTP id A0.A9.04284.9A25BBB5; Mon, 8 Oct 2018 13:50:49 +0100 (BST) Received: from AMDC2765.digital.local ([106.116.147.25]) by eusync1.samsung.com (Oracle Communications Messaging Server 7.0.5.31.0 64bit (built May 5 2014)) with ESMTPA id <0PGA006EA6BYW230@eusync1.samsung.com>; Mon, 08 Oct 2018 13:50:49 +0100 (BST) From: Marek Szyprowski To: linux-samsung-soc@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Cc: Marek Szyprowski , Will Deacon , Catalin Marinas , Marc Zyngier , Thomas Gleixner , Daniel Lezcano , Krzysztof Kozlowski , Chanwoo Choi , Bartlomiej Zolnierkiewicz , Inki Dae Subject: [PATCH 6/7] arm64: dts: exynos: Mark arch_timer device as not-fw-configured on TM2(e) Date: Mon, 08 Oct 2018 14:50:08 +0200 Message-id: <20181008125009.3721-7-m.szyprowski@samsung.com> X-Mailer: git-send-email 2.17.1 In-reply-to: <20181008125009.3721-1-m.szyprowski@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFjrHIsWRmVeSWpSXmKPExsWy7djPc7qrgnZHG7y/JWuxccZ6Vov3y3oY La5/ec5qMe+zrMWk+xNYLM6f38BusenxNVaLy7vmsFnMOL+PyWLtkbvsFn/v/GOz2LxpKrPF y48nWBx4PdbMW8PosWlVJ5vHnWt72DzenTvH7rF5Sb1H35ZVjB6fN8kFsEdx2aSk5mSWpRbp 2yVwZbz+t4qlYCFbxdVPU5kaGLewdjFyckgImEgsezOXuYuRi0NIYAWjROecp1DOZ0aJIwfn sMFU7ZhzkAkisYxR4ty+B2AJIYEGJonXXxJBbDYBQ4mut11gcRGBbInOxw8YQWxmgUXMEgeO CXcxcnAICyRINPw1AAmzCKhKzN1+EqycV8BGYvGGl+wQu+QlVm84wAxicwrYSjzpWsUCsldC YA+bxKd171ggilwkbn34AGULS7w6vgWqWUaiswPiUAmBZkaJ9hmz2CGcHkaJrXN2QL1jLXH4 +EVWiOv4JCZtm84Mcp2EAK9ER5sQhOkh8XaBP8TDExgl+mfvY5nAKLmAkWEVo3hqaXFuemqx YV5quV5xYm5xaV66XnJ+7iZGYCyf/nf80w7Gr5eSDjEKcDAq8fCuDNgVLcSaWFZcmXuIUYKD WUmEV3Q7UIg3JbGyKrUoP76oNCe1+BCjNAeLkjjvsnkbo4UE0hNLUrNTUwtSi2CyTBycUg2M BsLL3KWuTn7cndEh/emF4Qyp5ZbTz7MURVqsq65K1GD9L1QlyK92K+tvwYGQ4yuf6S4xirj/ 69K2POstaZznuS2bUpX8TWLY9Y80qb2YMPG7j8kjnz9ij7/LLnyRfnqd8NktJ29kXguqW5vx xbFv84qNhw/F35+9IHrVkraSWj4fxQiHVY76SizFGYmGWsxFxYkA5iQDNOECAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFlrNLMWRmVeSWpSXmKPExsVy+t/xy7org3ZHG6xfY2OxccZ6Vov3y3oY La5/ec5qMe+zrMWk+xNYLM6f38BusenxNVaLy7vmsFnMOL+PyWLtkbvsFn/v/GOz2LxpKrPF y48nWBx4PdbMW8PosWlVJ5vHnWt72DzenTvH7rF5Sb1H35ZVjB6fN8kFsEdx2aSk5mSWpRbp 2yVwZbz+t4qlYCFbxdVPU5kaGLewdjFyckgImEjsmHOQCcQWEljCKHFhc3UXIxeQ3cQkceP8 RXaQBJuAoUTX2y42EFtEIFti/t5usDizwBJmiZv3HboYOTiEBRIkGv4agIRZBFQl5m4/CVbO K2AjsXjDS3aIXfISqzccYAaxOQVsJZ50rWKB2Gsj0Tv9IusERp4FjAyrGEVSS4tz03OLDfWK E3OLS/PS9ZLzczcxAoNw27Gfm3cwXtoYfIhRgINRiYc3wG9XtBBrYllxZe4hRgkOZiURXtHt QCHelMTKqtSi/Pii0pzU4kOM0hwsSuK85w0qo4QE0hNLUrNTUwtSi2CyTBycUg2MjJdOfOxd XdRl8X/TLfaT16ctXWfWfnP2pN9Brpoe2k3qt9OdmbPYY8NUrGYuPm3g+SY6+kXRnxtre/V5 /Q5Y2iyd1O14T2WP5JMbdar3DTlmxx05+JlfsKzp1Fr/fW8abp6O3/+q59KrHO34Xtf9Z06J nZgdfT/TZ/HRidt3dHEKF7YeP9amosRSnJFoqMVcVJwIAAvbji0+AgAA X-CMS-MailID: 20181008125050eucas1p1caae30a4e791190e6c731816e36832ab X-Msg-Generator: CA CMS-TYPE: 201P X-CMS-RootMailID: 20181008125050eucas1p1caae30a4e791190e6c731816e36832ab References: <20181008125009.3721-1-m.szyprowski@samsung.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org TM2(e) boards use old firmware, which some PCSI requirements and doesn't properly configure arch virtual timers, so add property indicating this state. This enables respective workarounds in the timer driver. Signed-off-by: Marek Szyprowski --- arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi index 2606c2ab6456..ded0fb6c5936 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi @@ -1265,6 +1265,7 @@ }; &timer { + arm,cpu-registers-not-fw-configured; clock-frequency = <24000000>; }; From patchwork Mon Oct 8 12:50:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marek Szyprowski X-Patchwork-Id: 148364 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp3607938lji; Mon, 8 Oct 2018 05:50:57 -0700 (PDT) X-Google-Smtp-Source: ACcGV61nc2RhtfR/p5iuaPTkf8j0tGbXjoMXazocHzYXLUTcQx1LLCWV1jf9aNZUNkpvd4HL0D3f X-Received: by 2002:a62:da03:: with SMTP id c3-v6mr25539781pfh.52.1539003057749; Mon, 08 Oct 2018 05:50:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539003057; cv=none; d=google.com; s=arc-20160816; b=C5oG6gEdV6svtIi/UOQCJpBMACDlfLtctKOcTW+yx+C5tSjI8lB/TRF7anOBViw/dD 0nOgG32et1b1Hhd9i0uYd6DoBtNw04xKHxjB8trqPlWhWRc7gYgSlqZgvZ09RO56TGdv +AfL58vs+wAWF56zyhWUE38LzegKi0pPmJWyhtIPsgR0jqyqcqaaxGTual9uDV3J6JH6 NYDGyDmteJUP7OAiPhTOruqLJWgk19qi1q/FlYA73VRh5mskuoHIQzVR38v6okaX/a44 Ye4TB0GuuSqj8OUhkHpVENKZ3aLWZjnauAxkwMKPGulRGh6mKUoSTbXhoMcyVQqBV7Ai RlCg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:cms-type:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature:dkim-filter; bh=Dc2Hb6mBnlg8niGEf308TABPHOcuaLijU2lrM6USfRs=; b=ncIgfFMY2e/maA/5F3Ksqxr9h3stdvuv3hgzHBEv/1KVNCCGSN/0N3Gx/emvDiWAzg lG1VfxN9XrrjU0v24v49hEq3hrcp5AW1PsRN9DDFO+gRWmZrXfWAE1PPXj/pLHYP6he+ t7BuK+sjcn/1i2XELsC/YQIeXmkcSZyMuRAJ1cJjNM/0N/eNRqLFzI0QwwOgTsK5gmC0 BysprCevPRM5CrVPFJKdwZoc+oIVcDXW1UQBKDurJuIZDLFmuL9PmclUwjPMQZZHd7WO 0g97VeO+kOymhLej3C/tK59kSbOt9cRHyZHoMZCp7hrwki5BTY/4dPUiL/kEIUYj++gB E8mA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@samsung.com header.s=mail20170921 header.b=p3DLqI8W; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=samsung.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Marek Szyprowski --- arch/arm64/Kconfig.platforms | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 51bc479334a4..7cc687580fad 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -62,6 +62,7 @@ config ARCH_BRCMSTB config ARCH_EXYNOS bool "ARMv8 based Samsung Exynos SoC family" select COMMON_CLK_SAMSUNG + select CLKSRC_EXYNOS_MCT select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS select EXYNOS_PMU select HAVE_S3C2410_WATCHDOG if WATCHDOG