From patchwork Mon Aug 30 21:48:55 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 504339 Delivered-To: patch@linaro.org Received: by 2002:a02:8629:0:0:0:0:0 with SMTP id e38csp2191496jai; Mon, 30 Aug 2021 14:52:53 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxwY+3HF7FJHCpimMQ5j3m3fo8Jl2YFzpjQfBqmJkw9edX+keBwgmbYulWPeiYUFVRBqXnD X-Received: by 2002:a05:6602:d9:: with SMTP id z25mr19921348ioe.154.1630360372999; Mon, 30 Aug 2021 14:52:52 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630360372; cv=none; d=google.com; s=arc-20160816; b=Sna/7kQch9+vVLJ0TbI5ZIuZZFcrJrjNjdvUJWxHWuLpO54mQO1xw64J/zmTe7Q/FT dVTtmzFHt8dHFsX6YEpyhtiTt7KtIcP5DENcqNiZa11E9iNBwAmqsLq5Us8FtHlQquE5 YgqZ4czGNCEAob6jcKtiqtdcor5IOlColTrcsRiHtiSdfPqihoVW5N3qzbSDMH4B3bn5 61GnNANOdoR4pPIVOrQn0RftCj+ptSKTNMeDMWpxWRXxE/ANtK5K6IuNo3atgY2uQ0OJ tD40RSdCfVRWyTKnJWXIuI6upD3d/EEb4v489JOSp1oXOyUkpncYEEodxHsuNlG+HkHB Vdtw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=OPOenaKE+1kJAT6buGCuFkpiFLC09mvc5Fh3pG+x+KQ=; b=emT48i3wnuDbdw4MkypnPpg64lKNNvch6DyAa0JXopBcbYeWszXTF+q+MIQrD0aIgF KKccZshAr/CzVfNkcOrwbdK2Nqpg3c3B1vCZS4iS2SM20HfGjWca7GGnYR4IS6H9dRue 1S1++wAobbXVKO4LSkVgyTdgUnfkcd5x2XhhTp5f8k1ag4gcHrur/f2lUaezvh9uytNh UAHloQ7kAnW39CQCresz36HEDl6NCB4rUl9ZrakKxoUAF0VIaUDOQ4XGfS6pC8Cu53P7 LofOCA2/G/93jQ6GKnpFqtYV8E1O2iuhuQL/qLH6D98Osd+K9ISU9ZKF0vn4DCMQTQRS NM4Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=qpdfyD3w; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id h4sm1514049lft.184.2021.08.30.14.52.48 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Aug 2021 14:52:49 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Jakub Kicinski Cc: netdev@vger.kernel.org, DENG Qingfang , =?utf-8?q?Al?= =?utf-8?q?vin_=C5=A0ipraga?= , Mauri Sandberg , Linus Walleij Subject: [PATCH net-next 1/5 v2] net: dsa: rtl8366rb: support bridge offloading Date: Mon, 30 Aug 2021 23:48:55 +0200 Message-Id: <20210830214859.403100-2-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210830214859.403100-1-linus.walleij@linaro.org> References: <20210830214859.403100-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org From: DENG Qingfang Use port isolation registers to configure bridge offloading. Tested on the D-Link DIR-685, switching between ports and sniffing ports to make sure no packets leak. Cc: Vladimir Oltean Cc: Alvin Šipraga Cc: Mauri Sandberg Signed-off-by: DENG Qingfang Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - introduce RTL8366RB_PORT_ISO_PORTS() to shift the port mask into place so we are not confused by the enable bit. - Use this with dsa_user_ports() to isolate the CPU port from itself. --- drivers/net/dsa/rtl8366rb.c | 87 +++++++++++++++++++++++++++++++++++++ 1 file changed, 87 insertions(+) -- 2.31.1 Reviewed-by: Alvin Šipraga Reviewed-by: Florian Fainelli diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c index a89093bc6c6a..50ee7cd62484 100644 --- a/drivers/net/dsa/rtl8366rb.c +++ b/drivers/net/dsa/rtl8366rb.c @@ -300,6 +300,13 @@ #define RTL8366RB_INTERRUPT_STATUS_REG 0x0442 #define RTL8366RB_NUM_INTERRUPT 14 /* 0..13 */ +/* Port isolation registers */ +#define RTL8366RB_PORT_ISO_BASE 0x0F08 +#define RTL8366RB_PORT_ISO(pnum) (RTL8366RB_PORT_ISO_BASE + (pnum)) +#define RTL8366RB_PORT_ISO_EN BIT(0) +#define RTL8366RB_PORT_ISO_PORTS_MASK GENMASK(7, 1) +#define RTL8366RB_PORT_ISO_PORTS(pmask) (pmask << 1) + /* bits 0..5 enable force when cleared */ #define RTL8366RB_MAC_FORCE_CTRL_REG 0x0F11 @@ -835,6 +842,22 @@ static int rtl8366rb_setup(struct dsa_switch *ds) if (ret) return ret; + /* Isolate all user ports so only the CPU port can access them */ + for (i = 0; i < RTL8366RB_PORT_NUM_CPU; i++) { + ret = regmap_write(smi->map, RTL8366RB_PORT_ISO(i), + RTL8366RB_PORT_ISO_EN | + RTL8366RB_PORT_ISO_PORTS(BIT(RTL8366RB_PORT_NUM_CPU))); + if (ret) + return ret; + } + /* CPU port can access all ports */ + dev_info(smi->dev, "DSA user port mask: %08x\n", dsa_user_ports(ds)); + ret = regmap_write(smi->map, RTL8366RB_PORT_ISO(RTL8366RB_PORT_NUM_CPU), + RTL8366RB_PORT_ISO_PORTS(dsa_user_ports(ds))| + RTL8366RB_PORT_ISO_EN); + if (ret) + return ret; + /* Set up the "green ethernet" feature */ ret = rtl8366rb_jam_table(rtl8366rb_green_jam, ARRAY_SIZE(rtl8366rb_green_jam), smi, false); @@ -1127,6 +1150,68 @@ rtl8366rb_port_disable(struct dsa_switch *ds, int port) rb8366rb_set_port_led(smi, port, false); } +static int +rtl8366rb_port_bridge_join(struct dsa_switch *ds, int port, + struct net_device *bridge) +{ + struct realtek_smi *smi = ds->priv; + unsigned int port_bitmap = 0; + int ret, i; + + /* Loop over all other ports than this one */ + for (i = 0; i < RTL8366RB_PORT_NUM_CPU; i++) { + /* Handled last */ + if (i == port) + continue; + /* Not on this bridge */ + if (dsa_to_port(ds, i)->bridge_dev != bridge) + continue; + /* Join this port to each other port on the bridge */ + ret = regmap_update_bits(smi->map, RTL8366RB_PORT_ISO(i), + RTL8366RB_PORT_ISO_PORTS(BIT(port)), + RTL8366RB_PORT_ISO_PORTS(BIT(port))); + if (ret) + return ret; + + port_bitmap |= BIT(i); + } + + /* Set the bits for the ports we can access */ + return regmap_update_bits(smi->map, RTL8366RB_PORT_ISO(port), + RTL8366RB_PORT_ISO_PORTS_MASK, + RTL8366RB_PORT_ISO_PORTS(port_bitmap)); +} + +static void +rtl8366rb_port_bridge_leave(struct dsa_switch *ds, int port, + struct net_device *bridge) +{ + struct realtek_smi *smi = ds->priv; + unsigned int port_bitmap = 0; + int ret, i; + + /* Loop over all other ports than this one */ + for (i = 0; i < RTL8366RB_PORT_NUM_CPU; i++) { + /* Handled last */ + if (i == port) + continue; + /* Not on this bridge */ + if (dsa_to_port(ds, i)->bridge_dev != bridge) + continue; + /* Remove this port from any other port on the bridge */ + ret = regmap_update_bits(smi->map, RTL8366RB_PORT_ISO(i), + RTL8366RB_PORT_ISO_PORTS(BIT(port)), 0); + if (ret) + return; + + port_bitmap |= BIT(i); + } + + /* Clear the bits for the ports we can access */ + regmap_update_bits(smi->map, RTL8366RB_PORT_ISO(port), + RTL8366RB_PORT_ISO_PORTS(port_bitmap), 0); +} + static int rtl8366rb_change_mtu(struct dsa_switch *ds, int port, int new_mtu) { struct realtek_smi *smi = ds->priv; @@ -1510,6 +1595,8 @@ static const struct dsa_switch_ops rtl8366rb_switch_ops = { .get_strings = rtl8366_get_strings, .get_ethtool_stats = rtl8366_get_ethtool_stats, .get_sset_count = rtl8366_get_sset_count, + .port_bridge_join = rtl8366rb_port_bridge_join, + .port_bridge_leave = rtl8366rb_port_bridge_leave, .port_vlan_filtering = rtl8366_vlan_filtering, .port_vlan_add = rtl8366_vlan_add, .port_vlan_del = rtl8366_vlan_del, From patchwork Mon Aug 30 21:48:56 2021 Content-Type: text/plain; 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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id h4sm1514049lft.184.2021.08.30.14.52.50 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Aug 2021 14:52:50 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Jakub Kicinski Cc: netdev@vger.kernel.org, Linus Walleij , =?utf-8?q?Alvin_=C5=A0ipraga?= , Mauri Sandberg , DENG Qingfang Subject: [PATCH net-next 2/5 v2] net: dsa: rtl8366: Drop custom VLAN set-up Date: Mon, 30 Aug 2021 23:48:56 +0200 Message-Id: <20210830214859.403100-3-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210830214859.403100-1-linus.walleij@linaro.org> References: <20210830214859.403100-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This hacky default VLAN setup was done in order to direct packets to the right ports and provide port isolation, both which we now support properly using custom tags and proper bridge port isolation. We can drop the custom VLAN code and leave all VLAN handling alone, as users expect things to be. We can also drop ds->configure_vlan_while_not_filtering = false; and let the core deal with any VLANs it wants. Cc: Vladimir Oltean Cc: Alvin Šipraga Cc: Mauri Sandberg Cc: DENG Qingfang Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - No changes. --- drivers/net/dsa/realtek-smi-core.h | 1 - drivers/net/dsa/rtl8366.c | 48 ------------------------------ drivers/net/dsa/rtl8366rb.c | 4 +-- 3 files changed, 1 insertion(+), 52 deletions(-) -- 2.31.1 Reviewed-by: Vladimir Oltean Reviewed-by: Alvin Šipraga Reviewed-by: Florian Fainelli diff --git a/drivers/net/dsa/realtek-smi-core.h b/drivers/net/dsa/realtek-smi-core.h index fcf465f7f922..c8fbd7b9fd0b 100644 --- a/drivers/net/dsa/realtek-smi-core.h +++ b/drivers/net/dsa/realtek-smi-core.h @@ -129,7 +129,6 @@ int rtl8366_set_pvid(struct realtek_smi *smi, unsigned int port, int rtl8366_enable_vlan4k(struct realtek_smi *smi, bool enable); int rtl8366_enable_vlan(struct realtek_smi *smi, bool enable); int rtl8366_reset_vlan(struct realtek_smi *smi); -int rtl8366_init_vlan(struct realtek_smi *smi); int rtl8366_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, struct netlink_ext_ack *extack); int rtl8366_vlan_add(struct dsa_switch *ds, int port, diff --git a/drivers/net/dsa/rtl8366.c b/drivers/net/dsa/rtl8366.c index 75897a369096..59c5bc4f7b71 100644 --- a/drivers/net/dsa/rtl8366.c +++ b/drivers/net/dsa/rtl8366.c @@ -292,54 +292,6 @@ int rtl8366_reset_vlan(struct realtek_smi *smi) } EXPORT_SYMBOL_GPL(rtl8366_reset_vlan); -int rtl8366_init_vlan(struct realtek_smi *smi) -{ - int port; - int ret; - - ret = rtl8366_reset_vlan(smi); - if (ret) - return ret; - - /* Loop over the available ports, for each port, associate - * it with the VLAN (port+1) - */ - for (port = 0; port < smi->num_ports; port++) { - u32 mask; - - if (port == smi->cpu_port) - /* For the CPU port, make all ports members of this - * VLAN. - */ - mask = GENMASK((int)smi->num_ports - 1, 0); - else - /* For all other ports, enable itself plus the - * CPU port. - */ - mask = BIT(port) | BIT(smi->cpu_port); - - /* For each port, set the port as member of VLAN (port+1) - * and untagged, except for the CPU port: the CPU port (5) is - * member of VLAN 6 and so are ALL the other ports as well. - * Use filter 0 (no filter). - */ - dev_info(smi->dev, "VLAN%d port mask for port %d, %08x\n", - (port + 1), port, mask); - ret = rtl8366_set_vlan(smi, (port + 1), mask, mask, 0); - if (ret) - return ret; - - dev_info(smi->dev, "VLAN%d port %d, PVID set to %d\n", - (port + 1), port, (port + 1)); - ret = rtl8366_set_pvid(smi, port, (port + 1)); - if (ret) - return ret; - } - - return rtl8366_enable_vlan(smi, true); -} -EXPORT_SYMBOL_GPL(rtl8366_init_vlan); - int rtl8366_vlan_filtering(struct dsa_switch *ds, int port, bool vlan_filtering, struct netlink_ext_ack *extack) { diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c index 50ee7cd62484..8b040440d2d4 100644 --- a/drivers/net/dsa/rtl8366rb.c +++ b/drivers/net/dsa/rtl8366rb.c @@ -986,7 +986,7 @@ static int rtl8366rb_setup(struct dsa_switch *ds) return ret; } - ret = rtl8366_init_vlan(smi); + ret = rtl8366_reset_vlan(smi); if (ret) return ret; @@ -1000,8 +1000,6 @@ static int rtl8366rb_setup(struct dsa_switch *ds) return -ENODEV; } - ds->configure_vlan_while_not_filtering = false; - return 0; } From patchwork Mon Aug 30 21:48:57 2021 Content-Type: text/plain; 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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id h4sm1514049lft.184.2021.08.30.14.52.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Aug 2021 14:52:51 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Jakub Kicinski Cc: netdev@vger.kernel.org, Linus Walleij , =?utf-8?q?Alvin_=C5=A0ipraga?= , Mauri Sandberg , DENG Qingfang Subject: [PATCH net-next 3/5 v2] net: dsa: rtl8366rb: Support disabling learning Date: Mon, 30 Aug 2021 23:48:57 +0200 Message-Id: <20210830214859.403100-4-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210830214859.403100-1-linus.walleij@linaro.org> References: <20210830214859.403100-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org The RTL8366RB hardware supports disabling learning per-port so let's make use of this feature. Rename some unfortunately named registers in the process. Suggested-by: Vladimir Oltean Cc: Alvin Šipraga Cc: Mauri Sandberg Cc: DENG Qingfang Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - New patch suggested by Vladimir. --- drivers/net/dsa/rtl8366rb.c | 47 +++++++++++++++++++++++++++++++++---- 1 file changed, 42 insertions(+), 5 deletions(-) -- 2.31.1 diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c index 8b040440d2d4..2cadd3e57e8b 100644 --- a/drivers/net/dsa/rtl8366rb.c +++ b/drivers/net/dsa/rtl8366rb.c @@ -14,6 +14,7 @@ #include #include +#include #include #include #include @@ -42,9 +43,12 @@ /* Port Enable Control register */ #define RTL8366RB_PECR 0x0001 -/* Switch Security Control registers */ -#define RTL8366RB_SSCR0 0x0002 -#define RTL8366RB_SSCR1 0x0003 +/* Switch per-port learning disablement register */ +#define RTL8366RB_PORT_LEARNDIS_CTRL 0x0002 + +/* Security control, actually aging register */ +#define RTL8366RB_SECURITY_CTRL 0x0003 + #define RTL8366RB_SSCR2 0x0004 #define RTL8366RB_SSCR2_DROP_UNKNOWN_DA BIT(0) @@ -912,12 +916,12 @@ static int rtl8366rb_setup(struct dsa_switch *ds) rb->max_mtu[i] = 1532; /* Enable learning for all ports */ - ret = regmap_write(smi->map, RTL8366RB_SSCR0, 0); + ret = regmap_write(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL, 0); if (ret) return ret; /* Enable auto ageing for all ports */ - ret = regmap_write(smi->map, RTL8366RB_SSCR1, 0); + ret = regmap_write(smi->map, RTL8366RB_SECURITY_CTRL, 0); if (ret) return ret; @@ -1148,6 +1152,37 @@ rtl8366rb_port_disable(struct dsa_switch *ds, int port) rb8366rb_set_port_led(smi, port, false); } +static int +rtl8366rb_port_pre_bridge_flags(struct dsa_switch *ds, int port, + struct switchdev_brport_flags flags, + struct netlink_ext_ack *extack) +{ + /* We support enabling/disabling learning */ + if (flags.mask & ~(BR_LEARNING)) + return -EINVAL; + + return 0; +} + +static int +rtl8366rb_port_bridge_flags(struct dsa_switch *ds, int port, + struct switchdev_brport_flags flags, + struct netlink_ext_ack *extack) +{ + struct realtek_smi *smi = ds->priv; + int ret; + + if (flags.mask & BR_LEARNING) { + ret = regmap_update_bits(smi->map, RTL8366RB_PORT_LEARNDIS_CTRL, + BIT(port), + (flags.val & BR_LEARNING) ? 0 : BIT(port)); + if (ret) + return ret; + } + + return 0; +} + static int rtl8366rb_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *bridge) @@ -1600,6 +1635,8 @@ static const struct dsa_switch_ops rtl8366rb_switch_ops = { .port_vlan_del = rtl8366_vlan_del, .port_enable = rtl8366rb_port_enable, .port_disable = rtl8366rb_port_disable, + .port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags, + .port_bridge_flags = rtl8366rb_port_bridge_flags, .port_change_mtu = rtl8366rb_change_mtu, .port_max_mtu = rtl8366rb_max_mtu, }; From patchwork Mon Aug 30 21:48:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 504342 Delivered-To: patch@linaro.org Received: by 2002:a02:8629:0:0:0:0:0 with SMTP id e38csp2191565jai; Mon, 30 Aug 2021 14:53:00 -0700 (PDT) X-Google-Smtp-Source: ABdhPJznQwoS3V5zVpBiW/bMOoaVDLlFMe+TAOZ7gRowKLfoLgkc0+R+koONYoEY/UTHtvXugPkp X-Received: by 2002:a5e:8349:: with SMTP id y9mr14594913iom.34.1630360379982; Mon, 30 Aug 2021 14:52:59 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630360379; cv=none; d=google.com; s=arc-20160816; b=NLltIJDVQVFW9Xpd9eAIG/sqQCMYvaTEhg1/kx76JbdXxMI28MEeWMqFY5itGhkyi0 qJDbvuKAGB4WR/iLr5kdnFPVoyjqVZFuNcbPtNwRPVL/HDxL1gagyE/IYOnqDWQXk6Bi R0osar+MzpscfbWZKBgI00k3dJ0WSXadDk1PUldkAP5AE//lL/5d3xFD8YjOaGWP8vnL QIflmKZH5yyGS+Ho6ZfmvmhCr1u0eiKeXhsOJTy8aS9ip53SXZC1rdK0f6IPt4Yx8d4J 3OjDrpK0wI1z9ZQftM82+SyjZXRqnZDXoYxrBxu/6/AlSPmnHlSJqZmUgstbj2Z/tAga +OBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eSR/6/R7THpAwy4A0msHNf8bOj6o29f7fnPgnd1UmSA=; b=WKizE+H/erFddD9E5LCu5GfI6V5r1DE1emRiXAxBmxmfzEpq/NS5jE42GfQzRDzlRg Vps81LuHV4jmQhKfcsqhZ2rT7rNpOlqf914mToW+f3yJ3+/O2j2BTbKDrt3H90skugUJ hFBY6iNN94ka6ijNhOHS6e/Lvib0fUbV0FQzGZwFDFPFzbaAAOAqgz0wRvdg0/09Co45 9sNH7Y5mCTuQMatphnFDcGZK2j27ZHVUBP/+k+T19HK3tJ+JBoIXEhC+oJMM/VlGY4sp 4F7PeLQRecpn2RKSq9SFdI6gQyTk6jl38BmGwIQo0bfhfab/iXcUAibMEKalxq83roiy 479A== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Q5CoBlQG; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id h4sm1514049lft.184.2021.08.30.14.52.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Aug 2021 14:52:53 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Jakub Kicinski Cc: netdev@vger.kernel.org, Linus Walleij , =?utf-8?q?Alvin_=C5=A0ipraga?= , Mauri Sandberg , DENG Qingfang Subject: [PATCH net-next 4/5 v2] net: dsa: rtl8366rb: Support flood control Date: Mon, 30 Aug 2021 23:48:58 +0200 Message-Id: <20210830214859.403100-5-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210830214859.403100-1-linus.walleij@linaro.org> References: <20210830214859.403100-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Now that we have implemented bridge flag handling we can easily support flood (storm) control as well so let's do it. Cc: Vladimir Oltean Cc: Alvin Šipraga Cc: Mauri Sandberg Cc: DENG Qingfang Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - New patch --- drivers/net/dsa/rtl8366rb.c | 38 ++++++++++++++++++++++++++++++++++++- 1 file changed, 37 insertions(+), 1 deletion(-) -- 2.31.1 Reviewed-by: Alvin Šipraga diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c index 2cadd3e57e8b..4cb0e336ce6b 100644 --- a/drivers/net/dsa/rtl8366rb.c +++ b/drivers/net/dsa/rtl8366rb.c @@ -149,6 +149,11 @@ #define RTL8366RB_VLAN_INGRESS_CTRL2_REG 0x037f +#define RTL8366RB_STORM_BC_CTRL 0x03e0 +#define RTL8366RB_STORM_MC_CTRL 0x03e1 +#define RTL8366RB_STORM_UNDA_CTRL 0x03e2 +#define RTL8366RB_STORM_UNMC_CTRL 0x03e3 + /* LED control registers */ #define RTL8366RB_LED_BLINKRATE_REG 0x0430 #define RTL8366RB_LED_BLINKRATE_MASK 0x0007 @@ -1158,7 +1163,8 @@ rtl8366rb_port_pre_bridge_flags(struct dsa_switch *ds, int port, struct netlink_ext_ack *extack) { /* We support enabling/disabling learning */ - if (flags.mask & ~(BR_LEARNING)) + if (flags.mask & ~(BR_LEARNING | BR_BCAST_FLOOD | + BR_MCAST_FLOOD | BR_FLOOD)) return -EINVAL; return 0; @@ -1180,6 +1186,36 @@ rtl8366rb_port_bridge_flags(struct dsa_switch *ds, int port, return ret; } + if (flags.mask & BR_BCAST_FLOOD) { + ret = regmap_update_bits(smi->map, RTL8366RB_STORM_BC_CTRL, + BIT(port), + (flags.val & BR_BCAST_FLOOD) ? BIT(port) : 0); + if (ret) + return ret; + } + + if (flags.mask & BR_MCAST_FLOOD) { + ret = regmap_update_bits(smi->map, RTL8366RB_STORM_MC_CTRL, + BIT(port), + (flags.val & BR_MCAST_FLOOD) ? BIT(port) : 0); + if (ret) + return ret; + } + + /* Enable/disable both types of unicast floods */ + if (flags.mask & BR_FLOOD) { + ret = regmap_update_bits(smi->map, RTL8366RB_STORM_UNDA_CTRL, + BIT(port), + (flags.val & BR_FLOOD) ? BIT(port) : 0); + if (ret) + return ret; + ret = regmap_update_bits(smi->map, RTL8366RB_STORM_UNMC_CTRL, + BIT(port), + (flags.val & BR_FLOOD) ? BIT(port) : 0); + if (ret) + return ret; + } + return 0; } From patchwork Mon Aug 30 21:48:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Linus Walleij X-Patchwork-Id: 504343 Delivered-To: patch@linaro.org Received: by 2002:a02:8629:0:0:0:0:0 with SMTP id e38csp2191589jai; Mon, 30 Aug 2021 14:53:02 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzvyjfehZuyyQARc1eg2ORfVYxJFVSYm2w3vheFWOFjaC7VhbadetdNOEc0x12UqF4cdrni X-Received: by 2002:a92:c80e:: with SMTP id v14mr18904524iln.57.1630360382512; Mon, 30 Aug 2021 14:53:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1630360382; cv=none; d=google.com; s=arc-20160816; b=gCyYXVml8ZNWmitB4wbYFpaKmhCDMbbUGmjzPD+Y9Ju4CXB31OCC75PX5Yz9kADPR8 v48kG3mvUGibwi0ThFYPkp8FO8GY+ODmPMiomI7zBqrs/fAQE0Dqf0DjB3q9yXfZ6KQT T2nbjMRmX1PIAzDw5NMsyF7eaGYnMStSErYz6mS/rrXjunzvFiRzMqJZB391nKgeOsOe FINNMJ3rLPGSscg1hiF0ktTNbo0efBNShL0Cz92ZEbmxDo/9EjxeYSMQBLoul374RnNg DDOZACCGztz38hVl6hJhYElPSsIdSXGI5tOwp8vFZDPpZGccw7tpge92XeHvECAxlXmj T5kg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=90s4wpKUIcwIEvdTTZxL4JGPoTprkT4Ft/euRw6mn8k=; b=LTLIDcW8JTjdTAe7U2UiUknHHFYVrV+vetofUgfDRhRhyIo9pF/OIL+I7HmXrskZsF +2Yt8bogBaCSQTikdf0TdxqbSLTjy7FHizijBV1J8B3PD/vRwfN9M1TUSgjAC7Q/fMX2 unvDTC4c+vqgAvos1hynnnYrJKumJw8IfYqTHBmnZYJ6ukZ5F6oaPJFw2J1B40hPz3I0 Ue34l58NPq6GWfNynQekavVymQCfpdh7KxQzFfFZUkVSSpjC4fxNtTvOWI8xu8FdAC4D FwwFpI4LMjBuuGB4TkZackePmIwC/Mv8qJBDdLUtVREiqZHirSatBxbBotPCPupyS5IP /9YA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MHlrErK7; spf=pass (google.com: domain of netdev-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=netdev-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[92.34.204.253]) by smtp.gmail.com with ESMTPSA id h4sm1514049lft.184.2021.08.30.14.52.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 30 Aug 2021 14:52:54 -0700 (PDT) From: Linus Walleij To: Andrew Lunn , Vivien Didelot , Florian Fainelli , Vladimir Oltean , "David S . Miller" , Jakub Kicinski Cc: netdev@vger.kernel.org, Linus Walleij , =?utf-8?q?Alvin_=C5=A0ipraga?= , Mauri Sandberg , DENG Qingfang Subject: [PATCH net-next 5/5 v2] net: dsa: rtl8366rb: Support fast aging Date: Mon, 30 Aug 2021 23:48:59 +0200 Message-Id: <20210830214859.403100-6-linus.walleij@linaro.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210830214859.403100-1-linus.walleij@linaro.org> References: <20210830214859.403100-1-linus.walleij@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org This implements fast aging per-port using the special "security" register, which will flush any L2 LUTs on a port. Suggested-by: Vladimir Oltean Cc: Alvin Šipraga Cc: Mauri Sandberg Cc: DENG Qingfang Signed-off-by: Linus Walleij --- ChangeLog v1->v2: - New patch suggested by Vladimir. --- drivers/net/dsa/rtl8366rb.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) -- 2.31.1 Reviewed-by: Alvin Šipraga diff --git a/drivers/net/dsa/rtl8366rb.c b/drivers/net/dsa/rtl8366rb.c index 4cb0e336ce6b..548282119cc4 100644 --- a/drivers/net/dsa/rtl8366rb.c +++ b/drivers/net/dsa/rtl8366rb.c @@ -1219,6 +1219,19 @@ rtl8366rb_port_bridge_flags(struct dsa_switch *ds, int port, return 0; } +static void +rtl8366rb_port_fast_age(struct dsa_switch *ds, int port) +{ + struct realtek_smi *smi = ds->priv; + + /* This will age out any L2 entries */ + regmap_update_bits(smi->map, RTL8366RB_SECURITY_CTRL, + BIT(port), BIT(port)); + /* Restore the normal state of things */ + regmap_update_bits(smi->map, RTL8366RB_SECURITY_CTRL, + BIT(port), 0); +} + static int rtl8366rb_port_bridge_join(struct dsa_switch *ds, int port, struct net_device *bridge) @@ -1673,6 +1686,7 @@ static const struct dsa_switch_ops rtl8366rb_switch_ops = { .port_disable = rtl8366rb_port_disable, .port_pre_bridge_flags = rtl8366rb_port_pre_bridge_flags, .port_bridge_flags = rtl8366rb_port_bridge_flags, + .port_fast_age = rtl8366rb_port_fast_age, .port_change_mtu = rtl8366rb_change_mtu, .port_max_mtu = rtl8366rb_max_mtu, };