From patchwork Wed May 24 00:02:49 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 100395 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp34528qge; Tue, 23 May 2017 17:03:35 -0700 (PDT) X-Received: by 10.84.236.6 with SMTP id q6mr15514921plk.146.1495584215794; Tue, 23 May 2017 17:03:35 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495584215; cv=none; d=google.com; s=arc-20160816; b=kmK7rU94EPeQVuBt/Ye1NQGVmiaOJY1sGANeYWqEpMTYJcjHtlfKhfdTEtb6JI791x MDUOvyqssAH41vqIocvpAoOUTUgHnV6vjgyuqKl6Njnq8gkqVjEyXJ+tLYZCsF4VEMnM UAFwmgtYn9ZhXySNVRcdtm43gfwfNQF/JoVNyoOS5OAM/DEWqHn+0smfGQOil2iBOogR OwhKVDqKg8NMcCTM9x8s1Ef8dx1U0L1bzM+cAuyoCDPLnNukonilMMKiojLzahizgP+V XNjvC6H7GOOOdUWjy3hWzHfgD8XBAQf7oNbh2ZMnmfdbzcwYIB9ABQOad51ido5dfpvX dcLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=TCzWnzJHkW2SFRPz4eiJs5qhJ0x1GgU4cRW9E8ItAJo=; b=HQLGazTewc/ibSejqSSEVZJnQlzF2M6vTbC+6ykumP7QXR+DfLJqQM/FrueCG24zc2 TMsnoRsqOE/RNsQAruCrzqomhiaFG8lDI8B9Iv8MCGp1ASBj6A686XdmdX3pXwXAxTXp YhrwwGu6op1Hogo9ZJcdqHXuUIClarya1ijTG/dYuaygrFzVKipuPHt75f6H6UE++55C THAU2eWLGiwfWfV6beq2CwdbDtinEdqhjaQ51NUQGSK7cR6IAt2Yb4mJMbVmzaEy89Ux FkI/c2fAX9g8HpJLmvwlg1CzK9hzQVuQ3xDq/CBkLSxsscCFVvNtMVVMdOLLFSnVqz1J E2qw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[106.184.3.205]) by smtp.gmail.com with ESMTPSA id l186sm3613987pgd.42.2017.05.23.17.03.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 May 2017 17:03:18 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Mathieu Poirier , Rob Herring , Mark Rutland , Liviu Dudau , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Greg Kroah-Hartman , Suzuki K Poulose , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Stephen Boyd , Mike Leach Cc: Leo Yan Subject: [PATCH v12 1/9] coresight: bindings for CPU debug module Date: Wed, 24 May 2017 08:02:49 +0800 Message-Id: <1495584177-32193-2-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495584177-32193-1-git-send-email-leo.yan@linaro.org> References: <1495584177-32193-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org According to ARMv8 architecture reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug', the CPU can integrate debug module and it can support self-hosted debug and external debug. Especially for supporting self-hosted debug, this means the program can access the debug module from mmio region; and usually the mmio region is integrated with coresight. So add document for binding debug component, includes binding to APB clock; and also need specify the CPU node which the debug module is dedicated to specific CPU. Suggested-by: Mike Leach Reviewed-by: Mathieu Poirier Reviewed-by: Suzuki K Poulose Acked-by: Rob Herring Signed-off-by: Leo Yan --- .../bindings/arm/coresight-cpu-debug.txt | 49 ++++++++++++++++++++++ 1 file changed, 49 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt -- 2.7.4 diff --git a/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt new file mode 100644 index 0000000..2982912 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt @@ -0,0 +1,49 @@ +* CoreSight CPU Debug Component: + +CoreSight CPU debug component are compliant with the ARMv8 architecture +reference manual (ARM DDI 0487A.k) Chapter 'Part H: External debug'. The +external debug module is mainly used for two modes: self-hosted debug and +external debug, and it can be accessed from mmio region from Coresight +and eventually the debug module connects with CPU for debugging. And the +debug module provides sample-based profiling extension, which can be used +to sample CPU program counter, secure state and exception level, etc; +usually every CPU has one dedicated debug module to be connected. + +Required properties: + +- compatible : should be "arm,coresight-cpu-debug"; supplemented with + "arm,primecell" since this driver is using the AMBA bus + interface. + +- reg : physical base address and length of the register set. + +- clocks : the clock associated to this component. + +- clock-names : the name of the clock referenced by the code. Since we are + using the AMBA framework, the name of the clock providing + the interconnect should be "apb_pclk" and the clock is + mandatory. The interface between the debug logic and the + processor core is clocked by the internal CPU clock, so it + is enabled with CPU clock by default. + +- cpu : the CPU phandle the debug module is affined to. When omitted + the module is considered to belong to CPU0. + +Optional properties: + +- power-domains: a phandle to the debug power domain. We use "power-domains" + binding to turn on the debug logic if it has own dedicated + power domain and if necessary to use "cpuidle.off=1" or + "nohlt" in the kernel command line or sysfs node to + constrain idle states to ensure registers in the CPU power + domain are accessible. + +Example: + + debug@f6590000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0 0xf6590000 0 0x1000>; + clocks = <&sys_ctrl HI6220_DAPB_CLK>; + clock-names = "apb_pclk"; + cpu = <&cpu0>; + }; From patchwork Wed May 24 00:02:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 100397 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp34652qge; Tue, 23 May 2017 17:04:03 -0700 (PDT) X-Received: by 10.98.194.66 with SMTP id l63mr34649713pfg.234.1495584243203; Tue, 23 May 2017 17:04:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495584243; cv=none; d=google.com; s=arc-20160816; b=KJutLUAQS2gkOp+GmjQncle6MRoIdb9DANjv4xToGe67I3riOlrn6pOsxO8YfIBbgH GaXp8wZZFn2zi1qjg4YuTGC+494H0pozaqoNxA5TFe0cLO7N8ty3hVeEjmrT7ZruxlIE CbDmMefLHexpqfA1iw8wS1iilAJjkpXODbwXu45nUnqZxaurqvLIy3+g8pJNrn0Oqkb2 G6urSSQDO+ErP5XniCEleqGzXuVw9568v5lml7f+ceh7hau7Jw6JgjTShsHLeUgSRZ4Z a0iSdwQeELeLRRJIceD9nZHukrzgLY/uQk65+sqEyKCs0RyD/IP+PQa/cp9ZmS6ElLJ2 T36Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=KAEJxJlsQyVhwB4d8GGxsab6nI8NeyaoHh9oKfAyIsc=; b=k/YmDV+qtfCADDcZxEw6DvfNJMYGMeKqJx1661qn3Xey3hcbFkfXjL6+8yQAZIxl8C UtmCrxfmxyG+TSCHNDZ+D6LRoZcoQ8kOAzV7eQyu4xpceuo8JFAxKaa7ywEf3eLR51tW VMCeXJrbKkRzjAP0fyxjR23QkoCiQKBzLflHTdQlO97sWoexwlHvZ566lvaO57UQjezd z6XwtJmOzU2DXkFZ0hto79KgyIg+pK/qsUIMg2cQDDYqkWHkVON/y4SBfEerYbK/iGEU u3R2dnNdHf60NbdUEfgNW0N/WT5u3e0rs9vpaLVvEvj79PSlcjdGfW8qhJR7+Y1oIJiG MSBA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[106.184.3.205]) by smtp.gmail.com with ESMTPSA id l186sm3613987pgd.42.2017.05.23.17.03.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 May 2017 17:03:32 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Mathieu Poirier , Rob Herring , Mark Rutland , Liviu Dudau , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Greg Kroah-Hartman , Suzuki K Poulose , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Stephen Boyd , Mike Leach Cc: Leo Yan Subject: [PATCH v12 3/9] doc: Add coresight_cpu_debug.enable to kernel-parameters.txt Date: Wed, 24 May 2017 08:02:51 +0800 Message-Id: <1495584177-32193-4-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495584177-32193-1-git-send-email-leo.yan@linaro.org> References: <1495584177-32193-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add coresight_cpu_debug.enable to kernel-parameters.txt, this flag is used to enable/disable the CPU sampling based debugging. Reviewed-by: Mathieu Poirier Signed-off-by: Leo Yan --- Documentation/admin-guide/kernel-parameters.txt | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/Documentation/admin-guide/kernel-parameters.txt b/Documentation/admin-guide/kernel-parameters.txt index 15f79c2..ff67ad7 100644 --- a/Documentation/admin-guide/kernel-parameters.txt +++ b/Documentation/admin-guide/kernel-parameters.txt @@ -649,6 +649,13 @@ /proc//coredump_filter. See also Documentation/filesystems/proc.txt. + coresight_cpu_debug.enable + [ARM,ARM64] + Format: + Enable/disable the CPU sampling based debugging. + 0: default value, disable debugging + 1: enable debugging at boot time + cpuidle.off=1 [CPU_IDLE] disable the cpuidle sub-system From patchwork Wed May 24 00:02:52 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 100398 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp34694qge; Tue, 23 May 2017 17:04:10 -0700 (PDT) X-Received: by 10.84.128.33 with SMTP id 30mr38904066pla.111.1495584250698; Tue, 23 May 2017 17:04:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495584250; cv=none; d=google.com; s=arc-20160816; b=S7c8BoVO3XDoua/0iPYQEdtHWxVmo/Xu5GAxGs3qPAU9LBKdB/tkDjoG7JBtkjE/bt g7eaM8ICG8qka1FvqHq6Pkx20CTn6K8z1AkefXXhgHOFnS1Q2dsgnv07moB1XjwO15aW kehe9XP222Nky+pq2hYCUHqqZQO9jXUWtRf4ZdH0JhCF16fbDsKHQvK6lKJC7CtQJAwu ZFopeOfddD6vc6e3SwHMheGjK65CYA+xzF8vxIyVF0mPf0AGdDO1SHy1iOSw6gbI4tzf o1UektC4JpNXzVkSdclLhCHAgQn/5pMFlPLfIdt/McCjaAaYHr87sB9YGYvdG9W29BCh 1qlQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=dg1l49jRnCASEGkINvPDNhz1HP3Ek9apIPXUXKSmRVk=; b=JOKnPUUGPlRNWDkCVH4/zQXdlQyNvxBAvOispnFBy50Lx+sVwnn3DX+usQn8ULjeLi 04qDBwO9TF1gvc3/zxB2IR30CwhM5jVo68Ot+fbFCC2DtQHk8S28Jh437ieKM/F4+k+h g5XgZkyk8K/AHdyim/sMK0oKsk/F/5/Yeiqall8HDTOrmrZBN5ZT1el9SXJABEvW3nHs CfLuE1PcXMX4Xd/MpoDxGe3jczOhCndai3pRCi6fE3Mmgyat4vsGQHaHmCayNGLK61V5 lwS8iYR4uI1/9VyDQtoSyfIi1+ytKD27JUxPnx6DNzJJlia4HseICNjuVR5SaPLignD0 11wQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[106.184.3.205]) by smtp.gmail.com with ESMTPSA id l186sm3613987pgd.42.2017.05.23.17.03.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 May 2017 17:03:40 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Mathieu Poirier , Rob Herring , Mark Rutland , Liviu Dudau , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Greg Kroah-Hartman , Suzuki K Poulose , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Stephen Boyd , Mike Leach Cc: Leo Yan Subject: [PATCH v12 4/9] MAINTAINERS: update file entries for Coresight subsystem Date: Wed, 24 May 2017 08:02:52 +0800 Message-Id: <1495584177-32193-5-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495584177-32193-1-git-send-email-leo.yan@linaro.org> References: <1495584177-32193-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Update document file entries for Coresight debug module. Reviewed-by: Mathieu Poirier Signed-off-by: Leo Yan --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) -- 2.7.4 diff --git a/MAINTAINERS b/MAINTAINERS index 9e98464..8623d95 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1207,7 +1207,9 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: drivers/hwtracing/coresight/* F: Documentation/trace/coresight.txt +F: Documentation/trace/coresight-cpu-debug.txt F: Documentation/devicetree/bindings/arm/coresight.txt +F: Documentation/devicetree/bindings/arm/coresight-cpu-debug.txt F: Documentation/ABI/testing/sysfs-bus-coresight-devices-* F: tools/perf/arch/arm/util/pmu.c F: tools/perf/arch/arm/util/auxtrace.c From patchwork Wed May 24 00:02:57 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Leo Yan X-Patchwork-Id: 100403 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp35179qge; Tue, 23 May 2017 17:05:45 -0700 (PDT) X-Received: by 10.98.193.129 with SMTP id i123mr35060090pfg.203.1495584344938; Tue, 23 May 2017 17:05:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495584344; cv=none; d=google.com; s=arc-20160816; b=q78pvomDdBKZ1bowKnyM1eSjw3Rpr5ZuCJdhguPmg9QnBr2i4AnNBRj26E8eWNA7PX xiAzi3tRAWEPD7NMP5zWlCR1J1tuBCXhqAZRa7muWn0i5qkKrKnxSVzPmtN60qWBJgRg 1jbqaJyVDP2SUgBQy+fJwhBHtqHTp1BYNtyLIf34bAqdJD5ZbSaHbWv62GWKk327dFOB rrMFrDLHRpjnhOI/JobAaloL1G6z2o0RHqu7xKJSHhmi1g8cEu+rdatRd45rmMBVyLln a0SJ/hz2wctY+VE8UfyWqmDjOpTqrWKK6vZlUNjiPX2KRHOfgFu7Td5+mLdvA55cwG9t wsVQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature:arc-authentication-results; bh=DemMGGjxKfOqfxebChWlMk7hNpbDSwyKC66qO5OpUcw=; b=Zvh5JqZSbqP1DfN37ypTwvWs+GB6U3iq4TtwCKGeuR+afAY+Id/LfMm0uKQRbVphS+ fnX85A3r+3vZA9aPKWSotb2OAvEOx1kDujHogHb05mP55HtWKVnDxRejaY1jN1hl4bpS zTneOmpq11JSFsvuSVhN6IjVegRJWbXGsnpPCCXT9QszyT4NLA04qZsrgkr8yYH1vjMM nUelpGOclkqj4zvr9ujl4N/yZ7twsnT74J0BvB4n3wNfTJKJJ7iqpOCww02vPRuFKHFP 69/IQGXZvmkttHBCRXVc7clex5g9y6A5OqGXjT6cC6B3tysyXmzdAqP3k9Coi4Wgwq5D BWiA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[106.184.3.205]) by smtp.gmail.com with ESMTPSA id l186sm3613987pgd.42.2017.05.23.17.04.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 23 May 2017 17:04:14 -0700 (PDT) From: Leo Yan To: Jonathan Corbet , Mathieu Poirier , Rob Herring , Mark Rutland , Liviu Dudau , Wei Xu , Catalin Marinas , Will Deacon , Andy Gross , David Brown , Greg Kroah-Hartman , Suzuki K Poulose , linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org, linux-soc@vger.kernel.org, Stephen Boyd , Mike Leach Cc: Leo Yan Subject: [PATCH v12 9/9] arm64: dts: qcom: msm8916: Add debug unit Date: Wed, 24 May 2017 08:02:57 +0800 Message-Id: <1495584177-32193-10-git-send-email-leo.yan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1495584177-32193-1-git-send-email-leo.yan@linaro.org> References: <1495584177-32193-1-git-send-email-leo.yan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add debug unit on Qualcomm msm8916 based platforms, including the DragonBoard 410c board. Reviewed-by: Mathieu Poirier Signed-off-by: Leo Yan --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 32 ++++++++++++++++++++++++++++++++ 1 file changed, 32 insertions(+) -- 2.7.4 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index ab30939..17691ab 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -1116,6 +1116,38 @@ }; }; + debug@850000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x850000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU0>; + }; + + debug@852000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x852000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU1>; + }; + + debug@854000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x854000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU2>; + }; + + debug@856000 { + compatible = "arm,coresight-cpu-debug","arm,primecell"; + reg = <0x856000 0x1000>; + clocks = <&rpmcc RPM_QDSS_CLK>; + clock-names = "apb_pclk"; + cpu = <&CPU3>; + }; + etm@85c000 { compatible = "arm,coresight-etm4x", "arm,primecell"; reg = <0x85c000 0x1000>;