From patchwork Wed Oct 17 07:40:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149028 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp327450lji; Wed, 17 Oct 2018 00:42:18 -0700 (PDT) X-Google-Smtp-Source: ACcGV61xoYU79Zssq1W1cPtLUmPqXv3zoZ5zAYL8Ezf3OMBwaGJsnFxYfNiUsxvq3xTCCUSTAK97 X-Received: by 2002:a62:1c06:: with SMTP id c6-v6mr25787290pfc.41.1539762138055; Wed, 17 Oct 2018 00:42:18 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762138; cv=none; d=google.com; s=arc-20160816; b=jiBajLNNdmg2sbho0hfshvs+Klb7cX+A3C7+M7zl1Wii/ZG8y8ljoQgtL5XwUaQ/Cn /hrpUpb03WUBdz5DeJqOLhASY+/fjMk5/s/o+TBNQiA6BuSYe+3T6yQMP8TpJbc6GWB4 UbVkGPjDqgcJ+Hx+bErIsJAK1cw538/ttFSmTvcxJwvk67MLNrQJ64kxbSorNP5AiZvK UDoG9Mj5AuBIiaVHep9M/HMkrZTCcQMq5x4Wq0H1x/k9D3U/KtiU9mTHrFNYJI5i2rHx uz98lgm0+vGanDZJNbVR3lPn5uwZH8jqvaek5irUh5CEB8OUOl46XjCM9RGbQoiSRC+9 9bMQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=iBGFjwERlyNXfssV0mhi5P70SxiWNRCvnKhKGvOqAU0=; b=xXHl/QOIFpfzyaJ2G0j+95WQwuB48ngCgsaLy48c7qzWNUQ8BzDImqBfzhYxhvDQ5U fH4V9jUjFlVuTYqC4O+O8CXBNWP0jihljzlK2GsM9hmdVG+LXuvNDLi+fSMCIG9rvrrL AoootVwp9T+GqRvvsodoU80FBqpkbBAqfrQkQPoRDpPCi5AAXyCCSSV5q0EHeaA3e660 6AUcSPMTKHmPjk7DfHrqW0ZSuPFnTYf+fcJSaOaWQGy9KxyYuwsj1DOOWEl4+7dRPNGU 3MRWZE9x42wWfzBoF6YjiYxTHt9a4YHhOAj7Uh8XsmelFTkEwY/TWF+OySsK/rk3tiNZ 5zVw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NIvZnE9a; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id p74-v6si17315001pfa.44.2018.10.17.00.42.17; Wed, 17 Oct 2018 00:42:18 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NIvZnE9a; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727255AbeJQPgi (ORCPT + 32 others); Wed, 17 Oct 2018 11:36:38 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:42020 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726691AbeJQPgh (ORCPT ); Wed, 17 Oct 2018 11:36:37 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7fnRF017475; Wed, 17 Oct 2018 02:41:49 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762109; bh=iBGFjwERlyNXfssV0mhi5P70SxiWNRCvnKhKGvOqAU0=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NIvZnE9aMkh7L1B+lLbGLBrVR9vrYuwYQ1ojDRdjiBAc4L9C3hS0GPMMy53oa584A pqoOocyyvRMlPKY0g9QlrfAn1LsTjrklyIE/Nx35WpO2S8pFYM3OWz0GC1co9BCSDL d7EMzF4TPaXYXs2FV/7ohtlsE1WhiLyp6hB5Vw8E= Received: from DFLE106.ent.ti.com (dfle106.ent.ti.com [10.64.6.27]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fnRn007676; Wed, 17 Oct 2018 02:41:49 -0500 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE106.ent.ti.com (10.64.6.27) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:41:49 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:41:49 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSM009413; Wed, 17 Oct 2018 02:41:46 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 01/21] PCI: keystone: Use quirk to limit MRRS for K2G Date: Wed, 17 Oct 2018 13:10:54 +0530 Message-ID: <20181017074114.28239-2-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org PCI controller in K2G also has a limitation that memory read request size (MRRS) must not exceed 256 bytes. Use the quirk to limit MRRS (added for K2HK, K2L and K2E) for K2G as well. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index e88bd221fffe..7d43e10a03b0 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -36,6 +36,7 @@ #define PCIE_RC_K2HK 0xb008 #define PCIE_RC_K2E 0xb009 #define PCIE_RC_K2L 0xb00a +#define PCIE_RC_K2G 0xb00b #define to_keystone_pcie(x) dev_get_drvdata((x)->dev) @@ -50,6 +51,8 @@ static void quirk_limit_mrrs(struct pci_dev *dev) .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, }, { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2L), .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, }, + { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2G), + .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, }, { 0, }, }; From patchwork Wed Oct 17 07:40:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149046 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp329051lji; Wed, 17 Oct 2018 00:44:14 -0700 (PDT) X-Google-Smtp-Source: ACcGV61pMbUkuGmYOMi2DxmyZcVe3GY0f+BcsguiCoUElToPSrCLD0nm6zyeU7+fwEtdw1A4m/gI X-Received: by 2002:a63:525c:: with SMTP id s28-v6mr23152170pgl.78.1539762254003; Wed, 17 Oct 2018 00:44:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762253; cv=none; d=google.com; s=arc-20160816; b=FFC9C1HJkRDcLHiYYVMLO59gBbzwCd3e0TxXVn2UpuFzQbNKFnIEILfgbvnSvjufv2 D09RhrGCKVM2K+OcIFK3P2Sw/le6yF6onz4eHCDQDDfz8vPLUyMoFEwtEYrH+Sy3FbQ8 2k/QuRmLBZGt8Rx0o71EpZOW9RrGz1hguRIE5XZsu9IbiJvYoIIizqc5dmz0VvWHCSjk FMPLS09SI3Kg5Eoxj+M8aLWV5A6c8+bLT5D/7SfkNgwBY2sSQbsgLTbMsuWu7G7lyl6l Nvf4eC50ZHnGRZixz30oV8mc2mt5SjTvgb1DbBiRZlgSabbWhy+WmhJbsh8TgNyQ+y3Q 2oRw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=CywUeyvOfH1tI2pu+soQCfVILjgvnQbtM9JU52QtGcs=; b=r/UEmpsJ4DiwF14VNZ52yp8W4SpiTEhiLXuqiIWe2pk1c/W0BXaGoZaSUUNUHKKTrz H8RUsJz/zdTfsHQ35z5v9ml8Xn1NO0i7mTl2bk3elu7UMCAD6PZxfthNk9FV25e35IQ+ OTi/kUx08Zmk08K+O114aJsxt3aTFvgIrMbDbKqbvEjpUnZqniJa/07+ecr15yhPMqQk l9xBGySoQS93vacEVeTC3LzG9mNqChzOCjHs9dkpnbhzZB0p3yv8ZrHb/U/ig+Kv1Pg+ S1C9dyHqvKVoxKkG8epW3MNjKUPdIQLLb4Dudet6pEUnu28AlJLjCgHMvCvRgUJJzNA/ kupg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hzehwcI3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id r28-v6si16587078pgk.263.2018.10.17.00.44.13; Wed, 17 Oct 2018 00:44:13 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=hzehwcI3; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727808AbeJQPif (ORCPT + 32 others); Wed, 17 Oct 2018 11:38:35 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:42516 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727023AbeJQPie (ORCPT ); Wed, 17 Oct 2018 11:38:34 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7fqQt017481; Wed, 17 Oct 2018 02:41:52 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762112; bh=CywUeyvOfH1tI2pu+soQCfVILjgvnQbtM9JU52QtGcs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=hzehwcI363/UzswH605VR/6vK5/In7YhbcSUM4s1dTxj+WxbuSY1zXI+5MonU4NdL 4TnfRUT63iibKz5JXKDIq8w/NAt7eb/Qmag+MYwQqZg1Z6l3z3bAgbXLFo1gW2sdKf WugEL9pGoG/g3F4hH49dC/m+KIbNEfTPjPSFKv5Q= Received: from DFLE104.ent.ti.com (dfle104.ent.ti.com [10.64.6.25]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fqD4023179; Wed, 17 Oct 2018 02:41:52 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE104.ent.ti.com (10.64.6.25) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:41:52 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:41:52 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSN009413; Wed, 17 Oct 2018 02:41:49 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 02/21] PCI: keystone: Use quirk to set MRRS for PCI host bridge Date: Wed, 17 Oct 2018 13:10:55 +0530 Message-ID: <20181017074114.28239-3-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Reuse the already existing quirk to set MRRS for PCI host bridge instead of explicitly setting MRRS in ks_pcie_host_init. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 37 +++++++++-------------- 1 file changed, 15 insertions(+), 22 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 7d43e10a03b0..5d9c5d199ada 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -43,7 +43,7 @@ static void quirk_limit_mrrs(struct pci_dev *dev) { struct pci_bus *bus = dev->bus; - struct pci_dev *bridge = bus->self; + struct pci_dev *bridge; static const struct pci_device_id rc_pci_devids[] = { { PCI_DEVICE(PCI_VENDOR_ID_TI, PCIE_RC_K2HK), .class = PCI_CLASS_BRIDGE_PCI << 8, .class_mask = ~0, }, @@ -57,7 +57,7 @@ static void quirk_limit_mrrs(struct pci_dev *dev) }; if (pci_is_root_bus(bus)) - return; + bridge = dev; /* look for the host bridge */ while (!pci_is_root_bus(bus)) { @@ -65,18 +65,19 @@ static void quirk_limit_mrrs(struct pci_dev *dev) bus = bus->parent; } - if (bridge) { - /* - * Keystone PCI controller has a h/w limitation of - * 256 bytes maximum read request size. It can't handle - * anything higher than this. So force this limit on - * all downstream devices. - */ - if (pci_match_id(rc_pci_devids, bridge)) { - if (pcie_get_readrq(dev) > 256) { - dev_info(&dev->dev, "limiting MRRS to 256\n"); - pcie_set_readrq(dev, 256); - } + if (!bridge) + return; + + /* + * Keystone PCI controller has a h/w limitation of + * 256 bytes maximum read request size. It can't handle + * anything higher than this. So force this limit on + * all downstream devices. + */ + if (pci_match_id(rc_pci_devids, bridge)) { + if (pcie_get_readrq(dev) > 256) { + dev_info(&dev->dev, "limiting MRRS to 256\n"); + pcie_set_readrq(dev, 256); } } } @@ -264,7 +265,6 @@ static int __init ks_pcie_host_init(struct pcie_port *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); - u32 val; ks_pcie_establish_link(ks_pcie); ks_dw_pcie_setup_rc_app_regs(ks_pcie); @@ -275,13 +275,6 @@ static int __init ks_pcie_host_init(struct pcie_port *pp) /* update the Vendor ID */ writew(ks_pcie->device_id, pci->dbi_base + PCI_DEVICE_ID); - /* update the DEV_STAT_CTRL to publish right mrrs */ - val = readl(pci->dbi_base + PCIE_CAP_BASE + PCI_EXP_DEVCTL); - val &= ~PCI_EXP_DEVCTL_READRQ; - /* set the mrrs to 256 bytes */ - val |= BIT(12); - writel(val, pci->dbi_base + PCIE_CAP_BASE + PCI_EXP_DEVCTL); - /* * PCIe access errors that result into OCP errors are caught by ARM as * "External aborts" From patchwork Wed Oct 17 07:40:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149047 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp329164lji; Wed, 17 Oct 2018 00:44:22 -0700 (PDT) X-Google-Smtp-Source: ACcGV63osKLKvp4VLiakhRrpPTuVbWqfs5EqGHMFVW63NH0YcRTY/ODA480myvv8kX0HSrIZ8MHi X-Received: by 2002:a63:2f42:: with SMTP id v63-v6mr9315184pgv.202.1539762262838; Wed, 17 Oct 2018 00:44:22 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762262; cv=none; d=google.com; s=arc-20160816; b=nDGvb5ll+mx/l+yjihmDNRembogoUXYOtS9tB2cYmbPJ7lWVNJ8nmLRJse6YFUEVD9 2m5vMTwkpReB/u7po3vJy+dESsyTSqQv8TiD55Qsz3LXTwqC0F91sI3OA/WtPJTvrnoi 8zpPZQGleplbQiWDgTuE2GyPvKVGAENWxpsgLGNrHbJtpAh4xgEuy7VFJBAM2hEemeiS oNAOLJfiaHjMRt38uIvDWeistpGTUN3MUS5cmLbxpPoajK4CtEB0skmK+H7R4Yf9Qfj7 xELzcftM0NdZ/0hbNW9LSpEi8Olzot5ACH448YM8jicY4QiCmZAgeKsOVl81HuJDTIBP Lz1w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=gQ0+pQEKb3K+sriSc3X3V9ettXr93wDRpE/j2uyHhZs=; b=wPSsX4b/fdpht2lGm5LGMQ30BiUKpaxtArqHY376CSJc3FqvinYwCzJOGvtfsaqrQu LscOoC5+5w7S865JO+hC4ztTfzUjf0DeJKdNOTTrzFFat8M9r2Z2ho5tQksZ8LdYjNhR 7Ovdv6H1yPJ/2ZoACR/HQXXpQhmpZc8NVUG/hOGT4l/kWtPeHR6GfJUCBSRHAzDzaOv0 wo1RBhvCjNSUbt45e1HoqAxl/E2IMvx1dSEbERWZ+yxUBuaG5OsDNHuSHRkqYvC5bCcH KH5EY0u449ortoUQMQcSvigxfxrgJPiNQIIKsJ2LYu3NEwJD0T+sRdoFJZGF0y+ZFmG9 DhqQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=W5l11px8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f1-v6si11764809plt.48.2018.10.17.00.44.22; Wed, 17 Oct 2018 00:44:22 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=W5l11px8; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727333AbeJQPgr (ORCPT + 32 others); Wed, 17 Oct 2018 11:36:47 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:52482 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726691AbeJQPgq (ORCPT ); Wed, 17 Oct 2018 11:36:46 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7fuX6052240; Wed, 17 Oct 2018 02:41:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762116; bh=gQ0+pQEKb3K+sriSc3X3V9ettXr93wDRpE/j2uyHhZs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=W5l11px83QevDRGzJJ9cKAV8A5hphaVtfXnSqxhXSZgoPtVPpuYW8obDuN70tMiXT S411GXNU335RX1Bxot5NkNN9+NRmY4MNWKGe1VeOWvBsYgcEqz9RwmzRh4fUlXN66I /Zp16M7V4rfRj494m5DhmqJrxaKkCGja/2ymUg+Y= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fupO023254; Wed, 17 Oct 2018 02:41:56 -0500 Received: from DLEE115.ent.ti.com (157.170.170.26) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:41:56 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:41:56 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSO009413; Wed, 17 Oct 2018 02:41:53 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 03/21] PCI: keystone: Move dw_pcie_setup_rc out of ks_pcie_establish_link() Date: Wed, 17 Oct 2018 13:10:56 +0530 Message-ID: <20181017074114.28239-4-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org No functional change. Move dw_pcie_setup_rc out of ks_pcie_establish_link() so that ks_pcie_establish_link can be used only to start the link. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 5d9c5d199ada..afb948372077 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -86,12 +86,9 @@ DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, quirk_limit_mrrs); static int ks_pcie_establish_link(struct keystone_pcie *ks_pcie) { struct dw_pcie *pci = ks_pcie->pci; - struct pcie_port *pp = &pci->pp; struct device *dev = pci->dev; unsigned int retries; - dw_pcie_setup_rc(pp); - if (dw_pcie_link_up(pci)) { dev_info(dev, "Link already up\n"); return 0; @@ -266,6 +263,8 @@ static int __init ks_pcie_host_init(struct pcie_port *pp) struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); + dw_pcie_setup_rc(pp); + ks_pcie_establish_link(ks_pcie); ks_dw_pcie_setup_rc_app_regs(ks_pcie); ks_pcie_setup_interrupts(ks_pcie); From patchwork Wed Oct 17 07:41:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149030 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp327572lji; Wed, 17 Oct 2018 00:42:26 -0700 (PDT) X-Google-Smtp-Source: ACcGV62ERtU40ZPZ1m+77THlcDvRUYMMHmsQk/VyN/JdC/JRpnp/JZkYv7CVHR4dGbNOa1AqZkM1 X-Received: by 2002:a17:902:6bc1:: with SMTP id m1-v6mr522937plt.274.1539762146523; Wed, 17 Oct 2018 00:42:26 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762146; cv=none; d=google.com; s=arc-20160816; b=BuYczashecqERX9en+LsPwKGwDVOkAWmux2qEvc/N4iEJ5odYZpt2M0UfWhYQa9lO2 aahY2yxMBYjK3zAyHShHeLOe5xKwWD43AeO4nmGt/94B9J3jTa7aYJ/YO/GMPN0x+Fho DzH4B0Y8rA11KxIdJbXgnrB2JTOu5SmZw/hzZ28w1Zwe+FOeQAQlj/LfmP33hVovziNl DbyJq+fkOiAVila6w6Lo6rd9bXN1s0kR7D4WkWboZHvU4GBSD3XDLEl7ZtdH71j2iDH/ 7WsHo+smPo/ffb8fRej2jOFIJcGVsDfIovKLDCATkP4J4ieaLD0jbxCv7QUhS6pEhAQv IXpg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=A3B7m156w4JW4GKL6NESpqJCfKj0ubYIPGRpxQW6oQM=; b=TlPf0CpsH5KYDYBfBIuKu3gIWi+PSooVuPEqtjbIPy82p8h39VXuj4OxGvXWFD6VUD sL0aeRcjGr7HGX2kIiHyvPwFKPW/rRrhp9mM7ffbRgOL4KusgkCz9ujVvJx0y5AkO184 /HxzxkALSuFPioGym+MydQY4lFjFjuCjlGhis6ZzQmxfvOCMbVnQ6EXqi2Z8LsIjmb/8 FQwHY5JozuhhoNs8WeNYHg2FIuYFwZS0FVpV90tMQsAqZSqGllUDHTPhIbzZHHySXJ2S jtFgsOFa5oA3EBX+hTsi2glXNZgiM01sv3CgjZnOExOSLYCG7ETi/su+I3O48j5jx2qj EzmQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=fRN6aj7z; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id z14-v6si16260504pgk.172.2018.10.17.00.42.26; Wed, 17 Oct 2018 00:42:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=fRN6aj7z; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727365AbeJQPgr (ORCPT + 32 others); Wed, 17 Oct 2018 11:36:47 -0400 Received: from lelv0143.ext.ti.com ([198.47.23.248]:42066 "EHLO lelv0143.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727000AbeJQPgq (ORCPT ); Wed, 17 Oct 2018 11:36:46 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7gBd9017540; Wed, 17 Oct 2018 02:42:11 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762131; bh=A3B7m156w4JW4GKL6NESpqJCfKj0ubYIPGRpxQW6oQM=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=fRN6aj7zZSvWPs0x13xufuxfIDxVG79B6xt0Ip54U+xiZVtXdF2AFg8oJ0JKQdR0e Uawxe0GUlGPgITPOttgqFRA3sVsRxNkn5FzC3X27mdIN1rjLEdcjMKdih1sBxqLsRv /Tkvv8sqgXuzOyQuk1CK9CkloBrdBAlFr/2X4Uco= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7gAOu008761; Wed, 17 Oct 2018 02:42:10 -0500 Received: from DLEE113.ent.ti.com (157.170.170.24) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:09 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:10 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSS009413; Wed, 17 Oct 2018 02:42:06 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 07/21] PCI: keystone: Remove redundant platform_set_drvdata Date: Wed, 17 Oct 2018 13:11:00 +0530 Message-ID: <20181017074114.28239-8-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org No functional change. Remove redundant platform_set_drvdata invocation in ks_pcie_probe(). Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 2 -- 1 file changed, 2 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 337464d15775..926e345dc965 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -912,8 +912,6 @@ static int __init ks_pcie_probe(struct platform_device *pdev) if (ret) return ret; - platform_set_drvdata(pdev, ks_pcie); - ret = ks_add_pcie_port(ks_pcie, pdev); if (ret < 0) goto fail_clk; From patchwork Wed Oct 17 07:41:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149033 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp327726lji; Wed, 17 Oct 2018 00:42:37 -0700 (PDT) X-Google-Smtp-Source: ACcGV60LxKMY6yc4cOC6bZxfda0p/YBN1zPfI1WzWLjsfMu1eyul5d8RgRqwumz9yEXQqCXVELj+ X-Received: by 2002:a63:e04d:: with SMTP id n13-v6mr4203656pgj.426.1539762157036; Wed, 17 Oct 2018 00:42:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762157; cv=none; d=google.com; s=arc-20160816; b=qeWarNfmiog2dFDvWgE3QO9OPfOcwuOir4x7kmxDy7OQ4RPJAach0FZ+WBr2MegyXw 7cqm49W1MrJzEnJSZdn6Iw5Q8Wk+BSd4x8s8Z5V2tPyprtyxzvK5ohisbUYieeP6KeD2 cgciEZ67BkXRi1Bka0zhT5cXEqH7YPB9G11yW9LXXj286e+HynpZBdzJBdcBtu5RSBJp V/jsWjke3tpvQhUTFLqeboac3GT//VGvScjZ5HKMCsDEdRy/p1YU1vwVURpczzS753L5 fFgURs8rjgsEM9qfrN4WK96TyGamnNwaoT5DFLsM2aMc/hXRHY35poCT854eKcsFYfUk 3IoQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=hvMErms+/pW+1UODvlUUCuMob52BkkjvBKC5FXuScEs=; b=ORFUW1j2eFXFlws+woGSwzPA9l7Ug7MF6jlKknh+nMN9D/k6znv4br6ZbenpYPPnRF kv7xUbegqEU6nU5a/ZShGMGEhzI+JcjvttxTUnU4CDIdNxBgkGfFdUCqN3B74VMdojbT dPoS2SUGHTAmZgNc7MBt0zQQt+wCFqQLzjaIDoQzo0Z5HIYrV2W9s7jp+1P9alu5k0uH 2+4X27jpXZ98WVVpT95sB8aw+y8j8g6sOU5AFpEYn/QtyxguxCDhjRdlQGwzjVLYsocw rLSgFaXQ76Til+JaUWNkur4hdwD4a+U30Xh36BtUTMWm1q3xu98ijo1yCHi862oIgKP1 SJFg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=mkWwU2Q1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id t187-v6si17194585pfd.148.2018.10.17.00.42.36; Wed, 17 Oct 2018 00:42:37 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=mkWwU2Q1; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727463AbeJQPg5 (ORCPT + 32 others); Wed, 17 Oct 2018 11:36:57 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:60400 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727000AbeJQPg4 (ORCPT ); Wed, 17 Oct 2018 11:36:56 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7gGQd053505; Wed, 17 Oct 2018 02:42:16 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762136; bh=hvMErms+/pW+1UODvlUUCuMob52BkkjvBKC5FXuScEs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mkWwU2Q1qOVzd/9Cny0x/RIvvcJ1enMqw52OU8QDD6Ybpk5WEamRtFXK3BP2E7NEG 9T1jPfA0fpOqvcOMCnrgpVoIhOX65jo2dGO/AyOselVspabyQGPP1s5CRRnFfUNyn6 NaRCLC8MBz49plqgNAK9LdzOWjUT+FYxJSvwSQCc= Received: from DLEE100.ent.ti.com (dlee100.ent.ti.com [157.170.170.30]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7gGQf024476; Wed, 17 Oct 2018 02:42:16 -0500 Received: from DLEE106.ent.ti.com (157.170.170.36) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:16 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE106.ent.ti.com (157.170.170.36) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:16 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSU009413; Wed, 17 Oct 2018 02:42:13 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 09/21] dt-bindings: PCI: keystone: Add bindings to get device control module Date: Wed, 17 Oct 2018 13:11:02 +0530 Message-ID: <20181017074114.28239-10-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Add bindings to get device control module which has the device id and vendor id to be configured in the keystone PCIe controller. Signed-off-by: Kishon Vijay Abraham I Reviewed-by: Rob Herring --- Documentation/devicetree/bindings/pci/pci-keystone.txt | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/pci/pci-keystone.txt b/Documentation/devicetree/bindings/pci/pci-keystone.txt index 4dd17de549a7..2030ee0dc4f9 100644 --- a/Documentation/devicetree/bindings/pci/pci-keystone.txt +++ b/Documentation/devicetree/bindings/pci/pci-keystone.txt @@ -19,6 +19,9 @@ pcie_msi_intc : Interrupt controller device node for MSI IRQ chip interrupt-cells: should be set to 1 interrupts: GIC interrupt lines connected to PCI MSI interrupt lines +ti,syscon-pcie-id : phandle to the device control module required to set device + id and vendor id. + Example: pcie_msi_intc: msi-interrupt-controller { interrupt-controller; From patchwork Wed Oct 17 07:41:03 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149034 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp327773lji; Wed, 17 Oct 2018 00:42:41 -0700 (PDT) X-Google-Smtp-Source: ACcGV604DpvfCt7eMwdE0JJ15QSIFzN8K3G3FnIojLvHiuIsNW1JSoqrLiDszyMNlEMz38g3JdCb X-Received: by 2002:a63:fd58:: with SMTP id m24-v6mr23892753pgj.132.1539762161320; Wed, 17 Oct 2018 00:42:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762161; cv=none; d=google.com; s=arc-20160816; b=lk8L0ZR1KfZQ27sZCCMr38OlX8q9ou/q8wx5jjwZhbYTWhDce1LBarJJ3opQOmfQnb o9UmQmtky1sGAm2cqp4hws8E7ArANA20yKDacuzql+cV4ZqcDcSosHcW1Z0ymqx932d2 cpTbltc2il+SGws/qAG5zKAdNC+hp/ciwnpbdijdimIAS+7gchJuEEkOwP2svNcB76Gr iXtohIyEOy/2oeMhlsw6jL62nJ3P5qcfOklB0Wa6GgeNESORiCXuY1LHvLN+Enpoidp5 IhvTo8iT7mcIw79svWuE/eAHEZq7BdYaLxDf/VC//5veAwVoGpy/Q5DFlkQBf2rzOp9s WX+g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=I+8oB3slUMP8h64wG5S3UqrQQp1pEImCeexOuq//BTs=; b=jgdwuJgG1OccyOdMJAcKPxNS1ELPyDHEnSV0mkvVgny/u1xmLush/2nyOy85y20FYs dZT+jUFs+Lo1u+0MCxO8szBCbgoXIM5czyTs5A7nXTbRnwXUtFVYTjMejtl1AMDWcRD8 sX5E9lYJro12GGZmW7iPIwU8em5u8MPH3RfCLbSh7bI0JF/AfaQXvOoM8U/yI71wnuOr TVrNLXo6q6cCngEs8bmgKwEoA1KjmL1TzGAtROAb6qAJK0gHsmHNrv2yPfC00U+cV7Xc 7Ip7W+3POYDbBmFR6QrCxwv6sizJO2BAEYvE5zT9TbBUJHDBspofpCWoOGdyJHQM4B5w ax6g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OBHCxJvx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id c14-v6si16796943pgm.556.2018.10.17.00.42.41; Wed, 17 Oct 2018 00:42:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=OBHCxJvx; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727493AbeJQPhB (ORCPT + 32 others); Wed, 17 Oct 2018 11:37:01 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:56520 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727435AbeJQPhB (ORCPT ); Wed, 17 Oct 2018 11:37:01 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7gKHF022931; Wed, 17 Oct 2018 02:42:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762140; bh=I+8oB3slUMP8h64wG5S3UqrQQp1pEImCeexOuq//BTs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=OBHCxJvxGbPQsUzweKOMWKfjjHbvfiG7NTSGJUsyt3K0mgOOysc/65gBM5Q/M/BWi Hn8u07wS6+ZyltSl15FDZb1/D50/8fQcBZcAxaeHllEA/WYMAVK3epWrUb0iRVqHee KtMl6sJAX9oJVOOf37cg8lFnv7T6ovKQ0lLo1D/8= Received: from DLEE115.ent.ti.com (dlee115.ent.ti.com [157.170.170.26]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7gKMG009200; Wed, 17 Oct 2018 02:42:20 -0500 Received: from DLEE111.ent.ti.com (157.170.170.22) by DLEE115.ent.ti.com (157.170.170.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:20 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE111.ent.ti.com (157.170.170.22) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:19 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSV009413; Wed, 17 Oct 2018 02:42:16 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 10/21] PCI: keystone: Use SYSCON APIs to get device ID from control module Date: Wed, 17 Oct 2018 13:11:03 +0530 Message-ID: <20181017074114.28239-11-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Control module registers should be read using syscon APIs. pci-keystone.c uses platform_get_resource to get control module registers. Fix it here by using syscon APIs to get device id from control module. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 45 ++++++++++++++++------- 1 file changed, 32 insertions(+), 13 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index e2045b5d2af2..e22328f89c84 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -15,12 +15,14 @@ #include #include #include +#include #include #include #include #include #include #include +#include #include #include @@ -28,6 +30,9 @@ #define DRIVER_NAME "keystone-pcie" +#define PCIE_VENDORID_MASK 0xffff +#define PCIE_DEVICEID_SHIFT 16 + /* DEV_STAT_CTRL */ #define PCIE_CAP_BASE 0x70 @@ -744,10 +749,34 @@ static int ks_pcie_fault(unsigned long addr, unsigned int fsr, return 0; } +static int __init ks_pcie_init_id(struct keystone_pcie *ks_pcie) +{ + int ret; + unsigned int id; + struct regmap *devctrl_regs; + struct dw_pcie *pci = ks_pcie->pci; + struct device *dev = pci->dev; + struct device_node *np = dev->of_node; + + devctrl_regs = syscon_regmap_lookup_by_phandle(np, "ti,syscon-pcie-id"); + if (IS_ERR(devctrl_regs)) + return PTR_ERR(devctrl_regs); + + ret = regmap_read(devctrl_regs, 0, &id); + if (ret) + return ret; + + dw_pcie_writew_dbi(pci, PCI_VENDOR_ID, id & PCIE_VENDORID_MASK); + dw_pcie_writew_dbi(pci, PCI_DEVICE_ID, id >> PCIE_DEVICEID_SHIFT); + + return 0; +} + static int __init ks_pcie_host_init(struct pcie_port *pp) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); + int ret; dw_pcie_setup_rc(pp); @@ -757,8 +786,9 @@ static int __init ks_pcie_host_init(struct pcie_port *pp) writew(PCI_IO_RANGE_TYPE_32 | (PCI_IO_RANGE_TYPE_32 << 8), pci->dbi_base + PCI_IO_BASE); - /* update the Vendor ID */ - writew(ks_pcie->device_id, pci->dbi_base + PCI_DEVICE_ID); + ret = ks_pcie_init_id(ks_pcie); + if (ret < 0) + return ret; /* * PCIe access errors that result into OCP errors are caught by ARM as @@ -864,8 +894,6 @@ static int __init ks_pcie_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct dw_pcie *pci; struct keystone_pcie *ks_pcie; - struct resource *res; - void __iomem *reg_p; struct phy *phy; int ret; @@ -893,15 +921,6 @@ static int __init ks_pcie_probe(struct platform_device *pdev) return ret; } - /* index 2 is to read PCI DEVICE_ID */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - reg_p = devm_ioremap_resource(dev, res); - if (IS_ERR(reg_p)) - return PTR_ERR(reg_p); - ks_pcie->device_id = readl(reg_p) >> 16; - devm_iounmap(dev, reg_p); - devm_release_mem_region(dev, res->start, resource_size(res)); - ks_pcie->np = dev->of_node; platform_set_drvdata(pdev, ks_pcie); ks_pcie->clk = devm_clk_get(dev, "pcie"); From patchwork Wed Oct 17 07:41:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149036 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp327831lji; Wed, 17 Oct 2018 00:42:45 -0700 (PDT) X-Google-Smtp-Source: ACcGV63UnUoMac49UWMhMF9/oWNI/7fhwNVVbsIZ0QKiA7LbMXOBfzwJDSJLr8vRD+1hd6CYN7ry X-Received: by 2002:a17:902:6689:: with SMTP id e9-v6mr792079plk.128.1539762165195; Wed, 17 Oct 2018 00:42:45 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762165; cv=none; d=google.com; s=arc-20160816; b=j/27l6NMHtWnSMyQ6PzAn00uxGmR/prqpsxUjDvicFWwp1UBjtzsNV7ZvgdjgU8Ihl G/m4lPAmIujoT2J++B0esAEcJ5ga17jkokgxxTDqjpk0xfGBqxF5jjGCVnGDLZtzwzNG VUhk9ILkcEkR5QIFWrhl/2YuRGmnzCZJ/STQOufWL9TJEmmXBREcdLEMKNsCS3fUMRET QMD8phjx+eDOODeZUEtXW/W7WmSj+2n4ZfN8lN3kvaK1UeZMsNyHWMoGl12HMgaTXleH r7RqaY28RZd1sKBMdzIEj7mwtMTXrcE9mqQZB8ITKzXsuTRp0sFeb+LUpDuB6BxmIP90 Bvyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=qLooC43o3Xah6sg19dYuQxiI+kMXmBiRqnnUEenMqWs=; b=c0lA7QS8CuCZDgrF07E26yFpbuJdFDnXQrWGhIeTE4GPHpo0LD1ptMwSisUpZbFeBQ juz4BIUTm4PqPZMzIGpnk7n7gkVsk/Uzv/OMyD1vUNB/EaF3NFjJfaAXoMUeogdykvfz ndYzXWkHWrSR0+486bXeQLWrjVXEQyXGQ4WDNxUsONaB/BuqilVTTpQ92gL6oqUEJG+M IK9aJtoUvLOpQ6a4Wk/JCYdWR+1ZFi2Z2EaURozEVUVebltvJNDmlTBXXPGb3JSVO8X2 eCNAZlY7hd6wxzy4yaeh2AaKamJJxH+aB1Vaibbe83apznFR7mCCsmmFtfZ7gQwNMVEF UmHQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=W1MU7Zra; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id v11-v6si17134329pgj.276.2018.10.17.00.42.44; Wed, 17 Oct 2018 00:42:45 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=W1MU7Zra; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727549AbeJQPhF (ORCPT + 32 others); Wed, 17 Oct 2018 11:37:05 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:52606 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727466AbeJQPhE (ORCPT ); Wed, 17 Oct 2018 11:37:04 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7gNit052378; Wed, 17 Oct 2018 02:42:23 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762143; bh=qLooC43o3Xah6sg19dYuQxiI+kMXmBiRqnnUEenMqWs=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=W1MU7ZraCdhLviemlrJ0vTn8XTzWVcToIOGEjddvO53L2OAfW6TYI97t0igrcMIsc Glgi6qIRFcEKdkikpuN4VKUVDzDUexNp+BG0viuwYVd+cxefSzyeWA1XQ5SHhlWuf0 8Uk7t9y6rYirnXhLn78gBdt769AN0n7B2EkIhb9E= Received: from DFLE102.ent.ti.com (dfle102.ent.ti.com [10.64.6.23]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7gNFD009303; Wed, 17 Oct 2018 02:42:23 -0500 Received: from DFLE110.ent.ti.com (10.64.6.31) by DFLE102.ent.ti.com (10.64.6.23) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:23 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE110.ent.ti.com (10.64.6.31) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:23 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSW009413; Wed, 17 Oct 2018 02:42:20 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 11/21] PCI: keystone: Cleanup PHY handling Date: Wed, 17 Oct 2018 13:11:04 +0530 Message-ID: <20181017074114.28239-12-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Cleanup PHY handling by using devm_phy_optional_get to get PHYs if the PHYs are optional, creating a device link between the PHY device and the controller device and disable PHY on error cases here. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 122 +++++++++++++++++++--- 1 file changed, 106 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index e22328f89c84..5ae73c185c99 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -105,6 +105,9 @@ struct keystone_pcie { int num_msi_host_irqs; int msi_host_irqs[MAX_MSI_HOST_IRQS]; + int num_lanes; + struct phy **phy; + struct device_link **link; struct device_node *msi_intc_np; struct irq_domain *legacy_irq_domain; struct device_node *np; @@ -880,22 +883,57 @@ static const struct dw_pcie_ops ks_pcie_dw_pcie_ops = { .link_up = ks_pcie_link_up, }; -static int __exit ks_pcie_remove(struct platform_device *pdev) +static void ks_pcie_disable_phy(struct keystone_pcie *ks_pcie) { - struct keystone_pcie *ks_pcie = platform_get_drvdata(pdev); + int num_lanes = ks_pcie->num_lanes; - clk_disable_unprepare(ks_pcie->clk); + while (num_lanes--) { + phy_power_off(ks_pcie->phy[num_lanes]); + phy_exit(ks_pcie->phy[num_lanes]); + } +} + +static int ks_pcie_enable_phy(struct keystone_pcie *ks_pcie) +{ + int i; + int ret; + int num_lanes = ks_pcie->num_lanes; + + for (i = 0; i < num_lanes; i++) { + ret = phy_init(ks_pcie->phy[i]); + if (ret < 0) + goto err_phy; + + ret = phy_power_on(ks_pcie->phy[i]); + if (ret < 0) { + phy_exit(ks_pcie->phy[i]); + goto err_phy; + } + } return 0; + +err_phy: + while (--i >= 0) { + phy_power_off(ks_pcie->phy[i]); + phy_exit(ks_pcie->phy[i]); + } + + return ret; } static int __init ks_pcie_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; struct dw_pcie *pci; struct keystone_pcie *ks_pcie; - struct phy *phy; + struct device_link **link; + struct phy **phy; + u32 num_lanes; + char name[10]; int ret; + int i; ks_pcie = devm_kzalloc(dev, sizeof(*ks_pcie), GFP_KERNEL); if (!ks_pcie) @@ -908,29 +946,59 @@ static int __init ks_pcie_probe(struct platform_device *pdev) pci->dev = dev; pci->ops = &ks_pcie_dw_pcie_ops; - ks_pcie->pci = pci; + ret = of_property_read_u32(np, "num-lanes", &num_lanes); + if (ret) + num_lanes = 1; - /* initialize SerDes Phy if present */ - phy = devm_phy_get(dev, "pcie-phy"); - if (PTR_ERR_OR_ZERO(phy) == -EPROBE_DEFER) - return PTR_ERR(phy); + phy = devm_kzalloc(dev, sizeof(*phy) * num_lanes, GFP_KERNEL); + if (!phy) + return -ENOMEM; - if (!IS_ERR_OR_NULL(phy)) { - ret = phy_init(phy); - if (ret < 0) - return ret; + link = devm_kzalloc(dev, sizeof(*link) * num_lanes, GFP_KERNEL); + if (!link) + return -ENOMEM; + + for (i = 0; i < num_lanes; i++) { + snprintf(name, sizeof(name), "pcie-phy%d", i); + phy[i] = devm_phy_optional_get(dev, name); + if (IS_ERR(phy[i])) { + ret = PTR_ERR(phy[i]); + goto err_link; + } + + if (!phy[i]) + continue; + + link[i] = device_link_add(dev, &phy[i]->dev, DL_FLAG_STATELESS); + if (!link[i]) { + ret = -EINVAL; + goto err_link; + } + } + + ks_pcie->np = np; + ks_pcie->pci = pci; + ks_pcie->link = link; + ks_pcie->num_lanes = num_lanes; + ks_pcie->phy = phy; + + ret = ks_pcie_enable_phy(ks_pcie); + if (ret) { + dev_err(dev, "failed to enable phy\n"); + goto err_link; } - ks_pcie->np = dev->of_node; platform_set_drvdata(pdev, ks_pcie); ks_pcie->clk = devm_clk_get(dev, "pcie"); if (IS_ERR(ks_pcie->clk)) { dev_err(dev, "Failed to get pcie rc clock\n"); - return PTR_ERR(ks_pcie->clk); + ret = PTR_ERR(ks_pcie->clk); + goto err_phy; } + ret = clk_prepare_enable(ks_pcie->clk); if (ret) - return ret; + goto err_phy; ret = ks_pcie_add_pcie_port(ks_pcie, pdev); if (ret < 0) @@ -940,9 +1008,31 @@ static int __init ks_pcie_probe(struct platform_device *pdev) fail_clk: clk_disable_unprepare(ks_pcie->clk); +err_phy: + ks_pcie_disable_phy(ks_pcie); + +err_link: + while (--i >= 0 && link[i]) + device_link_del(link[i]); + return ret; } +static int __exit ks_pcie_remove(struct platform_device *pdev) +{ + struct keystone_pcie *ks_pcie = platform_get_drvdata(pdev); + struct device_link **link = ks_pcie->link; + int num_lanes = ks_pcie->num_lanes; + + clk_disable_unprepare(ks_pcie->clk); + ks_pcie_disable_phy(ks_pcie); + + while (num_lanes--) + device_link_del(link[num_lanes]); + + return 0; +} + static struct platform_driver ks_pcie_driver __refdata = { .probe = ks_pcie_probe, .remove = __exit_p(ks_pcie_remove), From patchwork Wed Oct 17 07:41:06 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149035 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp327779lji; Wed, 17 Oct 2018 00:42:42 -0700 (PDT) X-Google-Smtp-Source: ACcGV60aa3n3UUbYbKSIu3asoP/A+exw/iT/9K5A+ngrDCuap5ypmvo7KvtkFhY8xo4aJtQ5UkqB X-Received: by 2002:a17:902:7486:: with SMTP id h6-v6mr24097627pll.29.1539762161977; Wed, 17 Oct 2018 00:42:41 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762161; cv=none; d=google.com; s=arc-20160816; b=Ta2VVzUb6eVVqhH2IuLSCFWMEXANcFJ4JWvZAsAnm2R6vFW15p+Qk9CEbPZKpa8FVS mhGYP4JdZ2P2yJhE18CZO3BlEAKhnDvyybNiQ1grwZwhjnyrSXlxrynVIcTLUWqK/9K+ qF1nBR45BoVEosTPHyOghuH3a5jwSn+YLlLV6mhg3vgyZNfEsZj93ZjVAqlIJ25cTm2+ ja2gLiNmbSw92ecQqivvDiTZlHse3clYIzRX59odMHQflGd9xyenXEUwGCEfGIP/mIna Plp3k9ODDBRlhG8iEWhADRnXK6WKeBqRmsqYrHQY0FobcwKnxUfHHh0I/ZejoKq10cY/ C9Bg== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id c14-v6si16796943pgm.556.2018.10.17.00.42.41; Wed, 17 Oct 2018 00:42:41 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=YpO+XlIR; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727522AbeJQPhC (ORCPT + 32 others); Wed, 17 Oct 2018 11:37:02 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:56522 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727466AbeJQPhC (ORCPT ); Wed, 17 Oct 2018 11:37:02 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7gUHV023032; Wed, 17 Oct 2018 02:42:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762150; bh=ILMjiYkOHboc47kfN6ITeEWYFEUBY2mHSEbgxF4Ns1Q=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=YpO+XlIRq1RSfWczK8RSyejv4GAZ3zKuHPGw2mc5jPyMirrPonDT/Qp1+liDGVXIs e/xcIPfPCopxAKr0L7gb4vEp0ntxJEg2sqsAQH771J0fWl1A0SoF6eFhtRuJw51tul TCvLWfWQ8UoQrNHdqbn4P5uaaoqqixSefY7pXyNc= Received: from DFLE113.ent.ti.com (dfle113.ent.ti.com [10.64.6.34]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7gTXP009467; Wed, 17 Oct 2018 02:42:29 -0500 Received: from DFLE108.ent.ti.com (10.64.6.29) by DFLE113.ent.ti.com (10.64.6.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:29 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:29 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSY009413; Wed, 17 Oct 2018 02:42:26 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 13/21] PCI: keystone: Cleanup configuration space access Date: Wed, 17 Oct 2018 13:11:06 +0530 Message-ID: <20181017074114.28239-14-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Cleanup configuration space access by removing ks_pcie_cfg_setup which has an unncessary check of "if (bus == 0)" which will never be the case of *_other_conf() and adding macros for configuring the CFG_SETUP register required for accessing the configuration space of the device. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 70 +++++++---------------- 1 file changed, 20 insertions(+), 50 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 4f764ec49a4c..1f14de0ef27f 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -45,7 +45,13 @@ /* Application registers */ #define CMD_STATUS 0x004 + #define CFG_SETUP 0x008 +#define CFG_BUS(x) (((x) & 0xff) << 16) +#define CFG_DEVICE(x) (((x) & 0x1f) << 8) +#define CFG_FUNC(x) ((x) & 0x7) +#define CFG_TYPE1 BIT(24) + #define OB_SIZE 0x030 #define CFG_PCIM_WIN_SZ_IDX 3 #define CFG_PCIM_WIN_CNT 32 @@ -364,60 +370,21 @@ static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) ks_pcie_app_writel(ks_pcie, CMD_STATUS, OB_XLAT_EN_VAL | val); } -/** - * ks_pcie_cfg_setup() - Set up configuration space address for a device - * - * @ks_pcie: ptr to keystone_pcie structure - * @bus: Bus number the device is residing on - * @devfn: device, function number info - * - * Forms and returns the address of configuration space mapped in PCIESS - * address space 0. Also configures CFG_SETUP for remote configuration space - * access. - * - * The address space has two regions to access configuration - local and remote. - * We access local region for bus 0 (as RC is attached on bus 0) and remote - * region for others with TYPE 1 access when bus > 1. As for device on bus = 1, - * we will do TYPE 0 access as it will be on our secondary bus (logical). - * CFG_SETUP is needed only for remote configuration access. - */ -static void __iomem *ks_pcie_cfg_setup(struct keystone_pcie *ks_pcie, u8 bus, - unsigned int devfn) -{ - u8 device = PCI_SLOT(devfn), function = PCI_FUNC(devfn); - struct dw_pcie *pci = ks_pcie->pci; - struct pcie_port *pp = &pci->pp; - u32 regval; - - if (bus == 0) - return pci->dbi_base; - - regval = (bus << 16) | (device << 8) | function; - - /* - * Since Bus#1 will be a virtual bus, we need to have TYPE0 - * access only. - * TYPE 1 - */ - if (bus != 1) - regval |= BIT(24); - - ks_pcie_app_writel(ks_pcie, CFG_SETUP, regval); - return pp->va_cfg0_base; -} - static int ks_pcie_rd_other_conf(struct pcie_port *pp, struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val) { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); - u8 bus_num = bus->number; - void __iomem *addr; + u32 reg; - addr = ks_pcie_cfg_setup(ks_pcie, bus_num, devfn); + reg = CFG_BUS(bus->number) | CFG_DEVICE(PCI_SLOT(devfn)) | + CFG_FUNC(PCI_FUNC(devfn)); + if (bus->parent->number != pp->root_bus_nr) + reg |= CFG_TYPE1; + ks_pcie_app_writel(ks_pcie, CFG_SETUP, reg); - return dw_pcie_read(addr + where, size, val); + return dw_pcie_read(pp->va_cfg0_base + where, size, val); } static int ks_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, @@ -426,12 +393,15 @@ static int ks_pcie_wr_other_conf(struct pcie_port *pp, struct pci_bus *bus, { struct dw_pcie *pci = to_dw_pcie_from_pp(pp); struct keystone_pcie *ks_pcie = to_keystone_pcie(pci); - u8 bus_num = bus->number; - void __iomem *addr; + u32 reg; - addr = ks_pcie_cfg_setup(ks_pcie, bus_num, devfn); + reg = CFG_BUS(bus->number) | CFG_DEVICE(PCI_SLOT(devfn)) | + CFG_FUNC(PCI_FUNC(devfn)); + if (bus->parent->number != pp->root_bus_nr) + reg |= CFG_TYPE1; + ks_pcie_app_writel(ks_pcie, CFG_SETUP, reg); - return dw_pcie_write(addr + where, size, val); + return dw_pcie_write(pp->va_cfg0_base + where, size, val); } /** From patchwork Wed Oct 17 07:41:09 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149038 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp328074lji; Wed, 17 Oct 2018 00:43:02 -0700 (PDT) X-Google-Smtp-Source: ACcGV62iRoKg+N7LpYALFGNUYsE37ke7oR9ex74jiltLoP674w+rBHQAVlPR4eR7O5+43lv3+9di X-Received: by 2002:a17:902:286b:: with SMTP id e98-v6mr24710926plb.110.1539762182004; Wed, 17 Oct 2018 00:43:02 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762181; cv=none; d=google.com; s=arc-20160816; b=zoPgZwDaXnQqS5JAq1snUeYW8iQnEVAnndmLtrfxwoP8sG9KbA+rikUsy6m16UveNL JO4z9GudlIHZFsN4t+Y5FYU6+R1sREAwDhedW7iezOfSzmhPQT7c7/CaJ7gbypoqoeFo koKsY+vbAzwrlOJgPJUNM4ix14KmCcnZSpFMoUrPqamNcx+suLMUPiJNu5mNfE9Bv2ZQ i5DMfwAujpuZTjIK4LZIIQi6AieIcbfg1mKZgkmykUJy75LXNo0NEU6CAGD4m9m00Q+j suQOPOEaa+rF62di/75AwHh5K7Dor1c1VpSmi3W0tosv6FPGyzam9u3Auxk6L4UyCG/1 GLBw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=TJTKFDSXgapb2zFN4WzS4ePydA0M0F3UQ+j0dbzHS1Q=; b=vhZVxgHQ6e9GyMHi6sn4chCBcJ6tlNMX7j2CdoT9lSGZhvTWtHX1gZYmz0Lj5XCKsP xmKy7A8GN9HEzQdOTLCV4Da6J973XAbl9LkWz5ZpbVD/m6f5ITzR9BGSDXqa7tnarCjV d3U0MaJyjfCQEtUM9Isl5KrKxhPVVwPsFNe2oTLjafaYETnleXOM+KQtJd0Pq1tmuY+N Uw35ocUDBjTQ6mOKP0kjiif8Gh+vaXAOdwFFhNadkU5yZHzkRCSwLelBqdnLqUckq9QY vkfCw6LaawcJJomJiUyxXcBmfBIpSHiPbV0qZXIv55tyUAOaRwLn41pmqiMxbLM86lwE Q0Fg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NaDmmUrG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m7-v6si17291663pgb.466.2018.10.17.00.43.01; Wed, 17 Oct 2018 00:43:01 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=NaDmmUrG; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727650AbeJQPhX (ORCPT + 32 others); Wed, 17 Oct 2018 11:37:23 -0400 Received: from fllv0016.ext.ti.com ([198.47.19.142]:56662 "EHLO fllv0016.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727257AbeJQPhS (ORCPT ); Wed, 17 Oct 2018 11:37:18 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7gdO2023149; Wed, 17 Oct 2018 02:42:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762159; bh=TJTKFDSXgapb2zFN4WzS4ePydA0M0F3UQ+j0dbzHS1Q=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=NaDmmUrGsuN6+/FTceZnZveXi0OJRSpLwvSrwmnJRb8jqWkNydLJ9gibE0dS45cBx AbLMBJkXWVdPSbTWJTCajYes9utlZxSdsUKWuMsJoQ1E+aCgAX+AttmrH6DvUwAPUT 298oCYDm9cb7MUaOeseUFGfwLbpO7Err6oO9QoeI= Received: from DLEE113.ent.ti.com (dlee113.ent.ti.com [157.170.170.24]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7gd2q025329; Wed, 17 Oct 2018 02:42:39 -0500 Received: from DLEE100.ent.ti.com (157.170.170.30) by DLEE113.ent.ti.com (157.170.170.24) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:40 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE100.ent.ti.com (157.170.170.30) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:39 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSb009413; Wed, 17 Oct 2018 02:42:36 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 16/21] PCI: keystone: Cleanup set_dbi_mode and get_dbi_mode Date: Wed, 17 Oct 2018 13:11:09 +0530 Message-ID: <20181017074114.28239-17-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org No functional change. Use BIT() macro for DBI_CS2 and cleanup set_dbimode and get_dbi_mode Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 3576a184b9eb..2decbaec81a3 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -40,7 +40,7 @@ #define LTSSM_EN_VAL BIT(0) #define LTSSM_STATE_MASK 0x1f #define LTSSM_STATE_L0 0x11 -#define DBI_CS2_EN_VAL 0x20 +#define DBI_CS2 BIT(5) #define OB_XLAT_EN_VAL BIT(1) /* Application registers */ @@ -315,11 +315,12 @@ static void ks_pcie_set_dbi_mode(struct keystone_pcie *ks_pcie) u32 val; val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); - ks_pcie_app_writel(ks_pcie, CMD_STATUS, DBI_CS2_EN_VAL | val); + val |= DBI_CS2; + ks_pcie_app_writel(ks_pcie, CMD_STATUS, val); do { val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); - } while (!(val & DBI_CS2_EN_VAL)); + } while (!(val & DBI_CS2)); } /** @@ -333,11 +334,12 @@ static void ks_pcie_clear_dbi_mode(struct keystone_pcie *ks_pcie) u32 val; val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); - ks_pcie_app_writel(ks_pcie, CMD_STATUS, ~DBI_CS2_EN_VAL & val); + val &= ~DBI_CS2; + ks_pcie_app_writel(ks_pcie, CMD_STATUS, val); do { val = ks_pcie_app_readl(ks_pcie, CMD_STATUS); - } while (val & DBI_CS2_EN_VAL); + } while (val & DBI_CS2); } static void ks_pcie_setup_rc_app_regs(struct keystone_pcie *ks_pcie) From patchwork Wed Oct 17 07:41:10 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149043 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp328499lji; Wed, 17 Oct 2018 00:43:31 -0700 (PDT) X-Google-Smtp-Source: ACcGV60Bb9igejlsDP32HyGmw03aKbD4/KsFOe+NVRrS6MDpNVBRSQ+031SNTIVqo4b3kpDyChol X-Received: by 2002:a63:1919:: with SMTP id z25-v6mr22932913pgl.135.1539762211611; Wed, 17 Oct 2018 00:43:31 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762211; cv=none; d=google.com; s=arc-20160816; b=DZ1TCW2cJMIW/p302Wnp2Mw2GJnvuXVmggwlqSpLBN6fiazEkalJNQluYD2Eyi4XkG xL4HxkiQlLSTcJXpW1hsD+nkvog1TwP68jwWcnkAF2erThgjwCqM0Utr/NAZ+Ptn+AJC J2C5w2WKcCIrAyXEcQ6lJBwFSUbI80TZNns5007D45Hz0k7YjPIgoTMitKrPGPLLtRQa LS27pS+lyasuGmgWSQI+PLmKMVfQtI6VewCUzYBaxsH4odp0q23KsyvUp92ck75FWK7u GCdfoIqLtk8f0lSMttMiatat/tjIn6xpYPDeox8oBZndMS2QVknfQ5a9tJnT0HA4sMhF f5LA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=7J6+SCgM8p61/w90SEo09MilVPmCdhutv9TiE9uHRPU=; b=ETGAD58KLzWrEIeHfyCQKu8ZjVeN1dhIbaKxwiGcWb3/vfPpyvjhxL6UK5zap/ips8 TzEuh/N5dtt2F5DjoskpttCYteQP/sTI5dbFYjEUClrFjqKrXa9lFsIluNZAlCa5H7Tk 1vyp0TDnnjFsma2dtA2MOPD1e6/bDvYR4odKgSp+TXVIK/GxHM4oQfBVjQc8bMJFI9LY FosG8Eq6OnpKEuCaQC2FdGjs5hgTeuuFxCiUMHeTTNmLwjjGN3ARxS7fgmbHzRoEbDWf GT3/A3lAP7nHXpMlb8Wj8ILdHU4LeNv4MYTwlJCyYC6cNwie7gI7H4QzDExkMbziLEx1 ADrQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RnhcslOh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id w19-v6si10155009pgf.197.2018.10.17.00.43.31; Wed, 17 Oct 2018 00:43:31 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=RnhcslOh; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727688AbeJQPh3 (ORCPT + 32 others); Wed, 17 Oct 2018 11:37:29 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:60654 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727257AbeJQPh2 (ORCPT ); Wed, 17 Oct 2018 11:37:28 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7ghFY053901; Wed, 17 Oct 2018 02:42:43 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762163; bh=7J6+SCgM8p61/w90SEo09MilVPmCdhutv9TiE9uHRPU=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=RnhcslOhHQZXwSn6baYeJJu7tIaWD7mdPzbOtc4dvI/0L/lfC3lvEkNBCx9VhKHWs R24M92MjkBsdWgH5P0petDkrJ8HDeXW0lUvfYtrF3PVqP3ts5oGRiZ+IEpu+tNdXu+ wuNFSb7V4s64NfNxkM6tG3Yzhc8gSNLifqp/EyLQ= Received: from DFLE108.ent.ti.com (dfle108.ent.ti.com [10.64.6.29]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7ghLp009845; Wed, 17 Oct 2018 02:42:43 -0500 Received: from DFLE111.ent.ti.com (10.64.6.32) by DFLE108.ent.ti.com (10.64.6.29) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:42 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE111.ent.ti.com (10.64.6.32) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:42 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSc009413; Wed, 17 Oct 2018 02:42:40 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 17/21] PCI: keystone: Cleanup ks_pcie_link_up() Date: Wed, 17 Oct 2018 13:11:10 +0530 Message-ID: <20181017074114.28239-18-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org ks_pcie_link_up() uses registers from the designware core to get the status of the link. Move the register defines to pcie-designware.h and cleanup ks_pcie_link_up(). Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 11 +++-------- drivers/pci/controller/dwc/pcie-designware.h | 4 ++++ 2 files changed, 7 insertions(+), 8 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 2decbaec81a3..e181e6277323 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -38,8 +38,6 @@ /* Application register defines */ #define LTSSM_EN_VAL BIT(0) -#define LTSSM_STATE_MASK 0x1f -#define LTSSM_STATE_L0 0x11 #define DBI_CS2 BIT(5) #define OB_XLAT_EN_VAL BIT(1) @@ -87,11 +85,7 @@ #define ERR_IRQ_ENABLE_SET 0x1c8 #define ERR_IRQ_ENABLE_CLR 0x1cc -/* Config space registers */ -#define DEBUG0 0x728 - #define MAX_MSI_HOST_IRQS 8 - /* PCIE controller device IDs */ #define PCIE_RC_K2HK 0xb008 #define PCIE_RC_K2E 0xb009 @@ -442,8 +436,9 @@ static int ks_pcie_link_up(struct dw_pcie *pci) { u32 val; - val = dw_pcie_readl_dbi(pci, DEBUG0); - return (val & LTSSM_STATE_MASK) == LTSSM_STATE_L0; + val = dw_pcie_readl_dbi(pci, PCIE_PORT_DEBUG0); + val &= PORT_LOGIC_LTSSM_STATE_MASK; + return (val == PORT_LOGIC_LTSSM_STATE_L0); } static void ks_pcie_initiate_link_train(struct keystone_pcie *ks_pcie) diff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h index 9f1a5e399b70..0989d880ac46 100644 --- a/drivers/pci/controller/dwc/pcie-designware.h +++ b/drivers/pci/controller/dwc/pcie-designware.h @@ -36,6 +36,10 @@ #define PORT_LINK_MODE_4_LANES (0x7 << 16) #define PORT_LINK_MODE_8_LANES (0xf << 16) +#define PCIE_PORT_DEBUG0 0x728 +#define PORT_LOGIC_LTSSM_STATE_MASK 0x1f +#define PORT_LOGIC_LTSSM_STATE_L0 0x11 + #define PCIE_LINK_WIDTH_SPEED_CONTROL 0x80C #define PORT_LOGIC_SPEED_CHANGE (0x1 << 17) #define PORT_LOGIC_LINK_WIDTH_MASK (0x1f << 8) From patchwork Wed Oct 17 07:41:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149040 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp328194lji; Wed, 17 Oct 2018 00:43:10 -0700 (PDT) X-Google-Smtp-Source: ACcGV60ru+Y0+Yt5hUVlrFXMV+4WluqyUPYeMjnqliLcmJQPfiNBpLd6gkNb3XoBtxK8VeTHmDDX X-Received: by 2002:a63:30c8:: with SMTP id w191-v6mr23054874pgw.447.1539762190283; Wed, 17 Oct 2018 00:43:10 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762190; cv=none; d=google.com; s=arc-20160816; b=rOfHZgI1m0IdMWRCDWcTwIJ05PHER1emjEhx14ivZ8E1CbsGWlk8ZXMh0EjwUYNF8X sullkYkiBXQuK3MKAL5tAmhtWx0gZWO1giIYbcSHxKrIbGSbW3/JGBvok4eZHujH9M5i KeECqC/pbg4tN3+NLNFoNUmrQ3rU9KBix6oiHkj+QyUexWdEgsNn2ZxcuyYmy792GJnr 9hhwrR76zKVcm6aGazj3MC+m1CY6Imb6E04mXCeiohvyOUiVVHcZoJfyMOUa0Qx2akGn sOHfeXElXv0w2ySdaPzarhfLX830yV3/NMQvMW4YQMN76pQ/poRhIZ1txLxhvJJM7Ew8 LrEg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=QC6R01oOfBedPs18DXWbzKSKHpZhAnqAxHPEUw6bcpc=; b=DCmBNgzlXCVhNxrLse5B4YLps6HUyJyusO5NG4LJ60kN6NLh/A/90FOxSyR16LKTdG LaUdtLmpIDyg3+sHq5KPz/DfqAn9ujm9ipN2e/u89HwisL3ZhVy67XfuQb/A8iaSEVwW 5X41OeI4tKgCyVmoNYly8nApjrnexrk66kC2EGPIvbsWNymGhK+DYm8/tZBvR8ogtG0p +8tNoqPOSALdOw1Kgb4BEbJt4sgPr24fDou3/aTdyQHFP2oiSIwVp4g4BIwVIdmcyTFb pWMrziDudGa0NNHpdrtIUNdAwjDtCG4e2ZqhbJ9phCx0m/kpaBrxpLUTizfpx6YI1f7H t5nA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=TNMCxrnN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y13-v6si16262418pgl.236.2018.10.17.00.43.09; Wed, 17 Oct 2018 00:43:10 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=TNMCxrnN; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727733AbeJQPhb (ORCPT + 32 others); Wed, 17 Oct 2018 11:37:31 -0400 Received: from lelv0142.ext.ti.com ([198.47.23.249]:52786 "EHLO lelv0142.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727655AbeJQPh3 (ORCPT ); Wed, 17 Oct 2018 11:37:29 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelv0142.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7gkEX052664; Wed, 17 Oct 2018 02:42:46 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762166; bh=QC6R01oOfBedPs18DXWbzKSKHpZhAnqAxHPEUw6bcpc=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=TNMCxrnNQvyYj06S6QSbdfkJdF4V/bTABXr6XHPJRC4fgso6FgVKdxT/JqApxPYYk k23Rm9T1zMFQFR0+YwhVb8oE/2YaTxhuf9UqHE7ston1AXyyNaYx7OZMSEHS9J4339 y64MDDbiACLy1tx6FNTdO0cuWN8dSYnjyIhT4EAI= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7gkuD025580; Wed, 17 Oct 2018 02:42:46 -0500 Received: from DFLE103.ent.ti.com (10.64.6.24) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:46 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DFLE103.ent.ti.com (10.64.6.24) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:46 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSd009413; Wed, 17 Oct 2018 02:42:43 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 18/21] PCI: keystone: Use ERR_IRQ_STATUS instead of ERR_IRQ_STATUS_RAW to get interrupt status Date: Wed, 17 Oct 2018 13:11:11 +0530 Message-ID: <20181017074114.28239-19-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Use ERR_IRQ_STATUS instead of ERR_IRQ_STATUS_RAW to get interrupt status. ERR_IRQ_STATUS_RAW has the status of the interrupts before masking whereas ERR_IRQ_STATUS has the status of the interrupts after masking. Since all the interrupts are unmasked here, use ERR_IRQ_STATUS. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index e181e6277323..c0bba7b604fa 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -80,7 +80,6 @@ #define ERR_IRQ_ALL (ERR_AER | ERR_AXI | ERR_CORR | \ ERR_NONFATAL | ERR_FATAL | ERR_SYS) #define ERR_FATAL_IRQ (ERR_FATAL | ERR_AXI) -#define ERR_IRQ_STATUS_RAW 0x1c0 #define ERR_IRQ_STATUS 0x1c4 #define ERR_IRQ_ENABLE_SET 0x1c8 #define ERR_IRQ_ENABLE_CLR 0x1cc @@ -249,7 +248,7 @@ static irqreturn_t ks_pcie_handle_error_irq(struct keystone_pcie *ks_pcie) { u32 status; - status = ks_pcie_app_readl(ks_pcie, ERR_IRQ_STATUS_RAW) & ERR_IRQ_ALL; + status = ks_pcie_app_readl(ks_pcie, ERR_IRQ_STATUS); if (!status) return IRQ_NONE; From patchwork Wed Oct 17 07:41:12 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149041 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp328211lji; Wed, 17 Oct 2018 00:43:11 -0700 (PDT) X-Google-Smtp-Source: ACcGV62Jl5zivl8xGOddNblzkVWO8Q8+J8cTGpKqTLrxsfUy3LfDCf+N9scYelOHWS47vkx7V4Tf X-Received: by 2002:a65:65c6:: with SMTP id y6-v6mr22863980pgv.233.1539762191404; Wed, 17 Oct 2018 00:43:11 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762191; cv=none; d=google.com; s=arc-20160816; b=cGCBbT0bT3D2UL2e8okSjm4YrUJcsRH8qW7fhkreaPNuiOv3CSm8YdcrulyCr4eqC+ XXJjD60g86nPmvWJ0YETIdMvreu2PLolr/UP1TzlwcH3/XcT8AxJeSG5yPFR8zuR+l+W Gg94+eNYSWvhIktEdMFB3hxwpBdRx8PUCdSMcNyTmQL/vmZyooeX6703rSfXfQJlAmND TGty2UFYOfzXlV7v7IaTWw2Jv/3TnQf49z8qJnDw9QrtjVXIAWU0cus1eSsfbYC6VLFa JMTi/B+G8g6jQBwXz7GRMn48jSt/gBSnKgi2u07Vj4spK/Lzg5YSlwZO4YMIfKzH4dJR B1sg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=sZcazpbS9Y17cY1LGKKU1Lsa75B3lB78WemeAxANuhg=; b=iX0ZDHICAd7ehspGtf6G2ESDIUXo1tL2Lrx6n0fZOa55N2BjSt0pkVzUtQv/xSw8NO OXDImAapJzKPmDxxmE4zLPSEkt8PktebNzg5eP1GjAIEVxh4iWzqmd61WcNmejVuH90Y FL0WTLVofP8IHjKE00+y8/EFK9tWoWpy+mfNY0j6cy2yDdpUQ1mfPb+wApF3LaP2GJYd 88FemT9vQ8RCoQs5Ca6r+idyiW3wutvk3I4eRb7r/4d9Vi3tduG2zUrXVYPZiNgWMS16 I82joq/rL3p3bsQawtOAQnoIw4fAazTJGUDjSSfHNRGqL6cUC9Z1wEYsyDKSw2fGhd9z niyQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=tpbOnIqX; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Add debug error message for ERR_SYS, ERR_NONFATAL, ERR_CORR and ERR_AER here. While at that avoid using ERR_IRQ_STATUS_RAW and use ERR_IRQ_STATUS instead. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 32 ++++++++++++++++------- 1 file changed, 23 insertions(+), 9 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index c0bba7b604fa..e9e646acc2d5 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -79,7 +79,6 @@ #define ERR_SYS BIT(0) /* System (fatal, non-fatal, or correctable) */ #define ERR_IRQ_ALL (ERR_AER | ERR_AXI | ERR_CORR | \ ERR_NONFATAL | ERR_FATAL | ERR_SYS) -#define ERR_FATAL_IRQ (ERR_FATAL | ERR_AXI) #define ERR_IRQ_STATUS 0x1c4 #define ERR_IRQ_ENABLE_SET 0x1c8 #define ERR_IRQ_ENABLE_CLR 0x1cc @@ -246,18 +245,33 @@ static void ks_pcie_enable_error_irq(struct keystone_pcie *ks_pcie) static irqreturn_t ks_pcie_handle_error_irq(struct keystone_pcie *ks_pcie) { - u32 status; + u32 reg; + struct device *dev = ks_pcie->pci->dev; - status = ks_pcie_app_readl(ks_pcie, ERR_IRQ_STATUS); - if (!status) + reg = ks_pcie_app_readl(ks_pcie, ERR_IRQ_STATUS); + if (!reg) return IRQ_NONE; - if (status & ERR_FATAL_IRQ) - dev_err(ks_pcie->pci->dev, "fatal error (status %#010x)\n", - status); + if (reg & ERR_SYS) + dev_err(dev, "System Error\n"); + + if (reg & ERR_FATAL) + dev_err(dev, "Fatal Error\n"); + + if (reg & ERR_NONFATAL) + dev_dbg(dev, "Non Fatal Error\n"); + + if (reg & ERR_CORR) + dev_dbg(dev, "Correctable Error\n"); + + if (reg & ERR_AXI) + dev_err(dev, "AXI tag lookup fatal Error\n"); + + if (reg & ERR_AER) + dev_err(dev, "ECRC Error\n"); + + ks_pcie_app_writel(ks_pcie, ERR_IRQ_STATUS, reg); - /* Ack the IRQ; status bits are RW1C */ - ks_pcie_app_writel(ks_pcie, ERR_IRQ_STATUS, status); return IRQ_HANDLED; } From patchwork Wed Oct 17 07:41:13 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149042 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp328267lji; Wed, 17 Oct 2018 00:43:15 -0700 (PDT) X-Google-Smtp-Source: ACcGV63OXp0NJSVvuPemqG3KjqfHMIAz2RizBMhY/KRoEJob6rtM9ihL1uyO7SnyvdsiR9a8Y/me X-Received: by 2002:a63:700e:: with SMTP id l14-v6mr22773090pgc.359.1539762194976; Wed, 17 Oct 2018 00:43:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762194; cv=none; d=google.com; s=arc-20160816; b=kesFbKQqOZA8UZMSh9HMzO3NORImRh8uV1PKx4kccwN3MUYl+NlgAm2FuiJ4h2dh0h qT9dIrZ4JsgOI5b4+pqmwo0XmV7EgkBIb1vw1DlgWl05PEfU0zJUV7m3NvYfUv24k/Fs 3FSk9zHvzRGLeiRPWUZmZrdd9RmGhw9cE8RjbfqJw+AdjkpJYBfDDgi4zQ4yOBto77aS UQfQMwKhzmZ/p/WV/UCsvfh6vKE6t7hQSAouTsc+ekJN8x6D2/dzq+uEAUu2O9YdLORg Vs4urj+wcTK2Ms53KiemXOe4zvfQ+dr05D+fALMZb4yOG+szIRIyUwMwk0anvFpjUPtq NwWg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=Z/d/DCyUaKfoDxJ2zhXoiVEV3iRMRlLuDxe+tNe7mp8=; b=I+wxBZdyq0qfx6cpIVqHkkb740R5Nn5YujXX0i9XznjM9Oo2tMuu3k2Ve0zbQnfuE6 4Tp/qlik46eO3eKvOJu3gd6CS2sSWq1Qfz+drSMvKZbLWY9fQjahDoDSkof2WyODar4p jpu4APaYgSlDdLVuftcHwgVM+GkEtBzcdz+De1JPYR4HYLLh5NeptEDGO0q2tw1DSFQm o9NKs7MS8LDCeB6OH1USsMnsfHMFORqFlRImrw5dnPkTKsBgj+E1YB0xfR/uLSWhmT7X LTrPDfdAZum4CuRI4blgc7SJl1VoXOaqyUQr6Xe1BndX7JWfp3HNxACrF0Eq5QeifCe3 LxNg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b=SUI9zEgg; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Reorder header file in alphabetical order. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index e9e646acc2d5..0cfeaad1d013 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -9,19 +9,19 @@ * Implementation based on pci-exynos.c and pcie-designware.c */ -#include #include #include +#include #include +#include #include -#include #include #include -#include #include +#include #include -#include #include +#include #include #include #include From patchwork Wed Oct 17 07:41:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kishon Vijay Abraham I X-Patchwork-Id: 149039 Delivered-To: patch@linaro.org Received: by 2002:a2e:8595:0:0:0:0:0 with SMTP id b21-v6csp328172lji; Wed, 17 Oct 2018 00:43:08 -0700 (PDT) X-Google-Smtp-Source: ACcGV62SOgLg+eClOBhA2O2h1l2nL5uymBOyVL11Y3uDVTG6XvgkBPsA4vth6m15ICsd2JVLEUov X-Received: by 2002:a63:af5b:: with SMTP id s27-v6mr23113411pgo.448.1539762188027; Wed, 17 Oct 2018 00:43:08 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1539762188; cv=none; d=google.com; s=arc-20160816; b=RK5N+knPqOBGXRjSCkPGT0R4DwdX1ryV9hZ42g2jDsxWYRwxM3rib1UbUwf3+8llPn GIU99EPtI/mjLjLMbkBk/5cnVesBxLTJ5fUEaUA0cO/Cbs++I1INb1m/GVnF1KQi19LF 5F33AEh5fEKsp+flC+s/gw4NFoy50k4Vep4758fQXCoDLItYlaSy77o6z5nklmpaIhio Nyg6gFpflzwWPN91i0hcS1BeesP2NW5GPyoSSeUYLNP4+rns53bCqKjYm9fPWgsBJibF ngLnjt3j48klvNuvopLRLIcKYbSoUZdO9lr30YqX+l2NW/pWduvqozoykXOIRVb57L7n 0d8g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature; bh=zxAbqT5mwnQ0yf4Gth6G3KMxef3pL6xYIy++EsgoCT8=; b=cIk6vMiQUpm9X6TPqLFiQlUlURtRo42CUhAnTm7TVgV8fUK0Yxst5MOzI7OJlRkMxX opIec9q21yfFcKQGRwlpvHZffdjL6OTnG7QEUEGeM3manEv1fwoKdb+WnHsi4XDIHqt5 91jl8yw3XvnBG+cB0Abx38hpDNrUiFeAqYAWefWXkFSQHOzrb0BljLA4RSzlvWHOC6dd tEoUl9gSWDOXUDw3gmJB/dfWPhO/ZjpnLE9Af0e87BcaK2NwhYOgx62Ki0xfyHfDgDGZ vdkhw7d3nllTWEkITMf5Kr+5MJzbhCKVfRP9d6gXb9vtCSkQ7MmejlfvmdUjNENLYLNN 8Nvw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="iqQ/Ttv4"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y13-v6si16262418pgl.236.2018.10.17.00.43.07; Wed, 17 Oct 2018 00:43:08 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@ti.com header.s=ti-com-17Q1 header.b="iqQ/Ttv4"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727711AbeJQPh3 (ORCPT + 32 others); Wed, 17 Oct 2018 11:37:29 -0400 Received: from fllv0015.ext.ti.com ([198.47.19.141]:60660 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727652AbeJQPh2 (ORCPT ); Wed, 17 Oct 2018 11:37:28 -0400 Received: from dflxv15.itg.ti.com ([128.247.5.124]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id w9H7gueP054099; Wed, 17 Oct 2018 02:42:56 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1539762176; bh=zxAbqT5mwnQ0yf4Gth6G3KMxef3pL6xYIy++EsgoCT8=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=iqQ/Ttv4hmBuxmfG7L1lX5unnQKDcr1aKy+cb3WrHhIQ0jjImWetMUu1Ry3KPEmPY wR5k+jlwrZx02TARIR2Hf5BiSHQ7KPhT117nSSniyyNGWWbMI+PuGAQMDbpZcJ7jI/ M0TgnLq/LuVI+QZ18QzYdG8UHK7wKmw2xukPB9OU= Received: from DLEE105.ent.ti.com (dlee105.ent.ti.com [157.170.170.35]) by dflxv15.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7gu8q010261; Wed, 17 Oct 2018 02:42:56 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE105.ent.ti.com (157.170.170.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1466.3; Wed, 17 Oct 2018 02:42:56 -0500 Received: from dflp32.itg.ti.com (10.64.6.15) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_0, cipher=TLS_RSA_WITH_AES_256_CBC_SHA) id 15.1.1466.3 via Frontend Transport; Wed, 17 Oct 2018 02:42:56 -0500 Received: from a0393678ub.dal.design.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by dflp32.itg.ti.com (8.14.3/8.13.8) with ESMTP id w9H7fgSg009413; Wed, 17 Oct 2018 02:42:53 -0500 From: Kishon Vijay Abraham I To: Bjorn Helgaas , Lorenzo Pieralisi , Murali Karicheri , Jingoo Han , Gustavo Pimentel CC: Rob Herring , , , , , Kishon Vijay Abraham I Subject: [PATCH v2 21/21] PCI: keystone: Cleanup macros defined in pci-keystone.c Date: Wed, 17 Oct 2018 13:11:14 +0530 Message-ID: <20181017074114.28239-22-kishon@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181017074114.28239-1-kishon@ti.com> References: <20181017074114.28239-1-kishon@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org No functional change. Cleanup macros defined in pci-keystone.c by removing unused macros, grouping the macros and aligning it properly. Signed-off-by: Kishon Vijay Abraham I --- drivers/pci/controller/dwc/pci-keystone.c | 41 +++++++++-------------- 1 file changed, 16 insertions(+), 25 deletions(-) -- 2.17.1 diff --git a/drivers/pci/controller/dwc/pci-keystone.c b/drivers/pci/controller/dwc/pci-keystone.c index 0cfeaad1d013..14f2b0b4ed5e 100644 --- a/drivers/pci/controller/dwc/pci-keystone.c +++ b/drivers/pci/controller/dwc/pci-keystone.c @@ -28,21 +28,14 @@ #include "pcie-designware.h" -#define DRIVER_NAME "keystone-pcie" - #define PCIE_VENDORID_MASK 0xffff #define PCIE_DEVICEID_SHIFT 16 -/* DEV_STAT_CTRL */ -#define PCIE_CAP_BASE 0x70 - -/* Application register defines */ -#define LTSSM_EN_VAL BIT(0) -#define DBI_CS2 BIT(5) -#define OB_XLAT_EN_VAL BIT(1) - /* Application registers */ #define CMD_STATUS 0x004 +#define LTSSM_EN_VAL BIT(0) +#define OB_XLAT_EN_VAL BIT(1) +#define DBI_CS2 BIT(5) #define CFG_SETUP 0x008 #define CFG_BUS(x) (((x) & 0xff) << 16) @@ -70,27 +63,25 @@ #define IRQ_STATUS 0x184 #define MSI_IRQ_OFFSET 4 -/* Error IRQ bits */ -#define ERR_AER BIT(5) /* ECRC error */ -#define ERR_AXI BIT(4) /* AXI tag lookup fatal error */ -#define ERR_CORR BIT(3) /* Correctable error */ -#define ERR_NONFATAL BIT(2) /* Non-fatal error */ -#define ERR_FATAL BIT(1) /* Fatal error */ -#define ERR_SYS BIT(0) /* System (fatal, non-fatal, or correctable) */ -#define ERR_IRQ_ALL (ERR_AER | ERR_AXI | ERR_CORR | \ - ERR_NONFATAL | ERR_FATAL | ERR_SYS) #define ERR_IRQ_STATUS 0x1c4 #define ERR_IRQ_ENABLE_SET 0x1c8 -#define ERR_IRQ_ENABLE_CLR 0x1cc +#define ERR_AER BIT(5) /* ECRC error */ +#define ERR_AXI BIT(4) /* AXI tag lookup fatal error */ +#define ERR_CORR BIT(3) /* Correctable error */ +#define ERR_NONFATAL BIT(2) /* Non-fatal error */ +#define ERR_FATAL BIT(1) /* Fatal error */ +#define ERR_SYS BIT(0) /* System error */ +#define ERR_IRQ_ALL (ERR_AER | ERR_AXI | ERR_CORR | \ + ERR_NONFATAL | ERR_FATAL | ERR_SYS) #define MAX_MSI_HOST_IRQS 8 /* PCIE controller device IDs */ -#define PCIE_RC_K2HK 0xb008 -#define PCIE_RC_K2E 0xb009 -#define PCIE_RC_K2L 0xb00a -#define PCIE_RC_K2G 0xb00b +#define PCIE_RC_K2HK 0xb008 +#define PCIE_RC_K2E 0xb009 +#define PCIE_RC_K2L 0xb00a +#define PCIE_RC_K2G 0xb00b -#define to_keystone_pcie(x) dev_get_drvdata((x)->dev) +#define to_keystone_pcie(x) dev_get_drvdata((x)->dev) struct keystone_pcie { struct dw_pcie *pci;