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[59.115.111.251]) by smtp.gmail.com with ESMTPSA id g17-v6sm35341404pfe.37.2018.10.19.03.48.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 19 Oct 2018 03:48:30 -0700 (PDT) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Fri, 19 Oct 2018 18:48:26 +0800 Message-Id: <20181019104826.23073-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.17.1 Subject: [edk2] [PATCH edk2-platforms] Silicon/SynQuacerPciCpuIo2Dxe: fix PCIe I/O translation X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Commit 9dd8190e4995 ("Silicon/SynQuacer: tweak PCI I/O windows for ACPI/Linux support") updated the min/max/offset definitions for the PCIe I/O resource windows on SynQuacer, and updated the read path of the platform's EfiCpuIo2 protocol implementation, but failed to update the write path as well, resulting in spurious errors if when attempting to write to PCIe I/O ports on PCIe RC #1, which uses translation for the I/O BAR window. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c | 18 ++++++++++++------ 1 file changed, 12 insertions(+), 6 deletions(-) -- 2.17.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c index 736b20cd5129..e5cc3aef908d 100644 --- a/Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c +++ b/Silicon/Socionext/SynQuacer/Drivers/SynQuacerPciCpuIo2Dxe/SynQuacerPciCpuIo2Dxe.c @@ -518,12 +518,18 @@ CpuIoServiceWrite ( return Status; } - if ((Address >= SYNQUACER_PCI_SEG0_PORTIO_MIN) && - (Address <= SYNQUACER_PCI_SEG0_PORTIO_MAX)) { - Address += SYNQUACER_PCI_SEG0_PORTIO_MEMBASE; - } else if ((Address >= SYNQUACER_PCI_SEG1_PORTIO_MIN) && - (Address <= SYNQUACER_PCI_SEG1_PORTIO_MAX)) { - Address += SYNQUACER_PCI_SEG1_PORTIO_MEMBASE; + if ((Address >= (SYNQUACER_PCI_SEG0_PORTIO_MIN + + SYNQUACER_PCI_SEG0_PORTIO_OFFSET)) && + (Address <= (SYNQUACER_PCI_SEG0_PORTIO_MAX + + SYNQUACER_PCI_SEG0_PORTIO_OFFSET))) { + Address += SYNQUACER_PCI_SEG0_PORTIO_MEMBASE - + SYNQUACER_PCI_SEG0_PORTIO_OFFSET; + } else if ((Address >= (SYNQUACER_PCI_SEG1_PORTIO_MIN + + SYNQUACER_PCI_SEG1_PORTIO_OFFSET)) && + (Address <= (SYNQUACER_PCI_SEG1_PORTIO_MAX + + SYNQUACER_PCI_SEG1_PORTIO_OFFSET))) { + Address += SYNQUACER_PCI_SEG1_PORTIO_MEMBASE - + SYNQUACER_PCI_SEG1_PORTIO_OFFSET; } else { ASSERT (FALSE);