From patchwork Wed Sep 8 19:05:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keith Packard X-Patchwork-Id: 508256 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIM_ADSP_ALL, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2DC57C433EF for ; Wed, 8 Sep 2021 19:06:20 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 0E471606A5 for ; Wed, 8 Sep 2021 19:06:20 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350419AbhIHTH1 (ORCPT ); Wed, 8 Sep 2021 15:07:27 -0400 Received: from home.keithp.com ([63.227.221.253]:35456 "EHLO elaine.keithp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350339AbhIHTHX (ORCPT ); Wed, 8 Sep 2021 15:07:23 -0400 Received: from localhost (localhost [127.0.0.1]) by elaine.keithp.com (Postfix) with ESMTP id 5A9873F30881; Wed, 8 Sep 2021 12:05:48 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at keithp.com Received: from elaine.keithp.com ([127.0.0.1]) by localhost (elaine.keithp.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id VY1FZb1c7sU8; Wed, 8 Sep 2021 12:05:47 -0700 (PDT) Received: from keithp.com (168-103-156-98.tukw.qwest.net [168.103.156.98]) by elaine.keithp.com (Postfix) with ESMTPSA id 56FE93F30883; Wed, 8 Sep 2021 12:05:47 -0700 (PDT) Received: by keithp.com (Postfix, from userid 1000) id 50A2E1E60122; Wed, 8 Sep 2021 12:06:09 -0700 (PDT) From: Keith Packard To: linux-kernel@vger.kernel.org Cc: Abbott Liu , Alexei Starovoitov , Andrew Morton , Andrii Nakryiko , Anshuman Khandual , Ard Biesheuvel , Arnd Bergmann , Ben Segall , Bjorn Andersson , bpf@vger.kernel.org, Christoph Lameter , Daniel Borkmann , Daniel Bristot de Oliveira , Dennis Zhou , devicetree@vger.kernel.org, Dietmar Eggemann , Florian Fainelli , Frank Rowand , Geert Uytterhoeven , Ingo Molnar , Jason Wang , Jens Axboe , Joe Perches , John Fastabend , Juri Lelli , Keith Packard , KP Singh , kvm@vger.kernel.org, Linus Walleij , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, Manivannan Sadhasivam , Marc Zyngier , Martin KaFai Lau , Mel Gorman , Michael Ellerman , "Michael S. Tsirkin" , Miguel Ojeda , Mike Rapoport , netdev@vger.kernel.org, Nick Desaulniers , Nick Desaulniers , Nicolas Pitre , Peter Zijlstra , Rob Herring , Russell King , Song Liu , Srikar Dronamraju , Steven Rostedt , Tejun Heo , Thomas Gleixner , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Valentin Schneider , Vincent Guittot , virtualization@lists.linux-foundation.org, "Wolfram Sang (Renesas)" , YiFei Zhu , Yonghong Song Subject: [PATCH v4 1/7] ARM: Pass cpu number to secondary_start_kernel Date: Wed, 8 Sep 2021 12:05:59 -0700 Message-Id: <20210908190605.419064-2-keithpac@amazon.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210908190605.419064-1-keithpac@amazon.com> References: <20210908190605.419064-1-keithpac@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Instead of pulling the CPU value out of the thread_info struct, pass it as an argument. When first initializing secondary processors, this is done by stashing the value in the secondary_data struct. When restarting idle processors, the previous CPU value is passed. Because the cpu is now known at the top of secondary_start_kernel, the per_cpu_offset value can now be set at this point, instead of in cpu_init where it was also incorrectly setting the per_cpu_offset for the boot processor before that value had been computed. Signed-off-by: Keith Packard Reviewed-by: Ard Biesheuvel --- arch/arm/include/asm/smp.h | 3 ++- arch/arm/kernel/head-nommu.S | 1 + arch/arm/kernel/head.S | 1 + arch/arm/kernel/setup.c | 6 ------ arch/arm/kernel/smp.c | 14 +++++++++----- 5 files changed, 13 insertions(+), 12 deletions(-) diff --git a/arch/arm/include/asm/smp.h b/arch/arm/include/asm/smp.h index 5d508f5d56c4..86a7fd721556 100644 --- a/arch/arm/include/asm/smp.h +++ b/arch/arm/include/asm/smp.h @@ -48,7 +48,7 @@ extern void set_smp_ipi_range(int ipi_base, int nr_ipi); * Called from platform specific assembly code, this is the * secondary CPU entry point. */ -asmlinkage void secondary_start_kernel(void); +asmlinkage void secondary_start_kernel(unsigned int cpu); /* @@ -61,6 +61,7 @@ struct secondary_data { }; unsigned long swapper_pg_dir; void *stack; + unsigned int cpu; }; extern struct secondary_data secondary_data; extern void secondary_startup(void); diff --git a/arch/arm/kernel/head-nommu.S b/arch/arm/kernel/head-nommu.S index 0fc814bbc34b..5aa8ef42717f 100644 --- a/arch/arm/kernel/head-nommu.S +++ b/arch/arm/kernel/head-nommu.S @@ -114,6 +114,7 @@ ENTRY(secondary_startup) add r12, r12, r10 ret r12 1: bl __after_proc_init + ldr r0, [r7, #16] @ set up cpu number ldr sp, [r7, #12] @ set up the stack pointer mov fp, #0 b secondary_start_kernel diff --git a/arch/arm/kernel/head.S b/arch/arm/kernel/head.S index 7f62c5eccdf3..0e541af738e2 100644 --- a/arch/arm/kernel/head.S +++ b/arch/arm/kernel/head.S @@ -394,6 +394,7 @@ ENDPROC(secondary_startup_arm) ENTRY(__secondary_switched) ldr_l r7, secondary_data + 12 @ get secondary_data.stack + ldr_l r0, secondary_data + 16 @ get secondary_data.cpu mov sp, r7 mov fp, #0 b secondary_start_kernel diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index 73ca7797b92f..ca0201635fac 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -532,12 +532,6 @@ void notrace cpu_init(void) BUG(); } - /* - * This only works on resume and secondary cores. For booting on the - * boot cpu, smp_prepare_boot_cpu is called after percpu area setup. - */ - set_my_cpu_offset(per_cpu_offset(cpu)); - cpu_proc_init(); /* diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 74679240a9d8..55cb1689a4b3 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -153,6 +153,7 @@ int __cpu_up(unsigned int cpu, struct task_struct *idle) secondary_data.pgdir = virt_to_phys(idmap_pgd); secondary_data.swapper_pg_dir = get_arch_pgd(swapper_pg_dir); #endif + secondary_data.cpu = cpu; sync_cache_w(&secondary_data); /* @@ -373,11 +374,14 @@ void arch_cpu_idle_dead(void) * cpu initialisation. There's some initialisation which needs * to be repeated to undo the effects of taking the CPU offline. */ - __asm__("mov sp, %0\n" + __asm__("mov r0, %1\n" + " mov sp, %0\n" " mov fp, #0\n" " b secondary_start_kernel" : - : "r" (task_stack_page(current) + THREAD_SIZE - 8)); + : "r" (task_stack_page(current) + THREAD_SIZE - 8), + "r" (cpu) + : "r0"); } #endif /* CONFIG_HOTPLUG_CPU */ @@ -400,10 +404,11 @@ static void smp_store_cpu_info(unsigned int cpuid) * This is the secondary CPU boot entry. We're using this CPUs * idle thread stack, but a set of temporary page tables. */ -asmlinkage void secondary_start_kernel(void) +asmlinkage void secondary_start_kernel(unsigned int cpu) { struct mm_struct *mm = &init_mm; - unsigned int cpu; + + set_my_cpu_offset(per_cpu_offset(cpu)); secondary_biglittle_init(); @@ -420,7 +425,6 @@ asmlinkage void secondary_start_kernel(void) * All kernel threads share the same mm context; grab a * reference and switch to it. */ - cpu = smp_processor_id(); mmgrab(mm); current->active_mm = mm; cpumask_set_cpu(cpu, mm_cpumask(mm)); From patchwork Wed Sep 8 19:06:01 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keith Packard X-Patchwork-Id: 508254 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIM_ADSP_ALL, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 056B4C433EF for ; Wed, 8 Sep 2021 19:06:55 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id E5A8A61158 for ; Wed, 8 Sep 2021 19:06:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350941AbhIHTH7 (ORCPT ); Wed, 8 Sep 2021 15:07:59 -0400 Received: from home.keithp.com ([63.227.221.253]:35594 "EHLO elaine.keithp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350387AbhIHTHa (ORCPT ); Wed, 8 Sep 2021 15:07:30 -0400 Received: from localhost (localhost [127.0.0.1]) by elaine.keithp.com (Postfix) with ESMTP id DA45E3F30882; Wed, 8 Sep 2021 12:05:49 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at keithp.com Received: from elaine.keithp.com ([127.0.0.1]) by localhost (elaine.keithp.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id ZJ8V24QNtY-4; Wed, 8 Sep 2021 12:05:49 -0700 (PDT) Received: from keithp.com (168-103-156-98.tukw.qwest.net [168.103.156.98]) by elaine.keithp.com (Postfix) with ESMTPSA id 769D03F30883; Wed, 8 Sep 2021 12:05:48 -0700 (PDT) Received: by keithp.com (Postfix, from userid 1000) id 593CF1E60132; Wed, 8 Sep 2021 12:06:09 -0700 (PDT) From: Keith Packard To: linux-kernel@vger.kernel.org Cc: Abbott Liu , Alexei Starovoitov , Andrew Morton , Andrii Nakryiko , Anshuman Khandual , Ard Biesheuvel , Arnd Bergmann , Ben Segall , Bjorn Andersson , bpf@vger.kernel.org, Christoph Lameter , Daniel Borkmann , Daniel Bristot de Oliveira , Dennis Zhou , devicetree@vger.kernel.org, Dietmar Eggemann , Florian Fainelli , Frank Rowand , Geert Uytterhoeven , Ingo Molnar , Jason Wang , Jens Axboe , Joe Perches , John Fastabend , Juri Lelli , Keith Packard , KP Singh , kvm@vger.kernel.org, Linus Walleij , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, Manivannan Sadhasivam , Marc Zyngier , Martin KaFai Lau , Mel Gorman , Michael Ellerman , "Michael S. Tsirkin" , Miguel Ojeda , Mike Rapoport , netdev@vger.kernel.org, Nick Desaulniers , Nick Desaulniers , Nicolas Pitre , Peter Zijlstra , Rob Herring , Russell King , Song Liu , Srikar Dronamraju , Steven Rostedt , Tejun Heo , Thomas Gleixner , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Valentin Schneider , Vincent Guittot , virtualization@lists.linux-foundation.org, "Wolfram Sang (Renesas)" , YiFei Zhu , Yonghong Song Subject: [PATCH v4 3/7] ARM: Use smp_processor_id() in vfp_pm_suspend instead of ti->cpu Date: Wed, 8 Sep 2021 12:06:01 -0700 Message-Id: <20210908190605.419064-4-keithpac@amazon.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210908190605.419064-1-keithpac@amazon.com> References: <20210908190605.419064-1-keithpac@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org These are equivalent when thread_info contains the CPU value, but when THREAD_INFO_IN_TASK is enabled, cpu moves to task_struct. Using the macro allows either. Signed-off-by: Keith Packard --- arch/arm/vfp/vfpmodule.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/vfp/vfpmodule.c b/arch/arm/vfp/vfpmodule.c index 2cb355c1b5b7..d7a3818da671 100644 --- a/arch/arm/vfp/vfpmodule.c +++ b/arch/arm/vfp/vfpmodule.c @@ -458,16 +458,16 @@ static int vfp_pm_suspend(void) /* disable, just in case */ fmxr(FPEXC, fmrx(FPEXC) & ~FPEXC_EN); - } else if (vfp_current_hw_state[ti->cpu]) { + } else if (vfp_current_hw_state[smp_processor_id()]) { #ifndef CONFIG_SMP fmxr(FPEXC, fpexc | FPEXC_EN); - vfp_save_state(vfp_current_hw_state[ti->cpu], fpexc); + vfp_save_state(vfp_current_hw_state[smp_processor_id()], fpexc); fmxr(FPEXC, fpexc); #endif } /* clear any information we had about last context state */ - vfp_current_hw_state[ti->cpu] = NULL; + vfp_current_hw_state[smp_processor_id()] = NULL; return 0; } From patchwork Wed Sep 8 19:06:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Keith Packard X-Patchwork-Id: 508255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIM_ADSP_ALL, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI, SPF_HELO_NONE, SPF_PASS, USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 81881C433F5 for ; Wed, 8 Sep 2021 19:06:37 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 62996610A3 for ; Wed, 8 Sep 2021 19:06:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350070AbhIHTHe (ORCPT ); Wed, 8 Sep 2021 15:07:34 -0400 Received: from home.keithp.com ([63.227.221.253]:35678 "EHLO elaine.keithp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350414AbhIHTH3 (ORCPT ); Wed, 8 Sep 2021 15:07:29 -0400 Received: from localhost (localhost [127.0.0.1]) by elaine.keithp.com (Postfix) with ESMTP id C1B3A3F3088B; Wed, 8 Sep 2021 12:05:51 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at keithp.com Received: from elaine.keithp.com ([127.0.0.1]) by localhost (elaine.keithp.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id hA43RMvmbiP7; Wed, 8 Sep 2021 12:05:51 -0700 (PDT) Received: from keithp.com (168-103-156-98.tukw.qwest.net [168.103.156.98]) by elaine.keithp.com (Postfix) with ESMTPSA id 2D6443F30884; Wed, 8 Sep 2021 12:05:49 -0700 (PDT) Received: by keithp.com (Postfix, from userid 1000) id 61B2C1E6013B; Wed, 8 Sep 2021 12:06:09 -0700 (PDT) From: Keith Packard To: linux-kernel@vger.kernel.org Cc: Abbott Liu , Alexei Starovoitov , Andrew Morton , Andrii Nakryiko , Anshuman Khandual , Ard Biesheuvel , Arnd Bergmann , Ben Segall , Bjorn Andersson , bpf@vger.kernel.org, Christoph Lameter , Daniel Borkmann , Daniel Bristot de Oliveira , Dennis Zhou , devicetree@vger.kernel.org, Dietmar Eggemann , Florian Fainelli , Frank Rowand , Geert Uytterhoeven , Ingo Molnar , Jason Wang , Jens Axboe , Joe Perches , John Fastabend , Juri Lelli , Keith Packard , KP Singh , kvm@vger.kernel.org, Linus Walleij , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, Manivannan Sadhasivam , Marc Zyngier , Martin KaFai Lau , Mel Gorman , Michael Ellerman , "Michael S. Tsirkin" , Miguel Ojeda , Mike Rapoport , netdev@vger.kernel.org, Nick Desaulniers , Nick Desaulniers , Nicolas Pitre , Peter Zijlstra , Rob Herring , Russell King , Song Liu , Srikar Dronamraju , Steven Rostedt , Tejun Heo , Thomas Gleixner , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Valentin Schneider , Vincent Guittot , virtualization@lists.linux-foundation.org, "Wolfram Sang (Renesas)" , YiFei Zhu , Yonghong Song Subject: [PATCH v4 5/7] ARM: Stop using TPIDRPRW to hold per_cpu_offset Date: Wed, 8 Sep 2021 12:06:03 -0700 Message-Id: <20210908190605.419064-6-keithpac@amazon.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210908190605.419064-1-keithpac@amazon.com> References: <20210908190605.419064-1-keithpac@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org We're going to store TPIDRPRW here instead Signed-off-by: Keith Packard --- arch/arm/include/asm/percpu.h | 31 ------------------------------- arch/arm/kernel/setup.c | 7 ------- arch/arm/kernel/smp.c | 3 --- 3 files changed, 41 deletions(-) diff --git a/arch/arm/include/asm/percpu.h b/arch/arm/include/asm/percpu.h index e2fcb3cfd3de..eeafcd6a3e01 100644 --- a/arch/arm/include/asm/percpu.h +++ b/arch/arm/include/asm/percpu.h @@ -7,37 +7,6 @@ register unsigned long current_stack_pointer asm ("sp"); -/* - * Same as asm-generic/percpu.h, except that we store the per cpu offset - * in the TPIDRPRW. TPIDRPRW only exists on V6K and V7 - */ -#if defined(CONFIG_SMP) && !defined(CONFIG_CPU_V6) -static inline void set_my_cpu_offset(unsigned long off) -{ - /* Set TPIDRPRW */ - asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (off) : "memory"); -} - -static inline unsigned long __my_cpu_offset(void) -{ - unsigned long off; - - /* - * Read TPIDRPRW. - * We want to allow caching the value, so avoid using volatile and - * instead use a fake stack read to hazard against barrier(). - */ - asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (off) - : "Q" (*(const unsigned long *)current_stack_pointer)); - - return off; -} -#define __my_cpu_offset __my_cpu_offset() -#else -#define set_my_cpu_offset(x) do {} while(0) - -#endif /* CONFIG_SMP */ - #include #endif /* _ASM_ARM_PERCPU_H_ */ diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index ca0201635fac..d0dc60afe54f 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -590,13 +590,6 @@ void __init smp_setup_processor_id(void) for (i = 1; i < nr_cpu_ids; ++i) cpu_logical_map(i) = i == cpu ? 0 : i; - /* - * clear __my_cpu_offset on boot CPU to avoid hang caused by - * using percpu variable early, for example, lockdep will - * access percpu variable inside lock_release - */ - set_my_cpu_offset(0); - pr_info("Booting Linux on physical CPU 0x%x\n", mpidr); } diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 5e999f1f1aea..8ccf10b34f08 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -410,8 +410,6 @@ asmlinkage void secondary_start_kernel(unsigned int cpu, struct task_struct *tas { struct mm_struct *mm = &init_mm; - set_my_cpu_offset(per_cpu_offset(cpu)); - secondary_biglittle_init(); /* @@ -495,7 +493,6 @@ void __init smp_cpus_done(unsigned int max_cpus) void __init smp_prepare_boot_cpu(void) { - set_my_cpu_offset(per_cpu_offset(smp_processor_id())); } void __init smp_prepare_cpus(unsigned int max_cpus) From patchwork Wed Sep 8 19:06:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Keith Packard X-Patchwork-Id: 508253 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIM_ADSP_ALL, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0FB8C433EF for ; Wed, 8 Sep 2021 19:07:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C97E161179 for ; Wed, 8 Sep 2021 19:07:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1350330AbhIHTHz (ORCPT ); Wed, 8 Sep 2021 15:07:55 -0400 Received: from home.keithp.com ([63.227.221.253]:35746 "EHLO elaine.keithp.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1350339AbhIHTHa (ORCPT ); Wed, 8 Sep 2021 15:07:30 -0400 Received: from localhost (localhost [127.0.0.1]) by elaine.keithp.com (Postfix) with ESMTP id 4C7193F30884; Wed, 8 Sep 2021 12:05:52 -0700 (PDT) X-Virus-Scanned: Debian amavisd-new at keithp.com Received: from elaine.keithp.com ([127.0.0.1]) by localhost (elaine.keithp.com [127.0.0.1]) (amavisd-new, port 10024) with LMTP id hrJI3NCUC0ro; Wed, 8 Sep 2021 12:05:51 -0700 (PDT) Received: from keithp.com (168-103-156-98.tukw.qwest.net [168.103.156.98]) by elaine.keithp.com (Postfix) with ESMTPSA id 2E7DD3F30890; Wed, 8 Sep 2021 12:05:49 -0700 (PDT) Received: by keithp.com (Postfix, from userid 1000) id 65CAB1E6013C; Wed, 8 Sep 2021 12:06:09 -0700 (PDT) From: Keith Packard To: linux-kernel@vger.kernel.org Cc: Abbott Liu , Alexei Starovoitov , Andrew Morton , Andrii Nakryiko , Anshuman Khandual , Ard Biesheuvel , Arnd Bergmann , Ben Segall , Bjorn Andersson , bpf@vger.kernel.org, Christoph Lameter , Daniel Borkmann , Daniel Bristot de Oliveira , Dennis Zhou , devicetree@vger.kernel.org, Dietmar Eggemann , Florian Fainelli , Frank Rowand , Geert Uytterhoeven , Ingo Molnar , Jason Wang , Jens Axboe , Joe Perches , John Fastabend , Juri Lelli , Keith Packard , KP Singh , kvm@vger.kernel.org, Linus Walleij , linux-arch@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mm@kvack.org, Manivannan Sadhasivam , Marc Zyngier , Martin KaFai Lau , Mel Gorman , Michael Ellerman , "Michael S. Tsirkin" , Miguel Ojeda , Mike Rapoport , netdev@vger.kernel.org, Nick Desaulniers , Nick Desaulniers , Nicolas Pitre , Peter Zijlstra , Rob Herring , Russell King , Song Liu , Srikar Dronamraju , Steven Rostedt , Tejun Heo , Thomas Gleixner , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Valentin Schneider , Vincent Guittot , virtualization@lists.linux-foundation.org, "Wolfram Sang (Renesas)" , YiFei Zhu , Yonghong Song Subject: [PATCH v4 6/7] ARM: Use TPIDRPRW for current Date: Wed, 8 Sep 2021 12:06:04 -0700 Message-Id: <20210908190605.419064-7-keithpac@amazon.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210908190605.419064-1-keithpac@amazon.com> References: <20210908190605.419064-1-keithpac@amazon.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org Store current task pointer in CPU thread ID register TPIDRPRW so that accessing it doesn't depend on being able to locate thread_info off of the kernel stack pointer. Signed-off-by: Keith Packard --- arch/arm/Kconfig | 4 +++ arch/arm/include/asm/assembler.h | 8 +++++ arch/arm/include/asm/current.h | 54 ++++++++++++++++++++++++++++++++ arch/arm/kernel/entry-armv.S | 4 +++ arch/arm/kernel/setup.c | 1 + arch/arm/kernel/smp.c | 1 + 6 files changed, 72 insertions(+) create mode 100644 arch/arm/include/asm/current.h diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 24804f11302d..414fe23fd5ac 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1172,6 +1172,10 @@ config SMP_ON_UP If you don't know what to do here, say Y. +config CURRENT_POINTER_IN_TPIDRPRW + def_bool y + depends on (CPU_V6K || CPU_V7) && !CPU_V6 + config ARM_CPU_TOPOLOGY bool "Support cpu topology definition" depends on SMP && CPU_V7 diff --git a/arch/arm/include/asm/assembler.h b/arch/arm/include/asm/assembler.h index e2b1fd558bf3..ea12fe3bb589 100644 --- a/arch/arm/include/asm/assembler.h +++ b/arch/arm/include/asm/assembler.h @@ -209,6 +209,14 @@ mov \rd, \rd, lsl #THREAD_SIZE_ORDER + PAGE_SHIFT .endm +/* + * Set current task_info + * @src: Source register containing task_struct pointer + */ + .macro set_current src : req + mcr p15, 0, \src, c13, c0, 4 + .endm + /* * Increment/decrement the preempt count. */ diff --git a/arch/arm/include/asm/current.h b/arch/arm/include/asm/current.h new file mode 100644 index 000000000000..ec25737855e5 --- /dev/null +++ b/arch/arm/include/asm/current.h @@ -0,0 +1,54 @@ +/* SPDX-License-Identifier: GPL-2.0 */ +/* + * Copyright © 2021 Amazon.com, Inc. or its affiliates. All Rights Reserved. + * + * Author Keith Packard + */ + +#ifndef _ASM_ARM_CURRENT_H_ +#define _ASM_ARM_CURRENT_H_ + +#ifndef __ASSEMBLY__ + +register unsigned long current_stack_pointer asm ("sp"); + +/* + * Same as asm-generic/current.h, except that we store current + * in TPIDRPRW. TPIDRPRW only exists on V6K and V7 + */ +#ifdef CONFIG_CURRENT_POINTER_IN_TPIDRPRW + +struct task_struct; + +static inline void set_current(struct task_struct *tsk) +{ + /* Set TPIDRPRW */ + asm volatile("mcr p15, 0, %0, c13, c0, 4" : : "r" (tsk) : "memory"); +} + +static __always_inline struct task_struct *get_current(void) +{ + struct task_struct *tsk; + + /* + * Read TPIDRPRW. + * We want to allow caching the value, so avoid using volatile and + * instead use a fake stack read to hazard against barrier(). + */ + asm("mrc p15, 0, %0, c13, c0, 4" : "=r" (tsk) + : "Q" (*(const unsigned long *)current_stack_pointer)); + + return tsk; +} +#define current get_current() +#else + +#define set_current(tsk) do {} while (0) + +#include + +#endif /* CONFIG_SMP */ + +#endif /* __ASSEMBLY__ */ + +#endif /* _ASM_ARM_CURRENT_H_ */ diff --git a/arch/arm/kernel/entry-armv.S b/arch/arm/kernel/entry-armv.S index 0ea8529a4872..db3947ee9c3e 100644 --- a/arch/arm/kernel/entry-armv.S +++ b/arch/arm/kernel/entry-armv.S @@ -761,6 +761,10 @@ ENTRY(__switch_to) ldr r6, [r2, #TI_CPU_DOMAIN] #endif switch_tls r1, r4, r5, r3, r7 +#ifdef CONFIG_CURRENT_POINTER_IN_TPIDRPRW + ldr r7, [r2, #TI_TASK] + set_current r7 +#endif #if defined(CONFIG_STACKPROTECTOR) && !defined(CONFIG_SMP) ldr r7, [r2, #TI_TASK] ldr r8, =__stack_chk_guard diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c index d0dc60afe54f..2fdf8c31d6c9 100644 --- a/arch/arm/kernel/setup.c +++ b/arch/arm/kernel/setup.c @@ -586,6 +586,7 @@ void __init smp_setup_processor_id(void) u32 mpidr = is_smp() ? read_cpuid_mpidr() & MPIDR_HWID_BITMASK : 0; u32 cpu = MPIDR_AFFINITY_LEVEL(mpidr, 0); + set_current(&init_task); cpu_logical_map(0) = cpu; for (i = 1; i < nr_cpu_ids; ++i) cpu_logical_map(i) = i == cpu ? 0 : i; diff --git a/arch/arm/kernel/smp.c b/arch/arm/kernel/smp.c index 8ccf10b34f08..09771916442a 100644 --- a/arch/arm/kernel/smp.c +++ b/arch/arm/kernel/smp.c @@ -410,6 +410,7 @@ asmlinkage void secondary_start_kernel(unsigned int cpu, struct task_struct *tas { struct mm_struct *mm = &init_mm; + set_current(task); secondary_biglittle_init(); /*