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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:21 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 01/10] hw/acpi: Add VIOT table Date: Tue, 14 Sep 2021 15:19:56 +0100 Message-Id: <20210914142004.2433568-2-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add a function that generates a Virtual I/O Translation table (VIOT), describing the topology of paravirtual IOMMUs. The table is created when instantiating a virtio-iommu device. It contains a virtio-iommu node and PCI Range nodes for endpoints managed by the IOMMU. By default, a single node describes all PCI devices. When passing the "default_bus_bypass_iommu" machine option and "bypass_iommu" PXB option, only buses that do not bypass the IOMMU are described by PCI Range nodes. Signed-off-by: Jean-Philippe Brucker --- Sizes and types are hardcoded because it will now be the default style https://lore.kernel.org/qemu-devel/20210708154617.1538485-1-imammedo@redhat.com/ --- hw/acpi/viot.h | 13 +++++ hw/acpi/viot.c | 112 ++++++++++++++++++++++++++++++++++++++++++++ hw/acpi/Kconfig | 4 ++ hw/acpi/meson.build | 1 + 4 files changed, 130 insertions(+) create mode 100644 hw/acpi/viot.h create mode 100644 hw/acpi/viot.c -- 2.33.0 Reviewed-by: Eric Auger Tested-by: Eric Auger diff --git a/hw/acpi/viot.h b/hw/acpi/viot.h new file mode 100644 index 0000000000..4cef29a640 --- /dev/null +++ b/hw/acpi/viot.h @@ -0,0 +1,13 @@ +/* + * ACPI Virtual I/O Translation Table implementation + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#ifndef VIOT_H +#define VIOT_H + +void build_viot(GArray *table_data, BIOSLinker *linker, + uint16_t virtio_iommu_bdf, const char *oem_id, + const char *oem_table_id); + +#endif /* VIOT_H */ diff --git a/hw/acpi/viot.c b/hw/acpi/viot.c new file mode 100644 index 0000000000..e7f7605119 --- /dev/null +++ b/hw/acpi/viot.c @@ -0,0 +1,112 @@ +/* + * ACPI Virtual I/O Translation table implementation + * + * SPDX-License-Identifier: GPL-2.0-or-later + */ +#include "qemu/osdep.h" +#include "hw/acpi/acpi.h" +#include "hw/acpi/aml-build.h" +#include "hw/acpi/viot.h" +#include "hw/pci/pci.h" +#include "hw/pci/pci_host.h" + +struct viot_pci_ranges { + GArray *blob; + size_t count; + uint16_t output_node; +}; + +/* Build PCI range for a given PCI host bridge */ +static int viot_host_bridges(Object *obj, void *opaque) +{ + struct viot_pci_ranges *pci_ranges = opaque; + GArray *blob = pci_ranges->blob; + + if (object_dynamic_cast(obj, TYPE_PCI_HOST_BRIDGE)) { + PCIBus *bus = PCI_HOST_BRIDGE(obj)->bus; + + if (bus && !pci_bus_bypass_iommu(bus)) { + int min_bus, max_bus; + + pci_bus_range(bus, &min_bus, &max_bus); + + /* Type (PCI range) */ + build_append_int_noprefix(blob, 1, 1); + /* Reserved */ + build_append_int_noprefix(blob, 0, 1); + /* Length */ + build_append_int_noprefix(blob, 24, 2); + /* Endpoint start */ + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 4); + /* PCI Segment start */ + build_append_int_noprefix(blob, 0, 2); + /* PCI Segment end */ + build_append_int_noprefix(blob, 0, 2); + /* PCI BDF start */ + build_append_int_noprefix(blob, PCI_BUILD_BDF(min_bus, 0), 2); + /* PCI BDF end */ + build_append_int_noprefix(blob, PCI_BUILD_BDF(max_bus, 0xff), 2); + /* Output node */ + build_append_int_noprefix(blob, pci_ranges->output_node, 2); + /* Reserved */ + build_append_int_noprefix(blob, 0, 6); + + pci_ranges->count++; + } + } + + return 0; +} + +/* + * Generate a VIOT table with one PCI-based virtio-iommu that manages PCI + * endpoints. + */ +void build_viot(GArray *table_data, BIOSLinker *linker, + uint16_t virtio_iommu_bdf, const char *oem_id, + const char *oem_table_id) +{ + /* The virtio-iommu node follows the 48-bytes header */ + int viommu_off = 48; + AcpiTable table = { .sig = "VIOT", .rev = 0, + .oem_id = oem_id, .oem_table_id = oem_table_id }; + struct viot_pci_ranges pci_ranges = { + .output_node = viommu_off, + .blob = g_array_new(false, true, 1), + }; + + /* Build the list of PCI ranges that this viommu manages */ + object_child_foreach_recursive(object_get_root(), viot_host_bridges, + &pci_ranges); + + /* ACPI table header */ + acpi_table_begin(&table, table_data); + /* Node count */ + build_append_int_noprefix(table_data, pci_ranges.count + 1, 2); + /* Node offset */ + build_append_int_noprefix(table_data, viommu_off, 2); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 8); + + /* Virtio-iommu node */ + /* Type (virtio-pci IOMMU) */ + build_append_int_noprefix(table_data, 3, 1); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 1); + /* Length */ + build_append_int_noprefix(table_data, 16, 2); + /* PCI Segment */ + build_append_int_noprefix(table_data, 0, 2); + /* PCI BDF number */ + build_append_int_noprefix(table_data, virtio_iommu_bdf, 2); + /* Reserved */ + build_append_int_noprefix(table_data, 0, 8); + + /* PCI ranges found above */ + g_array_append_vals(table_data, pci_ranges.blob->data, + pci_ranges.blob->len); + g_array_free(pci_ranges.blob, true); + + acpi_table_end(linker, &table); +} + diff --git a/hw/acpi/Kconfig b/hw/acpi/Kconfig index 3b5e118c54..622b0b50b7 100644 --- a/hw/acpi/Kconfig +++ b/hw/acpi/Kconfig @@ -51,6 +51,10 @@ config ACPI_VMGENID default y depends on PC +config ACPI_VIOT + bool + depends on ACPI + config ACPI_HW_REDUCED bool select ACPI diff --git a/hw/acpi/meson.build b/hw/acpi/meson.build index 7d8c0eb43e..adf6347bc4 100644 --- a/hw/acpi/meson.build +++ b/hw/acpi/meson.build @@ -20,6 +20,7 @@ acpi_ss.add(when: 'CONFIG_ACPI_APEI', if_true: files('ghes.c'), if_false: files( acpi_ss.add(when: 'CONFIG_ACPI_PIIX4', if_true: files('piix4.c')) acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_true: files('pcihp.c')) acpi_ss.add(when: 'CONFIG_ACPI_PCIHP', if_false: files('acpi-pci-hotplug-stub.c')) +acpi_ss.add(when: 'CONFIG_ACPI_VIOT', if_true: files('viot.c')) acpi_ss.add(when: 'CONFIG_ACPI_X86_ICH', if_true: files('ich9.c', 'tco.c')) acpi_ss.add(when: 'CONFIG_IPMI', if_true: files('ipmi.c'), if_false: files('ipmi-stub.c')) acpi_ss.add(when: 'CONFIG_PC', if_false: files('acpi-x86-stub.c')) From patchwork Tue Sep 14 14:19:57 2021 Content-Type: text/plain; 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[209.51.188.17]) by mx.google.com with ESMTPS id f3si1370760wmh.109.2021.09.14.07.50.41 for (version=TLS1_2 cipher=ECDHE-ECDSA-CHACHA20-POLY1305 bits=256/256); Tue, 14 Sep 2021 07:50:41 -0700 (PDT) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ikX0MxOG; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:51648 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mQ9lg-0006Qz-Lv for patch@linaro.org; Tue, 14 Sep 2021 10:50:40 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:35850) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mQ9MP-00069q-MI for qemu-devel@nongnu.org; Tue, 14 Sep 2021 10:24:35 -0400 Received: from mail-wm1-x330.google.com ([2a00:1450:4864:20::330]:41950) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) (Exim 4.90_1) (envelope-from ) id 1mQ9MH-0005LX-Jw for qemu-devel@nongnu.org; Tue, 14 Sep 2021 10:24:33 -0400 Received: by mail-wm1-x330.google.com with SMTP id g19-20020a1c9d13000000b003075062d4daso2733733wme.0 for ; Tue, 14 Sep 2021 07:24:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=0fqwWGJNfdFrIuKBkB90SJ27CXrBjDpDxVfvD5zH9+o=; b=ikX0MxOG6IAUlITtLbcw4wbSyLIcc0o+qrwMwLPwRMKTCBMmqMDZltQ5vcTOKft6Jm +QZhudG4dvnOHpvFaM4T8k5jglDjZ4bFskzMBrk7WJzdTG7OhfWVtM1njBgDVFK8gkeN 2Gu3lfF599L8vYP1gRtPVC9NcyR5w8ln9gLPeltLQ2U0AYOGQdQCDfPlgpg6DwkfvUb9 w1icE341tuY+ZlazSxdv0JClL0EVP4L5DAwucqsNrF3GtCqdPognOOofAzHPl0QTSklq LDyShFmgbE6eENMpOvBWzqQtBM8zcgd+IwXiGbh8bZlyzKM/4i1VcoOGZzgZLv82oAQP hN9A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=0fqwWGJNfdFrIuKBkB90SJ27CXrBjDpDxVfvD5zH9+o=; b=fE6e0BtPvzOx/kSLDN2r0lyopv5LxnRAelAMmEG+VgUYN4FE5nl00/bGcdHEv9jf6d n4Gmam5v1LGerseBrmC9OrALwRlK9ByJrntnxb6bj49/bzCdkE9RN6cQS3xZPpRtRSx2 2L/lN9d+Jnw5VRs0z1v6Ia8zQZtqPLE6zba5iqN7M/tm96beSh/4j6uL8Q8cA9Zeg/UO tb16SS2l18H+ZUJMQWHU3Nh3Ck+OOZDzVgzK+YJ6CJUR3al/qb0CBM7eGPn+CS+LZKf/ p63q4z+keRGoFkkZvT8ayB7M6Rn8wvI7YO5R+FlyJqGJxsd9gsVyhmPojdYZeW7+Bicp orlQ== X-Gm-Message-State: AOAM533QTEFpnCrPVryW6fxXz2qeLU2GnfFxKURVftvNg+mUxJZKLEUB o+lrYvpVQPM1gNRsYreqPH7PU7zR30/C+w== X-Received: by 2002:a1c:9a85:: with SMTP id c127mr2507326wme.174.1631629463129; Tue, 14 Sep 2021 07:24:23 -0700 (PDT) Received: from localhost.localdomain (cpc92880-cmbg19-2-0-cust679.5-4.cable.virginm.net. [82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:22 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 02/10] hw/arm/virt-acpi-build: Add VIOT table for virtio-iommu Date: Tue, 14 Sep 2021 15:19:57 +0100 Message-Id: <20210914142004.2433568-3-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::330; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x330.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" When a virtio-iommu is instantiated, describe it using the ACPI VIOT table. Reviewed-by: Eric Auger Signed-off-by: Jean-Philippe Brucker --- hw/arm/virt-acpi-build.c | 7 +++++++ hw/arm/Kconfig | 1 + 2 files changed, 8 insertions(+) -- 2.33.0 diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index ebe9d1726f..23c2e1aaf2 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -55,6 +55,7 @@ #include "kvm_arm.h" #include "migration/vmstate.h" #include "hw/acpi/ghes.h" +#include "hw/acpi/viot.h" #define ARM_SPI_BASE 32 @@ -928,6 +929,12 @@ void virt_acpi_build(VirtMachineState *vms, AcpiBuildTables *tables) } #endif + if (vms->iommu == VIRT_IOMMU_VIRTIO) { + acpi_add_table(table_offsets, tables_blob); + build_viot(tables_blob, tables->linker, vms->virtio_iommu_bdf, + vms->oem_id, vms->oem_table_id); + } + /* XSDT is pointed to by RSDP */ xsdt = tables_blob->len; build_xsdt(tables_blob, tables->linker, table_offsets, vms->oem_id, diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig index 78fdd1b935..8b04a1d53a 100644 --- a/hw/arm/Kconfig +++ b/hw/arm/Kconfig @@ -27,6 +27,7 @@ config ARM_VIRT select DIMM select ACPI_HW_REDUCED select ACPI_APEI + select ACPI_VIOT config CHEETAH bool From patchwork Tue Sep 14 14:19:58 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 510931 Delivered-To: patch@linaro.org Received: by 2002:a02:c816:0:0:0:0:0 with SMTP id p22csp1607292jao; Tue, 14 Sep 2021 07:36:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwdU31HHyXHIj8E5Oqr5xARza6rFzQKi7+Jg09VhN9ryEy+AwLNdPtlgxsn2xsEKt2/FTHf X-Received: by 2002:a17:906:a59:: with SMTP id x25mr18926606ejf.33.1631630189272; Tue, 14 Sep 2021 07:36:29 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631630189; cv=none; d=google.com; s=arc-20160816; b=gVBPeJT0gVe9CBWJX4eeKeVsYl6qNZ4vLNhVKqYjfIuIY1I9q5l6U+R51MGfHRKgjL /hGzNYdG8Ln6cL8MkcNqBCwJNfN7MVnbvxReFsLh4/oCtqtkWeOgfdbbmkiRwyNzN585 637YmNqmBoBzxtWZ+3iDWFMyabqAU/IjE4wqDMfHuvEjAty1TFOnYJXAJxfp3ZQc7pXQ p0JFNCzFCyGC5nbaFLFefZ9fnBSLPOGZLgH0wAFWLBfhNKkUYkjVor8PI1Pyf84FiUcp p78qYiLSlF2l1Ycgn/skQ4EcdBVLKZcIBpJ7jBKaCKZO3584W5q3nz9qCpksfkqwYeSx V7Og== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=K3EssKNnZXrh2nHfsbAL/+KnNzJUGLWYCayXBQqtwQg=; b=t1Mrsc5piqZMMAhZVb//jQhNietT+R2MPBOdk1yAMBEuL1knmiJnL0oY4cEmGNHOoB y9OkJtd0qQbe1f+gTQwuOqxPEr65KkXqAzCrFEeBxRJnJa5l1DlF0ALj2jHy3ZH1aWY/ Co/7IFYZ+ICNC/C9oraAsQ+WBlneNLK05/WnWPiPaOdYkJDvVpte+m8edeL9e9p7/fAM HqFHsTBArIYLn+zYHcpcMPDhU//AXyKAtNkBbAc10z1ROb5gg7foWPsRCL7FkzPWFOaQ j4p96M/HwvM3+SnzBxvMD1FHVPjP7nIuNXrjO8Pfk4YU9Q93SAI5raEcIQC4+yRTSYkY 3qqw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=GQ8uMDlm; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:23 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 03/10] hw/arm/virt: Remove device tree restriction for virtio-iommu Date: Tue, 14 Sep 2021 15:19:58 +0100 Message-Id: <20210914142004.2433568-4-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::336; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x336.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" virtio-iommu is now supported with ACPI VIOT as well as device tree. Remove the restriction that prevents from instantiating a virtio-iommu device under ACPI. Reviewed-by: Eric Auger Signed-off-by: Jean-Philippe Brucker --- hw/arm/virt.c | 10 ++-------- hw/virtio/virtio-iommu-pci.c | 7 ------- 2 files changed, 2 insertions(+), 15 deletions(-) -- 2.33.0 diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 73e9c6bb7c..f238766aa1 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2547,16 +2547,10 @@ static HotplugHandler *virt_machine_get_hotplug_handler(MachineState *machine, MachineClass *mc = MACHINE_GET_CLASS(machine); if (device_is_dynamic_sysbus(mc, dev) || - (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM))) { + object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { return HOTPLUG_HANDLER(machine); } - if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { - VirtMachineState *vms = VIRT_MACHINE(machine); - - if (!vms->bootinfo.firmware_loaded || !virt_is_acpi_enabled(vms)) { - return HOTPLUG_HANDLER(machine); - } - } return NULL; } diff --git a/hw/virtio/virtio-iommu-pci.c b/hw/virtio/virtio-iommu-pci.c index 770c286be7..f30eb16cbf 100644 --- a/hw/virtio/virtio-iommu-pci.c +++ b/hw/virtio/virtio-iommu-pci.c @@ -48,16 +48,9 @@ static void virtio_iommu_pci_realize(VirtIOPCIProxy *vpci_dev, Error **errp) VirtIOIOMMU *s = VIRTIO_IOMMU(vdev); if (!qdev_get_machine_hotplug_handler(DEVICE(vpci_dev))) { - MachineClass *mc = MACHINE_GET_CLASS(qdev_get_machine()); - - error_setg(errp, - "%s machine fails to create iommu-map device tree bindings", - mc->name); error_append_hint(errp, "Check your machine implements a hotplug handler " "for the virtio-iommu-pci device\n"); - error_append_hint(errp, "Check the guest is booted without FW or with " - "-no-acpi\n"); return; } for (int i = 0; i < s->nb_reserved_regions; i++) { From patchwork Tue Sep 14 14:19:59 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 510940 Delivered-To: patch@linaro.org Received: by 2002:a02:c816:0:0:0:0:0 with SMTP id p22csp1624933jao; Tue, 14 Sep 2021 07:57:48 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwarUeXhoKOEUGaNHxmzCY0El5rJHzGz+B+VqXCKtFEUqLxKI1GJXa/75wHfi3GGGEuRHWN X-Received: by 2002:a25:d946:: with SMTP id q67mr21536757ybg.107.1631631468053; Tue, 14 Sep 2021 07:57:48 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631631468; cv=none; d=google.com; s=arc-20160816; b=JCGTUDr3gdqzwb10hYCOZmMDwR8SKt9fuIC+JClajstJ/S0Fs6XYMh4MsyeMGhMgtA 9XPbR3zC2blEk8AjuX2tC2dzL5aZRqIvTEPW/2mwFQ3swNVVNT7NJ4Rkf1ZP5+tLGIYo UIToLycOb/oNCLfcTagXrSxAnfaCiaDNYcZOJmbvDefWSC0iU+Wl5IS2fIVV/kNWAdQa nv0MO+ghjPRefcg4sx0yI220cEm3htVksKGYUg6tHdpapZgT/ch5AYkbwIEoK3K37qzl NZdRnY7iENpW1CkHYQjPtNI4wvyEIJ2i84KHaBXxNrvITL/+QHl4VNX0mu+OLr0iED3W ++dA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=A36UF6SLZ6rtAL1T4W2mA2INEfGxveQOg5GlQyADzqg=; b=QIXSO3CgJMQoSo3SpP57jqpuV6zglnlFexJguN+5vCUjcs1EJm8tkzl67Dej/5Yf6a 24AxRza6h2OmSIl+VXZd3wHzxe2VjjwjIogjp2MkldZkudauUszIAs8J093F2lV8s04A uex2JOizikgzUnv6nK9Ioro1RFkCJQUHI0K/ti+pZQ9+jHqr4BnEew1D0igyCZY3uHfg HFJafoE53zWbD2CM3msO0GT8Bn8foFoKH5rRRj84OIiXc+zTqWbkKjkcI+FsYYwaqHb/ fwRJmwnuljkuwhhOTsRpxOvb3I7OH8gQmOI7garpmRPTEgxwmTViH39xjZcgcyzXV7+Y yPMg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=ds+QZrm0; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:24 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 04/10] hw/arm/virt: Reject instantiation of multiple IOMMUs Date: Tue, 14 Sep 2021 15:19:59 +0100 Message-Id: <20210914142004.2433568-5-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::329; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x329.google.com X-Spam_score_int: -1 X-Spam_score: -0.2 X-Spam_bar: / X-Spam_report: (-0.2 / 5.0 requ) DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We do not support instantiating multiple IOMMUs. Before adding a virtio-iommu, check that no other IOMMU is present. This will detect both "iommu=smmuv3" machine parameter and another virtio-iommu instance. Fixes: 70e89132c9 ("hw/arm/virt: Add the virtio-iommu device tree mappings") Reviewed-by: Eric Auger Signed-off-by: Jean-Philippe Brucker --- hw/arm/virt.c | 5 +++++ 1 file changed, 5 insertions(+) -- 2.33.0 Tested-by: Eric Auger diff --git a/hw/arm/virt.c b/hw/arm/virt.c index f238766aa1..26069f943a 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -2471,6 +2471,11 @@ static void virt_machine_device_plug_cb(HotplugHandler *hotplug_dev, if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { PCIDevice *pdev = PCI_DEVICE(dev); + if (vms->iommu != VIRT_IOMMU_NONE) { + error_setg(errp, "virt machine does not support multiple IOMMUs"); + return; + } + vms->iommu = VIRT_IOMMU_VIRTIO; vms->virtio_iommu_bdf = pci_get_bdf(pdev); create_virtio_iommu_dt_bindings(vms); From patchwork Tue Sep 14 14:20:00 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 510932 Delivered-To: patch@linaro.org Received: by 2002:a02:c816:0:0:0:0:0 with SMTP id p22csp1608328jao; Tue, 14 Sep 2021 07:37:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwhFmBIvZkykVqH2Cz6EONFvHmxTxMz7gG0jENMLrorUJp+n40Wyk1x9iLu5MIap5nB53fu X-Received: by 2002:adf:fd92:: with SMTP id d18mr19431648wrr.28.1631630257434; Tue, 14 Sep 2021 07:37:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631630257; cv=none; d=google.com; s=arc-20160816; b=07EdytelW9R8wHTOIviVNb3+KVp7k9jEcdHvJyTZgn/6T/i44FBdfxRWEUXXAf0kPC kK6HYPDnYjMqk1DH7AyBMEQvnNnSN9R2BznxCDJ5t/oGAGdbuf13MfmzlsIDpLHL3Rrj PwZgJDCoHyWAKm9PZ6R7gbTdY/lGIAi7nqzUXpx1zgjt0ZpqeNe2dMwvoDuDdy7qwZ1Z 6S1ACqj46xfbNXxIKHyXh7jy0+15fkeuPh0tDphXBFeMLrcXeNvNWU8Ya4tID5S8NJu6 nfYUMWgS9nITid+8lVtql2Vv8yYrKz0/JdE23T5g1HIWmB53WLhm105zO5mXcSqhf1Tu M1yw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=1Dpxbn0fDeE2pqHdIXbZlDNr3pHTinWoeKCEcb3F1QQ=; b=rGaP3ieKBnZmA2sMljeKZCGK+BkWD2IXxo3tEtkk4Yk9E31RJEWl/2i8NObNj0SLIc giZwQJwAqF5TkQCNeN01Mkks6IuXyTTrQweV6nbSd2HUF2MJxcWMsM5m7c8tNppjzJHV h/huabvhs3sfxsAJSPktilJMv7+HWZH56QgmpuvEgfFCWdnl4MqTKixKLMwCfwIQMtmq nOpA3yTEYlqpmdio2zikJ3ov6ao6ZIYVslXdqm4ckD1hKZPyjtimqd3akRCy+YH9twav BR/caFU5x6OtQeuzpdKrbHm5Y/N1aiX9/g+O5pqaExnxNNP972tMd9iO/W9oQaQtnV1p JRYA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=H8s91u5B; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:26 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 05/10] pc: Allow instantiating a virtio-iommu device Date: Tue, 14 Sep 2021 15:20:00 +0100 Message-Id: <20210914142004.2433568-6-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32c; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x32c.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Allow instantiating a virtio-iommu device by adding an ACPI Virtual I/O Translation table (VIOT), which describes the relation between the virtio-iommu and the endpoints it manages. Add a hotplug handler for virtio-iommu on x86 and set the necessary reserved region property. On x86, the [0xfee00000, 0xfeefffff] DMA region is reserved for MSIs. DMA transactions to this range either trigger IRQ remapping in the IOMMU or bypasses IOMMU translation. Although virtio-iommu does not support IRQ remapping it must be informed of the reserved region so that it can forward DMA transactions targeting this region. Signed-off-by: Jean-Philippe Brucker --- include/hw/i386/pc.h | 2 ++ hw/i386/acpi-build.c | 5 +++++ hw/i386/pc.c | 28 +++++++++++++++++++++++++++- hw/i386/Kconfig | 1 + 4 files changed, 35 insertions(+), 1 deletion(-) -- 2.33.0 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index 82cf7b7e30..f3ba1ee4c0 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -45,6 +45,8 @@ typedef struct PCMachineState { bool pit_enabled; bool hpet_enabled; bool default_bus_bypass_iommu; + bool virtio_iommu; + uint16_t virtio_iommu_bdf; uint64_t max_fw_size; /* ACPI Memory hotplug IO base address */ diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 547cd4ed9d..76845026d8 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -71,6 +71,7 @@ #include "hw/acpi/ipmi.h" #include "hw/acpi/hmat.h" +#include "hw/acpi/viot.h" /* These are used to size the ACPI tables for -M pc-i440fx-1.7 and * -M pc-i440fx-2.0. Even if the actual amount of AML generated grows @@ -2593,6 +2594,10 @@ void acpi_build(AcpiBuildTables *tables, MachineState *machine) build_dmar_q35(tables_blob, tables->linker, x86ms->oem_id, x86ms->oem_table_id); } + } else if (pcms->virtio_iommu) { + acpi_add_table(table_offsets, tables_blob); + build_viot(tables_blob, tables->linker, pcms->virtio_iommu_bdf, + x86ms->oem_id, x86ms->oem_table_id); } if (machine->nvdimms_state->is_enabled) { nvdimm_build_acpi(table_offsets, tables_blob, tables->linker, diff --git a/hw/i386/pc.c b/hw/i386/pc.c index 7e523b913c..a31e950599 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -83,6 +83,7 @@ #include "hw/i386/intel_iommu.h" #include "hw/net/ne2000-isa.h" #include "standard-headers/asm-x86/bootparam.h" +#include "hw/virtio/virtio-iommu.h" #include "hw/virtio/virtio-pmem-pci.h" #include "hw/virtio/virtio-mem-pci.h" #include "hw/mem/memory-device.h" @@ -798,6 +799,11 @@ void pc_machine_done(Notifier *notifier, void *data) "irqchip support."); exit(EXIT_FAILURE); } + + if (pcms->virtio_iommu && x86_iommu_get_default()) { + error_report("QEMU does not support multiple vIOMMUs for x86 yet."); + exit(EXIT_FAILURE); + } } void pc_guest_info_init(PCMachineState *pcms) @@ -1368,6 +1374,14 @@ static void pc_machine_device_pre_plug_cb(HotplugHandler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { pc_virtio_md_pci_pre_plug(hotplug_dev, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + /* Declare the reserved MSI region */ + char *resv_prop_str = g_strdup_printf("0xfee00000:0xfeefffff:%d", + VIRTIO_IOMMU_RESV_MEM_T_MSI); + + qdev_prop_set_uint32(dev, "len-reserved-regions", 1); + qdev_prop_set_string(dev, "reserved-regions[0]", resv_prop_str); + g_free(resv_prop_str); } } @@ -1381,6 +1395,17 @@ static void pc_machine_device_plug_cb(HotplugHandler *hotplug_dev, } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { pc_virtio_md_pci_plug(hotplug_dev, dev, errp); + } else if (object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { + PCMachineState *pcms = PC_MACHINE(hotplug_dev); + PCIDevice *pdev = PCI_DEVICE(dev); + + if (pcms->virtio_iommu) { + error_setg(errp, + "QEMU does not support multiple vIOMMUs for x86 yet."); + return; + } + pcms->virtio_iommu = true; + pcms->virtio_iommu_bdf = pci_get_bdf(pdev); } } @@ -1422,7 +1447,8 @@ static HotplugHandler *pc_get_hotplug_handler(MachineState *machine, if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM) || object_dynamic_cast(OBJECT(dev), TYPE_CPU) || object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_PMEM_PCI) || - object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI)) { + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_MEM_PCI) || + object_dynamic_cast(OBJECT(dev), TYPE_VIRTIO_IOMMU_PCI)) { return HOTPLUG_HANDLER(machine); } diff --git a/hw/i386/Kconfig b/hw/i386/Kconfig index ddedcef0b2..13db05d557 100644 --- a/hw/i386/Kconfig +++ b/hw/i386/Kconfig @@ -54,6 +54,7 @@ config PC_ACPI select ACPI_X86 select ACPI_CPU_HOTPLUG select ACPI_MEMORY_HOTPLUG + select ACPI_VIOT select SMBUS_EEPROM select PFLASH_CFI01 depends on ACPI_SMBUS From patchwork Tue Sep 14 14:20:01 2021 Content-Type: text/plain; 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:27 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 06/10] tests/acpi: allow updates of VIOT expected data files Date: Tue, 14 Sep 2021 15:20:01 +0100 Message-Id: <20210914142004.2433568-7-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::334; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x334.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Create empty data files and allow updates for the upcoming VIOT tests. Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test-allowed-diff.h | 3 +++ tests/data/acpi/q35/DSDT.viot | 0 tests/data/acpi/q35/VIOT.viot | 0 tests/data/acpi/virt/VIOT | 0 4 files changed, 3 insertions(+) create mode 100644 tests/data/acpi/q35/DSDT.viot create mode 100644 tests/data/acpi/q35/VIOT.viot create mode 100644 tests/data/acpi/virt/VIOT diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/data/acpi/q35/VIOT.viot b/tests/data/acpi/q35/VIOT.viot new file mode 100644 index 0000000000..e69de29bb2 diff --git a/tests/data/acpi/virt/VIOT b/tests/data/acpi/virt/VIOT new file mode 100644 index 0000000000..e69de29bb2 -- 2.33.0 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..29b5b1eabc 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,4 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/virt/VIOT", +"tests/data/acpi/q35/DSDT.viot", +"tests/data/acpi/q35/VIOT.viot", From patchwork Tue Sep 14 14:20:02 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 510941 Delivered-To: patch@linaro.org Received: by 2002:a02:c816:0:0:0:0:0 with SMTP id p22csp1629098jao; Tue, 14 Sep 2021 08:02:17 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxDaS0NPVDBeiO2o9Pg3393AreTD/HytKQH6qujZtwEvhDS1qIO1YnEM3RrWfiri+HLAABh X-Received: by 2002:a17:906:a59:: with SMTP id x25mr19044266ejf.33.1631631737259; Tue, 14 Sep 2021 08:02:17 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631631737; cv=none; d=google.com; s=arc-20160816; b=s7pQdH5pOqc6oPkcz5Ay9najR0v3e5MxboW5Kif1xMjajQqyzdVMupqY9a0oq3lRPX /DoAOxnB3paf8Wigj4mP79yRXg5FDkvSJHqlIzOkFVdtWcMwwLfRF3jomCF3d5BddYm0 8r77EE/+qE4OaveM7F+jrtEpor8HN3WM0Rjz0vmXy79DdQaDQEZh/JZS4tfnFVySwA9I Yd2iwXZTCH7isG2vad8tkEguADUrjpiXN0KgV1injK1qxRhJM5qi951BBQd9mIHSL/Xh b2ci7JM+Ut1aq4USrqXcx69vg/kUosarlTgxvaJ0xupdfKBFv1aQADRGljhtvlQ4GqG/ B+GQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=3D6Y3PvRWCDvWbbifCcyvKIH074CbOWIFebtpK8KpRk=; b=v2sPZ5ECGs1vKL4IKNbzk+lp/uMyU0IVabI7esSBv99/lBuKVcdfIozBbzcn9QFgXG f6xD2SkfDp7WRatxpC7Pio5pz3Zfp19cDOzAdKUXTYu6Z57nkvjE3gWqG/hG1bsRU4Ah CH7CZOSZNYxqU5GISU05RMpMoaEze65HGEdPk5Re9qcZR6r7GMN9X8475LOL8SN8gUVU KbNaFB+gnneuXPyKr13GDKbUWgktJWsGyGMZl0YKwW7dB5fUXw9lQY1lCF672yjSifH6 9xtjQo66qG4lVxA/Pu0wkzGros7Al3k1VGGyVmSJRX8OKHDQuaUjq86wUI9gYaDLS9X/ ALJw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b="wHr8Bc/x"; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:28 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 07/10] tests/acpi: add test cases for VIOT Date: Tue, 14 Sep 2021 15:20:02 +0100 Message-Id: <20210914142004.2433568-8-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32d; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x32d.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Add two test cases for VIOT, one on the q35 machine and the other on virt. To test complex topologies the q35 test has two PCIe buses that bypass the IOMMU (and are therefore not described by VIOT), and two buses that are translated by virtio-iommu. Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test.c | 39 ++++++++++++++++++++++++++++++++++ 1 file changed, 39 insertions(+) -- 2.33.0 diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 4f11d03055..f8bfe2f247 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1403,6 +1403,43 @@ static void test_acpi_virt_tcg(void) free_test_data(&data); } +static void test_acpi_q35_viot(void) +{ + test_data data = { + .machine = MACHINE_Q35, + .variant = ".viot", + .blkdev = "virtio-blk,bus=pcie.0", + }; + + /* + * To keep things interesting, two buses bypass the IOMMU. + * VIOT should only describes the other two buses. + */ + test_acpi_one("-machine default_bus_bypass_iommu=on " + "-device virtio-iommu " + "-device pxb-pcie,bus_nr=0x10,id=pcie.100,bus=pcie.0 " + "-device pxb-pcie,bus_nr=0x20,id=pcie.200,bus=pcie.0,bypass_iommu=on " + "-device pxb-pcie,bus_nr=0x30,id=pcie.300,bus=pcie.0", + &data); + free_test_data(&data); +} + +static void test_acpi_virt_viot(void) +{ + test_data data = { + .machine = "virt", + .uefi_fl1 = "pc-bios/edk2-aarch64-code.fd", + .uefi_fl2 = "pc-bios/edk2-arm-vars.fd", + .cd = "tests/data/uefi-boot-images/bios-tables-test.aarch64.iso.qcow2", + .ram_start = 0x40000000ULL, + .scan_len = 128ULL * 1024 * 1024, + }; + + test_acpi_one("-cpu cortex-a57 " + "-device virtio-iommu", &data); + free_test_data(&data); +} + static void test_oem_fields(test_data *data) { int i; @@ -1567,12 +1604,14 @@ int main(int argc, char *argv[]) if (strcmp(arch, "x86_64") == 0) { qtest_add_func("acpi/microvm/pcie", test_acpi_microvm_pcie_tcg); } + qtest_add_func("acpi/q35/viot", test_acpi_q35_viot); } else if (strcmp(arch, "aarch64") == 0) { qtest_add_func("acpi/virt", test_acpi_virt_tcg); qtest_add_func("acpi/virt/numamem", test_acpi_virt_tcg_numamem); qtest_add_func("acpi/virt/memhp", test_acpi_virt_tcg_memhp); qtest_add_func("acpi/virt/pxb", test_acpi_virt_tcg_pxb); qtest_add_func("acpi/virt/oem-fields", test_acpi_oem_fields_virt); + qtest_add_func("acpi/virt/viot", test_acpi_virt_viot); } ret = g_test_run(); boot_sector_cleanup(disk); From patchwork Tue Sep 14 14:20:03 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jean-Philippe Brucker X-Patchwork-Id: 510937 Delivered-To: patch@linaro.org Received: by 2002:a02:c816:0:0:0:0:0 with SMTP id p22csp1616277jao; Tue, 14 Sep 2021 07:46:52 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzkJftzJLfBwyDP0cwPu1Dz5Q14wvBtX8TcWGLpwuId3xGLyJvejZspvjAVxc+sbc5Ld+EK X-Received: by 2002:a17:907:7613:: with SMTP id jx19mr19693064ejc.453.1631630810977; Tue, 14 Sep 2021 07:46:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1631630810; cv=none; d=google.com; s=arc-20160816; b=aDI3Sf+vdqQ2fnYm16n2J5aeZfWqBgDC3uare6Qj2KKNmnp2uLrqhmZoSWyBVhzDYH +XKIlrxkEjMGLB4FRJ+QCwo60hrQtaEWl6S5PhTJjFeQrurg0LfurZyYjv5VDqlMbGCc vlsh/ov8IDJfr+Q0IyXvhzGWJZOdZpzEbtY86LLshYre1dRtC7AdzXIZ3nONJUzXZ+G+ DvyHEVG6C/CDpn0qEe0rSvFsDzR8ErKnW2KewjHliqZkV+rH0axM9LFIih7xEhF/KMcD P2WUE7EMYwslhWXeCk4FBkMeScw5pw1wYwaJY+Gp7KhEJWuj+XDVNl9A4t/ZDNNar4nG V7bQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature; bh=LXRO/fMo8Qw/FWNF0Yyw4kfLM8T681YtQWZQBpSYMfI=; b=xZxdzuWgWH9u0Ntnpd4zz7yAhWYR26J7SYll4tiNnK6pbFhIMSCC8ODYLBzuhi+ama n1CfcJesdj8854vfahngbPuKiALFRpJ914xyTeFSZWkFPWlmCiO+GNTC/5aydh18Uh/t PiN1WJRT31c5pBVeV9s1GNEb1et0+macnnmLT9RuhGclR5ecMvXXNBjlOKkbRsK1yGXX MF0x/Bo8ivTkQNMXV/FGuglqcCN9qm/dFG+JOP1rmHlC3Z7Kc1XytydcUoXvkIK3caRP eAyt5jqxsUZw2rRGQRha2iL15UfOxCYIms17f9pcMY9yoJzv7lH/9CuTEy8DL3CLnFaf 9YyA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=FcrIK37u; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 209.51.188.17 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:29 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 08/10] tests/acpi: add expected VIOT blob for virt machine Date: Tue, 14 Sep 2021 15:20:03 +0100 Message-Id: <20210914142004.2433568-9-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42a; envelope-from=jean-philippe@linaro.org; helo=mail-wr1-x42a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The VIOT blob contains the following: [000h 0000 4] Signature : "VIOT" [Virtual I/O Translation Table] [004h 0004 4] Table Length : 00000058 [008h 0008 1] Revision : 00 [009h 0009 1] Checksum : 66 [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 2] Node count : 0002 [026h 0038 2] Node offset : 0030 [028h 0040 8] Reserved : 0000000000000000 [030h 0048 1] Type : 03 [VirtIO-PCI IOMMU] [031h 0049 1] Reserved : 00 [032h 0050 2] Length : 0010 [034h 0052 2] PCI Segment : 0000 [036h 0054 2] PCI BDF number : 0008 [038h 0056 8] Reserved : 0000000000000000 [040h 0064 1] Type : 01 [PCI Range] [041h 0065 1] Reserved : 00 [042h 0066 2] Length : 0018 [044h 0068 4] Endpoint start : 00000000 [048h 0072 2] PCI Segment start : 0000 [04Ah 0074 2] PCI Segment end : 0000 [04Ch 0076 2] PCI BDF start : 0000 [04Eh 0078 2] PCI BDF end : 00FF [050h 0080 2] Output node : 0030 [052h 0082 6] Reserved : 000000000000 Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/virt/VIOT | Bin 0 -> 88 bytes 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/virt/VIOT b/tests/data/acpi/virt/VIOT index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..921f40d88c28ba2171a4d664e119914335309e7d 100644 GIT binary patch literal 88 zcmWIZ^bd((0D?3pe`k+i1*eDrX9XZ&1PX!JAexE60Hgv8m>C3sGzXN&z`)2L0cSHX I{D-Rq0Q5fy0RR91 literal 0 HcmV?d00001 -- 2.33.0 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 29b5b1eabc..fa213e4738 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,4 +1,3 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/virt/VIOT", "tests/data/acpi/q35/DSDT.viot", "tests/data/acpi/q35/VIOT.viot", From patchwork Tue Sep 14 14:20:04 2021 Content-Type: text/plain; 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:30 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 09/10] tests/acpi: add expected DSDT blob for VIOT test on q35 Date: Tue, 14 Sep 2021 15:20:04 +0100 Message-Id: <20210914142004.2433568-10-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::335; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x335.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The VIOT test instantiates two virtio devices and PCIe expander bridges, so the DSDT has additional blocks: + Scope (\_SB) + { + Device (PC30) + { + Name (_UID, 0x30) // _UID: Unique ID + Name (_BBN, 0x30) // _BBN: BIOS Bus Number + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PC30._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0030, // Range Minimum + 0x0030, // Range Maximum + 0x0000, // Translation Offset + 0x0001, // Length + ,, ) + }) + } + } + + Scope (\_SB) + { + Device (PC20) + { + Name (_UID, 0x20) // _UID: Unique ID + Name (_BBN, 0x20) // _BBN: BIOS Bus Number + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PC20._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0020, // Range Minimum + 0x0020, // Range Maximum + 0x0000, // Translation Offset + 0x0001, // Length + ,, ) + }) + } + } + + Scope (\_SB) + { + Device (PC10) + { + Name (_UID, 0x10) // _UID: Unique ID + Name (_BBN, 0x10) // _BBN: BIOS Bus Number + Name (_HID, EisaId ("PNP0A08") /* PCI Express Bus */) // _HID: Hardware ID + Name (_CID, EisaId ("PNP0A03") /* PCI Bus */) // _CID: Compatible ID + Method (_OSC, 4, NotSerialized) // _OSC: Operating System Capabilities + { + CreateDWordField (Arg3, Zero, CDW1) + If ((Arg0 == ToUUID ("33db4d5b-1ff7-401c-9657-7441c03dd766") /* PCI Host Bridge Device */)) + { + CreateDWordField (Arg3, 0x04, CDW2) + CreateDWordField (Arg3, 0x08, CDW3) + Local0 = CDW3 /* \_SB_.PC10._OSC.CDW3 */ + Local0 &= 0x1F + If ((Arg1 != One)) + { + CDW1 |= 0x08 + } + + If ((CDW3 != Local0)) + { + CDW1 |= 0x10 + } + + CDW3 = Local0 + } + Else + { + CDW1 |= 0x04 + } + + Return (Arg3) + } + + Method (_PRT, 0, NotSerialized) // _PRT: PCI Routing Table + { + Local0 = Package (0x80){} + Local1 = Zero + While ((Local1 < 0x80)) + { + Local2 = (Local1 >> 0x02) + Local3 = ((Local1 + Local2) & 0x03) + If ((Local3 == Zero)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKD, + Zero + } + } + + If ((Local3 == One)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKA, + Zero + } + } + + If ((Local3 == 0x02)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKB, + Zero + } + } + + If ((Local3 == 0x03)) + { + Local4 = Package (0x04) + { + Zero, + Zero, + LNKC, + Zero + } + } + + Local4 [Zero] = ((Local2 << 0x10) | 0xFFFF) + Local4 [One] = (Local1 & 0x03) + Local0 [Local1] = Local4 + Local1++ + } + + Return (Local0) + } + + Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings + { + WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, + 0x0000, // Granularity + 0x0010, // Range Minimum + 0x0010, // Range Maximum + 0x0000, // Translation Offset + 0x0001, // Length + ,, ) + }) + } + } + Scope (\_SB.PCI0) { Name (_CRS, ResourceTemplate () // _CRS: Current Resource Settings { WordBusNumber (ResourceProducer, MinFixed, MaxFixed, PosDecode, 0x0000, // Granularity 0x0000, // Range Minimum - 0x00FF, // Range Maximum + 0x000F, // Range Maximum 0x0000, // Translation Offset - 0x0100, // Length + 0x0010, // Length ,, ) [...] + Device (S10) + { + Name (_ADR, 0x00020000) // _ADR: Address + } + + Device (S18) + { + Name (_ADR, 0x00030000) // _ADR: Address + } + + Device (S20) + { + Name (_ADR, 0x00040000) // _ADR: Address + } + + Device (S28) + { + Name (_ADR, 0x00050000) // _ADR: Address + } + + Device (S30) + { + Name (_ADR, 0x00060000) // _ADR: Address + } + Method (PCNT, 0, NotSerialized) { } } } } Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/q35/DSDT.viot | Bin 0 -> 9415 bytes 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/q35/DSDT.viot b/tests/data/acpi/q35/DSDT.viot index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..8308c1e4ea7751a7389fcf7b91eda15168bf1460 100644 GIT binary patch literal 9415 zcmeHNO>7&-8J*>ymdlm2q$taOi3lg@UxI{^^4As(Lhe!|Es>%~Do#KHTuMqSJ1MeA zVjzxTKvsan@u6tKI_QxO6ri{E)N2DYKvAFv9||-;Pd)UKYf;3fsPCKEk!DB=h)%sk z0(SSCeQ&;bvpf5Sv+K3I_Fo=l%y^=>=2lv{;>!&;hd+ZcM#r>wsPwavh?=)fsWbz8-5 zXV0}7ZZ&UqD^<@f+_y}#>x!eO*)4cYW_CBK9?Pyybk|yL?9OY<^)4+8>hbVr_pIaEreB9@! zMVUiq0-s9m*`kQ5TG)TBv-iB$EV#UllZ|>K@8%cKF1OiA&s*m|m}AVQ&Y{0Q92^|{ zNgOigI&*5KP+2l7jZ#~xG@y-Cb#^O_c8%GL-Tx-VVx3zK#WOFJ>RztV^t!q1v)xv^ zzyd1q11jph>syXLus`bitna4|4))n#>Z5*-{ibKLfBiSU&-Sfp(YCZT^?s7ta{n6^ zV+^hN-jmcC>hI3p*=noM zra5iRmJOfz%rMHvHrvMjLIl}5dym%EHV#?SGaAdZ;uolgI(v(&jrM}9J0`BTpgl6C+HJV4wvqb6woF_a3S9KvMh+V<*V%2AE@Bk?&9-piQWUtweCZ-i6zjF7k@~x! zQQ#Kq8?{`c>b;!n7{yh0g=HUWxTTAc&Lb2Z90WUr2(BAf7}e4FJ{9k??BfM+#-XUL zfHr=J^|M~0;k9a0gVk_o+<)$`|870=ZtbJFuWD!h?A8LR>-AsygGc&T+2Bn7iWR{K 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[82.27.106.168]) by smtp.gmail.com with ESMTPSA id k6sm184252wmo.37.2021.09.14.07.24.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 14 Sep 2021 07:24:31 -0700 (PDT) From: Jean-Philippe Brucker To: eric.auger@redhat.com Subject: [PATCH v3 10/10] tests/acpi: add expected VIOT blob for q35 machine Date: Tue, 14 Sep 2021 15:20:05 +0100 Message-Id: <20210914142004.2433568-11-jean-philippe@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210914142004.2433568-1-jean-philippe@linaro.org> References: <20210914142004.2433568-1-jean-philippe@linaro.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::333; envelope-from=jean-philippe@linaro.org; helo=mail-wm1-x333.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, ehabkost@redhat.com, mst@redhat.com, richard.henderson@linaro.org, qemu-devel@nongnu.org, shannon.zhaosl@gmail.com, Jean-Philippe Brucker , qemu-arm@nongnu.org, pbonzini@redhat.com, ani@anisinha.ca, imammedo@redhat.com Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The VIOT table generated for the q35 test is: [000h 0000 4] Signature : "VIOT" [Virtual I/O Translation Table] [004h 0004 4] Table Length : 00000070 [008h 0008 1] Revision : 00 [009h 0009 1] Checksum : 3D [00Ah 0010 6] Oem ID : "BOCHS " [010h 0016 8] Oem Table ID : "BXPC " [018h 0024 4] Oem Revision : 00000001 [01Ch 0028 4] Asl Compiler ID : "BXPC" [020h 0032 4] Asl Compiler Revision : 00000001 [024h 0036 2] Node count : 0003 [026h 0038 2] Node offset : 0030 [028h 0040 8] Reserved : 0000000000000000 [030h 0048 1] Type : 03 [VirtIO-PCI IOMMU] [031h 0049 1] Reserved : 00 [032h 0050 2] Length : 0010 [034h 0052 2] PCI Segment : 0000 [036h 0054 2] PCI BDF number : 0010 [038h 0056 8] Reserved : 0000000000000000 [040h 0064 1] Type : 01 [PCI Range] [041h 0065 1] Reserved : 00 [042h 0066 2] Length : 0018 [044h 0068 4] Endpoint start : 00001000 [048h 0072 2] PCI Segment start : 0000 [04Ah 0074 2] PCI Segment end : 0000 [04Ch 0076 2] PCI BDF start : 1000 [04Eh 0078 2] PCI BDF end : 10FF [050h 0080 2] Output node : 0030 [052h 0082 6] Reserved : 000000000000 [058h 0088 1] Type : 01 [PCI Range] [059h 0089 1] Reserved : 00 [05Ah 0090 2] Length : 0018 [05Ch 0092 4] Endpoint start : 00003000 [060h 0096 2] PCI Segment start : 0000 [062h 0098 2] PCI Segment end : 0000 [064h 0100 2] PCI BDF start : 3000 [066h 0102 2] PCI BDF end : 30FF [068h 0104 2] Output node : 0030 [06Ah 0106 6] Reserved : 000000000000 Signed-off-by: Jean-Philippe Brucker --- tests/qtest/bios-tables-test-allowed-diff.h | 1 - tests/data/acpi/q35/VIOT.viot | Bin 0 -> 112 bytes 2 files changed, 1 deletion(-) diff --git a/tests/data/acpi/q35/VIOT.viot b/tests/data/acpi/q35/VIOT.viot index e69de29bb2d1d6434b8b29ae775ad8c2e48c5391..275c78fbe8e93190321d957c91c3f17551f865d4 100644 GIT binary patch literal 112 zcmWIZ^baXu00LVle`k+i1*eDrX9XZ&1PX!JAex!M0Hgv8m>C3sGzdcgBZCBjEAU?c OrV=a;;~4xmfH48g0SW;C literal 0 HcmV?d00001 -- 2.33.0 diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 27ab8d3ba8..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/q35/VIOT.viot",