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[2a01:238:438b:c500:173d:9f52:ddab:ee01]) by mx.google.com with ESMTPS id 6si3124949eje.315.2021.09.29.23.42.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Sep 2021 23:42:04 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=R9iL06WF; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 987B880FA5; Thu, 30 Sep 2021 08:42:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="R9iL06WF"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id C031680F5F; Thu, 30 Sep 2021 08:41:58 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x529.google.com (mail-ed1-x529.google.com [IPv6:2a00:1450:4864:20::529]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C70EB80F1A for ; Thu, 30 Sep 2021 08:41:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ilias.apalodimas@linaro.org Received: by mail-ed1-x529.google.com with SMTP id b26so18204352edt.0 for ; Wed, 29 Sep 2021 23:41:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=6v1CqF5rfCnVNMHK9xASaCVIIHhJ6ro+jHxDeGynY9M=; b=R9iL06WFO71lTlRlBh0uPN3Y9BOtzKQmQKUFgTQaxPTmYhqXqgr4Ee+1Qk63JSvAOA 1aZOoV+XFIXrLc7ULudgG40SzneMVsw3vI07GEsLGsHhgrB/pfsSCcVMYebOkqMA3G2W 18drZilR3HTtyJ9NlpW2OBqorzapabFyvFWxGcb/crvsde8r+9+4iMOvggQ9QrCxfaxy GK8LO4MNVtkQwXfee0xIRGRXroec24KNyTqppT+taJxZf8+NLMBA5b2h++P+Jn1FMKMl EfFvVDQGwhAxzCNgQxX/6Y+3aJ/pTYNSXWMB7Tq2h2kev7uNoTgw3E6/nkDiGCE36rxT 95yA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=6v1CqF5rfCnVNMHK9xASaCVIIHhJ6ro+jHxDeGynY9M=; b=xcFiS6+rUnSgN8OyBEFw/h2k7ikUSDhYY2jJH8e/uj+OZMMmMTuiYD8H5QhvgeJQiG /Avpqd/ApFjH7OynnvUzCSXcNqa/rp5YREtA4gMur4aO62/3bh4G2AhYMkbVKD2XtiSz E104abEOLiZjaifsfg6WR3V2D3cSPoe9HVhp3YmrIe1hkCKNxlSsgpjv6y+Ls65P9lOV 4Vb9vhcOielVPoIMDG7FacMlq5aKDb7SDgqxFisr76LaSbuHWgYP8F1fwJR2FROfaDwu 0HVjju8jaRHZdBK3QWBUJM9Ig08ZKOfbAqa4nVmQRfdVq2UOpiQEj0QTFhrbsV/T04SE pkIQ== X-Gm-Message-State: AOAM530AZh45VHrc6ptiHUQZn7R0tm0Nu+EgkfcjSWi44oMNNQQOTqj6 MCBXKWXBMmQxuKGKCcEw1Dsprg== X-Received: by 2002:a17:906:1856:: with SMTP id w22mr4905218eje.393.1632984114233; Wed, 29 Sep 2021 23:41:54 -0700 (PDT) Received: from apalos.home ([2a02:587:4672:866:2e56:dcff:fe9a:8f06]) by smtp.gmail.com with ESMTPSA id d7sm438991ejt.13.2021.09.29.23.41.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Sep 2021 23:41:53 -0700 (PDT) From: Ilias Apalodimas To: trini@konsulko.com Cc: mark.kettenis@xs4all.nl, Ilias Apalodimas , Simon Glass , Bharat Gooty , Rayagonda Kokatanur , Rick Chen , Leo , Thomas Fitzsimmons , Bin Meng , =?utf-8?q?Marek?= =?utf-8?q?_Beh=C3=BAn?= , Green Wan , Lukas Auer , Brad Kim , Heinrich Schuchardt , Dimitri John Ledkov , David Abdurachmanov , u-boot@lists.denx.de Subject: [PATCH 1/3 v2] riscv: Remove OF_PRIOR_STAGE from RISC-V boards Date: Thu, 30 Sep 2021 09:41:39 +0300 Message-Id: <20210930064143.432963-1-ilias.apalodimas@linaro.org> X-Mailer: git-send-email 2.33.0 MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got introduced, in order to support a DTB handed over by an earlier stage boo loader. However we have another option in the Kconfig (OF_BOARD) which has identical semantics. On RISC-V some of the platforms pick up the DTB from a1 and copy it in their private gd_t. Apart from that they copy it to prior_stage_fdt_address, if the Kconfig option is selected, which is unnecessary. So let's switch the config option for those boards to OF_BOARD and define the required board_fdt_blob_setup() for them. Signed-off-by: Ilias Apalodimas Reviewed-by: Simon Glass --- Changes since v1: - Remove the sifive unleashed/unmatched changes, since they'll be handled on a different patchset arch/riscv/cpu/cpu.c | 3 --- arch/riscv/cpu/start.S | 5 ----- arch/riscv/dts/binman.dtsi | 6 +++--- board/AndesTech/ax25-ae350/ax25-ae350.c | 1 - board/emulation/qemu-riscv/qemu-riscv.c | 9 +++++++++ configs/ae350_rv32_defconfig | 2 +- configs/ae350_rv32_spl_defconfig | 2 +- configs/ae350_rv64_defconfig | 2 +- configs/ae350_rv64_spl_defconfig | 2 +- configs/qemu-riscv32_defconfig | 2 +- configs/qemu-riscv32_smode_defconfig | 2 +- configs/qemu-riscv32_spl_defconfig | 2 +- configs/qemu-riscv64_defconfig | 2 +- configs/qemu-riscv64_smode_defconfig | 2 +- configs/qemu-riscv64_spl_defconfig | 2 +- dts/Kconfig | 2 +- 16 files changed, 23 insertions(+), 23 deletions(-) -- 2.33.0 diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index c894ac10b536..e16f1df30254 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -16,9 +16,6 @@ * The variables here must be stored in the data section since they are used * before the bss section is available. */ -#ifdef CONFIG_OF_PRIOR_STAGE -phys_addr_t prior_stage_fdt_address __section(".data"); -#endif #ifndef CONFIG_XIP u32 hart_lottery __section(".data") = 0; diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 308b0a97a58f..76850ec9be2c 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -142,11 +142,6 @@ call_harts_early_init: bnez tp, secondary_hart_loop #endif -#ifdef CONFIG_OF_PRIOR_STAGE - la t0, prior_stage_fdt_address - SREG s1, 0(t0) -#endif - jal board_init_f_init_reserve SREG s1, GD_FIRMWARE_FDT_ADDR(gp) diff --git a/arch/riscv/dts/binman.dtsi b/arch/riscv/dts/binman.dtsi index d26cfdb78a9e..5757ef65ea4b 100644 --- a/arch/riscv/dts/binman.dtsi +++ b/arch/riscv/dts/binman.dtsi @@ -48,7 +48,7 @@ }; }; -#ifndef CONFIG_OF_PRIOR_STAGE +#ifndef CONFIG_OF_BOARD @fdt-SEQ { description = "NAME"; type = "flat_dt"; @@ -60,7 +60,7 @@ configurations { default = "conf-1"; -#ifndef CONFIG_OF_PRIOR_STAGE +#ifndef CONFIG_OF_BOARD @conf-SEQ { #else conf-1 { @@ -68,7 +68,7 @@ description = "NAME"; firmware = "opensbi"; loadables = "uboot"; -#ifndef CONFIG_OF_PRIOR_STAGE +#ifndef CONFIG_OF_BOARD fdt = "fdt-SEQ"; #endif }; diff --git a/board/AndesTech/ax25-ae350/ax25-ae350.c b/board/AndesTech/ax25-ae350/ax25-ae350.c index 81b0ee992372..4f03806272df 100644 --- a/board/AndesTech/ax25-ae350/ax25-ae350.c +++ b/board/AndesTech/ax25-ae350/ax25-ae350.c @@ -21,7 +21,6 @@ DECLARE_GLOBAL_DATA_PTR; -extern phys_addr_t prior_stage_fdt_address; /* * Miscellaneous platform dependent initializations */ diff --git a/board/emulation/qemu-riscv/qemu-riscv.c b/board/emulation/qemu-riscv/qemu-riscv.c index dcfd3f20bee6..aa91ca91325c 100644 --- a/board/emulation/qemu-riscv/qemu-riscv.c +++ b/board/emulation/qemu-riscv/qemu-riscv.c @@ -14,6 +14,8 @@ #include #include +DECLARE_GLOBAL_DATA_PTR; + int board_init(void) { /* @@ -69,3 +71,10 @@ int board_fit_config_name_match(const char *name) return 0; } #endif + +void *board_fdt_blob_setup(void) +{ + /* Stored the DTB address there during our init */ + return (void *)gd->arch.firmware_fdt_addr; +} + diff --git a/configs/ae350_rv32_defconfig b/configs/ae350_rv32_defconfig index 4e7a1686a64d..8b6c0b8a4a0a 100644 --- a/configs/ae350_rv32_defconfig +++ b/configs/ae350_rv32_defconfig @@ -15,7 +15,7 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/ae350_rv32_spl_defconfig b/configs/ae350_rv32_spl_defconfig index 34c6af6e7e17..a0fe9b9a71df 100644 --- a/configs/ae350_rv32_spl_defconfig +++ b/configs/ae350_rv32_spl_defconfig @@ -19,7 +19,7 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTP_SEND_HOSTNAME=y diff --git a/configs/ae350_rv64_defconfig b/configs/ae350_rv64_defconfig index 05eee371ac2f..cb23cbd3d95e 100644 --- a/configs/ae350_rv64_defconfig +++ b/configs/ae350_rv64_defconfig @@ -16,7 +16,7 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y diff --git a/configs/ae350_rv64_spl_defconfig b/configs/ae350_rv64_spl_defconfig index 9cd7848c92eb..9ad312505db3 100644 --- a/configs/ae350_rv64_spl_defconfig +++ b/configs/ae350_rv64_spl_defconfig @@ -20,7 +20,7 @@ CONFIG_CMD_SF_TEST=y # CONFIG_CMD_SETEXPR is not set CONFIG_BOOTP_PREFER_SERVERIP=y CONFIG_CMD_CACHE=y -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_BOOTP_SEND_HOSTNAME=y diff --git a/configs/qemu-riscv32_defconfig b/configs/qemu-riscv32_defconfig index 8ac16cf4186e..6fe133c268d7 100644 --- a/configs/qemu-riscv32_defconfig +++ b/configs/qemu-riscv32_defconfig @@ -9,6 +9,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig index 05eda439618f..c67e8206d1ab 100644 --- a/configs/qemu-riscv32_smode_defconfig +++ b/configs/qemu-riscv32_smode_defconfig @@ -10,6 +10,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv32_spl_defconfig b/configs/qemu-riscv32_spl_defconfig index ee81e552724d..77e81fac3af7 100644 --- a/configs/qemu-riscv32_spl_defconfig +++ b/configs/qemu-riscv32_spl_defconfig @@ -12,6 +12,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_SBI=y # CONFIG_CMD_MII is not set -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv64_defconfig b/configs/qemu-riscv64_defconfig index daf5d655d01f..90e87672aab0 100644 --- a/configs/qemu-riscv64_defconfig +++ b/configs/qemu-riscv64_defconfig @@ -10,6 +10,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig index 4a6416e2540b..0a8393903368 100644 --- a/configs/qemu-riscv64_smode_defconfig +++ b/configs/qemu-riscv64_smode_defconfig @@ -13,6 +13,6 @@ CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_BOOTEFI_SELFTEST=y CONFIG_CMD_NVEDIT_EFI=y # CONFIG_CMD_MII is not set -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/configs/qemu-riscv64_spl_defconfig b/configs/qemu-riscv64_spl_defconfig index 429d4d814e65..a15e82dd3ee1 100644 --- a/configs/qemu-riscv64_spl_defconfig +++ b/configs/qemu-riscv64_spl_defconfig @@ -13,6 +13,6 @@ CONFIG_DISPLAY_CPUINFO=y CONFIG_DISPLAY_BOARDINFO=y CONFIG_CMD_SBI=y # CONFIG_CMD_MII is not set -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_DM_MTD=y diff --git a/dts/Kconfig b/dts/Kconfig index dabe0080c1ef..39270b47f9f0 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -107,7 +107,7 @@ config OF_EMBED Boards in the mainline U-Boot tree should not use it. config OF_BOARD - bool "Provided by the board at runtime" + bool "Provided by the board (e.g a previous loader) at runtime" depends on !SANDBOX help If this option is enabled, the device tree will be provided by From patchwork Thu Sep 30 06:41:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilias Apalodimas X-Patchwork-Id: 514878 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:4087:0:0:0:0 with SMTP id m7csp779441jam; Wed, 29 Sep 2021 23:42:15 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyP04iL6/MAOhhrcmMdYWaFHkyKnLgll2y3u38NZjBcHV+R0sRJ8oLs5Nr7Uyh/WnqV5G+w X-Received: by 2002:a17:907:784b:: with SMTP id lb11mr4826861ejc.307.1632984134951; Wed, 29 Sep 2021 23:42:14 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1632984134; cv=none; d=google.com; s=arc-20160816; b=LZirnWp59XHsV17ySCW5U5o22XOjJPVvdZDLi33xmjoUOkv/tNVoy+BrppZ4Gt/loi cDwoexkdt6YmNvjexTXQCrOP6sFfknIVInnVhDWa2LjiC91OoDZgk1CWmkROyNAQhz7/ hqkYWSGGRkBNGzxYgJC3fImoK2Rb4j5TZCjvj875C7dziP7rd7V7DfrnBhIM4lK2wNFZ f8BL0rMd5jY2HZIEn2ttMCKo0Opn38Uf4nfgd3Sq3SVdVfia+xGJygiJ5OuY062ezNOA LFjIsZaiWH4ee6N0R3BLQb6Uw6lol2czGqlgdnO2QDmDRsTQ5VzQG2ptRh5+WlIJ4MkI 2nZg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=k3mY4SkVTtfiSltzgLiECidvIF2b5b11h2HmzF5AsyY=; b=hoaRZ0uAlShsOXUJLDakg+itXb+JOUD4tfiWNqjT29j5Wr+hpLJHVdd+a0KUdy4ISr 0e4IKEtxZFGbqd7EU8RZZJ5JH+69VfuVhxKh88S+1gjxyE/zY97m0QkIAIMVXz9bufeN nEjTqaxl06Qc9mEVeO9HxYrvCQ4NHX7EdU8lbBDXX9BVA6BSxXWf96XMRTlLjtgF74ak 8/Kjl/moFKGrYb9dq0RweHG3dBPDl0MdAr6mSbk1/wRwjJAg/1TvXJAC+xEkwrunbeFy 8zq+pHDG2Bt+dBDMx+d0m3JfAhf1vjvSdibOELVWsU37xZbcEgdQlYLo1Nshn4GzJulV 1/GA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GTZANX4f; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. [85.214.62.61]) by mx.google.com with ESMTPS id b27si2953213ejl.186.2021.09.29.23.42.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Sep 2021 23:42:14 -0700 (PDT) Received-SPF: pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) client-ip=85.214.62.61; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=GTZANX4f; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 85.214.62.61 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id A776781545; Thu, 30 Sep 2021 08:42:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="GTZANX4f"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 92CA381195; Thu, 30 Sep 2021 08:42:03 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=-2.1 required=5.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,SPF_HELO_NONE,SPF_PASS autolearn=ham autolearn_force=no version=3.4.2 Received: from mail-ed1-x530.google.com (mail-ed1-x530.google.com [IPv6:2a00:1450:4864:20::530]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 646A580F1A for ; Thu, 30 Sep 2021 08:41:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=linaro.org Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=ilias.apalodimas@linaro.org Received: by mail-ed1-x530.google.com with SMTP id v10so18133950edj.10 for ; Wed, 29 Sep 2021 23:41:59 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=k3mY4SkVTtfiSltzgLiECidvIF2b5b11h2HmzF5AsyY=; b=GTZANX4fIl+n0iM723cc/LtzWK3rrcAKSHNGDaoCRp7m1i/w27+AbBK3fFJsLzwsJf YemkEvi4QptuEnc1HXCW7tuPCLo/TNgGETH30Vv01GTQlBjvHIul3Q7fOZnxM8NH3oq4 U14Rg3oOZegBMWaUbyM6G6PINAXZjOT0uAVFOnnbvlfMT88dXCygZHWqKL2Od/uOON/1 3VY6xY5QwEzOaL610bYjG5o3iMyiUSXMhGiFkjPF6hxRQrbl9m7u7h/+EpIJocgBYF7Y zJ5+kfe7spPq8CXtNvllV0nUPKeGRy0di4WM5jgqTnHqtfO7Wr4C0hnE7nFxVilJ9SUU HXxg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=k3mY4SkVTtfiSltzgLiECidvIF2b5b11h2HmzF5AsyY=; b=hF8+0xuDorFy7sZom/VH5X8Qke6FISRYJbDMpG6DnkA9IBisd9KR5z+f6HwRXE4mP/ +KtPEHHggfoDSCvr7+pxZAWyUkIRSqXq5trzsurKj2qwwD/s+E5klLnibSkfEO6Z8rFa KlLGa2tLsmFg6d3uhj1BTJ0lhyKwacBnJqQHKaEbGLY0RSLhKfmDma1NU7VXCDoWzHLp xkFh0Mrj/09qgmX7/Zwbs/7l1/VD0KD4QOu7yyjnEhGCZ+Nd7ou+wiaCkupLU/DLjeEa xkIzxylFogxdX+r/wckLGPbyqLSdrngWhh5ko/mymx2WwDspVGArlAlk13N0P+cziKyy K9JA== X-Gm-Message-State: AOAM533jcx8XMYTFxujhVJeZS2p2prB1Uoy2pRchND00J7ZVafQwV5FD xdkVeftboXlOyASNJ4m/u9LPCg== X-Received: by 2002:a50:bf49:: with SMTP id g9mr5294380edk.262.1632984118984; Wed, 29 Sep 2021 23:41:58 -0700 (PDT) Received: from apalos.home ([2a02:587:4672:866:2e56:dcff:fe9a:8f06]) by smtp.gmail.com with ESMTPSA id d7sm438991ejt.13.2021.09.29.23.41.57 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 29 Sep 2021 23:41:58 -0700 (PDT) From: Ilias Apalodimas To: trini@konsulko.com Cc: mark.kettenis@xs4all.nl, Ilias Apalodimas , Simon Glass , Bharat Gooty , Rayagonda Kokatanur , Rick Chen , Leo , Thomas Fitzsimmons , Bin Meng , =?utf-8?q?Marek?= =?utf-8?q?_Beh=C3=BAn?= , Green Wan , Lukas Auer , Brad Kim , Heinrich Schuchardt , David Abdurachmanov , Dimitri John Ledkov , u-boot@lists.denx.de Subject: [PATCH 2/3 v2] board: arm: Remove OF_PRIOR_STAGE from the remaining Arm boards Date: Thu, 30 Sep 2021 09:41:40 +0300 Message-Id: <20210930064143.432963-2-ilias.apalodimas@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20210930064143.432963-1-ilias.apalodimas@linaro.org> References: <20210930064143.432963-1-ilias.apalodimas@linaro.org> MIME-Version: 1.0 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.2 at phobos.denx.de X-Virus-Status: Clean At some point back in 2018 prior_stage_fdt_address and OF_PRIOR_STAGE got introduced, in order to support a DTB handed over by an earlier stage boo loader. However we have another option in the Kconfig (OF_BOARD) which has identical semantics. So let's remove the option in an effort to simplify U-Boot's config and DTB management, and use OF_BOARD instead. Signed-off-by: Ilias Apalodimas Reviewed-by: Simon Glass --- Changes since v1: - none arch/arm/Kconfig | 1 - board/broadcom/bcmstb/bcmstb.c | 6 ++++++ configs/bcm7260_defconfig | 2 +- configs/bcm7445_defconfig | 2 +- 4 files changed, 8 insertions(+), 3 deletions(-) -- 2.33.0 diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index b5bd3284cd1c..8bc4391fcb27 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -620,7 +620,6 @@ config ARCH_BCMSTB select DM select GPIO_EXTRA_HEADER select OF_CONTROL - select OF_PRIOR_STAGE imply CMD_DM help This enables support for Broadcom ARM-based set-top box diff --git a/board/broadcom/bcmstb/bcmstb.c b/board/broadcom/bcmstb/bcmstb.c index 076ac9414418..40d9def24b7b 100644 --- a/board/broadcom/bcmstb/bcmstb.c +++ b/board/broadcom/bcmstb/bcmstb.c @@ -135,3 +135,9 @@ int board_late_init(void) return 0; } + +void *board_fdt_blob_setup(void) +{ + /* Stored the DTB address there during our init */ + return (void *)prior_stage_fdt_address; +} diff --git a/configs/bcm7260_defconfig b/configs/bcm7260_defconfig index a42a6acb06d5..be0c945dc811 100644 --- a/configs/bcm7260_defconfig +++ b/configs/bcm7260_defconfig @@ -22,7 +22,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FS_GENERIC=y -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_MMC=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y diff --git a/configs/bcm7445_defconfig b/configs/bcm7445_defconfig index 96e8da0748ae..9ab72dcf37c7 100644 --- a/configs/bcm7445_defconfig +++ b/configs/bcm7445_defconfig @@ -23,7 +23,7 @@ CONFIG_CMD_CACHE=y CONFIG_CMD_EXT2=y CONFIG_CMD_EXT4=y CONFIG_CMD_FS_GENERIC=y -CONFIG_OF_PRIOR_STAGE=y +CONFIG_OF_BOARD=y CONFIG_ENV_OVERWRITE=y CONFIG_ENV_IS_IN_SPI_FLASH=y CONFIG_SYS_REDUNDAND_ENVIRONMENT=y From patchwork Thu Sep 30 06:41:41 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ilias Apalodimas X-Patchwork-Id: 514879 Delivered-To: patch@linaro.org Received: by 2002:a05:6638:4087:0:0:0:0 with SMTP id m7csp779710jam; Wed, 29 Sep 2021 23:42:38 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyfYCqnHOyCvTJQjs3nm3IJTOdt6fGVDh2Cr33hebggmXnYuIuuZl5QxPVp0Y7fRSQuzKLy X-Received: by 2002:a17:906:2b07:: with SMTP id a7mr5089803ejg.284.1632984157889; Wed, 29 Sep 2021 23:42:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1632984157; cv=none; d=google.com; s=arc-20160816; b=Q8oE1HlBDmKpC000nm8wQH+FgbxdR9r2zsCXaGvUnj+gyEVvIBMa4M4HycHIfHQzuw HUMOsV+FE4x8fb8nlt98IrY1ldaOUjlXegBFQKIWhitZQ5b8N8/+C2bSNFhozaAZ6CKa J6Q48YdneHwLjP0ssNu0dgfLHY2cW1DehXyStWSt3tKWscMCyGKZbo4JTS/VfOLsIRfY PoBJTOc+iGwfz/WS2hFWGQPHJC3nw+vxc/euzMI9g8nOBRh8UfydWSagoOpzPWSYzNSe kOjbsUslNfxi6m2SJmljXy1luTjP3lOoZYClzu4v5npsyu8PYz7fkBTzlnjb2RtMhzRn WQUA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:cc:to :from:dkim-signature; bh=K0VEt7OtbSJSDIb7ggVA3N4pGaW3pUyIwpOHJrjnsSg=; b=CPDtnSOZA+WEnfHTFVfgsMYNNcKTCCwO9ayEz8rL3OjN2x6PW+aatzqDJVlK/R530W iy792DS2zwtqJjDSQL+ymvbPP2sFWEO6M66bwiDtLLhc+l908otJrsmar2Vb08ZpLyIO h/LwDZKUfyJm8f0bwSv3XhPr1yF5Gk8VeTZuh5BnYz72eEQFfRA0MErt2dwlJ/n4RPoM 98SkvhRj33uEQNjnWYWW+OkEX5G/WwiNSoClEcny5fa/dHv3J+RCToyKoIZnlDshOUXl KrS7fH3xxs/B9+3dXXe2LTzpdX2TA7BdfI4bvKIIdSIC6J1RkxfKxcPHEiHdkn6Rcwvz 24hQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=OewUhE0+; spf=pass (google.com: domain of u-boot-bounces@lists.denx.de designates 2a01:238:438b:c500:173d:9f52:ddab:ee01 as permitted sender) smtp.mailfrom=u-boot-bounces@lists.denx.de; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from phobos.denx.de (phobos.denx.de. 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Cleanup any references to it in documentation, code and configuration options. Signed-off-by: Ilias Apalodimas Reviewed-by: Simon Glass --- Changes since v1: - none dts/Kconfig | 11 ++--------- include/fdtdec.h | 4 ---- lib/fdtdec.c | 2 -- tools/binman/binman.rst | 16 ++++++---------- 4 files changed, 8 insertions(+), 25 deletions(-) -- 2.33.0 diff --git a/dts/Kconfig b/dts/Kconfig index 39270b47f9f0..100769017e12 100644 --- a/dts/Kconfig +++ b/dts/Kconfig @@ -22,7 +22,7 @@ config BINMAN config BINMAN_STANDALONE_FDT bool depends on BINMAN - default y if OF_BOARD || OF_PRIOR_STAGE + default y if OF_BOARD help This option tells U-Boot build system that a standalone device tree source is explicitly required when using binman to package U-Boot. @@ -32,7 +32,7 @@ config BINMAN_STANDALONE_FDT directory for a specific board. Such device tree sources are built for OF_SEPARATE or OF_EMBED. However for a scenario like the board device tree blob is not provided in the U-Boot build tree, but fed to U-Boot - in the runtime, e.g.: in the OF_PRIOR_STAGE case that it is passed by + in the runtime, e.g.: in the OF_BOARD case that it is passed by a prior stage bootloader. For such scenario, a standalone device tree blob containing binman node to describe how to package U-Boot should be provided explicitly. @@ -122,13 +122,6 @@ config OF_HOSTFILE This is only useful for Sandbox. Use the -d flag to U-Boot to specify the file to read. -config OF_PRIOR_STAGE - bool "Prior stage bootloader DTB for DT control" - help - If this option is enabled, the device tree used for DT - control will be read from a device tree binary, at a memory - location passed to U-Boot by the prior stage bootloader. - endchoice config DEFAULT_DEVICE_TREE diff --git a/include/fdtdec.h b/include/fdtdec.h index 8ac20c9a64f7..d0e13fc18313 100644 --- a/include/fdtdec.h +++ b/include/fdtdec.h @@ -55,10 +55,6 @@ struct bd_info; #define SPL_BUILD 0 #endif -#ifdef CONFIG_OF_PRIOR_STAGE -extern phys_addr_t prior_stage_fdt_address; -#endif - /* * Information about a resource. start is the first address of the resource * and end is the last address (inclusive). The length of the resource will diff --git a/lib/fdtdec.c b/lib/fdtdec.c index 7358cb6dd168..7b379564600d 100644 --- a/lib/fdtdec.c +++ b/lib/fdtdec.c @@ -1580,8 +1580,6 @@ int fdtdec_setup(void) puts("Failed to read control FDT\n"); return -1; } -# elif defined(CONFIG_OF_PRIOR_STAGE) - gd->fdt_blob = (void *)(uintptr_t)prior_stage_fdt_address; # endif # ifndef CONFIG_SPL_BUILD /* Allow the early environment to override the fdt address */ diff --git a/tools/binman/binman.rst b/tools/binman/binman.rst index 09e7b5719825..614df541c5ac 100644 --- a/tools/binman/binman.rst +++ b/tools/binman/binman.rst @@ -232,18 +232,18 @@ You can use other, more specific CONFIG options - see 'Automatic .dtsi inclusion' below. -Using binman with OF_BOARD or OF_PRIOR_STAGE +Using binman with OF_BOARD -------------------------------------------- Normally binman is used with a board configured with OF_SEPARATE or OF_EMBED. This is a typical scenario where a device tree source that contains the binman node is provided in the arch//dts directory for a specific board. -However for a board configured with OF_BOARD or OF_PRIOR_STAGE, no device tree -blob is provided in the U-Boot build phase hence the binman node information -is not available. In order to support such use case, a new Kconfig option -BINMAN_STANDALONE_FDT is introduced, to tell the build system that a standalone -device tree blob containing binman node is explicitly required. +However for a board configured with OF_BOARD, no device tree blob is provided +in the U-Boot build phase hence the binman node information is not available. +In order to support such use case, a new Kconfig option BINMAN_STANDALONE_FDT +is introduced, to tell the build system that a standalone device tree blob +containing binman node is explicitly required. Note there is a Kconfig option BINMAN_FDT which enables U-Boot run time to access information about binman entries, stored in the device tree in a binman @@ -252,10 +252,6 @@ For the other OF_CONTROL methods, it's quite possible binman node is not available as binman is invoked during the build phase, thus this option is not turned on by default for these OF_CONTROL methods. -See qemu-riscv64_spl_defconfig for an example of how binman is used with -OF_PRIOR_STAGE to generate u-boot.itb image. - - Access to binman entry offsets at run time (symbols) ----------------------------------------------------