From patchwork Fri Oct 8 01:25:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515530 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1675137ime; Thu, 7 Oct 2021 18:25:37 -0700 (PDT) X-Google-Smtp-Source: ABdhPJw1+AGMOszsUN+7OXVRL6QjBSXYOVvf7gaYWTWdHMqd3sTt28oZC0ZeJPRz6VM19tNh4rR0 X-Received: by 2002:a17:90b:1642:: with SMTP id il2mr8475578pjb.167.1633656337642; Thu, 07 Oct 2021 18:25:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656337; cv=none; d=google.com; s=arc-20160816; b=iZDg0DQbJJWROD7gqdWotEs7DLCKg6DBikL/jyv6kDX4vFi7oHlqgZ2T1IvS/jF9Jx g9ZSVnYdl5YSiFrULe9KMbFeb+eFFhZea7fxWl/NAzGulMcLlQl95d1TTiQWb1u3AINN keasuHMbjIOLXLfN705X4X2OplOhDUzwZajm/heja5Ev6/i0FvcqBXsVTxEmQBYgYCqG inayQeaXIKUohFP9rB0xkk6bb0E9OTEzp14IoOH0treVyO+QyW3InXMqczLuz52JPBpx I3bAbGLfP2m4Jc1boeN5SFTzrtHE7g0PBZedP5seydJM0OuAStNcJ9+JXKsf4xSsFxEh gDBA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=kogEQhss8CRQIVqzZR3ldriy2WlhMwjUUX695mLk53A=; b=1HZqrNCpaJi8t2xoxePq6PQ42jE4HR5KUrAX7ivehZPs4EWYEv3yw8cEQZ2Z2+ZBHs V3jr4sH40vfHCtDVjR04CsTZj/UqsBeLze0x//+oulFZzVAD/hb1HWCv66rdglzulC9o TMmJOf6zbOCnOj3aW1+xSdYo3hx9grFp6TAYxFeQL3MKsEvKiOyA8omOxO4quwcWuMa9 7PTDih6eDKUZqfs37xqzZCav+LNNRChsHjsp0eB/rQOC1S7IxPc+yPdg0UtqQLwjZRzt +mP7ilCFVo7PcxDrTTRDfZMlx+c9ntTbE3iopNgskFpePF2EAlDU/jdRfUgeDfsKFw44 xBig== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="u/xW+YZM"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-pm8841.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.30.2 diff --git a/arch/arm/boot/dts/qcom-pm8841.dtsi b/arch/arm/boot/dts/qcom-pm8841.dtsi index 2fd59c440903..b6066c27732c 100644 --- a/arch/arm/boot/dts/qcom-pm8841.dtsi +++ b/arch/arm/boot/dts/qcom-pm8841.dtsi @@ -15,6 +15,7 @@ pm8841_mpps: mpps@a000 { reg = <0xa000>; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pm8841_mpps 0 0 4>; interrupts = <4 0xa0 0 IRQ_TYPE_NONE>, <4 0xa1 0 IRQ_TYPE_NONE>, <4 0xa2 0 IRQ_TYPE_NONE>, From patchwork Fri Oct 8 01:25:07 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515533 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1675194ime; Thu, 7 Oct 2021 18:25:42 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzSDfRWv0mxWhSBIX9PKqZyiZvxhD1OG0i35t465ZoCw68AW6MuIAcc85eDIo0E/PXN5Ny9 X-Received: by 2002:a65:44c4:: with SMTP id g4mr2413861pgs.254.1633656342176; Thu, 07 Oct 2021 18:25:42 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656342; cv=none; d=google.com; s=arc-20160816; b=BOsmmtiB8gX0yuYTE4dxjDpXNNs0ZO16QuG29Ery5lIisA0WU3ByrItqSzbAkzAift uiLqCzMLFojoLSuCR2fblAtQx85SRbGlw9tHU9d8RDMHNxf6eSAxxp7k5odiOgCQgQ5P QGjqtSVLBgLq3v3okq9kW6iRn1SycawjsqpM+LQq/G7mgM+HNUaN6MG8PikioMD3AR3E 2QVv1BjetYWIINjlT+I3NjqirG46mOQVmvFFV4EOBBLwLzpJVIHpDlL/SpD1pucTAVsj 4aYPxbsOmIbW7ebhho5AhpXTvchuG2zPLo0L6uApxnqoADpYfZfOz97DyKIQOONYEW1U zd0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jPqe703H6IymTOKSZQDO6LX/0zlyxMHngDY3uRoclEk=; b=fZ6W7srPEvtgaGC4VNgjL1/UPZFZ+2sYRDdAVQBfpYXmc0dJfjz3vMRdc5sNXSiUS5 NolR53JD+ssglRh84GY4B5TLz2l2mi8jOoOgbneepWbfwKKS0hIxR3onEfZIoETmBUt4 B/GtWy3iRdanWxfijEiP67WK9iM9k7wZNwKIZ0YoST44w4HUF+jqK1s1LJkugH0Rq+Tq EFob4c1W6i3ym3/Xsw+VcsmE88FBwFuZXdg5Wr67Kb/D9Hg2J2XCJ2eiZ43eEbPxc0U2 BUmcC9wYGMcsmt1TiPUs7CPPpg96LvXtDSFK2XVrQHDH3ekbdUFMaTgYpwSCd0UMQkjn eMNA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=uJgSuxFd; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Also add gpio-ranges property to mpps device tree nodes, adding the mapping between pinctrl and GPIO pins. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.30.2 diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index dda2ceec6591..cfff1a5706ed 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -300,7 +300,7 @@ pwrkey@1c { pull-up; }; - pmicmpp: mpp@50 { + pmicmpp: mpps@50 { compatible = "qcom,pm8018-mpp", "qcom,ssbi-mpp"; interrupt-parent = <&pmicintc>; interrupts = <24 IRQ_TYPE_NONE>, @@ -312,6 +312,7 @@ pmicmpp: mpp@50 { reg = <0x50>; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pmicmpp 0 0 6>; }; rtc@11d { From patchwork Fri Oct 8 01:25:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515536 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1675236ime; Thu, 7 Oct 2021 18:25:46 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzwzdIEJva6qBcZ/D6BKW9CpfHPrNcch1R5qM3kk/HjaqZbufpzZUhhQk+9P8O4Um1D9M6L X-Received: by 2002:a17:90a:890a:: with SMTP id u10mr8452019pjn.40.1633656346559; Thu, 07 Oct 2021 18:25:46 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656346; cv=none; d=google.com; s=arc-20160816; b=UPgrwHYr+JL59zu0OTec9NsJsHxALm1XBR3RVum93gQhOTTYfBxBvrUyIAogEFDhqt Cw59jvPMeWzcx9Qz65iYVciC2TtGCFZzs8CXKgPbX2uCH4+5D4nfnWeNJ3TWx247dSfA I+VBNzArYoDzaZPBT5eNizB0YEPgBBYuANm6KNgwjluW3FvPi5A/5FApEYrWKdnDy1GG yCzwS9VhxhX/tBnuW3RN5opIqc+lxxczDL3118z6n3CfiOkCIf4sGeRMsImvSkebFzrM uUQoaDdGsdbArp19M2BSl+BD1CXwx52Dado5DQSbIglhmmJ7ej65zFU2uMVQ4dCh2m2z yCLA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qkMqBx/0+QNy6vnPe5v+Jz8TEUxjmzu64DV0QiSa2s0=; b=006VYKJmku3fb6trjFw8T3o5OMjJlNqbAz/rW6aU7AA6btPG4rxo6gOE2V+OqWP+wO /BlKguWKLakpeWbdBZPw7K/PfD7euX1ieQEDu+R+lZbRT05F5HXV2Uk+follHjiyr8qa udbs86xskPdI6jfgaYN8ZCRRlrcxqdLw0NjhgnBt/Q9IXGK0/wTKX68VR+y3L9TtVDqq RYqZbxpbs8FyK12n0lBqJOz76vYFv2jTTQWUglOjIKH+nYqmZakp/Ze/janC3+IfMYUu PHTU7sRJcRbnJCVD+Xb5iIwC6UGDc6hXVkjOygkG5V4lWeYWqJDZ00j4B/W0yXXp1ckc WkSg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ldrtcuLl; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h7si1158223pgq.411.2021.10.07.18.25.46; Thu, 07 Oct 2021 18:25:46 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ldrtcuLl; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237264AbhJHB1g (ORCPT + 7 others); Thu, 7 Oct 2021 21:27:36 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38904 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S238388AbhJHB1a (ORCPT ); Thu, 7 Oct 2021 21:27:30 -0400 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8F5B5C06176D for ; Thu, 7 Oct 2021 18:25:35 -0700 (PDT) Received: by mail-lf1-x129.google.com with SMTP id y15so32489332lfk.7 for ; Thu, 07 Oct 2021 18:25:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qkMqBx/0+QNy6vnPe5v+Jz8TEUxjmzu64DV0QiSa2s0=; b=ldrtcuLlebPN6CO00igJqAm/YPiO5uQDbTgsbmTHF3MdyXhwR75157DEKb73XBWROL rLvPfpeayyxuYNJ9L4w4lmvr3b6ihp42M3kq8BA9F4U84PQlFZLZJJiyGOvR08ZQAR6A bDTwKHpOmq564aWK5k2AGVUOFuEEQEayQ2uBYmHXatnVeffGnm/jg0hm57FGX5jPfkQy EQuUdbNFr25m5hXS06t/zyBNs32P+YZexrJoMa1UDej7u2k/YrJVAnYba01/Na5NM+Iv RHaymRz0SYpeSfhIF2K9cQn91BbMGDwGayHFVbRjmtXsW2qEgAkDHF2ns79M+Ma6ZqlW 8JvA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qkMqBx/0+QNy6vnPe5v+Jz8TEUxjmzu64DV0QiSa2s0=; b=Cl1aeqoCjjzLhSaWdguRzlkZDZHxeZ04QtoY3kDgKZgeZURWeocj9k43E9tyPDat+h FdtWjRlf2KnxJ5c+wJZA8K/apgM04V4YHTp3pfZRjJTxWiq7b6P8eWQlGywDeUiuIOPO B0ILFimBeHHeIqVABpM8o5cG+xVRYNKwq3ciLRNQemi2n6qs8aE1UhR0JhaobZvwYBPY jAPGJoEiq4vdyFMo/9lApc/ehoeUqocfhXBJoYMA0EOhLIN446FUbuOv4fQTSzCPt3vO xadhHLsLoLWKAEK5ZCEHWwQ6i2/YwYWEfu3jOItOJ5P8YHrxNAm+RvbIIp0sm2rsmu+q Zceg== X-Gm-Message-State: AOAM531DUpuZC7wQ9z9YLSDk84XeGVS9U8JzWFHo7COoIC+5qFbTvex5 DC40ucrk89X0Mm8h1EM6DVoMI5XIRG2i/Q== X-Received: by 2002:a05:651c:1053:: with SMTP id x19mr394867ljm.192.1633656333965; Thu, 07 Oct 2021 18:25:33 -0700 (PDT) Received: from umbar.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s4sm112875ljp.115.2021.10.07.18.25.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Oct 2021 18:25:33 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 09/25] ARM: dts: qcom-apq8060-dragonboard: fix mpps state names Date: Fri, 8 Oct 2021 04:25:08 +0300 Message-Id: <20211008012524.481877-10-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> References: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The majority of device tree nodes for mpps use xxxx-state as pinctrl nodes. Change names of mpps pinctrl nodes for qcom-apq8060-dragonboard board to follow that pattern. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-apq8060-dragonboard.dts | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.30.2 diff --git a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts index e1189e929ee6..5bedbb902ad5 100644 --- a/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts +++ b/arch/arm/boot/dts/qcom-apq8060-dragonboard.dts @@ -357,8 +357,8 @@ pinconf { }; mpps@50 { - dragon_cm3605_mpps: cm3605-mpps { - pinconf { + dragon_cm3605_mpps: cm3605-mpps-state { + mpp5 { pins = "mpp5"; function = "analog"; input-enable; From patchwork Fri Oct 8 01:25:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515534 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1675215ime; Thu, 7 Oct 2021 18:25:44 -0700 (PDT) X-Google-Smtp-Source: ABdhPJyPvltaA6+wcqD7B2y8pYdEOV5hFCNztMsoSur5gGYOtS2Pu/0h9fOnI5CZ/Wwtt9mbHSkC X-Received: by 2002:a63:e756:: with SMTP id j22mr2281167pgk.362.1633656344133; Thu, 07 Oct 2021 18:25:44 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656344; cv=none; d=google.com; s=arc-20160816; b=PpOvCLSt8Sr7TpRCA9OM3bC8euihrNGw7b/VqhewOShNGmDcL5bqJycZwN0z1OLeHU mjOfmBYFjXrnA2Yyv/DHjutiA1HlQwF49gOQ4DBZKEuj0TgqYet+77Q3GYzKyK0buTgx L/MNOwb0W24mAAG7boXf8Gf6A/7Z3TVQN2hnHXJZmnKnAZSkzoMu7dFaQlRw/WUaOQDH 98OCA83Ne+1k8C3cJc5qYagm6Gcgpdm2LX2Bb/0UdPJzlL8WwwITzUiWY3khs53d6F1Y UmB1p9akDI5ZdExkoHvvKzd5hMnjnXSFP91nop9c0WfY4NHuEtZJH5H1NNKWgDzdcqud itLw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=y8Kd+xfjEORBsc4n3BHzpntVG1Hf41evxmwe7Q2QRKE=; b=iDeiVCkGYtN8TcmVE5oVSEOCXiu6UX3c4pY45nSpdFTCYfdVEANvmDMBNyfXcP3yb8 96gTMULRmfFvirxpMkjzCs54B2i25CtaS/uPkIABzaABPqsRCdfEjdL73TDHIaDCVTUL pD10W8lblxdCKJIiH3W+LFr6+wQ7++lLKYzHdP0mf5riN4QLactWf3hghN/qIIt7uo0g CpzjH3uCAb9ELmbD8ihJ3KEE4vpswYdmx7Hppd78vk/92T4aCyHEgMBN8nEib3NBdmhx jBIkHnAAYlMAWPlqYI0Pu1D+MPbL1JHDZ7kL8/L6laF4LXom3huAbDkBsj0HAFy4O1+w V17g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=lCqUcM67; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Also add gpio-ranges property to mpps device tree node, adding the mapping between pinctrl and GPIO pins. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/pm8994.dtsi | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) -- 2.30.2 diff --git a/arch/arm64/boot/dts/qcom/pm8994.dtsi b/arch/arm64/boot/dts/qcom/pm8994.dtsi index ad19016df047..88a9d19b60ac 100644 --- a/arch/arm64/boot/dts/qcom/pm8994.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8994.dtsi @@ -119,10 +119,11 @@ pm8994_gpios: gpios@c000 { }; pm8994_mpps: mpps@a000 { - compatible = "qcom,pm8994-mpp"; + compatible = "qcom,pm8994-mpp", "qcom,spmi-mpp"; reg = <0xa000>; gpio-controller; #gpio-cells = <2>; + gpio-ranges = <&pm8994_mpps 0 0 8>; interrupts = <0 0xa0 0 IRQ_TYPE_NONE>, <0 0xa1 0 IRQ_TYPE_NONE>, <0 0xa2 0 IRQ_TYPE_NONE>, From patchwork Fri Oct 8 01:25:12 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515548 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1676071ime; Thu, 7 Oct 2021 18:27:24 -0700 (PDT) X-Google-Smtp-Source: ABdhPJzfLIzsCSez2SHKy88hdhCgufCAp1021UiR0u2U7zqOX9WYEULvECdDKpKDwrqpHZdw2NbA X-Received: by 2002:a63:e756:: with SMTP id j22mr2281394pgk.362.1633656349411; Thu, 07 Oct 2021 18:25:49 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656349; cv=none; d=google.com; s=arc-20160816; b=S4hYQsWV98n7Rybhb7srtQhFpytnet/gSTspp5IFqCT22RrIVscf2o5Df8hP6DwzMN A8DQ8+f4ZeE0TyUyp9FyELHi99sf+bC2+0P/NveZzzH/atp8YCuVdRB70Lhg9XoKkuf6 R0rbmI+WoxVPv40dj5eXJRUm+nKmT8ulxDzXDUlmavfQQf3WSUnzLibLkGGMCNGT7R7P e78mIOfLz9eKq4W/WAU2xFpNhvca/l6NkhonZHSpRrEUpUkmr/WbiDaO9HBjnQO0IeWK rrq4eZwkuXTsURD8pTbAl50WdkK7P+uShNgM1GG76f6VtVCmY2ZSe92yBwzsC3c8Id2J VMtg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=B1tfgMXD/HCZM2/dbxQ/czHnewIDG6QY34tUjSKvwfk=; b=P+U+fHWdZFVV0XCDZJBL48vjSq6ffe7LHz0NLsbofWR0rIyGzwyS10ykrBEqsegyLN lSMYI4rY2g47rmA3p/rZluS8nZRIvPMiUBiRxn9864Co0j2eYFFC6j7FwX0BAItjkGn7 L/zUzdAP9FhYnogIlSuZjK1MzcRejD+xRJRL6DgzLii45KXTE5TbINtyX0FHSq8kojd6 6cb61bfNuiCrtT9/YBqXeOVSVgx7ZiQ4PoYcnRKfgIykugE2SbQTJIjhs+d5Y61H+0io LHL68AeYA4S9bRUXbinbbBTr4Xb/DIS5WzVkR89YeDxaFP3rITELlVtY836vXzv7ZLkA FMOA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HREMM7Yv; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h7si1158223pgq.411.2021.10.07.18.25.48; Thu, 07 Oct 2021 18:25:49 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HREMM7Yv; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241532AbhJHB1m (ORCPT + 7 others); Thu, 7 Oct 2021 21:27:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38874 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234356AbhJHB1d (ORCPT ); Thu, 7 Oct 2021 21:27:33 -0400 Received: from mail-lf1-x12d.google.com (mail-lf1-x12d.google.com [IPv6:2a00:1450:4864:20::12d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3DAF1C061714 for ; Thu, 7 Oct 2021 18:25:38 -0700 (PDT) Received: by mail-lf1-x12d.google.com with SMTP id m3so32596150lfu.2 for ; Thu, 07 Oct 2021 18:25:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B1tfgMXD/HCZM2/dbxQ/czHnewIDG6QY34tUjSKvwfk=; b=HREMM7YvdSBGH5yCfeBE1GD/MG6qFX3jZvB/hGwR7HZ7db3jFWbR6EjuTL16AfB5UQ koYroB34dm/ZoDXxlxZVaIHC4zdDpnu6Vy7uRPrWOm4t2C6XxRFlKNFN4bTUuSTVTNQY vWACLWBR1Dx5Fz8akQdBCY0VkhkjI8/HeGv+6PNn0pwg170Zq0EUF59oUw3iZN0/fLHe czilOud48xH7CG4PmSkcxH9wRtV9Z1XSRrA24s+ddMsvShtrB0qTXgf9QcU0USltGVH/ 1Do+dge+n5Hnn6CI7GkrIBwFtvS0ZZ7AmfQJzIjXrhHvobw1K1U5m8Eo4xvBONkk8TOi wjZA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B1tfgMXD/HCZM2/dbxQ/czHnewIDG6QY34tUjSKvwfk=; b=aVrBtcUmJrCSykQT4UtNXE9zBUV32OZlCWgSct11SV6FxXIgTdwxQT0ChhZUqISMPQ LZ9ftZf5g1k2By1TwFEKLVWWcFZuuDv5dJfdW8JdZ5ZygVPJ1b+7Xwp+spDQL/YcmHl2 BCAHj6oczBVYxCK/DPg7p41LB6iU9DBLcRCG6uUw7VPAneFKuhV9pwDMv5SP+1sPQuiO 5JkdwHMx9jN30NF+Jw/t1aS11TEahqRX7FFD7Qxs9LrxrjppKaW2UxnNrcGTgRMUypOr vEWCTJlAhJDzyw1FmT5Us+iyx8Vp81QjEs403mJLpKtzmMgbqTWS6Obqx/Ya5xY2sgc3 s5pQ== X-Gm-Message-State: AOAM531Mo4ZW368FaJhHNg9Ypk9226dpotTu4gQ//s7q+X7dybnniMzi 2bF+Jn7zAhCHfeV3eAy+tblAgg== X-Received: by 2002:a05:6512:96f:: with SMTP id v15mr7510057lft.455.1633656336652; Thu, 07 Oct 2021 18:25:36 -0700 (PDT) Received: from umbar.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s4sm112875ljp.115.2021.10.07.18.25.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Oct 2021 18:25:36 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 13/25] pinctrl: qcom: ssbi-mpp: hardcode IRQ counts Date: Fri, 8 Oct 2021 04:25:12 +0300 Message-Id: <20211008012524.481877-14-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> References: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The probing of this driver calls platform_irq_count, which will setup all of the IRQs that are configured in device tree. In preparation for converting this driver to be a hierarchical IRQ chip, hardcode the IRQ count based on the hardware type so that all the IRQs are not configured immediately and are configured on an as-needed basis later in the boot process. This change will also allow for the removal of the interrupts property later in this patch series once the hierarchical IRQ chip support is in. This patch also removes the generic qcom,ssbi-mpp OF match since we don't know the number of pins. All of the existing upstream bindings already include the more-specific binding. Signed-off-by: Dmitry Baryshkov --- drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c | 22 ++++++++-------------- 1 file changed, 8 insertions(+), 14 deletions(-) -- 2.30.2 diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c index 92e7f2602847..a90cada1d657 100644 --- a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c @@ -733,13 +733,12 @@ static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl, } static const struct of_device_id pm8xxx_mpp_of_match[] = { - { .compatible = "qcom,pm8018-mpp" }, - { .compatible = "qcom,pm8038-mpp" }, - { .compatible = "qcom,pm8058-mpp" }, - { .compatible = "qcom,pm8917-mpp" }, - { .compatible = "qcom,pm8821-mpp" }, - { .compatible = "qcom,pm8921-mpp" }, - { .compatible = "qcom,ssbi-mpp" }, + { .compatible = "qcom,pm8018-mpp", .data = (void *) 6 }, + { .compatible = "qcom,pm8038-mpp", .data = (void *) 6 }, + { .compatible = "qcom,pm8058-mpp", .data = (void *) 12 }, + { .compatible = "qcom,pm8821-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pm8917-mpp", .data = (void *) 10 }, + { .compatible = "qcom,pm8921-mpp", .data = (void *) 12 }, { }, }; MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match); @@ -750,19 +749,14 @@ static int pm8xxx_mpp_probe(struct platform_device *pdev) struct pinctrl_pin_desc *pins; struct pm8xxx_mpp *pctrl; int ret; - int i, npins; + int i; pctrl = devm_kzalloc(&pdev->dev, sizeof(*pctrl), GFP_KERNEL); if (!pctrl) return -ENOMEM; pctrl->dev = &pdev->dev; - npins = platform_irq_count(pdev); - if (!npins) - return -EINVAL; - if (npins < 0) - return npins; - pctrl->npins = npins; + pctrl->npins = (uintptr_t) device_get_match_data(&pdev->dev); pctrl->regmap = dev_get_regmap(pdev->dev.parent, NULL); if (!pctrl->regmap) { From patchwork Fri Oct 8 01:25:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515538 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1675274ime; Thu, 7 Oct 2021 18:25:50 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxvEgCr0ippde52LIWLKtpKDCDSGBQvXPokfX1Ei0h223OAZwZRSsVfCMOhf/6yiXeD5/i4 X-Received: by 2002:a17:90b:30cb:: with SMTP id hi11mr9091588pjb.51.1633656350635; Thu, 07 Oct 2021 18:25:50 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656350; cv=none; d=google.com; s=arc-20160816; b=FDXBHXc7100lOZeaeEalVd2mGykvcRRZRKGw22Uqa0uVfoZFy/CMhvozwNxjumxZuB b5SSaYXPVJSJTZuC3Uwah2GcMO8hMApYcdKhaWlNlgy6IVcS0QW5wt7Zg4aKKTLtQ+/N JX+ULEd+Gwypq09KTm2MibbofrpUy+Nlr0nZPhtXvckkkCLt0wSESJMhv45VdmiB/QvR +26YGw5G8utuu/edTo717D1qJtH2uCDKaH6HJXHdmj2CLRxbOs1RniF/CtbWU1NWQpSg W21i5iEwvrvBSK7kf25Wb+omaID/AFEBG5adTN0BZlB5iW2kWKIliV5nZcKwTfytfSAI W/TA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=a82goinfuhMQndAZ1eqxYJiqwbzakFYRTc0Nku7E5EU=; b=ZzcqL1iNKunsOvtjE9cJ8C/7BfHsdElPltwKw9e3DREzh97dSMCfR1mj78i9Mwn+RE FCcviX7lyrQNlRppcriM5/vRHPAza8BgdJof+VJimKlNX6OFKWZxA9kBDFQFyc6jYuzR uDxtC6L9KXqf/lVH2OQfo4ZBKdN4h4SsOG3hIwyB0ZP6YzzC1heMEJlfFxOY+sdHWx+r iCMYyzjMvOySnPAamA67i1INIdWmKqRtZopOGBegkBa+fBCTLblvhGEG1rp/4uzWay0K SckUkCbrBtFxvHmnp5mf+Y8PN3AbpOhiXbvfi1Th+UbIx/PzfMkgeuSxMziAHkmaMQJr CZAg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xf3Cvbd1; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h7si1158223pgq.411.2021.10.07.18.25.50; Thu, 07 Oct 2021 18:25:50 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=xf3Cvbd1; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236195AbhJHB1m (ORCPT + 7 others); Thu, 7 Oct 2021 21:27:42 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38870 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234381AbhJHB1d (ORCPT ); Thu, 7 Oct 2021 21:27:33 -0400 Received: from mail-lf1-x133.google.com (mail-lf1-x133.google.com [IPv6:2a00:1450:4864:20::133]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E79E4C061760 for ; Thu, 7 Oct 2021 18:25:38 -0700 (PDT) Received: by mail-lf1-x133.google.com with SMTP id y26so32780992lfa.11 for ; Thu, 07 Oct 2021 18:25:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=a82goinfuhMQndAZ1eqxYJiqwbzakFYRTc0Nku7E5EU=; b=xf3Cvbd1uHZ2yjcHWjFi5H5ffM/4fm71QLN44vHftTHY6owA066uh/KOufJ4jpzKZV 8xWmQoACICqT3doiygVInJ9OlxuBzkQ4b1DOVHX/GbfnA8hcuMuvLlYlguXIzgzag3xo wD5fpTpbZkyxR5hZI6bCT7U6eW4S9pOwId+NMz4OOpzoGpnoAse89786ENh7BMQOSk8T fTwZm2Cl2N7HLi0g8JXuABYzO+OwMM0znyvpwsxqSxKI7rqqVzbS7FPTwkPqt7CUAdi6 MinbYdkGbVG419oBSxafB1lH8g056F/B6cOPKNjCxLs1wqbMWDKkPrKLQcYyzWSXw6WH iLFA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=a82goinfuhMQndAZ1eqxYJiqwbzakFYRTc0Nku7E5EU=; b=NGguN64jndZfJTKxMujM3CKEiKiYP8i+VdUFVyzmwC4pWmLfsRA6aVKq2EvnPGTYtt zmDJNl7P1sJN0uI/J+b6NKYNeH33VImsU9l7zhtZ0xoUyqXOciRBujumdVqOep9EaxOR ZNNrcWaqKKY/Eq7BgvMnf6w7ytKv6GmQKwd16/34yQgkSacq6j4Jkob8jvl9iznVokNn 4fcOeUo9hbWL6/1u9kN4f4Q2ay6AMYfC5K9cJ6JqeYPsqGB29f1xPmK4C/1lQWVCO4PV Gn1I2KRUtDNVPcfrcjDLHZ8b2Mtu125XRMOoVYHK5tvDiG7/0+uY5ODXDAA1WcMRiSKl 8PSQ== X-Gm-Message-State: AOAM530Bik/tEILT813fH1uVymGJAgaeHPLwD7u1We1qsBuvw/Ly55tT ijg6DSSKrOlX9KK/jsqCZEuFxg== X-Received: by 2002:a2e:390d:: with SMTP id g13mr394279lja.78.1633656337278; Thu, 07 Oct 2021 18:25:37 -0700 (PDT) Received: from umbar.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s4sm112875ljp.115.2021.10.07.18.25.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Oct 2021 18:25:36 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 14/25] pinctrl: qcom: ssbi-mpp: add support for hierarchical IRQ chip Date: Fri, 8 Oct 2021 04:25:13 +0300 Message-Id: <20211008012524.481877-15-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> References: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org ssbi-mpp did not have any irqchip support so consumers of this in device tree would need to call gpio[d]_to_irq() in order to get the proper IRQ on the underlying PMIC. IRQ chips in device tree should be usable from the start without the consumer having to make an additional call to get the proper IRQ on the parent. This patch adds hierarchical IRQ chip support to the ssbi-mpp code to correct this issue. Signed-off-by: Dmitry Baryshkov --- drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c | 111 ++++++++++++++++++++---- 1 file changed, 93 insertions(+), 18 deletions(-) -- 2.30.2 diff --git a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c index a90cada1d657..842940594c4a 100644 --- a/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-ssbi-mpp.c @@ -87,7 +87,6 @@ /** * struct pm8xxx_pin_data - dynamic configuration for a pin * @reg: address of the control register - * @irq: IRQ from the PMIC interrupt controller * @mode: operating mode for the pin (digital, analog or current sink) * @input: pin is input * @output: pin is output @@ -103,7 +102,6 @@ */ struct pm8xxx_pin_data { unsigned reg; - int irq; u8 mode; @@ -126,6 +124,7 @@ struct pm8xxx_mpp { struct regmap *regmap; struct pinctrl_dev *pctrl; struct gpio_chip chip; + struct irq_chip irq; struct pinctrl_desc desc; unsigned npins; @@ -148,6 +147,8 @@ static const struct pin_config_item pm8xxx_conf_items[] = { #endif #define PM8XXX_MAX_MPPS 12 +#define PM8XXX_MPP_PHYSICAL_OFFSET 1 + static const char * const pm8xxx_groups[PM8XXX_MAX_MPPS] = { "mpp1", "mpp2", "mpp3", "mpp4", "mpp5", "mpp6", "mpp7", "mpp8", "mpp9", "mpp10", "mpp11", "mpp12", @@ -492,12 +493,16 @@ static int pm8xxx_mpp_get(struct gpio_chip *chip, unsigned offset) struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; bool state; - int ret; + int ret, irq; if (!pin->input) return !!pin->output_value; - ret = irq_get_irqchip_state(pin->irq, IRQCHIP_STATE_LINE_LEVEL, &state); + irq = chip->to_irq(chip, offset); + if (irq < 0) + return irq; + + ret = irq_get_irqchip_state(irq, IRQCHIP_STATE_LINE_LEVEL, &state); if (!ret) ret = !!state; @@ -524,18 +529,10 @@ static int pm8xxx_mpp_of_xlate(struct gpio_chip *chip, if (flags) *flags = gpio_desc->args[1]; - return gpio_desc->args[0] - 1; + return gpio_desc->args[0] - PM8XXX_MPP_PHYSICAL_OFFSET; } -static int pm8xxx_mpp_to_irq(struct gpio_chip *chip, unsigned offset) -{ - struct pm8xxx_mpp *pctrl = gpiochip_get_data(chip); - struct pm8xxx_pin_data *pin = pctrl->desc.pins[offset].drv_data; - - return pin->irq; -} - #ifdef CONFIG_DEBUG_FS #include @@ -558,7 +555,7 @@ static void pm8xxx_mpp_dbg_show_one(struct seq_file *s, "abus3", }; - seq_printf(s, " mpp%-2d:", offset + 1); + seq_printf(s, " mpp%-2d:", offset + PM8XXX_MPP_PHYSICAL_OFFSET); switch (pin->mode) { case PM8XXX_MPP_DIGITAL: @@ -640,7 +637,6 @@ static const struct gpio_chip pm8xxx_mpp_template = { .get = pm8xxx_mpp_get, .set = pm8xxx_mpp_set, .of_xlate = pm8xxx_mpp_of_xlate, - .to_irq = pm8xxx_mpp_to_irq, .dbg_show = pm8xxx_mpp_dbg_show, .owner = THIS_MODULE, }; @@ -732,6 +728,55 @@ static int pm8xxx_pin_populate(struct pm8xxx_mpp *pctrl, return 0; } +static int pm8xxx_mpp_domain_translate(struct irq_domain *domain, + struct irq_fwspec *fwspec, + unsigned long *hwirq, + unsigned int *type) +{ + struct pm8xxx_mpp *pctrl = container_of(domain->host_data, + struct pm8xxx_mpp, chip); + + if (fwspec->param_count != 2 || + fwspec->param[0] < PM8XXX_MPP_PHYSICAL_OFFSET || + fwspec->param[0] > pctrl->chip.ngpio) + return -EINVAL; + + *hwirq = fwspec->param[0] - PM8XXX_MPP_PHYSICAL_OFFSET; + *type = fwspec->param[1]; + + return 0; +} + +static unsigned int pm8xxx_mpp_child_offset_to_irq(struct gpio_chip *chip, + unsigned int offset) +{ + return offset + PM8XXX_MPP_PHYSICAL_OFFSET; +} + +static int pm8821_mpp_child_to_parent_hwirq(struct gpio_chip *chip, + unsigned int child_hwirq, + unsigned int child_type, + unsigned int *parent_hwirq, + unsigned int *parent_type) +{ + *parent_hwirq = child_hwirq + 24; + *parent_type = child_type; + + return 0; +} + +static int pm8xxx_mpp_child_to_parent_hwirq(struct gpio_chip *chip, + unsigned int child_hwirq, + unsigned int child_type, + unsigned int *parent_hwirq, + unsigned int *parent_type) +{ + *parent_hwirq = child_hwirq + 0x80; + *parent_type = child_type; + + return 0; +} + static const struct of_device_id pm8xxx_mpp_of_match[] = { { .compatible = "qcom,pm8018-mpp", .data = (void *) 6 }, { .compatible = "qcom,pm8038-mpp", .data = (void *) 6 }, @@ -746,7 +791,10 @@ MODULE_DEVICE_TABLE(of, pm8xxx_mpp_of_match); static int pm8xxx_mpp_probe(struct platform_device *pdev) { struct pm8xxx_pin_data *pin_data; + struct irq_domain *parent_domain; + struct device_node *parent_node; struct pinctrl_pin_desc *pins; + struct gpio_irq_chip *girq; struct pm8xxx_mpp *pctrl; int ret; int i; @@ -783,9 +831,6 @@ static int pm8xxx_mpp_probe(struct platform_device *pdev) for (i = 0; i < pctrl->desc.npins; i++) { pin_data[i].reg = SSBI_REG_ADDR_MPP(i); - pin_data[i].irq = platform_get_irq(pdev, i); - if (pin_data[i].irq < 0) - return pin_data[i].irq; ret = pm8xxx_pin_populate(pctrl, &pin_data[i]); if (ret) @@ -816,6 +861,36 @@ static int pm8xxx_mpp_probe(struct platform_device *pdev) pctrl->chip.of_gpio_n_cells = 2; pctrl->chip.label = dev_name(pctrl->dev); pctrl->chip.ngpio = pctrl->npins; + + parent_node = of_irq_find_parent(pctrl->dev->of_node); + if (!parent_node) + return -ENXIO; + + parent_domain = irq_find_host(parent_node); + of_node_put(parent_node); + if (!parent_domain) + return -ENXIO; + + pctrl->irq.name = "ssbi-mpp"; + pctrl->irq.irq_mask_ack = irq_chip_mask_ack_parent; + pctrl->irq.irq_unmask = irq_chip_unmask_parent; + pctrl->irq.irq_set_type = irq_chip_set_type_parent; + pctrl->irq.flags = IRQCHIP_MASK_ON_SUSPEND | IRQCHIP_SKIP_SET_WAKE; + + girq = &pctrl->chip.irq; + girq->chip = &pctrl->irq; + girq->default_type = IRQ_TYPE_NONE; + girq->handler = handle_level_irq; + girq->fwnode = of_node_to_fwnode(pctrl->dev->of_node); + girq->parent_domain = parent_domain; + if (of_device_is_compatible(pdev->dev.of_node, "qcom,pm8821-mpp")) + girq->child_to_parent_hwirq = pm8821_mpp_child_to_parent_hwirq; + else + girq->child_to_parent_hwirq = pm8xxx_mpp_child_to_parent_hwirq; + girq->populate_parent_alloc_arg = gpiochip_populate_parent_fwspec_twocell; + girq->child_offset_to_irq = pm8xxx_mpp_child_offset_to_irq; + girq->child_irq_domain_ops.translate = pm8xxx_mpp_domain_translate; + ret = gpiochip_add_data(&pctrl->chip, pctrl); if (ret) { dev_err(&pdev->dev, "failed register gpiochip\n"); From patchwork Fri Oct 8 01:25:14 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515539 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1675291ime; 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In preparation for converting this driver to be a hierarchical IRQ chip, hardcode the IRQ count based on the hardware type so that all the IRQs are not configured immediately and are configured on an as-needed basis later in the boot process. This change will also allow for the removal of the interrupts property later in this patch series once the hierarchical IRQ chip support is in. This patch also removes the generic qcom,spmi-mpp OF match since we don't know the number of pins. All of the existing upstream bindings already include the more-specific binding. Signed-off-by: Dmitry Baryshkov --- drivers/pinctrl/qcom/pinctrl-spmi-mpp.c | 25 ++++++++++--------------- 1 file changed, 10 insertions(+), 15 deletions(-) -- 2.30.2 diff --git a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c index 2da9b5f68f3f..a9f994863126 100644 --- a/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c +++ b/drivers/pinctrl/qcom/pinctrl-spmi-mpp.c @@ -812,11 +812,7 @@ static int pmic_mpp_probe(struct platform_device *pdev) return ret; } - npins = platform_irq_count(pdev); - if (!npins) - return -EINVAL; - if (npins < 0) - return npins; + npins = (uintptr_t) device_get_match_data(&pdev->dev); BUG_ON(npins > ARRAY_SIZE(pmic_mpp_groups)); @@ -912,16 +908,15 @@ static int pmic_mpp_remove(struct platform_device *pdev) } static const struct of_device_id pmic_mpp_of_match[] = { - { .compatible = "qcom,pm8019-mpp" }, /* 6 MPP's */ - { .compatible = "qcom,pm8841-mpp" }, /* 4 MPP's */ - { .compatible = "qcom,pm8916-mpp" }, /* 4 MPP's */ - { .compatible = "qcom,pm8941-mpp" }, /* 8 MPP's */ - { .compatible = "qcom,pm8950-mpp" }, /* 4 MPP's */ - { .compatible = "qcom,pmi8950-mpp" }, /* 4 MPP's */ - { .compatible = "qcom,pm8994-mpp" }, /* 8 MPP's */ - { .compatible = "qcom,pma8084-mpp" }, /* 8 MPP's */ - { .compatible = "qcom,pmi8994-mpp" }, /* 4 MPP's */ - { .compatible = "qcom,spmi-mpp" }, /* Generic */ + { .compatible = "qcom,pm8019-mpp", .data = (void *) 6 }, + { .compatible = "qcom,pm8841-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pm8916-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pm8941-mpp", .data = (void *) 8 }, + { .compatible = "qcom,pm8950-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pmi8950-mpp", .data = (void *) 4 }, + { .compatible = "qcom,pm8994-mpp", .data = (void *) 8 }, + { .compatible = "qcom,pma8084-mpp", .data = (void *) 8 }, + { .compatible = "qcom,pmi8994-mpp", .data = (void *) 4 }, { }, }; From patchwork Fri Oct 8 01:25:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515549 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1676107ime; Thu, 7 Oct 2021 18:27:29 -0700 (PDT) X-Google-Smtp-Source: ABdhPJx60eg3aysdbYMYGnoDuR6KWcQDxb40nG8jFRrEQVXq2XgLMQwL4LyaxNiyvhVzvKTzPLT9 X-Received: by 2002:a17:90b:890:: with SMTP id bj16mr9044918pjb.143.1633656355946; Thu, 07 Oct 2021 18:25:55 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656355; cv=none; d=google.com; s=arc-20160816; b=mDIzT+huYMaPyoePXNn5ztxOOAAZC0QqXAlLLX5r0oqdmB8G94TRWhyqNetZbi84+8 rz6S4+zuUpapGVBvbS8YHKEhv7//FfCY2MBdyuYbJXo61btP3aIJ90kTSKfkpE33rOnl YLbTq1kviflVANJxpM1VFt5F+FL1BUZPlg4reO94vZOjLD6K4+SGHlbNJm8OvJhdy21X 0UZHLFlSEkMtQNxysKZ8aOpmxvndC3iQ6BvFwj4TxoaUXMuVeD1Vd5SO/PlgXhRKzOQt cixK+o8flqhXdkytLmKehLsiF/1si4hgeAyeWwAm1zqSBsQFyxSA77XfhWmVsQiApTVf QLSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=qQKiFrIlu4aY0PWyyaI2rChbhDxGEcd2OHWvmY22ZAo=; b=DZNxxP8DrTrIkncX6yPeBD8Epacbwa0DukC07tcxgrHNjdO9kfiEqHCvJn2w0yBeU0 2WjZGndsvSeXUs3bHixbAtSDe1OtB1ROeKeiyIV7JYQX/ozIc9GqBC3enKW1slO7O01z Lv+5J3CtrwBvageXeyIdzg8XmZfH6w3eLxTpYALu9BPHUtW145Irci2J7goRVIX5W/QP pz1WDIcxZXPGqGU3P3QG/TdSB2N0m9kziWO8UoaPDZpn9HwF4XLgIlFMvP2r8xXXryHn GLtC2SPEHJLzMBJ86ACUVyYUqitsFdYBsyMXHKBhTCX+N9SLalqsPSHT1pqPrPPShz/G YG7g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VdvRqe+u; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h7si1158223pgq.411.2021.10.07.18.25.55; Thu, 07 Oct 2021 18:25:55 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=VdvRqe+u; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S240863AbhJHB1p (ORCPT + 7 others); Thu, 7 Oct 2021 21:27:45 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38938 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236131AbhJHB1m (ORCPT ); Thu, 7 Oct 2021 21:27:42 -0400 Received: from mail-lf1-x12c.google.com (mail-lf1-x12c.google.com [IPv6:2a00:1450:4864:20::12c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 65CF4C0613E6 for ; Thu, 7 Oct 2021 18:25:41 -0700 (PDT) Received: by mail-lf1-x12c.google.com with SMTP id m3so32596573lfu.2 for ; Thu, 07 Oct 2021 18:25:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=qQKiFrIlu4aY0PWyyaI2rChbhDxGEcd2OHWvmY22ZAo=; b=VdvRqe+u6Yol+YioW6CZJicr70CDuUrGovPClHwleRc85YBA/N4i1jWSvugRV8FgF9 cVsJ9q3YpOspPP4X6vqPU0ox7pnYbduXrW2GtMXdFaBnDdf3gQMwDYLMya88QAHue7Xr 5XdvfheaytUhZ2af/y1vQ3TkwAikTmUjdTWpW1AP7wyj1eVmfWHDx5DMCFPDeGfhmc2V sRwfZ6lgs+3HmCllSNXiUUAXWnEU0KOhUgKjF489DZxJobbOKM9CC8ejMlsb6e8u0Kur A2l2/PS7Rj8EPPsqnl4dZ1B0PyJyjOijELe/Ug4+MzylD8RwFW3WezfbFbWRLWQ2QKOR IUDw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=qQKiFrIlu4aY0PWyyaI2rChbhDxGEcd2OHWvmY22ZAo=; b=XqJW89SPpRyBY1HcYSeprWiNPz6gRTLyyJ95xM2vgPp7oUYVEweOTFOoWhXGIij2J1 5vWbqOyLSXiYqyiDK9dORV1x+j0DHvaASL1/6ZkUiQdCTUBtcy/iML3+XBG9gqrrgdi+ 1E5qdX8bxERJG07W2iLQ1+iZQZ1xQzT1H5hEnmYjBE1uoUDlahwqShI0Dv2RrG4FmLvF pg0jSXCTdhJfJXhT4QBoxsU59qm7/1c/5VBxpyasNtgcYfaEYKx2ozr2uj33M1Zf734Y q9dxFz/+ffEWsQzZOv0PyvOio36pMafLORv3utx50OlySE5YgYBN8TcLZTH7Nv5TOe6f YrEw== X-Gm-Message-State: AOAM530jRSfKqlLJGWyxgMjHjunHMDwDCStG6trvfZBVe7+kncpOBNyM 0/FnCvU8qfVihElWZOvxEdNR1w== X-Received: by 2002:a19:674c:: with SMTP id e12mr7862935lfj.679.1633656339824; Thu, 07 Oct 2021 18:25:39 -0700 (PDT) Received: from umbar.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s4sm112875ljp.115.2021.10.07.18.25.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Oct 2021 18:25:39 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 18/25] ARM: dts: qcom-apq8064: add interrupt controller properties Date: Fri, 8 Oct 2021 04:25:17 +0300 Message-Id: <20211008012524.481877-19-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> References: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now that the pmic-mpp is a proper hierarchical IRQ chip, add interrupt controller properties ('interrupt-controller' and '#interrupt-cells'). The interrupts property is no longer needed so remove it. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-apq8064.dtsi | 21 ++++----------------- 1 file changed, 4 insertions(+), 17 deletions(-) -- 2.30.2 diff --git a/arch/arm/boot/dts/qcom-apq8064.dtsi b/arch/arm/boot/dts/qcom-apq8064.dtsi index cbc9be8a69cd..5aebbeb5eb07 100644 --- a/arch/arm/boot/dts/qcom-apq8064.dtsi +++ b/arch/arm/boot/dts/qcom-apq8064.dtsi @@ -683,10 +683,8 @@ pm8821: pmic@1 { pm8821_mpps: mpps@50 { compatible = "qcom,pm8821-mpp", "qcom,ssbi-mpp"; reg = <0x50>; - interrupts = <24 IRQ_TYPE_NONE>, - <25 IRQ_TYPE_NONE>, - <26 IRQ_TYPE_NONE>, - <27 IRQ_TYPE_NONE>; + interrupt-controller; + #interrupt-cells = <2>; gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pm8821_mpps 0 0 4>; @@ -728,19 +726,8 @@ pm8921_mpps: mpps@50 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pm8921_mpps 0 0 12>; - interrupts = - <128 IRQ_TYPE_NONE>, - <129 IRQ_TYPE_NONE>, - <130 IRQ_TYPE_NONE>, - <131 IRQ_TYPE_NONE>, - <132 IRQ_TYPE_NONE>, - <133 IRQ_TYPE_NONE>, - <134 IRQ_TYPE_NONE>, - <135 IRQ_TYPE_NONE>, - <136 IRQ_TYPE_NONE>, - <137 IRQ_TYPE_NONE>, - <138 IRQ_TYPE_NONE>, - <139 IRQ_TYPE_NONE>; + interrupt-controller; + #interrupt-cells = <2>; }; rtc@11d { From patchwork Fri Oct 8 01:25:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515543 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1675371ime; Thu, 7 Oct 2021 18:25:58 -0700 (PDT) X-Google-Smtp-Source: ABdhPJz6OPODtE0JJPKK754EXP/2anUW0pLD4WrnWhj8sfEawQVEjIGgp4LEDSBdUE+oVGuWH29U X-Received: by 2002:a62:a510:0:b0:44c:569c:5c3f with SMTP id v16-20020a62a510000000b0044c569c5c3fmr7182148pfm.50.1633656358161; Thu, 07 Oct 2021 18:25:58 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656358; cv=none; d=google.com; s=arc-20160816; b=nMc3PAHe7dtlmdw/McfbApBPzAP1nC5wyL8YwZuXtGkN7h2kRVwoha67RTzOReZq/6 XqN20UeCNYzp7F+R6MG833/c3Ag3xci4KfKv9MtmUq1a6sfByq9ORzMurqcZaUcP/Iz/ 1L7pSao99NJW7AF6xMKl6CNB1xOWHVrogWKE0s9D3BvMtx33BWo59/Guw0hHWSaoSZn3 72Nezd7KphadlrBgwE4+zeL7vaLbvW1moh0FyX7sEAlaS1ZG1muzHikeRUdfRa9qyh4s 2ncyQRIiHotPK+b4++mhtIryAc921gElr3Up5kvg8jG1OCzsg+YiLd59D3Woi278EInZ AtbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=1ZjqNWJNbpqp+wYhpfPdT4qYlEU1ULLxGhv3FpneW9Y=; b=pT4cYEubM28YdRLy0tugnfdtP4V6PZqJXOlz7aVZb0CYZcHWYaD28+oCq68c+EBQP7 m7BYq3ptyQOU06DQFjDKDdvVUhRIy5XBFXhfQV26hFkqLNDaxqV8AhetlukPbPeMZbh4 cERp2YFAGJTdNQpjVMtR5TbRXkFB1vzdmvzVPraVjLk5OkamgZYw53fhlB5QR+Wr2O5S GnpdrzYdEYV+8WjXLpSFJXiXh41ZStDagwziggXOXpr+hiiUjV9vjP/4rv75t26bF2Qf FuRauxlyv2FYH689GcT+qzNpPV04/RUhjAPeNarzcv+3GRKVVQRIurarEwvxjyEcz0zY SAxg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=MAjGzOTW; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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The interrupts property is no longer needed so remove it. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-mdm9615.dtsi | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-) -- 2.30.2 diff --git a/arch/arm/boot/dts/qcom-mdm9615.dtsi b/arch/arm/boot/dts/qcom-mdm9615.dtsi index cfff1a5706ed..6e90c5d5a050 100644 --- a/arch/arm/boot/dts/qcom-mdm9615.dtsi +++ b/arch/arm/boot/dts/qcom-mdm9615.dtsi @@ -302,13 +302,8 @@ pwrkey@1c { pmicmpp: mpps@50 { compatible = "qcom,pm8018-mpp", "qcom,ssbi-mpp"; - interrupt-parent = <&pmicintc>; - interrupts = <24 IRQ_TYPE_NONE>, - <25 IRQ_TYPE_NONE>, - <26 IRQ_TYPE_NONE>, - <27 IRQ_TYPE_NONE>, - <28 IRQ_TYPE_NONE>, - <29 IRQ_TYPE_NONE>; + interrupt-controller; + #interrupt-cells = <2>; reg = <0x50>; gpio-controller; #gpio-cells = <2>; From patchwork Fri Oct 8 01:25:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515542 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1675363ime; Thu, 7 Oct 2021 18:25:57 -0700 (PDT) X-Google-Smtp-Source: ABdhPJwK5R59dDenxlUal2Jo0WGjFUbPHqvggJqEga+szdgnEfLfdygVKIv6TV+qLCegXMDMNUbx X-Received: by 2002:a17:90a:b382:: with SMTP id e2mr8590089pjr.119.1633656357106; Thu, 07 Oct 2021 18:25:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656357; cv=none; d=google.com; s=arc-20160816; b=0GSTeW9lxvMTXqMpqkUJaiRqMZSoPiP+zhgDogc2tN3MSKJCCxT1zjRe4TWz64U/mE C8Q9ZQhLtKWKZxa13XBTAxUlIofCa/HRGPw8MaXgH0Ud+oyFzx0h1p0Ycr5l8qw5pO1K vTzp4Tv0xWCmPIrpkk3xYbl4LAZ8GVjX8HjK9sX18q3aWdP4RzZMIZELmS2PgNA9zr9u 1kUh/fx3T0VtKmUI0wcjvXGvWLXy4zzjHlvWsSjG2NIKKb/MQqbK6aXzPmIB446LixvW nTeJ8TuvB6r45hZZv90ebuIvoWD5qmILWY+zFlv/Ib4TdbIwevdrRHMInNe4MPtunaem Hysg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=tFp/7m8gryHUoq+f87cJCv5Sr9eZMzxJXjwT80w0C30=; b=xd34O2SdBT04EgcQpng5CWIAd+rSq+kxaAgl6WAQtiAyyg2CP+iUYdM8Pn5aoZHDbe MPEonvvfe4VnY4/aV8+XRBHPvGcey2YaNSp7SvEJloP0UujiGAgaNqobc8m5Q51kYTqx ffiv/o0ltBDcYXtU3BNlLLGOK0Wr5cqJtxkfhhkVzyMEUJCIMVeM3I/+LxTtI0Tb3HRg p0xQHAujLXDyVZBP2Zt9vAiIuMOsB2iEiYtZO69vEyvl32UBWfvmtTUOSLsdWs7U1sWr YDY4wtJ8rJ/FI4nWPgeUBfRR+oM/jatE9w+E/mmKhi2gKoAKx4C/z581Hed6xO6BC3g4 WXtQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Tv3hh4qq; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [23.128.96.18]) by mx.google.com with ESMTP id h7si1158223pgq.411.2021.10.07.18.25.56; Thu, 07 Oct 2021 18:25:57 -0700 (PDT) Received-SPF: pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) client-ip=23.128.96.18; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Tv3hh4qq; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242248AbhJHB1q (ORCPT + 7 others); Thu, 7 Oct 2021 21:27:46 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:38906 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S239918AbhJHB1n (ORCPT ); Thu, 7 Oct 2021 21:27:43 -0400 Received: from mail-lf1-x132.google.com (mail-lf1-x132.google.com [IPv6:2a00:1450:4864:20::132]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DA106C0613EE for ; Thu, 7 Oct 2021 18:25:42 -0700 (PDT) Received: by mail-lf1-x132.google.com with SMTP id i24so30956218lfj.13 for ; Thu, 07 Oct 2021 18:25:42 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tFp/7m8gryHUoq+f87cJCv5Sr9eZMzxJXjwT80w0C30=; b=Tv3hh4qqM6YTzNxLirtrWtJHI2KZWlyziAvAo2x1Fn3mC4o1c/5cqgcDqUEXyEQQfb n/Szj1rkAiH8cT3FlLrbP8mtb36kowJku+OJ9erYxIufpJWBkq8mrtnrFQfy0LELDS+C lMI477cQ3HGoiA9xkVim8SJ3v18Cm7F4GREaj/vyT/IASXUDKtw/EYhyy6qC4zRj2Oss JVVTnWOhPm/O1KhDx58klUyBmaDKvg5lRc2NyLcY1BxfrKdqgRvx1rQP6UNAky76k1Sp qu4hSre2FwLEKmdpEAIMDfWmf5sv9vaJ5GTsxRw1jrD63zb13EXBbCqce3xYIatOUxJd g+aQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tFp/7m8gryHUoq+f87cJCv5Sr9eZMzxJXjwT80w0C30=; b=KljzgcaU8lI0ps6x0GTyOmrfNoBByPDrMRh8YZuatS1Cs8uR2hKJNHAqQAaV0l/6TN 5KQXEIcPSxW+wZrZ3FmY7DsO4p2r9gE/yYN38olXeZdLtog6hHXsLszyL9g+9hPbwWWN aMMWDrEu+Po1F3XfyqhPeJQxY+2RLaq7H0Bp/bNmWra38LCH82egmi5FVNPpn/zr+mRr M2XlxppvDCHZxe70ItPaDhMfSLU6PR0nOZ/4SqzwMpDvZVWaHRGnNHihlE8aBt2eMOuS fxJZOTQ9ENIhDXNlL2+esQL9iMellffN/ELdmS/1gTnmTTE3IcZ1RoEDc+/9v9kMfv17 Kang== X-Gm-Message-State: AOAM533dTOXKk4JTEZBDb8q40R75FWYTAg+jfjYQzIrVvu43mb0mNDiV bARLgsqh5IxyPmbQYDCTfYGBdQ== X-Received: by 2002:a2e:a5c8:: with SMTP id n8mr345526ljp.367.1633656341223; Thu, 07 Oct 2021 18:25:41 -0700 (PDT) Received: from umbar.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id s4sm112875ljp.115.2021.10.07.18.25.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 07 Oct 2021 18:25:40 -0700 (PDT) From: Dmitry Baryshkov To: Andy Gross , Bjorn Andersson , Linus Walleij , Rob Herring Cc: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-msm@vger.kernel.org Subject: [PATCH v3 20/25] ARM: dts: qcom-msm8660: add interrupt controller properties Date: Fri, 8 Oct 2021 04:25:19 +0300 Message-Id: <20211008012524.481877-21-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> References: <20211008012524.481877-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Now that the pmic-mpp is a proper hierarchical IRQ chip, add interrupt controller properties ('interrupt-controller' and '#interrupt-cells'). The interrupts property is no longer needed so remove it. Signed-off-by: Dmitry Baryshkov --- arch/arm/boot/dts/qcom-msm8660.dtsi | 16 ++-------------- 1 file changed, 2 insertions(+), 14 deletions(-) -- 2.30.2 diff --git a/arch/arm/boot/dts/qcom-msm8660.dtsi b/arch/arm/boot/dts/qcom-msm8660.dtsi index d404d386d392..21cb58ab68ac 100644 --- a/arch/arm/boot/dts/qcom-msm8660.dtsi +++ b/arch/arm/boot/dts/qcom-msm8660.dtsi @@ -308,20 +308,8 @@ pm8058_mpps: mpps@50 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pm8058_mpps 0 0 12>; - interrupt-parent = <&pm8058>; - interrupts = - <128 IRQ_TYPE_NONE>, - <129 IRQ_TYPE_NONE>, - <130 IRQ_TYPE_NONE>, - <131 IRQ_TYPE_NONE>, - <132 IRQ_TYPE_NONE>, - <133 IRQ_TYPE_NONE>, - <134 IRQ_TYPE_NONE>, - <135 IRQ_TYPE_NONE>, - <136 IRQ_TYPE_NONE>, - <137 IRQ_TYPE_NONE>, - <138 IRQ_TYPE_NONE>, - <139 IRQ_TYPE_NONE>; + interrupt-controller; + #interrupt-cells = <2>; }; pwrkey@1c { From patchwork Fri Oct 8 01:25:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 515550 Delivered-To: patch@linaro.org Received: by 2002:ac0:b5cc:0:0:0:0:0 with SMTP id x12csp1676313ime; Thu, 7 Oct 2021 18:27:53 -0700 (PDT) X-Google-Smtp-Source: ABdhPJxKrUGtflSX7J8XlSxzNQn+6OlVU0azZLHMzk3WJ1zOIL50zUtgewN31bDbqbZ9paY+Cjla X-Received: by 2002:a17:90a:4b4d:: with SMTP id o13mr8984408pjl.236.1633656363160; Thu, 07 Oct 2021 18:26:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1633656363; cv=none; d=google.com; s=arc-20160816; b=lggmEua5pFA08ZG0Qx2OhJ2i3vJMkGVtFqt5qSA+EHDimqHjXL8FPsXcpJGjoOfM9u cGdn7YL+y18fOfNHazduXrnMXZdaOtCghiuJKbMMFTrin3nYjZpaqfDolsuni9liEIir TJQCYSzmwrr8Sqm+rNdVVM2HUp2XyxOcqRPxIsoyDC9WKQ/O21CucwYl3o8m4JFTCCLk /PsjuqCcHM2AFIXxYSrtOu4U5rvRVazriZc52tBUPJSbewI/yLXx9RFhsok6uxgcYZUJ sn9Nw/Ol5sJHhH5sfFc4Fh3evDpAhIe24VkCbqsSjwUr1PjM2omM+v+UZDPE+6zvgGfp 9OUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=eRXNWHuPd38vN0RWOcJ4q4RHGL96UR0p/zcT0YWhKTU=; b=IIU3QwBNCsrwdam0nWoOLGzy4MJzwmz/jZn+3T3Jitc5Oeo3nT0UFsV/clxbcDrfS6 q2SgBmwd09yY6d9I8zTo/dl2e4dlY44NYdCrqC88F31TbjqRAub/uMqKJFZ/NB2Xkl7T VbTjoGHwhK45H0sXa8LZC7uaMFn345tbQhpYSr+wI4x+bCkbN81GZ4EjFNZuJRN6cjLt FmUUu5a4exyS9WzWQJFZ63gC3ihN3UW7F8LVElUh8Ww17dsC00k46psvA5HwfGudhe3f GievIG3h9f6bv5OYoaYb1/st8tg/U+WTNJAfuNDXwZKodj+1fn42wF2R3uADwN+qDygR sV2w== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="sXE/eokB"; spf=pass (google.com: domain of devicetree-owner@vger.kernel.org designates 23.128.96.18 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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The interrupts property is no longer needed so remove it. Signed-off-by: Dmitry Baryshkov --- arch/arm64/boot/dts/qcom/pm8916.dtsi | 6 ++---- 1 file changed, 2 insertions(+), 4 deletions(-) -- 2.30.2 diff --git a/arch/arm64/boot/dts/qcom/pm8916.dtsi b/arch/arm64/boot/dts/qcom/pm8916.dtsi index 7d9e25dd9e3a..55a386d05809 100644 --- a/arch/arm64/boot/dts/qcom/pm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/pm8916.dtsi @@ -96,10 +96,8 @@ pm8916_mpps: mpps@a000 { gpio-controller; #gpio-cells = <2>; gpio-ranges = <&pm8916_mpps 0 0 4>; - interrupts = <0 0xa0 0 IRQ_TYPE_NONE>, - <0 0xa1 0 IRQ_TYPE_NONE>, - <0 0xa2 0 IRQ_TYPE_NONE>, - <0 0xa3 0 IRQ_TYPE_NONE>; + interrupt-controller; + #interrupt-cells = <2>; }; pm8916_gpios: gpios@c000 {