From patchwork Wed Dec 1 22:51:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519746 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp927170imb; Wed, 1 Dec 2021 14:51:59 -0800 (PST) X-Google-Smtp-Source: ABdhPJy/6+wcblWaXtUaNc0Io/Eng0PQ4784c+fIfZr3vGa2lFKEoSP52sMiDufkrf/TBXCu+DJR X-Received: by 2002:a65:6150:: with SMTP id o16mr6946102pgv.254.1638399119290; Wed, 01 Dec 2021 14:51:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638399119; cv=none; d=google.com; s=arc-20160816; b=gX76LDFTQdpJdQCMTcOke1jul8hgnSyAWRDZZJ8CoKCdwhCOukwoXRTmXn4Ifb60Na kk+/Atui1JaMpcxm/+nLD5JPAKB1Yn+ldhUehltxvGM7kfPABM47AZTSMJnh/vtILSb/ 6OGn71zL4A4e3PZuItPN4jnxX4FLHF2wdXU8iF+awruQkPf2wIkIgpn9SC7KEfUWysB7 Qb68HWbWIKYDLmXZMkEbObXMXfk7Mr/ZFc5HppJ+r0BEpeZRyfsx0kLm4efbGmoqngmX XPXB9Uu0aYJIiKXymQDa2KwZycskLRACy+oXFWPAEPPZozrBfcr+VsncAyOSYzm0x69Q Dx0g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:delivered-to; bh=2wq1wR+9Fbl0/NYq+OFpxYykAdQVhs+xIQ+W0LOVHD8=; b=OPUuDJALXI9MJxQ8Jfju8RXZ/N7tFBmtUsyQaWLnoKSV/xHeDs6Ex6/YFexQg5Q1ZA JuaU34giwhH4+X4D9BQLc2o4GeimHUVtEcukt4Wi+o5mM0wfQdbbI1/Krbz9H/G2pnME UtUDaGiGK1rgWEPA40WLWu4ISNtTFjawQNIFtFBH+uEwjnyHoqMPba9rHz4WPJu0XjZ/ YvfHHXngJyy5RchuplyTrOxKdnKuiXolp+5cyWLsq33kjql0RfAJfq004BOAqGI25+wT UEBy+mkHdp0XhoSCT+hsinjF14nS2/3VADPmFQoQXwcnabCJtC1UEvcheAzs4vFkOk13 Cxzg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kS3vvLLJ; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id t14si1365940pgj.825.2021.12.01.14.51.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:51:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=kS3vvLLJ; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 964526E8AE; Wed, 1 Dec 2021 22:51:49 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x233.google.com (mail-lj1-x233.google.com [IPv6:2a00:1450:4864:20::233]) by gabe.freedesktop.org (Postfix) with ESMTPS id E55776E89D for ; Wed, 1 Dec 2021 22:51:47 +0000 (UTC) Received: by mail-lj1-x233.google.com with SMTP id u22so51207660lju.7 for ; Wed, 01 Dec 2021 14:51:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2wq1wR+9Fbl0/NYq+OFpxYykAdQVhs+xIQ+W0LOVHD8=; b=kS3vvLLJrAOgXt9JRq6rRZeTkUS4KNuSXYGPEjorp3Mji9jPl4vnkE+XCyugZKGxpY YJkCpd1VZX/WQC1TeNOLjHzCGLOoyBbrNwXBOfsWjers4aHjzA65bkgWyAKcEKHQzXmT fdNh42YAyNY9gchXlkNPgt4GaKF5w10FzKx/gKRnfAz2gQTa2LPv3MyOE5LeIW6sMUMV CE5t6uyVyYcG/oVbFsCb+x3XBLz3jDeFU9j4Mw8z8n7DBaRwI0h4p4SxuD4bixhBVFeL i4dngsTohgggTlRgCt6VnMNc7NOJscgCUBXntAq/ysmLlpcXEgzxRPTPPx1si4Qf9Pa5 CdfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2wq1wR+9Fbl0/NYq+OFpxYykAdQVhs+xIQ+W0LOVHD8=; b=JvqUbGF4EjFjrMkx3+BJ6nhyA0TTc2uEqw6wBuk7gdSK0gdrkUjbzzQofRAic5DfoK /cyFXz4m7Jg7t3eFRYSRE/gxPfmucjTb4d/EEjC+oRF1YRnSgPv4T4VX61G6T4+X/QV9 uy0DDb6EI/RSpjQFSz9YyAD3uf7BDL12GMJ2zO5GfUvsJAbWCf77RtXBFJ2iu5CX7cP2 Cv2f+SYzwTr86bge+40SV+0gAiSufG5P3DAsrC8H9m0VAkY4pq018CY7UytE8k4FH3Qb KE75VTg/3yBW6xlgV+5t1zRlr2m1YmQ6E2Rc1LlwXcxGekCggJw7e3dQlVV/B8ZgU1mt oFag== X-Gm-Message-State: AOAM533qwilf/SKn3mq566MYMa8tiFn+WoDOU5Zjmouatgdu+CiIAk+C AWbdSS4iBYQfFw7t//o9oKQSJQ== X-Received: by 2002:a05:651c:237:: with SMTP id z23mr8455555ljn.108.1638399106240; Wed, 01 Dec 2021 14:51:46 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm124819ljh.49.2021.12.01.14.51.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:51:45 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Subject: [PATCH v2 1/4] drm/msm/dpu: drop scaler config from plane state Date: Thu, 2 Dec 2021 01:51:37 +0300 Message-Id: <20211201225140.2481577-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201225140.2481577-1-dmitry.baryshkov@linaro.org> References: <20211201225140.2481577-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, David Airlie , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Scaler and pixel_ext configuration does not contain a long living state, it is used only during plane update, so remove these two fiels from dpu_plane_state and allocate them on stack. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 59 ++++++++++------------- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h | 6 --- 2 files changed, 26 insertions(+), 39 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index ca190d92f0d5..4c373abbe89c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -536,14 +536,12 @@ static void _dpu_plane_setup_scaler3(struct dpu_plane *pdpu, struct dpu_plane_state *pstate, uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h, struct dpu_hw_scaler3_cfg *scale_cfg, + struct dpu_hw_pixel_ext *pixel_ext, const struct dpu_format *fmt, uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v) { uint32_t i; - memset(scale_cfg, 0, sizeof(*scale_cfg)); - memset(&pstate->pixel_ext, 0, sizeof(struct dpu_hw_pixel_ext)); - scale_cfg->phase_step_x[DPU_SSPP_COMP_0] = mult_frac((1 << PHASE_STEP_SHIFT), src_w, dst_w); scale_cfg->phase_step_y[DPU_SSPP_COMP_0] = @@ -582,9 +580,9 @@ static void _dpu_plane_setup_scaler3(struct dpu_plane *pdpu, scale_cfg->preload_y[i] = DPU_QSEED3_DEFAULT_PRELOAD_V; } - pstate->pixel_ext.num_ext_pxls_top[i] = + pixel_ext->num_ext_pxls_top[i] = scale_cfg->src_height[i]; - pstate->pixel_ext.num_ext_pxls_left[i] = + pixel_ext->num_ext_pxls_left[i] = scale_cfg->src_width[i]; } if (!(DPU_FORMAT_IS_YUV(fmt)) && (src_h == dst_h) @@ -662,6 +660,11 @@ static void _dpu_plane_setup_scaler(struct dpu_plane *pdpu, struct dpu_hw_pipe_cfg *pipe_cfg) { const struct drm_format_info *info = drm_format_info(fmt->base.pixel_format); + struct dpu_hw_scaler3_cfg scaler3_cfg; + struct dpu_hw_pixel_ext pixel_ext; + + memset(&scaler3_cfg, 0, sizeof(scaler3_cfg)); + memset(&pixel_ext, 0, sizeof(pixel_ext)); /* don't chroma subsample if decimating */ /* update scaler. calculate default config for QSEED3 */ @@ -670,8 +673,23 @@ static void _dpu_plane_setup_scaler(struct dpu_plane *pdpu, drm_rect_height(&pipe_cfg->src_rect), drm_rect_width(&pipe_cfg->dst_rect), drm_rect_height(&pipe_cfg->dst_rect), - &pstate->scaler3_cfg, fmt, + &scaler3_cfg, &pixel_ext, fmt, info->hsub, info->vsub); + + if (pdpu->pipe_hw->ops.setup_pe) + pdpu->pipe_hw->ops.setup_pe(pdpu->pipe_hw, + &pixel_ext); + + /** + * when programmed in multirect mode, scalar block will be + * bypassed. Still we need to update alpha and bitwidth + * ONLY for RECT0 + */ + if (pdpu->pipe_hw->ops.setup_scaler && + pstate->multirect_index != DPU_SSPP_RECT_1) + pdpu->pipe_hw->ops.setup_scaler(pdpu->pipe_hw, + pipe_cfg, &pixel_ext, + &scaler3_cfg); } /** @@ -712,7 +730,6 @@ static int _dpu_plane_color_fill(struct dpu_plane *pdpu, drm_rect_width(&pipe_cfg.dst_rect); pipe_cfg.src_rect.y2 = drm_rect_height(&pipe_cfg.dst_rect); - _dpu_plane_setup_scaler(pdpu, pstate, fmt, true, &pipe_cfg); if (pdpu->pipe_hw->ops.setup_format) pdpu->pipe_hw->ops.setup_format(pdpu->pipe_hw, @@ -724,15 +741,7 @@ static int _dpu_plane_color_fill(struct dpu_plane *pdpu, &pipe_cfg, pstate->multirect_index); - if (pdpu->pipe_hw->ops.setup_pe) - pdpu->pipe_hw->ops.setup_pe(pdpu->pipe_hw, - &pstate->pixel_ext); - - if (pdpu->pipe_hw->ops.setup_scaler && - pstate->multirect_index != DPU_SSPP_RECT_1) - pdpu->pipe_hw->ops.setup_scaler(pdpu->pipe_hw, - &pipe_cfg, &pstate->pixel_ext, - &pstate->scaler3_cfg); + _dpu_plane_setup_scaler(pdpu, pstate, fmt, true, &pipe_cfg); } return 0; @@ -1129,8 +1138,6 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) pipe_cfg.dst_rect = state->dst; - _dpu_plane_setup_scaler(pdpu, pstate, fmt, false, &pipe_cfg); - /* override for color fill */ if (pdpu->color_fill & DPU_PLANE_COLOR_FILL_FLAG) { /* skip remaining processing on color fill */ @@ -1143,21 +1150,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) pstate->multirect_index); } - if (pdpu->pipe_hw->ops.setup_pe && - (pstate->multirect_index != DPU_SSPP_RECT_1)) - pdpu->pipe_hw->ops.setup_pe(pdpu->pipe_hw, - &pstate->pixel_ext); - - /** - * when programmed in multirect mode, scalar block will be - * bypassed. Still we need to update alpha and bitwidth - * ONLY for RECT0 - */ - if (pdpu->pipe_hw->ops.setup_scaler && - pstate->multirect_index != DPU_SSPP_RECT_1) - pdpu->pipe_hw->ops.setup_scaler(pdpu->pipe_hw, - &pipe_cfg, &pstate->pixel_ext, - &pstate->scaler3_cfg); + _dpu_plane_setup_scaler(pdpu, pstate, fmt, false, &pipe_cfg); if (pdpu->pipe_hw->ops.setup_multirect) pdpu->pipe_hw->ops.setup_multirect( diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h index 52792526e904..1ee5ca5fcdf7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.h @@ -23,8 +23,6 @@ * @multirect_index: index of the rectangle of SSPP * @multirect_mode: parallel or time multiplex multirect mode * @pending: whether the current update is still pending - * @scaler3_cfg: configuration data for scaler3 - * @pixel_ext: configuration data for pixel extensions * @plane_fetch_bw: calculated BW per plane * @plane_clk: calculated clk per plane */ @@ -37,10 +35,6 @@ struct dpu_plane_state { uint32_t multirect_mode; bool pending; - /* scaler configuration */ - struct dpu_hw_scaler3_cfg scaler3_cfg; - struct dpu_hw_pixel_ext pixel_ext; - u64 plane_fetch_bw; u64 plane_clk; }; From patchwork Wed Dec 1 22:51:38 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519747 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp927218imb; Wed, 1 Dec 2021 14:52:02 -0800 (PST) X-Google-Smtp-Source: ABdhPJwLrYYECvsQvj8iMeVUbjkVw6i9IlZHmhyJyWEPPFIG4aWiT5b56eOHZWUNKRKMUDevCL+n X-Received: by 2002:a17:90b:50c:: with SMTP id r12mr1401199pjz.71.1638399122107; Wed, 01 Dec 2021 14:52:02 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638399122; cv=none; d=google.com; s=arc-20160816; b=OnZbXbmUmGEpIRIehdolZVD2atuzzBuGtZ2sjEOusZbbv8dqXKhJt5wuN9h1C+Ro26 i9MDwhVlayymYD2cJYo11DXTNgFSduFUeB0W2m716z59UbanASltBNn8JWyX2OCOwyXC fukLaDzRFElnOryq4he2IMF72BH2jPJ+KYo3/21Ahj07KgfyCmXgmgmbMjgqbAJobev0 5BxwQIpxaIykZuvP9ZCl6jSAlqZFt3cCNADyiaTKJ/DrO+WR8vWG9ZH8ShKqrvf5mMAB dawpdQGOIU+CoN51uTguxjLrxeM57O1yxg1oykLrmisK9F/BjqP23Mi/CSHO3AP26T22 lONQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:delivered-to; bh=GvsWfL7mbOVefyoKeCj6Q5Bk0eV0IEAIU/XkuhNVYgo=; b=zqx+6lVAYUkpPzwVhBYojI4K63QvF6SvuJPOjO6zR+PG0P5H+h0IieQ8lLFs308cWZ 0nHwA2mH8trzpiZ3ew8QnJaA3uTZPxa3smPuZrLvaT+Z5XFlBfW9vgx4Uck+vqCz9wza m+42JHrVffFBIZBSKJAUQyjPT1K1MNTKFeq7/f2smVAnN3ff5fC6o0xsCKoF4BWABYBX Cib8fjd0s1Kv9Bh91tdMni0aJw1NqGYpJ68TQ0d1KBjhHAS3X3iGMlXvD2hSVt/Vo7RM qNxYTvDM6EsE2dRM+6U5E16H2DRjKMU/VyElbGhET90SB99XowqU6JMhLfSoK1DEI0+r uQZw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=o2Kluvlh; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [131.252.210.177]) by mx.google.com with ESMTPS id h13si347451pgp.231.2021.12.01.14.52.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:52:02 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) client-ip=131.252.210.177; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=o2Kluvlh; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 131.252.210.177 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id DE51B6E8EC; Wed, 1 Dec 2021 22:51:49 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x130.google.com (mail-lf1-x130.google.com [IPv6:2a00:1450:4864:20::130]) by gabe.freedesktop.org (Postfix) with ESMTPS id A29016E89D for ; Wed, 1 Dec 2021 22:51:48 +0000 (UTC) Received: by mail-lf1-x130.google.com with SMTP id b40so66792487lfv.10 for ; Wed, 01 Dec 2021 14:51:48 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=GvsWfL7mbOVefyoKeCj6Q5Bk0eV0IEAIU/XkuhNVYgo=; b=o2KluvlhXKOWt4Xt6mrtsYmjh0cHuQobULvXY8yR8HgIZQZUCdXW+fDuoTdlXP7X34 xfSUNrxKE6hAF5wDd5wUbrtHrSya3p6gPazNYn7IuAGnd3g2fpBRHdJitVIWBXx9Pt7B kw/Mj+RpOaNUvGlID3rCNmn2+GJrpVgqv3U53MzQjfMWbtcAXBgcm2N9rqgBntMgSpI2 PU8uoT4rhCobjeMKCgppx/xCrb+iTQm0yzfcCJ9zTLVpD/VvcQpZ4JKcPaWvTG4D/0tU hAvQqEIGzcKZ4sdn6qsNUmZCTa2Xnm7WwPPnkxMlrxIQxdLlI7bNHlSaLx9Tdv84/aKC /JjA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=GvsWfL7mbOVefyoKeCj6Q5Bk0eV0IEAIU/XkuhNVYgo=; b=c4EQl31IBfa8D1kJ0K45tBwU0mlsFstN9g1zCUEmNCqkEc2DORdyVy02t6vtDokdZL FCD0HaH86CV84nnFGy2IEl0+Tr+xtl+cWTEW3JNthwlc4iFxRE0cKlAq3u67klsfE1yu n1K4wD5odG1IeaCPf8NUQySEkIitW2Cd4w9MF/tY4q451nHxA3uqPgvMtTnWE9VUGj7S 74tJtEm+YTCeddRr3qtk87vVK5wCO+At8j10ZOfIFtXAQUmqnOQVjcDEd4EJ1UnbAycX 7xsKPbQjcVn/OIvc3we7zVcqwf/Mcq4WzLgIlGZ3PBhFw6W+35vvvmhJyFZQriYZ1Syr YIBg== X-Gm-Message-State: AOAM530NlKn/EJ3ZqERPPcjCW7DdBZEiLHngWpdiWxjyVCZhocOlA8Ei Jzu5GzH8iD6BTgvsxoK6tHyoSC+RUPaNFA== X-Received: by 2002:a05:6512:150c:: with SMTP id bq12mr8569303lfb.687.1638399106986; Wed, 01 Dec 2021 14:51:46 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm124819ljh.49.2021.12.01.14.51.46 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:51:46 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Subject: [PATCH v2 2/4] drm/msm/dpu: drop pe argument from _dpu_hw_sspp_setup_scaler3 Date: Thu, 2 Dec 2021 01:51:38 +0300 Message-Id: <20211201225140.2481577-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201225140.2481577-1-dmitry.baryshkov@linaro.org> References: <20211201225140.2481577-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, David Airlie , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" The _dpu_hw_sspp_setup_scaler3 (hw_sspp->setup_scaler) does not use pe argument. Let's remove it while we are cleaning scaled configuration. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 2 -- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- 3 files changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index d77eb7da5daf..7235605bfc9e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -413,13 +413,11 @@ static void dpu_hw_sspp_setup_pe_config(struct dpu_hw_pipe *ctx, static void _dpu_hw_sspp_setup_scaler3(struct dpu_hw_pipe *ctx, struct dpu_hw_pipe_cfg *sspp, - struct dpu_hw_pixel_ext *pe, void *scaler_cfg) { u32 idx; struct dpu_hw_scaler3_cfg *scaler3_cfg = scaler_cfg; - (void)pe; if (_sspp_subblk_offset(ctx, DPU_SSPP_SCALER_QSEED3, &idx) || !sspp || !scaler3_cfg) return; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h index e8939d7387cb..ad2002d75739 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h @@ -334,12 +334,10 @@ struct dpu_hw_sspp_ops { * setup_scaler - setup scaler * @ctx: Pointer to pipe context * @pipe_cfg: Pointer to pipe configuration - * @pe_cfg: Pointer to pixel extension configuration * @scaler_cfg: Pointer to scaler configuration */ void (*setup_scaler)(struct dpu_hw_pipe *ctx, struct dpu_hw_pipe_cfg *pipe_cfg, - struct dpu_hw_pixel_ext *pe_cfg, void *scaler_cfg); /** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 4c373abbe89c..c7b065b14c5c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -688,7 +688,7 @@ static void _dpu_plane_setup_scaler(struct dpu_plane *pdpu, if (pdpu->pipe_hw->ops.setup_scaler && pstate->multirect_index != DPU_SSPP_RECT_1) pdpu->pipe_hw->ops.setup_scaler(pdpu->pipe_hw, - pipe_cfg, &pixel_ext, + pipe_cfg, &scaler3_cfg); } From patchwork Wed Dec 1 22:51:39 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519748 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp927260imb; Wed, 1 Dec 2021 14:52:04 -0800 (PST) X-Google-Smtp-Source: ABdhPJxYQVoxU7AeZlGCae+Qw9eE6zKHkhd0sls6WV6PTiZMMJ7bUx5NHBBI2LzuVNWbnokfYX0K X-Received: by 2002:a17:902:db01:b0:141:ea12:2176 with SMTP id m1-20020a170902db0100b00141ea122176mr11095400plx.44.1638399124348; Wed, 01 Dec 2021 14:52:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638399124; cv=none; d=google.com; s=arc-20160816; b=v5xEhkohEMArgfYn+buytafnzLDy5lGR6QAHA0FgIigps4fTxPpYtTY5C3oDc/TBCj MDr/x/G9TW7wdYt57Hx6gaTfH2Tdq0UKPzzfKHD8Ul6rV/U3X7otXzr0M35xM8R0uQD7 f4372O+jcf/Nh9yQ5cHi5UBA20+cXXJ1grR14jPF97894ktpfm7hT0JFULWWl6RUopTN 78vYy6ulbGR3k30qCPzwxFkJeH1gGa1Dbq0VXaVZZQPUMo3WOBfnR+A6lR07UiPNyPaV KLV5Vq6CNlXNKqoosGw8gP3L1Q0LUdxf2OI3jQr/dV5eXv5i0uwIBMQrFLZjt4jWU/HX 1bww== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:delivered-to; bh=svPKLKMKhZhnd91WRdbWbN+/qKS4HH/Q2LMWNF7ijvo=; b=rcYwcZhLF/36i5Qhb7FE/bQ9h7+rrqolbnN3yjUa0yRUgrC1fbzHfeFKqA0V9hIIwD uscIb/dHZKFUzIifzWbKg8x3H5/xVHYHsGhXdXq7dCjmRePnKmfS+0LvUsTk9TtCmC6w n7CjuJyXNFwsZgC94gyDQ+QgTrY4yLDgm7xV16o2D4SYy2Gue8KK8ETgoyAsK9LOZdkc IT0W65Vv6uN8H6RwdcWbiwXn/OvrjqTvHqf8GX5WbrovnLhO18Q/hyyFggi49kI3Y6WE 0A063bdnUB4EhLKJYT/ugKrljFOPpYEZF2IEd/loG9kmaLo4wt61yvzJacIW4dxwsbKz TtWA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=azAFpU2V; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id o15si1307201pgr.835.2021.12.01.14.52.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:52:04 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=azAFpU2V; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4B8536E926; Wed, 1 Dec 2021 22:51:50 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lj1-x232.google.com (mail-lj1-x232.google.com [IPv6:2a00:1450:4864:20::232]) by gabe.freedesktop.org (Postfix) with ESMTPS id 3DCBE6E8AE for ; Wed, 1 Dec 2021 22:51:49 +0000 (UTC) Received: by mail-lj1-x232.google.com with SMTP id p8so37672918ljo.5 for ; Wed, 01 Dec 2021 14:51:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=svPKLKMKhZhnd91WRdbWbN+/qKS4HH/Q2LMWNF7ijvo=; b=azAFpU2VsQiCYtuKQEZfC1N6Err8B2Dzcvtjr8apntyKIeymxCyYhhvArjY7UJ62Gr OIDw4pexNa0sPhceWhUiMGFGOt/99tvmXORF0OfoNpIZPbGGAiDRjq04Asc+exEyvzqm HESUZpXUnu3ml1gM/BuVJFhN5im+EBDqmoKitBGeRvcoPEXYB+fguDdBpovFFjvKSUh2 Da1imXp8g1KR3bUnY+NjaK3MJTe2YTOOEHZMHvKGI5EY7YEUjkV0ex36K7QWctWofs4u 34RCZVGHyae6pw9Wyu8ccjuV05c2bSP/A+0gRHaOOj8e0P7MoqcTKhc1xV06Uw83DD4r 3koA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=svPKLKMKhZhnd91WRdbWbN+/qKS4HH/Q2LMWNF7ijvo=; b=IbOzf2dll+UQYUbnxDtyG3HwyI5QtT2dMHG8YXsKMTwXD1la4mq9GBXajOR13GdgFq i4IxKvkmz9If/jQhPfb8WA4mqpbUTPIucvut2zN4f5w0vOcK6cADnCDJsi1+Elu/bloA NwkT12KV3MCk7PDdPapb8XtzZi221qEi84dPd7otDWpUsmCATWgH9zdb9+1YLoWsOtRo lk1/ItLvoTtG+dFpe8OPY2ENV6xv1lYFtnYZNXp4pJ07RAMnq+8k2ZHILoGzCp2RPSpQ Zo+JantBflnMYNINBFX7vLDMaCLT77Ruv0N+RIoeq5+662i3lX6UlY6KRxd/Ux1NJoNK 4nfA== X-Gm-Message-State: AOAM531iP100kdnUfyl1cLVgQ8ZhLbU4Elz3eTw3aBFntcoAmg3c9GTg NoeM//NKcihFVlNANMPBO5/jcA== X-Received: by 2002:a05:651c:1257:: with SMTP id h23mr8148188ljh.17.1638399107596; Wed, 01 Dec 2021 14:51:47 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm124819ljh.49.2021.12.01.14.51.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:51:47 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Subject: [PATCH v2 3/4] drm/msm/dpu: simplify DPU_SSPP features checks Date: Thu, 2 Dec 2021 01:51:39 +0300 Message-Id: <20211201225140.2481577-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201225140.2481577-1-dmitry.baryshkov@linaro.org> References: <20211201225140.2481577-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, David Airlie , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Add DPU_SSPP_CSC_ANY denoting any CSC block. As we are at it, rewrite DPU_SSPP_SCALER (any scaler) to use BIT(x) instead of hand-coded bitshifts. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 16 +++++++++++----- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 3 +-- 2 files changed, 12 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h index ad2002d75739..3c53bd03bdeb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h @@ -25,11 +25,17 @@ struct dpu_hw_pipe; /** * Define all scaler feature bits in catalog */ -#define DPU_SSPP_SCALER ((1UL << DPU_SSPP_SCALER_RGB) | \ - (1UL << DPU_SSPP_SCALER_QSEED2) | \ - (1UL << DPU_SSPP_SCALER_QSEED3) | \ - (1UL << DPU_SSPP_SCALER_QSEED3LITE) | \ - (1UL << DPU_SSPP_SCALER_QSEED4)) +#define DPU_SSPP_SCALER (BIT(DPU_SSPP_SCALER_RGB) | \ + BIT(DPU_SSPP_SCALER_QSEED2) | \ + BIT(DPU_SSPP_SCALER_QSEED3) | \ + BIT(DPU_SSPP_SCALER_QSEED3LITE) | \ + BIT(DPU_SSPP_SCALER_QSEED4)) + +/* + * Define all CSC feature bits in catalog + */ +#define DPU_SSPP_CSC_ANY (BIT(DPU_SSPP_CSC) | \ + BIT(DPU_SSPP_CSC_10BIT)) /** * Component indices diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index c7b065b14c5c..911f5f0b41d8 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -1010,8 +1010,7 @@ static int dpu_plane_atomic_check(struct drm_plane *plane, if (DPU_FORMAT_IS_YUV(fmt) && (!(pdpu->pipe_hw->cap->features & DPU_SSPP_SCALER) || - !(pdpu->pipe_hw->cap->features & (BIT(DPU_SSPP_CSC) - | BIT(DPU_SSPP_CSC_10BIT))))) { + !(pdpu->pipe_hw->cap->features & DPU_SSPP_CSC_ANY))) { DPU_DEBUG_PLANE(pdpu, "plane doesn't have scaler/csc for yuv\n"); return -EINVAL; From patchwork Wed Dec 1 22:51:40 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 519749 Delivered-To: patch@linaro.org Received: by 2002:a05:6e04:2287:0:0:0:0 with SMTP id bl7csp927299imb; Wed, 1 Dec 2021 14:52:06 -0800 (PST) X-Google-Smtp-Source: ABdhPJyTOpPTk734AM1zBYghk84N5VmBGGgwJ8DxFr0EUgzZ7+3Z0fbf4Fr1PbZyWKOgGbqSceSx X-Received: by 2002:a63:2b08:: with SMTP id r8mr6958584pgr.211.1638399125971; Wed, 01 Dec 2021 14:52:05 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1638399125; cv=none; d=google.com; s=arc-20160816; b=uMpjq17OvE5chjZFfkPp96xEINZ1JaA6NLle4A5Ea8xRcijX0WC8hHH3ONYCAphDuQ shQGmyewq+udZxlvc868cDlIvkEciuisGHSuseZ+xDgso0LFJ25i47n9VU4l5YhKs367 wwxEPQoEReW+D94odt+euSpS1NdY7p0A+2HLmlWAGr047FZl988B+xaDffUBqRefzKNI a/vpGxb9Ana/nx5mr9mOR9MSLSs8W+Q+LUkjAZ0Rw12jp1nt/GDnilKtMrWEekngthoU jIUZtQ1h3T+EG82MMeMVwMlU7G/d8nHU9JIQFC5oOLDOTELaA2VCauJuHqbtwiCxBOqR r6xA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:content-transfer-encoding :mime-version:references:in-reply-to:message-id:date:subject:to:from :dkim-signature:delivered-to; bh=7uia5p7FpJ6FhJvovwEFuE5jTgtrwEvm9hq5sHRfsao=; b=BCpihvjy5HRE+bo9De/4ZQcq09wn+pjUAWQ/FmcR8MkXogyFTYsJCbkhwmw1K50WO1 Cx5F7VRbcqEXDU0aAdxNFRjBp6/Zny8i9pOTSo5Ex7F5h8/46r6PVdjVHuNVHman3Ols wbzJj8DoI/mukDBLcNnGtJ5mfXb5ii08s6HV3rQqpR5JYaXlQTNKq8P/4btohqgn4p46 t4+JzpquOyuqBtA02Y2/efvTMdC1o/LOKOwAUy2+Lr5ibnYOh8xVBBk8ZoViMViFF9pT dCtnZ7ZeYNxn0MsdFuK5EBov60T5uiQkasuJRO8UJVTn11R4i+3NWYxwl/p/ZPOuusgG 7AzA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=PgwEtvI9; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from gabe.freedesktop.org (gabe.freedesktop.org. [2610:10:20:722:a800:ff:fe36:1795]) by mx.google.com with ESMTPS id p24si1117463plq.398.2021.12.01.14.52.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:52:05 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) client-ip=2610:10:20:722:a800:ff:fe36:1795; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=PgwEtvI9; spf=pass (google.com: best guess record for domain of dri-devel-bounces@lists.freedesktop.org designates 2610:10:20:722:a800:ff:fe36:1795 as permitted sender) smtp.mailfrom=dri-devel-bounces@lists.freedesktop.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 095F46E961; Wed, 1 Dec 2021 22:51:52 +0000 (UTC) X-Original-To: dri-devel@lists.freedesktop.org Delivered-To: dri-devel@lists.freedesktop.org Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by gabe.freedesktop.org (Postfix) with ESMTPS id 2DE8E6E91F for ; Wed, 1 Dec 2021 22:51:50 +0000 (UTC) Received: by mail-lf1-x129.google.com with SMTP id c32so66881378lfv.4 for ; Wed, 01 Dec 2021 14:51:49 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7uia5p7FpJ6FhJvovwEFuE5jTgtrwEvm9hq5sHRfsao=; b=PgwEtvI9kE93H3hOhQhgfzf+gv8KHEeRsHnqy2wL9BaV7mdJnmcVEGS/oEfonE5FnV 5jpmnhcapqJ5insRwv8i8ZNbczNhJqWqLG+VcZMB7kzQhU72o+6TX5mR2HN+TLRdf5W/ yNOWfOwTsz5X3W0P+ctjWGI+iO+xbyiP8aCgM3M73KDOuaCSA+N6Sj+s2VWA1Hq8OqZI KLuTRrHpNwGuNP1ISYHWtuZLaQ0L1FL9fCcxfgcTF1pAGHaicNSHzvSVIHPy9gIdjPY3 0KQNhYl9cv6QltzfiBI7tThTorzLOoobtncBG2meevzxiw4hV6JSJRsLdb3up5GviO+n hj3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7uia5p7FpJ6FhJvovwEFuE5jTgtrwEvm9hq5sHRfsao=; b=UwzeUYzntuKulz0A2EDbXvFwrnx4HpHpC+QhUDXLAJl1RpzALCsbDJtAwmQQ4PuLpF qLiq8sT6YWu4P9+pePX2aYwtmsre5j8gFXTZWhiOx8tdJSBAtWHfzA2EYJZ4JCgu+zu3 WAp0VnCz49NYEO4KmNAAIRP33fuFceFbqTFgTU18k7fyiFpPlkGmK64iVt2qsUmsydG3 nXyJK4LZRdbMUYM3QRriiME1Euk7B8XmSrQSvV2cMGicyF8GAEqiTv5BRh41RFfbOF20 80NOIRhvIOx3cRnVFFKUBtrItw6TQUV1p9Rv8pPCDHzn50XcHNjIdWlvVsyu3wFhzYvf lK4Q== X-Gm-Message-State: AOAM532DNszP8/rNLwxcQoAcT2NsIri8qIN06/sWyjyTFPTPy8V+9Yhj W+rJvrDbjWyBjudN9qnczlVYjg== X-Received: by 2002:ac2:4d5b:: with SMTP id 27mr8702045lfp.596.1638399108311; Wed, 01 Dec 2021 14:51:48 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id u7sm124819ljh.49.2021.12.01.14.51.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 01 Dec 2021 14:51:47 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Subject: [PATCH v2 4/4] drm/msm/dpu: fix CDP setup to account for multirect index Date: Thu, 2 Dec 2021 01:51:40 +0300 Message-Id: <20211201225140.2481577-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211201225140.2481577-1-dmitry.baryshkov@linaro.org> References: <20211201225140.2481577-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 X-BeenThere: dri-devel@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Direct Rendering Infrastructure - Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stephen Boyd , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, David Airlie , freedreno@lists.freedesktop.org Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" Client driven prefetch (CDP) is properly setup only for SSPP REC0 currently. Enable client driven prefetch also for SSPP REC1. Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 12 ++++++++++-- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 4 +++- drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 2 +- 3 files changed, 14 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 7235605bfc9e..75aa47835214 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c @@ -75,6 +75,7 @@ #define SSPP_TRAFFIC_SHAPER 0x130 #define SSPP_CDP_CNTL 0x134 #define SSPP_UBWC_ERROR_STATUS 0x138 +#define SSPP_CDP_CNTL_REC1 0x13c #define SSPP_TRAFFIC_SHAPER_PREFILL 0x150 #define SSPP_TRAFFIC_SHAPER_REC1_PREFILL 0x154 #define SSPP_TRAFFIC_SHAPER_REC1 0x158 @@ -624,10 +625,12 @@ static void dpu_hw_sspp_setup_qos_ctrl(struct dpu_hw_pipe *ctx, } static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx, - struct dpu_hw_pipe_cdp_cfg *cfg) + struct dpu_hw_pipe_cdp_cfg *cfg, + enum dpu_sspp_multirect_index index) { u32 idx; u32 cdp_cntl = 0; + u32 cdp_cntl_offset = 0; if (!ctx || !cfg) return; @@ -635,6 +638,11 @@ static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx, if (_sspp_subblk_offset(ctx, DPU_SSPP_SRC, &idx)) return; + if (index == DPU_SSPP_RECT_SOLO || index == DPU_SSPP_RECT_0) + cdp_cntl_offset = SSPP_CDP_CNTL; + else + cdp_cntl_offset = SSPP_CDP_CNTL_REC1; + if (cfg->enable) cdp_cntl |= BIT(0); if (cfg->ubwc_meta_enable) @@ -644,7 +652,7 @@ static void dpu_hw_sspp_setup_cdp(struct dpu_hw_pipe *ctx, if (cfg->preload_ahead == DPU_SSPP_CDP_PRELOAD_AHEAD_64) cdp_cntl |= BIT(3); - DPU_REG_WRITE(&ctx->hw, SSPP_CDP_CNTL, cdp_cntl); + DPU_REG_WRITE(&ctx->hw, cdp_cntl_offset, cdp_cntl); } static void _setup_layer_ops(struct dpu_hw_pipe *c, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h index 3c53bd03bdeb..227b09fa4689 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h @@ -356,9 +356,11 @@ struct dpu_hw_sspp_ops { * setup_cdp - setup client driven prefetch * @ctx: Pointer to pipe context * @cfg: Pointer to cdp configuration + * @index: rectangle index in multirect */ void (*setup_cdp)(struct dpu_hw_pipe *ctx, - struct dpu_hw_pipe_cdp_cfg *cfg); + struct dpu_hw_pipe_cdp_cfg *cfg, + enum dpu_sspp_multirect_index index); }; /** diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 911f5f0b41d8..1134171f4d1c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c @@ -1191,7 +1191,7 @@ static void dpu_plane_sspp_atomic_update(struct drm_plane *plane) DPU_FORMAT_IS_TILE(fmt); cdp_cfg.preload_ahead = DPU_SSPP_CDP_PRELOAD_AHEAD_64; - pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, &cdp_cfg); + pdpu->pipe_hw->ops.setup_cdp(pdpu->pipe_hw, &cdp_cfg, pstate->multirect_index); } }