From patchwork Mon Dec 6 18:26:04 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 521139 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6BC92C433EF for ; Mon, 6 Dec 2021 18:26:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347168AbhLFSaB (ORCPT ); Mon, 6 Dec 2021 13:30:01 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47354 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347059AbhLFS3x (ORCPT ); Mon, 6 Dec 2021 13:29:53 -0500 Received: from mail-pj1-x1030.google.com (mail-pj1-x1030.google.com [IPv6:2607:f8b0:4864:20::1030]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id B6CEEC061746; Mon, 6 Dec 2021 10:26:24 -0800 (PST) Received: by mail-pj1-x1030.google.com with SMTP id nh10-20020a17090b364a00b001a69adad5ebso562144pjb.2; Mon, 06 Dec 2021 10:26:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=22u1YgEGuUE2NUBm4aUIXRHhe1NgL4IlQ7p6nHAEJMg=; b=Zh+U2u/a5Qx3uOWo98Uixyx5LiZdxs452Y1/RvET1RUL7tNPzzTZ3Y4OOkm0b8ie/K foW1LcD7tb6JZbs+kIWgP5LZnk//3T3gZHNNSAFbG01vJNhjAtXS9yhJsN00v3EZNV1U CKc7fS3F+j/Wj+8WVY3UpM2dBT1bZeDIAnhTK/6ZkTJ5xIGWgtc36aqlr6yOYZI2HanH c1lArW+KbzPpLWPNFFsLpcuOZoaVtolS+NcpjHhUC+zKEqAH7mTsvaB3o6o0VajXlS9C +i2oopFItEGl7iwTxUtXO6D7zh8+o3jUEsf7mHA2/k1iODI1rtMVcWnMzBqncSV8Vnwq NsAQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=22u1YgEGuUE2NUBm4aUIXRHhe1NgL4IlQ7p6nHAEJMg=; b=mzA3lOJnhnuUy6ARx9SCNJ60/TlsFyYUHtSrFl6YVWP5L0HYtr4fwpQHGB85IX47PS ggGtyyaZfzjZuJEO8SyriHdFmEOa0h4jl829NG3QGpiY57I/cvcRMu6NWDoOU5saGMXT j5e5gw0x5yfqjhBWcTyh7d8MxsqIkg9/gQ88MqbsOQRFV28Rft8uf5xvIlFCeq8WsGz+ zPfbCNNoG7Xxs7bIqNJYrOobqGML9asR6ZqEgAAw5rz0XsQ6+7GDxhnRnTOkrCBS3YDc 4v5oMN4MYCPqXFCO8CCftokI+jsRhN9uUPZ2dJJzsZ9UDW7G5zZZJDAr9vijMNhdmBnL un2w== X-Gm-Message-State: AOAM530AYPG4CR8TdjHUOmO+44N4egGk2R87KF3y1I82A5R3bhJZ2/77 mitayZGEc6plHWudhmSu0zkHyqx8OPA= X-Google-Smtp-Source: ABdhPJwSVbvjR1dpvgyfdF4mNAKyCGmG960Qi+UT5jB5j7oT2D5zmuuwNPilnYXVThDeFf9l4VDShQ== X-Received: by 2002:a17:90a:9a8e:: with SMTP id e14mr196284pjp.231.1638815183952; Mon, 06 Dec 2021 10:26:23 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id a22sm12773097pfh.111.2021.12.06.10.26.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Dec 2021 10:26:23 -0800 (PST) From: Florian Fainelli To: devicetree@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Rob Herring , Linus Walleij , Bartosz Golaszewski , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), Gregory Fong , Thomas Gleixner , Marc Zyngier , Ulf Hansson , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones , Philipp Zabel , Herbert Xu , Ray Jui , Scott Branden , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Markus Mayer , Greg Kroah-Hartman , Al Cooper , Doug Berger , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-mmc@vger.kernel.org (open list:MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND...), linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM), linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), linux-rtc@vger.kernel.org (open list:REAL TIME CLOCK (RTC) SUBSYSTEM), linux-pm@vger.kernel.org (open list:THERMAL), linux-usb@vger.kernel.org (open list:USB SUBSYSTEM) Subject: [PATCH v2 02/14] dt-bindings: reset: Convert Broadcom STB reset to YAML Date: Mon, 6 Dec 2021 10:26:04 -0800 Message-Id: <20211206182616.2089677-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211206182616.2089677-1-f.fainelli@gmail.com> References: <20211206182616.2089677-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Convert the Broadcom STB SW_INIT style reset controller binding to YAML. Signed-off-by: Florian Fainelli --- .../bindings/reset/brcm,brcmstb-reset.txt | 27 ----------- .../bindings/reset/brcm,brcmstb-reset.yaml | 48 +++++++++++++++++++ 2 files changed, 48 insertions(+), 27 deletions(-) delete mode 100644 Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.txt create mode 100644 Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml diff --git a/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.txt b/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.txt deleted file mode 100644 index ee59409640f2..000000000000 --- a/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.txt +++ /dev/null @@ -1,27 +0,0 @@ -Broadcom STB SW_INIT-style reset controller -=========================================== - -Broadcom STB SoCs have a SW_INIT-style reset controller with separate -SET/CLEAR/STATUS registers and possibly multiple banks, each of 32 bit -reset lines. - -Please also refer to reset.txt in this directory for common reset -controller binding usage. - -Required properties: -- compatible: should be brcm,brcmstb-reset -- reg: register base and length -- #reset-cells: must be set to 1 - -Example: - - reset: reset-controller@8404318 { - compatible = "brcm,brcmstb-reset"; - reg = <0x8404318 0x30>; - #reset-cells = <1>; - }; - - ðernet_switch { - resets = <&reset 26>; - reset-names = "switch"; - }; diff --git a/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml b/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml new file mode 100644 index 000000000000..e00efa88a198 --- /dev/null +++ b/Documentation/devicetree/bindings/reset/brcm,brcmstb-reset.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/reset/brcm,brcmstb-reset.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Broadcom STB SW_INIT-style reset controller + +description: + Broadcom STB SoCs have a SW_INIT-style reset controller with separate + SET/CLEAR/STATUS registers and possibly multiple banks, each of 32 bit + reset lines. + + Please also refer to reset.txt in this directory for common reset + controller binding usage. + +maintainers: + - Florian Fainelli + +properties: + compatible: + const: brcm,brcmstb-reset + + reg: + maxItems: 1 + + "#reset-cells": + const: 1 + +required: + - compatible + - reg + - "#reset-cells" + +additionalProperties: false + +examples: + - | + reset: reset-controller@8404318 { + compatible = "brcm,brcmstb-reset"; + reg = <0x8404318 0x30>; + #reset-cells = <1>; + }; + + ethernet_switch { + resets = <&reset 26>; + reset-names = "switch"; + }; From patchwork Mon Dec 6 18:26:05 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 521137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 15E39C433FE for ; Mon, 6 Dec 2021 18:27:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347743AbhLFSbM (ORCPT ); Mon, 6 Dec 2021 13:31:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347112AbhLFS34 (ORCPT ); Mon, 6 Dec 2021 13:29:56 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E40FDC061D5E; Mon, 6 Dec 2021 10:26:26 -0800 (PST) Received: by mail-pl1-x62d.google.com with SMTP id q17so7614770plr.11; Mon, 06 Dec 2021 10:26:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=IlWOtQhuKoAbExjB9TTANbBFdCEDUkxd3U6sjKMMDBU=; b=pzFYLXw+dgQQZ9vnU/aMWUbAlvWMVysoWrco4Ie804B20gDncofnLHx6qA19V9onoz 5dhtA3wI7KqTNL0icF2mNs8dmvtldxC82f4ugzSHHYOzn1LhCNGmtl20zrn+aq2oli0b uUiwiQC5u0GFJPLoWCMCEHAWynShCwLnS947U67OM4wrpuifUS7mJF1wZt5p8pfkaATO xVGKFIxgBEN3wrHDB7HWRVrXRBeivh5IU6SuBnYQdNdG8gZn9Ldsx6yUHAcunG/8YDWe ZDLQncVbUuhbggTqkZ4T76sDaXASkGeM759fweoKI7QlRSwBYza2StEUwcd6CymvtHx0 1p/A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=IlWOtQhuKoAbExjB9TTANbBFdCEDUkxd3U6sjKMMDBU=; b=Gp3k1wyPL7FkYEcAAxmGQxo8WXeumrWDN03XJglKQhw5wuCtBHYDpqZTOZTajal55C HvxVQrbSoHmfmqeXXoad2PDPT8QTGVOOIXIRQXgyHdnfCw+cVTGoaX2DQre/vYudzPE6 3gu82JLwFpGausHENxhuxTmiJs5kuZSrQyQvXFZyM/SJOPbFui2/0n5uV1fHZEJN3rp2 rGL479yPMN2QDbzPoSqi4w6JNSRrnJQ+oVOwI8d13ojipNmLIsnKHqSi5Xgc26BnnPyS x8uU33spqCQxfPKpdlEqN/Fp7RH7QG7iVdASNPskTzzaeBh80/QJX/GPQ8jiPecz2m0R hktQ== X-Gm-Message-State: AOAM532n1wYuKc+orPOTeUtjX2tDb3ZyjaaMiFhDF/TWn46WOeFFOpcI +nlEtXC/AgAfSo9QrlBBMNgp8ZViJZg= X-Google-Smtp-Source: ABdhPJwxLXZuEFBB8yWKy6KJpxvhIK8eLJgeHKt7kxDuT1bsOthhCiGJYW4+SyHyuycD0ow42bQWgA== X-Received: by 2002:a17:90a:fe85:: with SMTP id co5mr261347pjb.110.1638815185903; Mon, 06 Dec 2021 10:26:25 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id a22sm12773097pfh.111.2021.12.06.10.26.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Dec 2021 10:26:25 -0800 (PST) From: Florian Fainelli To: devicetree@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Rob Herring , Linus Walleij , Bartosz Golaszewski , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), Gregory Fong , Thomas Gleixner , Marc Zyngier , Ulf Hansson , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones , Philipp Zabel , Herbert Xu , Ray Jui , Scott Branden , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Markus Mayer , Greg Kroah-Hartman , Al Cooper , Doug Berger , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-mmc@vger.kernel.org (open list:MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND...), linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM), linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), linux-rtc@vger.kernel.org (open list:REAL TIME CLOCK (RTC) SUBSYSTEM), linux-pm@vger.kernel.org (open list:THERMAL), linux-usb@vger.kernel.org (open list:USB SUBSYSTEM) Subject: [PATCH v2 03/14] dt-bindings: pwm: Convert BCM7038 PWM binding to YAML Date: Mon, 6 Dec 2021 10:26:05 -0800 Message-Id: <20211206182616.2089677-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211206182616.2089677-1-f.fainelli@gmail.com> References: <20211206182616.2089677-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Convert the Broadcom STB BCM7038 PWM Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli --- .../bindings/pwm/brcm,bcm7038-pwm.txt | 20 --------- .../bindings/pwm/brcm,bcm7038-pwm.yaml | 43 +++++++++++++++++++ 2 files changed, 43 insertions(+), 20 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt create mode 100644 Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml diff --git a/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt b/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt deleted file mode 100644 index 0e662d7f6bd1..000000000000 --- a/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.txt +++ /dev/null @@ -1,20 +0,0 @@ -Broadcom BCM7038 PWM controller (BCM7xxx Set Top Box PWM controller) - -Required properties: - -- compatible: must be "brcm,bcm7038-pwm" -- reg: physical base address and length for this controller -- #pwm-cells: should be 2. See pwm.yaml in this directory for a description - of the cells format -- clocks: a phandle to the reference clock for this block which is fed through - its internal variable clock frequency generator - - -Example: - - pwm: pwm@f0408000 { - compatible = "brcm,bcm7038-pwm"; - reg = <0xf0408000 0x28>; - #pwm-cells = <2>; - clocks = <&upg_fixed>; - }; diff --git a/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml b/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml new file mode 100644 index 000000000000..4080e098f746 --- /dev/null +++ b/Documentation/devicetree/bindings/pwm/brcm,bcm7038-pwm.yaml @@ -0,0 +1,43 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pwm/brcm,bcm7038-pwm.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM7038 PWM controller (BCM7xxx Set Top Box PWM controller) + +maintainers: + - Florian Fainelli + +allOf: + - $ref: pwm.yaml# + +properties: + compatible: + const: brcm,bcm7038-pwm + + reg: + maxItems: 1 + + "#pwm-cells": + const: 2 + + clocks: + maxItems: 1 + +required: + - compatible + - reg + - "#pwm-cells" + - clocks + +additionalProperties: false + +examples: + - | + pwm: pwm@f0408000 { + compatible = "brcm,bcm7038-pwm"; + reg = <0xf0408000 0x28>; + #pwm-cells = <2>; + clocks = <&upg_fixed>; + }; From patchwork Mon Dec 6 18:26:08 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 521133 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F5E6C433F5 for ; Mon, 6 Dec 2021 18:28:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347773AbhLFSbO (ORCPT ); Mon, 6 Dec 2021 13:31:14 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47372 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347282AbhLFSaG (ORCPT ); Mon, 6 Dec 2021 13:30:06 -0500 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 08DE7C0698C2; Mon, 6 Dec 2021 10:26:33 -0800 (PST) Received: by mail-pl1-x631.google.com with SMTP id b11so7602903pld.12; Mon, 06 Dec 2021 10:26:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=MyqPfy+ha7iGIoQvE1EgZWcwITDPm37FB0rLdMo+0Ks=; b=SMTSxUg8d8DzL4FYgXPZTkhteCTQvQKCidQBmxRu16o3iT3qf7eiTduAPFIxq7mUWJ IV5EIglUIrwHF5pKaWbzoHUq6cNHuYifY91o+NhGYp+D/HFxQ5Y7nTaTZ2o9OMgFpA95 yMHPR1kqXGftglrxih0pFHmXYC3gF1TtdKYyPMeGotlXScZStjhUv93beBo0PyNZDghv Wx0NZQ17KDEd92+kqskZU5DVsDVx8J63UcsJmDOK+8V84RqdYPHTsv8LrfgVcPNQvlj8 A93eAG/klm64SOO3KH3ItakXKs903MV1TXPOAoDeu++zzKmLAGtNrUX26r93Cm1/VYf7 49Cw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=MyqPfy+ha7iGIoQvE1EgZWcwITDPm37FB0rLdMo+0Ks=; b=CrDexRmr2IHS7j0eFC3uEyutoXfk/UMa1AXAqWJQ7Byp3/5cQyxmzK/YRZM0YXOzDl fESQuP0lVahRYepKAoRqdEu1oqMk5qXVzWTnYT0hEUhoIcwA5YkFwz2ozzMU3O+TlXkZ gUAgDx7qHO8ZbHUYOrPLG8oDF55WeVU9W7b2J1I+Fc8DOa1yuS2aU0psbcrwIzsE3L3w paT5mz96ceWfLGibUkcJZE4PALeHzReGtxt1Z3nu5wZRv8t4DW297IxKNpuBhyv3eviC VRWxSMtE2yMhPEWibtLAdqXigw8h9ExBj68CsC4j4kHwgUifuGenOX3tGM1HtntmMOHs VMwA== X-Gm-Message-State: AOAM531ebpUdq+GlVA12wTSiE3X4KlCDXytCqGc5zmq81EBicfWZ4XtR 5l+IF4Y17dwKsrJ3x3sNDmWgGatn7i0= X-Google-Smtp-Source: ABdhPJwbKOBF7+j3CLTDkVQjMa0Ebj04v8Ow4YgqR4cemNds4RoNcksyLLkyhs7HlrdW4hLfwMRfmA== X-Received: by 2002:a17:90b:3a89:: with SMTP id om9mr220577pjb.99.1638815192139; Mon, 06 Dec 2021 10:26:32 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id a22sm12773097pfh.111.2021.12.06.10.26.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Dec 2021 10:26:31 -0800 (PST) From: Florian Fainelli To: devicetree@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Rob Herring , Linus Walleij , Bartosz Golaszewski , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), Gregory Fong , Thomas Gleixner , Marc Zyngier , Ulf Hansson , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones , Philipp Zabel , Herbert Xu , Ray Jui , Scott Branden , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Markus Mayer , Greg Kroah-Hartman , Al Cooper , Doug Berger , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-mmc@vger.kernel.org (open list:MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND...), linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM), linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), linux-rtc@vger.kernel.org (open list:REAL TIME CLOCK (RTC) SUBSYSTEM), linux-pm@vger.kernel.org (open list:THERMAL), linux-usb@vger.kernel.org (open list:USB SUBSYSTEM) Subject: [PATCH v2 06/14] dt-binding: interrupt-controller: Convert BCM7038 L1 intc to YAML Date: Mon, 6 Dec 2021 10:26:08 -0800 Message-Id: <20211206182616.2089677-7-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211206182616.2089677-1-f.fainelli@gmail.com> References: <20211206182616.2089677-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Convert the Broadcom STB BCM7038 Level 1 interrupt controller Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli --- .../brcm,bcm7038-l1-intc.txt | 61 ------------- .../brcm,bcm7038-l1-intc.yaml | 91 +++++++++++++++++++ 2 files changed, 91 insertions(+), 61 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt deleted file mode 100644 index 5ddef1dc0c1a..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.txt +++ /dev/null @@ -1,61 +0,0 @@ -Broadcom BCM7038-style Level 1 interrupt controller - -This block is a first level interrupt controller that is typically connected -directly to one of the HW INT lines on each CPU. Every BCM7xxx set-top chip -since BCM7038 has contained this hardware. - -Key elements of the hardware design include: - -- 64, 96, 128, or 160 incoming level IRQ lines - -- Most onchip peripherals are wired directly to an L1 input - -- A separate instance of the register set for each CPU, allowing individual - peripheral IRQs to be routed to any CPU - -- Atomic mask/unmask operations - -- No polarity/level/edge settings - -- No FIFO or priority encoder logic; software is expected to read all - 2-5 status words to determine which IRQs are pending - -Required properties: - -- compatible: should be "brcm,bcm7038-l1-intc" -- reg: specifies the base physical address and size of the registers; - the number of supported IRQs is inferred from the size argument -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: specifies the number of cells needed to encode an interrupt - source, should be 1. -- interrupts: specifies the interrupt line(s) in the interrupt-parent controller - node; valid values depend on the type of parent interrupt controller - -Optional properties: - -- brcm,irq-can-wake: If present, this means the L1 controller can be used as a - wakeup source for system suspend/resume. - -Optional properties: - -- brcm,int-fwd-mask: if present, a bit mask to indicate which interrupts - have already been configured by the firmware and should be left unmanaged. - This should have one 32-bit word per status/set/clear/mask group. - -If multiple reg ranges and interrupt-parent entries are present on an SMP -system, the driver will allow IRQ SMP affinity to be set up through the -/proc/irq/ interface. In the simplest possible configuration, only one -reg range and one interrupt-parent is needed. - -Example: - -periph_intc: periph_intc@1041a400 { - compatible = "brcm,bcm7038-l1-intc"; - reg = <0x1041a400 0x30 0x1041a600 0x30>; - - interrupt-controller; - #interrupt-cells = <1>; - - interrupt-parent = <&cpu_intc>; - interrupts = <2>, <3>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.yaml new file mode 100644 index 000000000000..5ecb6faa70dc --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7038-l1-intc.yaml @@ -0,0 +1,91 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm7038-l1-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom BCM7038-style Level 1 interrupt controller + +description: > + This block is a first level interrupt controller that is typically connected + directly to one of the HW INT lines on each CPU. Every BCM7xxx set-top chip + since BCM7038 has contained this hardware. + + Key elements of the hardware design include: + + - 64, 96, 128, or 160 incoming level IRQ lines + + - Most onchip peripherals are wired directly to an L1 input + + - A separate instance of the register set for each CPU, allowing individual + peripheral IRQs to be routed to any CPU + + - Atomic mask/unmask operations + + - No polarity/level/edge settings + + - No FIFO or priority encoder logic; software is expected to read all + 2-5 status words to determine which IRQs are pending + + If multiple reg ranges and interrupt-parent entries are present on an SMP + system, the driver will allow IRQ SMP affinity to be set up through the + /proc/irq/ interface. In the simplest possible configuration, only one + reg range and one interrupt-parent is needed. + +maintainers: + - Florian Fainelli + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + const: brcm,bcm7038-l1-intc + + reg: + description: > + Specifies the base physical address and size of the registers + the number of supported IRQs is inferred from the size argument + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + interrupts: + description: > + Specifies the interrupt line(s) in the interrupt-parent controller node; + valid values depend on the type of parent interrupt controller + + brcm,irq-can-wake: + type: boolean + description: > + If present, this means the L1 controller can be used as a + wakeup source for system suspend/resume. + + brcm,int-fwd-mask: + $ref: /schemas/types.yaml#/definitions/uint32-array + description: + If present, a bit mask to indicate which interrupts have already been + configured by the firmware and should be left unmanaged. This should + have one 32-bit word per status/set/clear/mask group. + +required: + - compatible + - reg + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + periph_intc: interrupt-controller@1041a400 { + compatible = "brcm,bcm7038-l1-intc"; + reg = <0x1041a400 0x30>, <0x1041a600 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&cpu_intc>; + interrupts = <2>, <3>; + }; From patchwork Mon Dec 6 18:26:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 521136 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9D7D2C4332F for ; Mon, 6 Dec 2021 18:27:52 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347905AbhLFSbT (ORCPT ); Mon, 6 Dec 2021 13:31:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347292AbhLFSaG (ORCPT ); Mon, 6 Dec 2021 13:30:06 -0500 Received: from mail-pj1-x1033.google.com (mail-pj1-x1033.google.com [IPv6:2607:f8b0:4864:20::1033]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 562F7C0698C5; Mon, 6 Dec 2021 10:26:37 -0800 (PST) Received: by mail-pj1-x1033.google.com with SMTP id np6-20020a17090b4c4600b001a90b011e06so551585pjb.5; Mon, 06 Dec 2021 10:26:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=eHsb1rXkFFF/5VyRHKhImaCsYA2F/4ddGcGA/wMvypA=; b=mXflqqCSqu7jgfThgaZhO/L5W9cJx9zfLPKfDRfXLNR8VGeCrrdomqPg574ueb8b/H JQQAN7LR4BhCLUGuDIGbAiIDxtMPgjP36PDM75blvH6LXPswzDnmIV71NimFKnLulh3k X1zaq/EjEsrcUNGPpd6ZRDgfYhT9cUwyOM99MWFtlf+vOV1Ohbgww8ZafFPjHiaJqsXt EtYWG717PgOAaBz+6Q7SJB4hsvix/gfd0WuwmAWcqKe25okx13Zd+ecKxMDumsLK9IXp 8y+N20o7W9M9mwnwYYQ8zNTYKGc7Bq+W2EZFOY/9b81z1JhMRpiH6iejaDlua4byvtnW kalg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=eHsb1rXkFFF/5VyRHKhImaCsYA2F/4ddGcGA/wMvypA=; b=UrWK/19jK4y0UjnnE/mjaAU+bx6CPKcTbPcUAQrLvE0PwIj+q+nnrRtRFRhY0eXB8b 8Z6smVxYcQQ6VDHcDnNSStrlRvtNwa2kRqB1z/7PIA/iRa1iBehDYHr/zCf468m/43s8 s7EPDZ3R9vUnMsHp/agM3do0rpHu8Lq7+MkeIMGBdBu3Awsf+x7wadZ9lfWtzsqSJFJf 3n61AStdCasOiYlgcd3Zti7tgSlUZaN7/C9a6ATpThV5UTslPQF7Dal37q0i9GvvG76Q 2PWvud/EDTjFp4oGki8H0lUeOR8BaY/olT9s38/zXDAh/2okVAnYy5WvYzu1XS2ovfOd xm1Q== X-Gm-Message-State: AOAM531dhYwoupCfmUoQ7Fntd6PJu0v4Zalq31uL0ErhCImrHYcTYKEA 7EXY5IlRvZ1CEu0uYAoyeOzLpVBbgJw= X-Google-Smtp-Source: ABdhPJyWHg/xjf6fl5DH+njiD1fPZSp9NRNqPNBsQoRBEP2tRQ/Ndaa1r3dCQNHWppK0XoE/Y3zSGQ== X-Received: by 2002:a17:90a:fd8c:: with SMTP id cx12mr234601pjb.11.1638815196416; Mon, 06 Dec 2021 10:26:36 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id a22sm12773097pfh.111.2021.12.06.10.26.34 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Dec 2021 10:26:35 -0800 (PST) From: Florian Fainelli To: devicetree@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Rob Herring , Linus Walleij , Bartosz Golaszewski , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), Gregory Fong , Thomas Gleixner , Marc Zyngier , Ulf Hansson , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones , Philipp Zabel , Herbert Xu , Ray Jui , Scott Branden , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Markus Mayer , Greg Kroah-Hartman , Al Cooper , Doug Berger , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-mmc@vger.kernel.org (open list:MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND...), linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM), linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), linux-rtc@vger.kernel.org (open list:REAL TIME CLOCK (RTC) SUBSYSTEM), linux-pm@vger.kernel.org (open list:THERMAL), linux-usb@vger.kernel.org (open list:USB SUBSYSTEM) Subject: [PATCH v2 08/14] dt-bindings: interrupt-controller: Merge BCM3380 with BCM7120 Date: Mon, 6 Dec 2021 10:26:10 -0800 Message-Id: <20211206182616.2089677-9-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211206182616.2089677-1-f.fainelli@gmail.com> References: <20211206182616.2089677-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org The two bindings are very similar and should be covered by the same document, do that so we can get rid of an additional binding file. Signed-off-by: Florian Fainelli --- .../brcm,bcm3380-l2-intc.txt | 39 ------------------- .../brcm,bcm7120-l2-intc.yaml | 30 +++++++++++++- 2 files changed, 28 insertions(+), 41 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm3380-l2-intc.txt diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm3380-l2-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm3380-l2-intc.txt deleted file mode 100644 index 37aea40d5430..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm3380-l2-intc.txt +++ /dev/null @@ -1,39 +0,0 @@ -Broadcom BCM3380-style Level 1 / Level 2 interrupt controller - -This interrupt controller shows up in various forms on many BCM338x/BCM63xx -chipsets. It has the following properties: - -- outputs a single interrupt signal to its interrupt controller parent - -- contains one or more enable/status word pairs, which often appear at - different offsets in different blocks - -- no atomic set/clear operations - -Required properties: - -- compatible: should be "brcm,bcm3380-l2-intc" -- reg: specifies one or more enable/status pairs, in the following format: - ... -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: specifies the number of cells needed to encode an interrupt - source, should be 1. -- interrupts: specifies the interrupt line in the interrupt-parent controller - node, valid values depend on the type of parent interrupt controller - -Optional properties: - -- brcm,irq-can-wake: if present, this means the L2 controller can be used as a - wakeup source for system suspend/resume. - -Example: - -irq0_intc: interrupt-controller@10000020 { - compatible = "brcm,bcm3380-l2-intc"; - reg = <0x10000024 0x4 0x1000002c 0x4>, - <0x10000020 0x4 0x10000028 0x4>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&cpu_intc>; - interrupts = <2>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml index e0c6dce40d13..8be7fe29e6a9 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml @@ -4,7 +4,7 @@ $id: http://devicetree.org/schemas/interrupt-controller/brcm,bcm7120-l2-intc.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# -title: Broadcom BCM7120-style Level 2 interrupt controller +title: Broadcom BCM7120-style Level 2 and Broadcom BCM3380 Level 1 / Level 2 maintainers: - Florian Fainelli @@ -59,16 +59,31 @@ description: > .. 31 ........................ X + The BCM3380 Level 1 / Level 2 interrrupt controller shows up in various forms + on many BCM338x/BCM63xx chipsets. It has the following properties: + + - outputs a single interrupt signal to its interrupt controller parent + + - contains one or more enable/status word pairs, which often appear at + different offsets in different blocks + + - no atomic set/clear operations + allOf: - $ref: /schemas/interrupt-controller.yaml# properties: compatible: - const: brcm,bcm7120-l2-intc + items: + - enum: + - brcm,bcm7120-l2-intc + - brcm,bcm3380-l2-intc reg: description: > Specifies the base physical address and size of the registers + minItems: 1 + maxItems: 4 interrupt-controller: true @@ -121,3 +136,14 @@ examples: brcm,int-map-mask = <0xeb8>, <0x140>; brcm,int-fwd-mask = <0x7>; }; + + - | + irq1_intc: interrupt-controller@10000020 { + compatible = "brcm,bcm3380-l2-intc"; + reg = <0x10000024 0x4>, <0x1000002c 0x4>, + <0x10000020 0x4>, <0x10000028 0x4>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&cpu_intc>; + interrupts = <2>; + }; From patchwork Mon Dec 6 18:26:11 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 521135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9EEE5C41535 for ; Mon, 6 Dec 2021 18:27:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1347950AbhLFSbW (ORCPT ); Mon, 6 Dec 2021 13:31:22 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47386 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347322AbhLFSaI (ORCPT ); Mon, 6 Dec 2021 13:30:08 -0500 Received: from mail-pl1-x62a.google.com (mail-pl1-x62a.google.com [IPv6:2607:f8b0:4864:20::62a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9B7B6C061746; Mon, 6 Dec 2021 10:26:39 -0800 (PST) Received: by mail-pl1-x62a.google.com with SMTP id b13so7644447plg.2; Mon, 06 Dec 2021 10:26:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=tMguhbDPLlBsGaFyDhaEHdw9cD0LjPHChE0ShcCNQmo=; b=WcX1YxeUHujtnpmhknxX67pqcGzfnhE7LaqRGQ3kJpJVmmabBDfKBdzu44SrvPUXzz l8Br3qGV0XAs9fe/EJUUsxba8Im+TviK22yqgpi7SpAy9Ug35WA4H3YocHaqiG5ZpNsa cJAEsTBhrZYgvc6bzLOrijfZByDJbPontK7bY8zEUqJ0ICylDFwWNcFcs4yiMFVU6U+Z fL8SHUYfLM56ajViNOfuOmzPQUq+B7RevQjXnOhBYE3hP7Kqz7LxYfxjkyWHejMNkXkt yDVOmkOWbbpFCdJ8L8CR5e6NpcUXB4JkMrhh4joatJ1/iMiXhZmG+woxEG3DTx5eiZm+ Ydkw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=tMguhbDPLlBsGaFyDhaEHdw9cD0LjPHChE0ShcCNQmo=; b=8ArBakeJEAaQtDor+epahBpXcWZ2oI1AMXt7SUIbZjUt3+2gAdtRhQeSW6RxzQ56tg sutHFdIMEY38X2zS1ciyNdK4bjzUB9mFz7bQ7EQm7OPFpJWEF19F9ToZ58hFRVZ/UZIl 6D52AkLQydN5y0d3tgTs1F0qOvyN4hWhck3J74LI5695zgCKNjQiVHMKkW1nhQEMQp1l laVM0375q2NMRbpuGxBGD/eIKieJ/1ZGthhkfa9tQ7dQghEhbaBiUX64jkcKn6+d69fm wqTsly2gA3tU0hN96sxe91WtKrrbNcAkE1yl7Rs/A/2n5aXCNSOmGlzl+vB7ZA2DLudw 9wzw== X-Gm-Message-State: AOAM531/UXp1rI8ZOXdBmZvPfQY/+1ib0TjQuZO59h9DwSjmo/pbpS7T OYi/nDxxXGtVP9bCRgx48kT+rAau1fg= X-Google-Smtp-Source: ABdhPJxBx2i6aQwCIbyyW0LzmXHbVJnh2s06Ie4/DP5Sgcd3MoKZcjoZNl4BIR7/42LS2VQsV/ND/A== X-Received: by 2002:a17:902:d4d0:b0:141:c13d:6c20 with SMTP id o16-20020a170902d4d000b00141c13d6c20mr46404783plg.44.1638815198589; Mon, 06 Dec 2021 10:26:38 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id a22sm12773097pfh.111.2021.12.06.10.26.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Dec 2021 10:26:38 -0800 (PST) From: Florian Fainelli To: devicetree@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Rob Herring , Linus Walleij , Bartosz Golaszewski , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), Gregory Fong , Thomas Gleixner , Marc Zyngier , Ulf Hansson , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones , Philipp Zabel , Herbert Xu , Ray Jui , Scott Branden , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Markus Mayer , Greg Kroah-Hartman , Al Cooper , Doug Berger , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-mmc@vger.kernel.org (open list:MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND...), linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM), linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), linux-rtc@vger.kernel.org (open list:REAL TIME CLOCK (RTC) SUBSYSTEM), linux-pm@vger.kernel.org (open list:THERMAL), linux-usb@vger.kernel.org (open list:USB SUBSYSTEM) Subject: [PATCH v2 09/14] dt-bindings: interrupt-controller: Convert Broadcom STB L2 to YAML Date: Mon, 6 Dec 2021 10:26:11 -0800 Message-Id: <20211206182616.2089677-10-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211206182616.2089677-1-f.fainelli@gmail.com> References: <20211206182616.2089677-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Convert the Broadcom STB L2 generic Level 2 interrupt controller Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli --- .../interrupt-controller/brcm,l2-intc.txt | 31 --------- .../interrupt-controller/brcm,l2-intc.yaml | 64 +++++++++++++++++++ 2 files changed, 64 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt deleted file mode 100644 index 021cf822395c..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.txt +++ /dev/null @@ -1,31 +0,0 @@ -Broadcom Generic Level 2 Interrupt Controller - -Required properties: - -- compatible: should be one of: - "brcm,hif-spi-l2-intc" or - "brcm,upg-aux-aon-l2-intc" or - "brcm,l2-intc" for latched interrupt controllers - should be "brcm,bcm7271-l2-intc" for level interrupt controllers -- reg: specifies the base physical address and size of the registers -- interrupt-controller: identifies the node as an interrupt controller -- #interrupt-cells: specifies the number of cells needed to encode an - interrupt source. Should be 1. -- interrupts: specifies the interrupt line in the interrupt-parent irq space - to be used for cascading - -Optional properties: - -- brcm,irq-can-wake: If present, this means the L2 controller can be used as a - wakeup source for system suspend/resume. - -Example: - -hif_intr2_intc: interrupt-controller@f0441000 { - compatible = "brcm,l2-intc"; - reg = <0xf0441000 0x30>; - interrupt-controller; - #interrupt-cells = <1>; - interrupt-parent = <&intc>; - interrupts = <0x0 0x20 0x0>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml new file mode 100644 index 000000000000..b1e812e7c714 --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,l2-intc.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/brcm,l2-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom Generic Level 2 Interrupt Controller + +maintainers: + - Florian Fainelli + +allOf: + - $ref: /schemas/interrupt-controller.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - brcm,hif-spi-l2-intc + - brcm,upg-aux-aon-l2-intc + - const: brcm,l2-intc + - items: + - const: brcm,bcm7271-l2-intc + - items: + - const: brcm,l2-intc + + reg: + maxItems: 1 + description: > + Specifies the base physical address and size of the registers + + interrupt-controller: true + + "#interrupt-cells": + const: 1 + + interrupts: true + + brcm,irq-can-wake: + type: boolean + description: > + If present, this means the L2 controller can be used as a wakeup source + for system suspend/resume. + +additionalProperties: false + +required: + - compatible + - reg + - interrupt-controller + - "#interrupt-cells" + - interrupts + +examples: + - | + hif_intr2_intc: interrupt-controller@f0441000 { + compatible = "brcm,l2-intc"; + reg = <0xf0441000 0x30>; + interrupt-controller; + #interrupt-cells = <1>; + interrupt-parent = <&intc>; + interrupts = <0x0 0x20 0x0>; + }; From patchwork Mon Dec 6 18:26:13 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 521134 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1D161C433F5 for ; Mon, 6 Dec 2021 18:28:01 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1348000AbhLFSbZ (ORCPT ); Mon, 6 Dec 2021 13:31:25 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:47430 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1347338AbhLFSaM (ORCPT ); Mon, 6 Dec 2021 13:30:12 -0500 Received: from mail-pf1-x42d.google.com (mail-pf1-x42d.google.com [IPv6:2607:f8b0:4864:20::42d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 951F6C061746; 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Mon, 06 Dec 2021 10:26:42 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id a22sm12773097pfh.111.2021.12.06.10.26.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Dec 2021 10:26:42 -0800 (PST) From: Florian Fainelli To: devicetree@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Rob Herring , Linus Walleij , Bartosz Golaszewski , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), Gregory Fong , Thomas Gleixner , Marc Zyngier , Ulf Hansson , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones , Philipp Zabel , Herbert Xu , Ray Jui , Scott Branden , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Markus Mayer , Greg Kroah-Hartman , Al Cooper , Doug Berger , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-mmc@vger.kernel.org (open list:MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND...), linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM), linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), linux-rtc@vger.kernel.org (open list:REAL TIME CLOCK (RTC) SUBSYSTEM), linux-pm@vger.kernel.org (open list:THERMAL), linux-usb@vger.kernel.org (open list:USB SUBSYSTEM) Subject: [PATCH v2 11/14] dt-bindings: thermal: Convert Broadcom TMON to YAML Date: Mon, 6 Dec 2021 10:26:13 -0800 Message-Id: <20211206182616.2089677-12-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211206182616.2089677-1-f.fainelli@gmail.com> References: <20211206182616.2089677-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Convert the Broadcom AVS TMON Device Tree binding to YAML to help with validation. Signed-off-by: Florian Fainelli --- .../bindings/thermal/brcm,avs-tmon.txt | 23 -------- .../bindings/thermal/brcm,avs-tmon.yaml | 57 +++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 58 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/thermal/brcm,avs-tmon.txt create mode 100644 Documentation/devicetree/bindings/thermal/brcm,avs-tmon.yaml diff --git a/Documentation/devicetree/bindings/thermal/brcm,avs-tmon.txt b/Documentation/devicetree/bindings/thermal/brcm,avs-tmon.txt deleted file mode 100644 index 74a9ef09db8b..000000000000 --- a/Documentation/devicetree/bindings/thermal/brcm,avs-tmon.txt +++ /dev/null @@ -1,23 +0,0 @@ -* Broadcom STB thermal management - -Thermal management core, provided by the AVS TMON hardware block. - -Required properties: -- compatible: must be one of: - "brcm,avs-tmon-bcm7216" - "brcm,avs-tmon-bcm7445" - "brcm,avs-tmon" -- reg: address range for the AVS TMON registers -- interrupts: temperature monitor interrupt, for high/low threshold triggers, - required except for "brcm,avs-tmon-bcm7216" -- interrupt-names: should be "tmon" - -Example: - - thermal@f04d1500 { - compatible = "brcm,avs-tmon-bcm7445", "brcm,avs-tmon"; - reg = <0xf04d1500 0x28>; - interrupts = <0x6>; - interrupt-names = "tmon"; - interrupt-parent = <&avs_host_l2_intc>; - }; diff --git a/Documentation/devicetree/bindings/thermal/brcm,avs-tmon.yaml b/Documentation/devicetree/bindings/thermal/brcm,avs-tmon.yaml new file mode 100644 index 000000000000..fb5c273b8bc2 --- /dev/null +++ b/Documentation/devicetree/bindings/thermal/brcm,avs-tmon.yaml @@ -0,0 +1,57 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/thermal/brcm,avs-tmon.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom STB thermal management + +description: Thermal management core, provided by the AVS TMON hardware block. + +maintainers: + - Florian Fainelli + +allOf: + - $ref: thermal-sensor.yaml# + +properties: + compatible: + oneOf: + - items: + - enum: + - brcm,avs-tmon-bcm7216 + - brcm,avs-tmon-bcm7445 + - const: brcm,avs-tmon + + reg: + maxItems: 1 + description: > + Address range for the AVS TMON registers + + interrupts: + maxItems: 1 + + interrupt-names: + items: + - const: tmon + + "#thermal-sensor-cells": + const: 0 + +additionalProperties: false + +required: + - compatible + - reg + - "#thermal-sensor-cells" + +examples: + - | + thermal@f04d1500 { + compatible = "brcm,avs-tmon-bcm7445", "brcm,avs-tmon"; + reg = <0xf04d1500 0x28>; + interrupts = <0x6>; + interrupt-names = "tmon"; + interrupt-parent = <&avs_host_l2_intc>; + #thermal-sensor-cells = <0>; + }; diff --git a/MAINTAINERS b/MAINTAINERS index 9ac67c885159..2109b6fe8ea3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3936,7 +3936,7 @@ M: Markus Mayer M: bcm-kernel-feedback-list@broadcom.com L: linux-pm@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/thermal/brcm,avs-tmon.txt +F: Documentation/devicetree/bindings/thermal/brcm,avs-tmon.yaml F: drivers/thermal/broadcom/brcmstb* BROADCOM STB DPFE DRIVER From patchwork Mon Dec 6 18:26:15 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 521138 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E2695C433F5 for ; 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Mon, 06 Dec 2021 10:26:46 -0800 (PST) From: Florian Fainelli To: devicetree@vger.kernel.org Cc: Florian Fainelli , Damien Le Moal , Rob Herring , Linus Walleij , Bartosz Golaszewski , bcm-kernel-feedback-list@broadcom.com (maintainer:BROADCOM BCM7XXX ARM ARCHITECTURE), Gregory Fong , Thomas Gleixner , Marc Zyngier , Ulf Hansson , Thierry Reding , =?utf-8?q?Uwe_Kleine-K=C3=B6nig?= , Lee Jones , Philipp Zabel , Herbert Xu , Ray Jui , Scott Branden , Alessandro Zummo , Alexandre Belloni , "Rafael J. Wysocki" , Daniel Lezcano , Amit Kucheria , Zhang Rui , Markus Mayer , Greg Kroah-Hartman , Al Cooper , Doug Berger , linux-ide@vger.kernel.org (open list:LIBATA SUBSYSTEM (Serial and Parallel ATA drivers)), linux-kernel@vger.kernel.org (open list), linux-gpio@vger.kernel.org (open list:GPIO SUBSYSTEM), linux-arm-kernel@lists.infradead.org (moderated list:BROADCOM BCM7XXX ARM ARCHITECTURE), linux-mmc@vger.kernel.org (open list:MULTIMEDIA CARD (MMC), SECURE DIGITAL (SD) AND...), linux-pwm@vger.kernel.org (open list:PWM SUBSYSTEM), linux-crypto@vger.kernel.org (open list:HARDWARE RANDOM NUMBER GENERATOR CORE), linux-rtc@vger.kernel.org (open list:REAL TIME CLOCK (RTC) SUBSYSTEM), linux-pm@vger.kernel.org (open list:THERMAL), linux-usb@vger.kernel.org (open list:USB SUBSYSTEM) Subject: [PATCH v2 13/14] dt-bindings: bus: Convert GISB arbiter to YAML Date: Mon, 6 Dec 2021 10:26:15 -0800 Message-Id: <20211206182616.2089677-14-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211206182616.2089677-1-f.fainelli@gmail.com> References: <20211206182616.2089677-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Convert the Broadcom STB GISB bus arbiter to YAML to help with validation. Signed-off-by: Florian Fainelli --- .../devicetree/bindings/bus/brcm,gisb-arb.txt | 34 ---------- .../bindings/bus/brcm,gisb-arb.yaml | 66 +++++++++++++++++++ 2 files changed, 66 insertions(+), 34 deletions(-) delete mode 100644 Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt create mode 100644 Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml diff --git a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt deleted file mode 100644 index 10f6d0a8159d..000000000000 --- a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.txt +++ /dev/null @@ -1,34 +0,0 @@ -Broadcom GISB bus Arbiter controller - -Required properties: - -- compatible: - "brcm,bcm7278-gisb-arb" for V7 28nm chips - "brcm,gisb-arb" or "brcm,bcm7445-gisb-arb" for other 28nm chips - "brcm,bcm7435-gisb-arb" for newer 40nm chips - "brcm,bcm7400-gisb-arb" for older 40nm chips and all 65nm chips - "brcm,bcm7038-gisb-arb" for 130nm chips -- reg: specifies the base physical address and size of the registers -- interrupts: specifies the two interrupts (timeout and TEA) to be used from - the parent interrupt controller. A third optional interrupt may be specified - for breakpoints. - -Optional properties: - -- brcm,gisb-arb-master-mask: 32-bits wide bitmask used to specify which GISB - masters are valid at the system level -- brcm,gisb-arb-master-names: string list of the litteral name of the GISB - masters. Should match the number of bits set in brcm,gisb-master-mask and - the order in which they appear - -Example: - -gisb-arb@f0400000 { - compatible = "brcm,gisb-arb"; - reg = <0xf0400000 0x800>; - interrupts = <0>, <2>; - interrupt-parent = <&sun_l2_intc>; - - brcm,gisb-arb-master-mask = <0x7>; - brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0"; -}; diff --git a/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml new file mode 100644 index 000000000000..483b019275cd --- /dev/null +++ b/Documentation/devicetree/bindings/bus/brcm,gisb-arb.yaml @@ -0,0 +1,66 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/bus/brcm,gisb-arb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Broadcom GISB bus Arbiter controller + +maintainers: + - Florian Fainelli + +properties: + compatible: + oneOf: + - items: + - enum: + - brcm,bcm7445-gisb-arb + - const: brcm,gisb-arb + - items: + - const: brcm,bcm7278-gisb-arb + - items: + - const: brcm,bcm7435-gisb-arb + - items: + - const: brcm,bcm7400-gisb-arb + - items: + - const: brcm,bcm7038-gisb-arb + - items: + - const: brcm,gisb-arb + + reg: + maxItems: 1 + + interrupts: + minItems: 2 + maxItems: 3 + + brcm,gisb-arb-master-mask: + $ref: /schemas/types.yaml#/definitions/uint32 + description: > + 32-bits wide bitmask used to specify which GISB masters are valid at the + system level + + brcm,gisb-arb-master-names: + $ref: /schemas/types.yaml#/definitions/string-array + description: > + String list of the litteral name of the GISB masters. Should match the + number of bits set in brcm,gisb-master-mask and the order in which they + appear + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + gisb-arb@f0400000 { + compatible = "brcm,gisb-arb"; + reg = <0xf0400000 0x800>; + interrupts = <0>, <2>; + interrupt-parent = <&sun_l2_intc>; + brcm,gisb-arb-master-mask = <0x7>; + brcm,gisb-arb-master-names = "bsp_0", "scpu_0", "cpu_0"; + };