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Fixing it enables the mailboxes on the A113. These mailboxes are needed for SCPI Fixes: 9d59b708500f ("arm64: dts: meson-axg: add initial A113D SoC DT support") Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.19.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index 3cc0044d3468..ff8b3406aff6 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -1067,9 +1067,9 @@ }; }; - mailbox: mailbox@ff63dc00 { + mailbox: mailbox@ff63c404 { compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu"; - reg = <0 0xff63dc00 0 0x400>; + reg = <0 0xff63c404 0 0x4c>; interrupts = , , ; From patchwork Thu Nov 8 13:53:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 150525 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp846620ljp; Thu, 8 Nov 2018 05:54:27 -0800 (PST) X-Google-Smtp-Source: AJdET5f70mzNStpeLU1qL7mgVxdFmowRPspd8tSosemPDtVaVjyHyGSFl59SfNqmIDBmDbzzZmxq X-Received: by 2002:a17:902:2468:: with SMTP id m37-v6mr4687762plg.154.1541685267195; Thu, 08 Nov 2018 05:54:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541685267; cv=none; d=google.com; s=arc-20160816; b=yW7Wx4dm8snV0RsqIp8Ld+tMFfO/7wDDndfMWW5lokOQks2VA4Zc0cxQiUwIvEc/KX QK6Z3pZPnmim1M7EwGajSsSpA9T/udkcw1PmlGM8f0TqyNwocn970yQPsTIfEpFUmQhu HyRKRGCj74PWvpB83BvE6G9bOSO2FIiMScq1st8Mu80K0gC6ysfk4fhksr4JADOoJk8r BE46yAvkDS7cibfRLc/mibqy/gMgJGJ9/j5r0R5tQ+4LrA3mZcmJPiMJzB7wUPpq3J9S 9zCX2fmTBztyQQpwgdWAMeHzKr1OjPsQaMmgI8RkG4OryhcWXDLZPNCNMQ//lFJBDtzS R9jA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=M6wN89PoGt3bKaR1gaIBVeliRc8f7Zk35/q79yr4xdc=; b=HLTOgZFtdRnl728o2x7IdUNUHP5vkTw0+MmFBuOo4HtGCSCXPT+MF+Bb2yugOsn2+b HmhoafTsN/uQ10VoF+ZTQEfSdI3HXrFtZP9SZ/KGZj7f3phrgOHKJm+ghvmPtRSfbmGp Nsiw2+A4Qf0qC6hYTQ8aFkZSR5+i+557RnOnUcs6ssw0xLn5IbOdLyDnVdarX3n1cPui a8jlH5tRSsFwApAYldhZiHwz/VxLI8Os34xTpP1JLI7COItteaO3aeKuGhU4FvhVzaBK g+OY9GQoatPXUVX8MHeUJx9MFZLHd877upEjmWrfqB8w2VNLkGcbfSFA6MQJJbxo4jBK vi0Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=EVLOQZ03; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Thu, 08 Nov 2018 05:54:01 -0800 (PST) Received: from boomer.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id p6sm2740329wrx.39.2018.11.08.05.54.00 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 08 Nov 2018 05:54:01 -0800 (PST) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 2/4] arm64: dts: meson-axg: correct sram shared mem unit-address Date: Thu, 8 Nov 2018 14:53:50 +0100 Message-Id: <20181108135352.8459-3-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181108135352.8459-1-jbrunet@baylibre.com> References: <20181108135352.8459-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Correct the unit-address in the node name of the SRAM shared memory Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.19.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index ff8b3406aff6..b8893675e39c 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -1659,12 +1659,12 @@ #size-cells = <1>; ranges = <0 0x0 0xfffc0000 0x20000>; - cpu_scp_lpri: scp-shmem@0 { + cpu_scp_lpri: scp-shmem@13000 { compatible = "amlogic,meson-axg-scp-shmem"; reg = <0x13000 0x400>; }; - cpu_scp_hpri: scp-shmem@200 { + cpu_scp_hpri: scp-shmem@13400 { compatible = "amlogic,meson-axg-scp-shmem"; reg = <0x13400 0x400>; }; From patchwork Thu Nov 8 13:53:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jerome Brunet X-Patchwork-Id: 150524 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp846397ljp; Thu, 8 Nov 2018 05:54:09 -0800 (PST) X-Google-Smtp-Source: AJdET5cHYRjjM+2gXjX4+eMTTMlqc6lcQSIvkaBE6m7+c2YwwHeBHZ8xqLth3S4oIA4s3gse76nF X-Received: by 2002:a17:902:8f94:: with SMTP id z20-v6mr4540103plo.175.1541685249303; Thu, 08 Nov 2018 05:54:09 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541685249; cv=none; d=google.com; s=arc-20160816; b=QK3wCsdjUWTpdDj2xMhtEtio6gyjHyh1L9zAiXDhzJQKIxDAJUP38YNWt3mKJcvxpF 9l6PpzeIKUf+9Ey+YS5pyYlKRhXs7gT+mkj3s/LxmQfOdQa7TvieeNLbfc9CY4q0tXso j1FvlXek/5GUOy5rxUmMKvArA8YDLu8PXSd7E8m63KNFnpgf+2VQOYDhTY72MxGxlOUc 4J04MBbe+Ft1+AWQk9iceBMcCufhSgEXnw06xGi/0ivO1PbJ6Rtf5TfOr82Uf/44wJ5j EQU73kVHaV53VMcpwaEZ7CZZ+M+ip3gK03k7iJOpMC4MGJJMYklrALQDG0Dl44/F39MA isJg== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id j7-v6si4241391plk.51.2018.11.08.05.54.08; Thu, 08 Nov 2018 05:54:09 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@baylibre-com.20150623.gappssmtp.com header.s=20150623 header.b=rn8Z6gvP; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727174AbeKHX3m (ORCPT + 32 others); Thu, 8 Nov 2018 18:29:42 -0500 Received: from mail-wr1-f68.google.com ([209.85.221.68]:40866 "EHLO mail-wr1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726724AbeKHX3k (ORCPT ); Thu, 8 Nov 2018 18:29:40 -0500 Received: by mail-wr1-f68.google.com with SMTP id i17-v6so21347224wre.7 for ; Thu, 08 Nov 2018 05:54:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3Trob3Eu4mkFDnpfZtYiuy74jOX9CM+snY60wneQxcg=; b=rn8Z6gvPJwy21I71vry5wevhZl3tSLH4x64kk8GfqPKCxQ5DKjr3sqJwd0vy6yo/aq tHyfHWdWWa/iVpQfHRkYvlOUsyLhjAU5JM5W1IbXkkYyP2G8C50xXE080VefudtJ/z/y 2C6NEXgjREeNK7scfGWhQu+1QoDWXC9HGebtEM2fogK1iPyBCswcaljIymOUFc/iSBCE 25004+HuJ4SIjJKkUCf8Ywb0QmYLCIc7hY0yQue0VXHjvuKMVJzut39f+No7EbTXDltA oqa7Z5KAx2Ik3oqZWDas6OO3vQb/Jin1Fp75JrNpzb5FNW3CO/X8WRU7sFewrqtnBelp 4BdA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3Trob3Eu4mkFDnpfZtYiuy74jOX9CM+snY60wneQxcg=; b=q5kjezPT3Mz7r4J/PIKT/gEpcYWOk3c1mRbD0+lgQBxM55ihzfnRlBLNqNp4jzLbuA sMp/eaCwzt6qGHwJMz0SgbVYi7x8vOoIpV3GR+3p7oxqPxx1EouLpfWXX/OaVWMjeC/N 7RYd+nSRfdT4HoG5wddJB6OZZHRznR85xO/F/rT7lQHRiXuPO4zxGZofbkeuIqWoD/Qd NbhZc19wYEND7Cj/TsWWL8u71vLV+TvSNurWeEV4aKK5pQwnVbGaEHx7bWyvMgE3JmDz rrWiHInzyGM3IGm8OttY+pCKhQC+VBtmieaX74gt2PS7WBCjt8UZUm5stHfiKlvnBoSZ LY3A== X-Gm-Message-State: AGRZ1gL+PTuoodRCifS5pak/HOeN/MrMLCnaO+Mmy5JjsyxGZ/Rmvnvh idTtp5Q3qIeQ//Mu9R4xGonmeQ== X-Received: by 2002:a5d:4e83:: with SMTP id e3-v6mr4523972wru.187.1541685243602; Thu, 08 Nov 2018 05:54:03 -0800 (PST) Received: from boomer.local ([90.63.244.31]) by smtp.googlemail.com with ESMTPSA id p6sm2740329wrx.39.2018.11.08.05.54.02 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 08 Nov 2018 05:54:03 -0800 (PST) From: Jerome Brunet To: Kevin Hilman , Carlo Caione Cc: Jerome Brunet , devicetree@vger.kernel.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/4] arm64: dts: meson-axg: enable SCPI Date: Thu, 8 Nov 2018 14:53:52 +0100 Message-Id: <20181108135352.8459-5-jbrunet@baylibre.com> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181108135352.8459-1-jbrunet@baylibre.com> References: <20181108135352.8459-1-jbrunet@baylibre.com> MIME-Version: 1.0 Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Enable SCPI on the axg platform, with cpu clock and hwmon (core temperature) support Signed-off-by: Jerome Brunet --- arch/arm64/boot/dts/amlogic/meson-axg.dtsi | 26 ++++++++++++++++++++++ 1 file changed, 26 insertions(+) -- 2.19.1 diff --git a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi index b8893675e39c..5f512c91471e 100644 --- a/arch/arm64/boot/dts/amlogic/meson-axg.dtsi +++ b/arch/arm64/boot/dts/amlogic/meson-axg.dtsi @@ -79,6 +79,7 @@ reg = <0x0 0x0>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&scpi_dvfs 0>; }; cpu1: cpu@1 { @@ -87,6 +88,7 @@ reg = <0x0 0x1>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&scpi_dvfs 0>; }; cpu2: cpu@2 { @@ -95,6 +97,7 @@ reg = <0x0 0x2>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&scpi_dvfs 0>; }; cpu3: cpu@3 { @@ -103,6 +106,7 @@ reg = <0x0 0x3>; enable-method = "psci"; next-level-cache = <&l2>; + clocks = <&scpi_dvfs 0>; }; l2: l2-cache0 { @@ -137,6 +141,28 @@ }; }; + scpi { + compatible = "arm,scpi-pre-1.0"; + mboxes = <&mailbox 1 &mailbox 2>; + shmem = <&cpu_scp_lpri &cpu_scp_hpri>; + + scpi_clocks: clocks { + compatible = "arm,scpi-clocks"; + + scpi_dvfs: clock-controller { + compatible = "arm,scpi-dvfs-clocks"; + #clock-cells = <1>; + clock-indices = <0>; + clock-output-names = "vcpu"; + }; + }; + + scpi_sensors: sensors { + compatible = "amlogic,meson-gxbb-scpi-sensors"; + #thermal-sensor-cells = <1>; + }; + }; + soc { compatible = "simple-bus"; #address-cells = <2>;