From patchwork Thu Nov 8 17:49:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Richard Earnshaw \(lists\)" X-Patchwork-Id: 150539 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1129529ljp; Thu, 8 Nov 2018 09:50:15 -0800 (PST) X-Google-Smtp-Source: AJdET5eTOB+SBFOgwHOpjp38cWp2BD/4wqZF8EZNcAtHur43/F9beD4C4CQLZqMZSI4Axn7Ez9Dg X-Received: by 2002:a63:d441:: with SMTP id i1-v6mr4489564pgj.31.1541699415265; Thu, 08 Nov 2018 09:50:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541699415; cv=none; d=google.com; s=arc-20160816; b=XD9iaqmiDoR8ww7ootkz+SQl+qECrElW7Onlya6FlhwbK6T1KLVcUxiKlUdN4vX9pQ elFSzNFgQkAAPX8hcijZ37DTkfXViIjoMVbdZpqx8WgN5YH0Pi/o7x9+H1+++smOFL8L 7o9yeXHJd7me/kpPcWt5Ey4h5y6yDOrYmtyvovVTCIX0VZLKd+z81mjzqtSfoE2aVZZz Xgt4HyfTW4yGRPdMUDkZC+fejilwK+cGWXH2qOWQo1AmdLvni8U3SsE9lXkn+DUpOJDY 84Yk+xpiKRRBeC1aKa6p/SZKt8tbLI5ZnxC95jluLoEWLkJlTPpSkH3Ipw8ISXefMUp5 xkQA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=mime-version:user-agent:date:message-id:openpgp:subject:from:to :delivered-to:sender:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:mailing-list:dkim-signature :domainkey-signature; bh=Cqj9a7RM7nJdYvT+UnRbxKXafdpH8s/50nteENBuh08=; b=u3g/C59mQZXi8smiM6W5vzrN6jfNtQX85eZlbAeaekiqisAZZQr1lAr6bviOAeJhla d6xjNae3UqQSDS2orVNKGF89ak+YivxZzq7rEx3o3WLDJLfvma3vSy2h0aKc3L7iJghd QufYXaAk5Lfjnq0LfNJqvLAtAg/JjURgRnmAXb8ZMiWww6/4EJ/ywTjgGeAWEVwHYS27 pBvSMTlKqLB6QNY/uYBgzEyg8nAh/yITx6qpWd/y9rNkjHI0tFSN6RqHPPAtK/JL7fhn dgoZB74kKoghxGhWl4MheiNvbFi4SwoytNcpXZUfCjX1PboGNJp7FuKAA5zNz4llRJZ3 SJ+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=OSyFY7Fg; spf=pass (google.com: domain of gcc-patches-return-489433-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-489433-patch=linaro.org@gcc.gnu.org" Return-Path: Received: from sourceware.org (server1.sourceware.org. [209.132.180.131]) by mx.google.com with ESMTPS id y5-v6si4435158pgs.31.2018.11.08.09.50.14 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 08 Nov 2018 09:50:15 -0800 (PST) Received-SPF: pass (google.com: domain of gcc-patches-return-489433-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@gcc.gnu.org header.s=default header.b=OSyFY7Fg; spf=pass (google.com: domain of gcc-patches-return-489433-patch=linaro.org@gcc.gnu.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="gcc-patches-return-489433-patch=linaro.org@gcc.gnu.org" DomainKey-Signature: a=rsa-sha1; c=nofws; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; q=dns; s=default; b=x+DWwEgU7j34yHdJZ7xN4kedBBwgUGGjjR/CY+7wh4UdWoQsIl 8mQvmA4sXDx7NxRgQCx/5b0p67yoZCO+WErIWkqz9M0IJk4nX16vNZKD1alpkUJD W5x5TYJioSuYkY4xuYDY8xyQoTdMHEPZYeklhbzB7k7c9YviicUPThKzo= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=gcc.gnu.org; h=list-id :list-unsubscribe:list-archive:list-post:list-help:sender:to :from:subject:message-id:date:mime-version:content-type; s= default; bh=E1FgGy5MDnjmL0IirdTYHryDgAI=; b=OSyFY7FgouuCrjmBpsaC IQ7d0ZCwp91Y0M6beYo/vBJd7trgyV+SWAdr6ZLG9bSl8u3aR7bnk8VKfZX91xRv SocpJAusF26ex9azK1V0fORiKZc8SzaExy/R/b54KLAqHB15rXNIcvZ1TAJ9D1bi 6P1jguJuVtJMhIhR5kUOsFo= Received: (qmail 19228 invoked by alias); 8 Nov 2018 17:50:03 -0000 Mailing-List: contact gcc-patches-help@gcc.gnu.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Archive: List-Post: List-Help: Sender: gcc-patches-owner@gcc.gnu.org Delivered-To: mailing list gcc-patches@gcc.gnu.org Received: (qmail 19194 invoked by uid 89); 8 Nov 2018 17:50:02 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-26.9 required=5.0 tests=BAYES_00, GIT_PATCH_0, GIT_PATCH_1, GIT_PATCH_2, GIT_PATCH_3, SPF_PASS autolearn=ham version=3.3.2 spammy=sans, BEGIN, *target, tuning X-HELO: foss.arm.com Received: from foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 08 Nov 2018 17:50:00 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 8CC86EBD; Thu, 8 Nov 2018 09:49:58 -0800 (PST) Received: from e120077-lin.cambridge.arm.com (e120077-lin.cambridge.arm.com [10.2.206.194]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id DC8B73F5CF; Thu, 8 Nov 2018 09:49:57 -0800 (PST) To: gcc-patches From: "Richard Earnshaw (lists)" Subject: [arm] Add support for aliases of CPU names Openpgp: preference=signencrypt Message-ID: <7512aca1-1fa6-6fb3-2636-03675bf77177@arm.com> Date: Thu, 8 Nov 2018 17:49:56 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 This patch adds support for defining an alias for a CPU name that can then be used in conjunction with the -mcpu option in the same way that the primary name can be used. Aliases do not lead to a short-cut of the feature options; they are literally an alternative name for the core CPU. The new entry in arm-cpus.in allows a cpu definition to contain an alias statement, for example begin cpu strongarm alias strongarm110 !strongarm1100 !strongarm1110 ... end cpu strongarm each entry in the list represents another alias for the CPU. If the alias name starts with an exclamation mark, then it will match as for any other alias (sans the ! itself), but it will not be listed in any of the CPU hinting options (the intent is to make the alias essentially undocumented). In the above example, hints would be provided for strongarm and strongarm110, but not for strongarm1100 or strongarm1110. The advantage of using aliases in this way is that it allows us to reduce the number of duplicate table entries and identifier tags used inside the compiler itself. * config/arm/parsecpu.awk (/alias/): New parsing rule. (/begin cpu/): Check that the cpu name hasn't been previously defined. (gen_comm_data): Print out CPU alias tables. (check_cpu): Match aliases when checking the CPU name. * config/arm/arm-protos.h (cpu_alias): New structure. (cpu_option): Add entry for aliases. * config/arm/arm-cpus.in (strongarm): Add aliases for strongarm110 strongarm1100 and strongarm1110. (strongarm110, strongarm1100, strongarm1110): Delete CPU entries. (config/arm/arm-generic.md): Remove redundant references to strongarm110, strongarm1100 and strongarm1110. * common/config/arm/arm-common.c (arm_print_hint_for_cpu_option): Scan aliases for additional hints. (arm_parse_cpu_option_name): Also match a cpu name against the list of aliases. * config/arm/arm-tables.opt: Regenerated. * config/arm/arm-tune.md: Regenerated. Committed to trunk. R. diff --git a/gcc/common/config/arm/arm-common.c b/gcc/common/config/arm/arm-common.c index 76c357b4258..32cf36e94f6 100644 --- a/gcc/common/config/arm/arm-common.c +++ b/gcc/common/config/arm/arm-common.c @@ -309,7 +309,16 @@ arm_print_hint_for_cpu_option (const char *target, { auto_vec candidates; for (; list->common.name != NULL; list++) - candidates.safe_push (list->common.name); + { + candidates.safe_push (list->common.name); + if (list->aliases) + { + for (const cpu_alias *alias = list->aliases; alias->name != NULL; + alias++) + if (alias->visible) + candidates.safe_push (alias->name); + } + } #ifdef HAVE_LOCAL_CPU_DETECT /* Add also "native" as possible value. */ @@ -345,6 +354,16 @@ arm_parse_cpu_option_name (const cpu_option *list, const char *optname, if (strncmp (entry->common.name, target, len) == 0 && entry->common.name[len] == '\0') return entry; + + /* Match against any legal alias for this CPU candidate. */ + if (entry->aliases) + { + for (const cpu_alias *alias = entry->aliases; alias->name != NULL; + alias++) + if (strncmp (alias->name, target, len) == 0 + && alias->name[len] == '\0') + return entry; + } } if (complain) diff --git a/gcc/config/arm/arm-cpus.in b/gcc/config/arm/arm-cpus.in index d82e95a2266..61b17b57af7 100644 --- a/gcc/config/arm/arm-cpus.in +++ b/gcc/config/arm/arm-cpus.in @@ -617,6 +617,7 @@ end arch iwmmxt2 # format: # begin cpu # [cname ] +# [alias +] # [tune for ] # [tune flags ] # architecture @@ -630,6 +631,9 @@ end arch iwmmxt2 # # If omitted, cname is formed from transforming the cpuname to convert # non-valid punctuation characters to '_'. +# Any number of alias names may be specified for a CPU. If the name starts +# with a '!' then it will be recognized as a valid name, but will not +# be printed in any help text listing permitted CPUs. # If specified, tune for specifies a CPU target to use for tuning this core. # isa flags are appended to those defined by the architecture. # Each add option must have a distinct feature set and each remove @@ -658,29 +662,12 @@ begin cpu arm810 end cpu arm810 begin cpu strongarm + alias strongarm110 !strongarm1100 !strongarm1110 tune flags LDSCHED STRONG architecture armv4 costs strongarm end cpu strongarm -begin cpu strongarm110 - tune flags LDSCHED STRONG - architecture armv4 - costs strongarm -end cpu strongarm110 - -begin cpu strongarm1100 - tune flags LDSCHED STRONG - architecture armv4 - costs strongarm -end cpu strongarm1100 - -begin cpu strongarm1110 - tune flags LDSCHED STRONG - architecture armv4 - costs strongarm -end cpu strongarm1110 - begin cpu fa526 tune flags LDSCHED architecture armv4 diff --git a/gcc/config/arm/arm-generic.md b/gcc/config/arm/arm-generic.md index 81200fa499a..da97303c758 100644 --- a/gcc/config/arm/arm-generic.md +++ b/gcc/config/arm/arm-generic.md @@ -122,8 +122,7 @@ (define_insn_reservation "mult" 16 (define_insn_reservation "mult_ldsched_strongarm" 3 (and (eq_attr "generic_sched" "yes") (and (eq_attr "ldsched" "yes") - (and (eq_attr "tune" - "strongarm,strongarm110,strongarm1100,strongarm1110") + (and (eq_attr "tune" "strongarm") (ior (eq_attr "mul32" "yes") (eq_attr "mul64" "yes"))))) "core*2") @@ -131,8 +130,7 @@ (define_insn_reservation "mult_ldsched_strongarm" 3 (define_insn_reservation "mult_ldsched" 4 (and (eq_attr "generic_sched" "yes") (and (eq_attr "ldsched" "yes") - (and (eq_attr "tune" - "!strongarm,strongarm110,strongarm1100,strongarm1110") + (and (eq_attr "tune" "!strongarm") (ior (eq_attr "mul32" "yes") (eq_attr "mul64" "yes"))))) "core*4") diff --git a/gcc/config/arm/arm-protos.h b/gcc/config/arm/arm-protos.h index cea98669111..8d6d2395b84 100644 --- a/gcc/config/arm/arm-protos.h +++ b/gcc/config/arm/arm-protos.h @@ -498,6 +498,16 @@ struct arm_build_target extern struct arm_build_target arm_active_target; +/* Table entry for a CPU alias. */ +struct cpu_alias +{ + /* The alias name. */ + const char *const name; + /* True if the name should be displayed in help text listing cpu names. */ + bool visible; +}; + +/* Table entry for an architectural feature extension. */ struct cpu_arch_extension { /* Feature name. */ @@ -511,6 +521,7 @@ struct cpu_arch_extension const enum isa_feature isa_bits[isa_num_bits]; }; +/* Common elements of both CPU and architectural options. */ struct cpu_arch_option { /* Name for this option. */ @@ -521,6 +532,7 @@ struct cpu_arch_option enum isa_feature isa_bits[isa_num_bits]; }; +/* Table entry for an architecture entry. */ struct arch_option { /* Common option fields. */ @@ -535,10 +547,13 @@ struct arch_option enum processor_type tune_id; }; +/* Table entry for a CPU entry. */ struct cpu_option { /* Common option fields. */ cpu_arch_option common; + /* List of aliases for this CPU. */ + const struct cpu_alias *aliases; /* Architecture upon which this CPU is based. */ enum arch_type arch; }; diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index eacee746a39..623b79f3322 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -33,15 +33,6 @@ Enum(processor_type) String(arm810) Value( TARGET_CPU_arm810) EnumValue Enum(processor_type) String(strongarm) Value( TARGET_CPU_strongarm) -EnumValue -Enum(processor_type) String(strongarm110) Value( TARGET_CPU_strongarm110) - -EnumValue -Enum(processor_type) String(strongarm1100) Value( TARGET_CPU_strongarm1100) - -EnumValue -Enum(processor_type) String(strongarm1110) Value( TARGET_CPU_strongarm1110) - EnumValue Enum(processor_type) String(fa526) Value( TARGET_CPU_fa526) diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index f64c1ef176d..47dc516e2a7 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -22,7 +22,6 @@ (define_attr "tune" "arm8,arm810,strongarm, - strongarm110,strongarm1100,strongarm1110, fa526,fa626,arm7tdmi, arm7tdmis,arm710t,arm720t, arm740t,arm9,arm9tdmi, diff --git a/gcc/config/arm/parsecpu.awk b/gcc/config/arm/parsecpu.awk index aabe1b0c64c..ba2dee5fdcb 100644 --- a/gcc/config/arm/parsecpu.awk +++ b/gcc/config/arm/parsecpu.awk @@ -261,6 +261,18 @@ function gen_comm_data () { print " { NULL, false, false, {isa_nobit}}" print "};\n" } + + if (cpus[n] in cpu_aliases) { + print "static const cpu_alias cpu_aliastab_" \ + cpu_cnames[cpus[n]] "[] = {" + naliases = split (cpu_aliases[cpus[n]], aliases) + for (alias = 1; alias <= naliases; alias++) { + print " { \"" aliases[alias] "\", " \ + cpu_alias_visible[cpus[n],aliases[alias]] "}," + } + print " { NULL, false}" + print "};\n" + } } print "const cpu_option all_cores[] =" @@ -295,12 +307,16 @@ function gen_comm_data () { } print_isa_bits_for(all_isa_bits, " ") print "\n }," + # aliases + if (cpus[n] in cpu_aliases) { + print " cpu_aliastab_" cpu_cnames[cpus[n]] "," + } else print " NULL," # arch print " TARGET_ARCH_" arch_cnames[feats[1]] print " }," } - print " {{NULL, NULL, {isa_nobit}}, TARGET_ARCH_arm_none}" + print " {{NULL, NULL, {isa_nobit}}, NULL, TARGET_ARCH_arm_none}" print "};" narchs = split (arch_list, archs) @@ -486,13 +502,17 @@ function gen_opt () { function check_cpu (name) { exts = split (name, extensions, "+") - if (! (extensions[1] in cpu_cnames)) { - return "error" + cpu_name = extensions[1] + if (! (cpu_name in cpu_cnames)) { + if (! (cpu_name in cpu_all_aliases)) { + return "error" + } + cpu_name = cpu_all_aliases[cpu_name] } for (n = 2; n <= exts; n++) { - if (!((extensions[1], extensions[n]) in cpu_opt_remove) \ - && !((extensions[1], extensions[n]) in cpu_optaliases)) { + if (!((cpu_name, extensions[n]) in cpu_opt_remove) \ + && !((cpu_name, extensions[n]) in cpu_optaliases)) { return "error" } } @@ -642,6 +662,12 @@ BEGIN { toplevel() cpu_name = $3 parse_ok = 1 + if (cpu_name in cpu_cnames) { + fatal(cpu_name " is already defined") + } + if (cpu_name in cpu_all_aliases) { + fatal(cpu_name " has already been defined as an alias") + } } /^[ ]*cname / { @@ -651,6 +677,33 @@ BEGIN { parse_ok = 1 } +/^[ ]*alias / { + if (NF < 2) fatal("syntax: alias +") + if (cpu_name == "") fatal("\"alias\" outside of cpu block") + alias_count = NF + for (n = 2; n <= alias_count; n++) { + visible = "true" + alias = $n + if (alias ~ /!.*/) { + visible = "false" + gsub(/^!/, "", alias) + } + if (alias in cpu_cnames) { + fatal(alias " is already defined as a cpu name") + } + if (n == 2) { + cpu_aliases[cpu_name] = alias + } else cpu_aliases[cpu_name] = cpu_aliases[cpu_name] " " alias + cpu_alias_visible[cpu_name,alias] = visible + if (alias in cpu_all_aliases) { + fatal(alias " is already an alias for " cpu_all_aliases[alias]) + } + cpu_all_aliases[alias] = cpu_name + } + cpu_has_alias[cpu_name] = 1 + parse_ok = 1 +} + /^[ ]*tune for / { if (NF != 3) fatal("syntax: tune for ") if (cpu_name != "") {