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X-Received-From: 2a00:1450:4864:20::441 Subject: [Qemu-devel] [PATCH v3 1/7] target/arm64: properly handle DBGVR RESS bits X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" This only fails with some (broken) versions of gdb but we should treat the top bits of DBGBVR as RESS. Properly sign extend QEMU's reference copy of dbgbvr and also update the register descriptions in the comment. Signed-off-by: Alex Bennée --- v2 - sanitise register on insertion - update reference description v3 - fix bogus sextract64 --- target/arm/kvm64.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) -- 2.17.1 Reviewed-by: Richard Henderson diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 5de8ff0ac5..6351a54b28 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -103,7 +103,7 @@ static void kvm_arm_init_debug(CPUState *cs) * capable of fancier matching but that will require exposing that * fanciness to GDB's interface * - * D7.3.2 DBGBCR_EL1, Debug Breakpoint Control Registers + * DBGBCR_EL1, Debug Breakpoint Control Registers * * 31 24 23 20 19 16 15 14 13 12 9 8 5 4 3 2 1 0 * +------+------+-------+-----+----+------+-----+------+-----+---+ @@ -115,12 +115,25 @@ static void kvm_arm_init_debug(CPUState *cs) * SSC/HMC/PMC: Security, Higher and Priv access control (Table D-12) * BAS: Byte Address Select (RES1 for AArch64) * E: Enable bit + * + * DBGBVR_EL1, Debug Breakpoint Value Registers + * + * 63 53 52 49 48 2 1 0 + * +------+-----------+----------+-----+ + * | RESS | VA[52:49] | VA[48:2] | 0 0 | + * +------+-----------+----------+-----+ + * + * Depending on the addressing mode bits the top bits of the register + * are a sign extension of the highest applicable VA bit. Some + * versions of GDB don't do it correctly so we ensure they are correct + * here so future PC comparisons will work properly. */ + static int insert_hw_breakpoint(target_ulong addr) { HWBreakpoint brk = { .bcr = 0x1, /* BCR E=1, enable */ - .bvr = addr + .bvr = sextract64(addr, 0, 53) }; if (cur_hw_bps >= max_hw_bps) { From patchwork Fri Nov 9 15:21:14 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 150656 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp73096ljp; Fri, 9 Nov 2018 07:22:03 -0800 (PST) X-Google-Smtp-Source: AJdET5faqMmTSwv2dG3BrrRo6Vgr0pdFP6ny7TD6ZMNYhk4Iq57dS31PEUGuhSE4kO5uZ4H9YujJ X-Received: by 2002:a37:8245:: with SMTP id e66-v6mr8750459qkd.335.1541776923384; Fri, 09 Nov 2018 07:22:03 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541776923; cv=none; d=google.com; s=arc-20160816; b=IzDM3jCUR6x89x+Xhrucpezj1coRhRS2zF1YvKYuezQVYE8GQs2Fj3GOirBFohat01 RtLLYOC+C9p6FFat8D9NBFpzFoH9vR624CN1meD6C7xY0iNqvyF1QFjQv9XaOiUSwx1O UoYqo3y4RZV6fntU31j/NR+yw8AK0oQspv+VPdIYsXMyqK5N7zJdAn2lxoY1WBaE9Hii YOpTeeCt16P4D3UfLV60Yiw0ZXZPxlfA9cBO4cs39ekPq99bJkqx3wqXYO/Yy5HfLuno l6sVI5TTeq4LI9IhZTB1ieAln6Wt9YbomLmoAY8Rh8cF63pp+c9lX3ioFtAafyFBeo7x 0rRQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=TOuMJWy6Z+buH6QIOlPoGBEco/kLCfuouHDYpwE2lqQ=; b=tayfo/0AFOGo1dERKPAK5N0a34TFs7M4iTK8CA6NCKfA3Dxxn4MuC1O6kXtVF25Vf3 p2udTpj1KY8nC0UujP1qDsGk9PJWThtANK+CJFD+/DRfhf+4oFsyOF4ey6WdO6TYxEZd GxMDaqFzZzOfMwh4tXQEO9wfD8JVK2Qh4RW1TIuUVOPxJe/YEhepYO0+uQO4LZOz8bUS kUF/9AsL2Bi9E56aY7YEOlEACRQgSJilyRU1Q+xkprWOUTsMPfHdrR3kpcVl6wZJoZgp dPrhRINFTjq1URXq/ELoPN0dwgveFMVKr8XaQJJtHkq+g8LR2wUcqKC/aiFBijF+A0sf Lz+Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=bpA+AkPY; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH v3 2/7] target/arm64: hold BQL when calling do_interrupt() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Fix the assertion failure when running interrupts. Signed-off-by: Alex Bennée Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- target/arm/kvm64.c | 2 ++ 1 file changed, 2 insertions(+) -- 2.17.1 diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index 6351a54b28..c39150e5e1 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -1000,7 +1000,9 @@ bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit) cs->exception_index = EXCP_BKPT; env->exception.syndrome = debug_exit->hsr; env->exception.vaddress = debug_exit->far; + qemu_mutex_lock_iothread(); cc->do_interrupt(cs); + qemu_mutex_unlock_iothread(); return false; } From patchwork Fri Nov 9 15:21:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 150660 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp79594ljp; Fri, 9 Nov 2018 07:27:16 -0800 (PST) X-Google-Smtp-Source: AJdET5eVC2j5iKk8Ow9Jmhya9XceWV+dD1XRAEsWTE1vRC2EPdWsoqr9IISIK9ZjIaVg4ItJf+3D X-Received: by 2002:ac8:2e44:: with SMTP id s4mr9085460qta.355.1541777236045; Fri, 09 Nov 2018 07:27:16 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541777236; cv=none; d=google.com; s=arc-20160816; b=G8UzAIZswtIXpGfTNTimq3e3fHXWiiD38+JwShMEGqeBgyUN33tOWDf0v6uT5Qjf/h yL1i7msVqfqmXgrcwdzYpLFKBkgdSSzFtOwWlpoWVDo77fftz4Uzm4b88EXRTG5RfQ3i 88cQ2XXK8tU7I7fmYmPaZQ+PvUwNtSiGS0l/5vAijz8bQp+8M3vn37lj8o5WCXcQVHyJ Hg9geiDniSc0v5IcRIKfjKhasHOwGVNkUk4MQvBg9ctOG9yBm+JrzNqXXFabMuWzlGbw KH+RwZXH1jMXVORDwzC6KwyopDyTowC9youQjHTBg14XKCl5nN84VvzyFDSZj8CWTe7Y +MaA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=pqkYK55xpellAhp9NIWacaAgqJ2jD6Y2qljTLUr2LBA=; b=jaZ4td6xiVtP2j41mfAdVDC+n3shrSu3ovTM5TPRLclyWTZVQa09Tj/v8CC645a5ou ojIQ6XLbvOJVl2AxWwPYAibIewmAxpbGpBjG8Fc0A0ga2ZB388CWO5xbQYEnie8/51Cv e8VhPbItnu8/sILK8k3prc5ci8EXVASqFCwu/F8WmabSnMfqctJ30wgz8uFkffqUlLs3 rLuPJKW0jumwgoVdk2gD1/wz79DAi8yGhTrdRq8ogBHy39eAlSAEmOaiCOoOobLYi+VQ BbVi2JbEMLRWjZmMZ+GMDPjIzRCx2EV3CHdpGwmsphm1AWifHbZYiwh2W5INu9P3cQhm X6rg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=jf4bCFLg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:4864:20::444 Subject: [Qemu-devel] [PATCH v3 3/7] target/arm64: kvm debug set target_el when passing exception to guest X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" When we are debugging the guest all exceptions come our way but might be for the guest's own debug exceptions. We use the ->do_interrupt() infrastructure to inject the exception into the guest. However, we are missing a full setup of the exception structure, causing an assert later down the line. Signed-off-by: Alex Bennée Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- v2 - tweak commit msg for grammar --- target/arm/kvm64.c | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/target/arm/kvm64.c b/target/arm/kvm64.c index c39150e5e1..46fbe6d8ff 100644 --- a/target/arm/kvm64.c +++ b/target/arm/kvm64.c @@ -1000,6 +1000,7 @@ bool kvm_arm_handle_debug(CPUState *cs, struct kvm_debug_exit_arch *debug_exit) cs->exception_index = EXCP_BKPT; env->exception.syndrome = debug_exit->hsr; env->exception.vaddress = debug_exit->far; + env->exception.target_el = 1; qemu_mutex_lock_iothread(); cc->do_interrupt(cs); qemu_mutex_unlock_iothread(); From patchwork Fri Nov 9 15:21:16 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 150657 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp73516ljp; Fri, 9 Nov 2018 07:22:21 -0800 (PST) X-Google-Smtp-Source: AJdET5eQSh+X/7nDgrFpdFSA0a7aEvFPwUZ3aE/sQUBAMhRMByPNywG82iy+d80OMY4uxhhFIEvD X-Received: by 2002:a37:62d3:: with SMTP id w202mr8453807qkb.357.1541776941294; Fri, 09 Nov 2018 07:22:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541776941; cv=none; d=google.com; s=arc-20160816; b=sx4NcOhx/LJBVp6ZUiD5Vs2NAWABKJA2ZRrL5jmroZdLB5cNo/et+fKRqWkXB3Lm0i wiQkCkZY3DlBQlOGE0YuDL+xoJ+MGuFIldfzy/DYnknrqBDoIAaPfE1q4rti1h41q4ul +VrPvNd7lizJkfbX/+N2wHF4SkxBe9NggTfV971MxQ62NfcrtXJMwxswWA8KCSls1xsj UNhAXrsKpZlwU1emb7JdbLh2BSHdlelWhoQMCMka9UE2KUqaW7U3BFtpdyDvJr3DUdNt MMGkDfLkG5RfhApMqTvBeNrqq+0N4fnrUVlb7o/fOnBxoC78TZTp/Zr6h2l2cnRwQXMo XwSg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=OqbOy/sDgUCB+L40NDK5FGmCQfZ8PbcrTxhZoCZLx68=; b=KUuR/e3jVfHlkXlC0qtxko/QMhI5RLikBWhl0xAISdoIIziXYtOcuPTjdeKvBM/jBa 0BrABFM9QmgN4+ewbaWc121oGTJNdnvS/exLvSXnfMyZk2NiAE+fH7eYOW4Mo3IhUyFa CHZKkeRIUeqhQBr0MI7V3pOydDRTO2NXWbmydGEQxcITj2LXY6XnTgtpebz5+t0ronLB gC8My2/W0qKNnAt97tBqczhvBjJKAi6VnIDbTc6jiZeaShZnA9NfykdNGezc4ESZ9/Yh P5pombrhjHispVdWD0048t/RZ76K3jxyd6YQdyRlr6vJ9kzfJcuY1jIVa8rrVYjUV/vk vAtw== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=RiAdRyK+; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:4864:20::341 Subject: [Qemu-devel] [PATCH v3 4/7] tests/guest-debug: fix scoping of failcount X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" You should declare you are using a global version of a variable before you attempt to modify it in a function. Signed-off-by: Alex Bennée Reviewed-by: Peter Maydell Reviewed-by: Richard Henderson --- tests/guest-debug/test-gdbstub.py | 1 + 1 file changed, 1 insertion(+) -- 2.17.1 diff --git a/tests/guest-debug/test-gdbstub.py b/tests/guest-debug/test-gdbstub.py index 0e4ac01426..c7e3986a24 100644 --- a/tests/guest-debug/test-gdbstub.py +++ b/tests/guest-debug/test-gdbstub.py @@ -16,6 +16,7 @@ def report(cond, msg): print ("PASS: %s" % (msg)) else: print ("FAIL: %s" % (msg)) + global failcount failcount += 1 From patchwork Fri Nov 9 15:21:17 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 150662 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp80214ljp; Fri, 9 Nov 2018 07:27:45 -0800 (PST) X-Google-Smtp-Source: AJdET5f3lM2dueweGM/GWtEQH5lpqWBKxLrELN9PUL9C3+Jw44HA1Qgqqb2Prh+rGmkfUale+dhB X-Received: by 2002:a37:97c3:: with SMTP id z186-v6mr8685161qkd.249.1541777265728; Fri, 09 Nov 2018 07:27:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541777265; cv=none; d=google.com; s=arc-20160816; b=ceY7dsM2Zf9Nu1T0tqKLi1L/9jNV015JICMiLk1uO2foCA7llOE4LS+ZN4uZTL17mK AYXxFCc/5yZpO/G1iwxBI1kFwnxez0V9zeCu6ywFGksP0yXoaPqzCv6rfDAuCD239/SL Gi/Kvsylp3NEB0DrGVq+WOyssjnsiHq5uUVSps9WdefeZckE7bm/XoagLc3kmWcXAJDC vZTBy7XOqyj+UlgEIv+uPeftFjahhGL26QL4+hT9eESfpUd1O6fHyOfnChWSey4n6q4Y hx9fbun47S2lOPHtLa83Y9YP4/yx2So5jHcJQfGc4Piuv5sVmZblo9QHoMl9wlb1zrHL nCjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=w/xPzGFYDm1mbK9oUTpNs65d923WwAqDK1S68c4QRE0=; b=zn1lpFKXv11iYb+lZoqmjbXr5BPMx5GqtVZWEPCYyfw37uEEECC7a18a2vPS13erT7 ovfCmGtgelTfY+Fhu7eY3E7va/nkWHGOC7cPCwv3GWNVF/nwVCnWM7N7oTUoBjW5eBSN hqTWUVlcPx9KYwasUzOwix2LL0XM1WpCfAUKUSkU9BXoMYpZmzmmIO+ZIiq0aZwWfMK1 HacNQtlh64YW4UnFv9mggECi/Z1xuwCcmODcTZyvkYVwUBVzFwI1BEEmOroeRNZaOyfJ 5Ukjx//MgNeTNRVu4ZkN7evxIClAZTpIilVfLanI1L5a3wtwSgGFthN4tk8tSnmPNGjB 19CA== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=OAcXXQBg; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:4864:20::343 Subject: [Qemu-devel] [PATCH v3 5/7] tests/guest-debug: don't use symbol resolution for PC checks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" It turns out symbol resolution isn't enough as modern kernels are often padded with check code at the start of functions. GDB seems to put the breakpoint at the first non-check instruction which causes comparisons with the symbol resolution to fail. For normal breakpoints we can detect the hit just by checking hit_count instead. For hardware breakpoints we fish the breakpoint address out of what gdb.execute() reported it was set at. Signed-off-by: Alex Bennée --- tests/guest-debug/test-gdbstub.py | 23 ++++++++++++++--------- 1 file changed, 14 insertions(+), 9 deletions(-) -- 2.17.1 diff --git a/tests/guest-debug/test-gdbstub.py b/tests/guest-debug/test-gdbstub.py index c7e3986a24..3de174b74b 100644 --- a/tests/guest-debug/test-gdbstub.py +++ b/tests/guest-debug/test-gdbstub.py @@ -6,9 +6,10 @@ from __future__ import print_function # gdb ${KERNEL}.vmlinux -x ${QEMU_SRC}/tests/guest-debug/test-gdbstub.py import gdb +import re failcount = 0 - +addr_match = re.compile("(0x[0-9a-f]{4,16})") def report(cond, msg): "Report success/fail of test" @@ -37,26 +38,30 @@ def check_break(sym_name): gdb.execute("c") # hopefully we came back - end_pc = gdb.parse_and_eval('$pc') - print ("%s == %s %d" % (end_pc, sym.value(), bp.hit_count)) + hit = bp.hit_count bp.delete() - # can we test we hit bp? - return end_pc == sym.value() + # did we hit bp? + return hit > 0 # We need to do hbreak manually as the python interface doesn't export it +# As the resolution of sym_name might not exactly match where the +# breakpoint actually ends up we need to fish it out from result of +# gdb.execute. def check_hbreak(sym_name): "Setup hardware breakpoint, continue and check we stopped." - sym, ok = gdb.lookup_symbol(sym_name) - gdb.execute("hbreak %s" % (sym_name)) + result = gdb.execute("hbreak %s" % (sym_name), to_string=True) + addr_txt = addr_match.search(result).group() + addr = int(addr_txt, 16) + gdb.execute("c") # hopefully we came back end_pc = gdb.parse_and_eval('$pc') - print ("%s == %s" % (end_pc, sym.value())) + print ("%s == %s" % (end_pc, addr)) - if end_pc == sym.value(): + if end_pc == addr: gdb.execute("d 1") return True else: From patchwork Fri Nov 9 15:21:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 150665 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp81767ljp; Fri, 9 Nov 2018 07:29:06 -0800 (PST) X-Google-Smtp-Source: AJdET5etbbf+UH+EOky8XQ31vdKHMDJfGitBoc0ql5vLlztscEslfBvxOWr9AhjZYvxCl+W/byhI X-Received: by 2002:aed:3165:: with SMTP id 92-v6mr8815270qtg.72.1541777346579; Fri, 09 Nov 2018 07:29:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541777346; cv=none; d=google.com; s=arc-20160816; b=wRs15NCGBBAIsoRDgSN2NQXIW7d9SJDSdwvRHsZypi5kAhyBXW/9YGhEQlqnIKpq5d pMUQT1v3v3hODar3WESK4sRU2pL4yrREzu6EeBB1Gpz68WqkY4j5s0xTbneZ29C1Z7Sr W1Z74rVQop4QfQLv1XPHRiYepsLc9iD4nInDopp0/KWKiBSAtlhkHJZXWXbADcfCdhvJ 2tQjujipDQcdGV7MiLQLgN2LnBzJPlT+ued20rcQLszSfVdx2tibNxY1fiOpCfm7+4Ik Ey0ROXtF8mZzfpm7UWADP7fbZ/zL0Ipvhcmnu5aMvgyXOzsTZNA27l3iPYeCzuaxiB0G J2yg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=g0/XsCCUtLQZBWR5e4EasFWLSAo5CocKlEGU+K2+VDw=; b=W786bcN1Cf+NI9AM0iyiN8G9EUSp0nT18KR+PO19VbgEU/MKcrzYhfhjGN0oWQHXoO +LbWtjQFYxS+irQiVOMHiTKaf685pMkBiP7aSxCSGhhePbMgol1j78R9/2OX1wOLMgF+ L5Y8Xq5E1el75XWvdP83clBFfEqjfg5WQ3OjZfznt3avUzTAMIv19uR7uBotg/4RPofP rgEm07dXZlxBub8oNHJuEI/3iEzeKSqrvudR65jS5mtwc8PRMJ4Q3+87tgHrIeFxGajQ Ymwl1nGVl93/8h4Fk/Coen0SwkiZaKP52HN/XdOpDRSTfEpn3iMaj4XZbNMXxQJoh3eV mj4w== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=Xv2QSWv7; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. 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X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH v3 6/7] arm: use symbolic MDCR_TDE in arm_debug_target_el X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" We already have this symbol defined so lets use it. Signed-off-by: Alex Bennée Reviewed-by: Richard Henderson --- target/arm/cpu.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/target/arm/cpu.h b/target/arm/cpu.h index b5eff79f73..1efff21a18 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2743,7 +2743,7 @@ static inline int arm_debug_target_el(CPUARMState *env) if (arm_feature(env, ARM_FEATURE_EL2) && !secure) { route_to_el2 = env->cp15.hcr_el2 & HCR_TGE || - env->cp15.mdcr_el2 & (1 << 8); + env->cp15.mdcr_el2 & MDCR_TDE; } if (route_to_el2) { From patchwork Fri Nov 9 15:21:19 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Alex_Benn=C3=A9e?= X-Patchwork-Id: 150658 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp75621ljp; Fri, 9 Nov 2018 07:24:07 -0800 (PST) X-Google-Smtp-Source: AJdET5dPXt8EUYfK+3Ja5g7gCh4i2xFMWAKcXtRsIeW4N8ccPVjOFB9Y3mL2LSIsw06nHojiWRyX X-Received: by 2002:a0c:b517:: with SMTP id d23mr5925540qve.221.1541777047757; Fri, 09 Nov 2018 07:24:07 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1541777047; cv=none; d=google.com; s=arc-20160816; b=kZSGRf3frbzrm2KjXOlWQugIuDF2jv00WB5ygQ7GsDFCm5WuaW/eXYlazTXOSzVaEJ Rd0O668EeKR5XGIqhO+UbUHH9B75Juo+S6O/jacpd3P0+2yBHg+u34v/MMtb5kXGWYYl cSR7/1k2c3be6uZT71sjRf8AXzLm7SKDUcKtnA/lSQDfU1sXOOrIgxmRDwvLhocLbdlU LSenK8mkd5W6iLP3FIPyVDU9C9qcnDIetqeHJez9jQxspp0zGuv+1RAPirPt1uFdiioP S9BrY4shKbddw23QdlajMjGUhy4+B0HHWdA1FxXHDkV8B+unm7MXwZPEZ4hwpbiQXfN/ NIng== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:cc:list-subscribe:list-help:list-post:list-archive :list-unsubscribe:list-id:precedence:subject :content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:to:from:dkim-signature; bh=BbD6VI0WAZqcOWIe9t90I9j76OAQGf7qYc88DzkrQ3c=; b=ja4Wfc0pypdQZRwGuv1vgdSHo2lIbWwvLtMeGoD+ZccQ1zN9SCLZbquDw7e/mccnIQ Rt5ywNoLeruQWdMuElswua46/KYqMbBC40DfO16hWivvXZbm0K52z2HvqQJNEd3cgqgO cLCi7kp0LX994vj6mNREQ4P/icJn67/zMKjELxb37VTSFV3NMLYLH2k+F2kAUtQmIRAj RFLI6VTZ6gFYriTwmIxr6KfTnZ4fcsdILXqy8ydJ8bDgPZk1kcNbtbL/pbQNG39+V15p t3p22Hy9dIzdMWcuCCgvEeNghRFwEhbkPiBfFX4Qb+j5zXKWxSQdkJY2gpVesD0E+AOb aBQg== ARC-Authentication-Results: i=1; mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=FI+XjthO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org. [2001:4830:134:3::11]) by mx.google.com with ESMTPS id 73si327585qkb.181.2018.11.09.07.24.07 for (version=TLS1 cipher=AES128-SHA bits=128/128); Fri, 09 Nov 2018 07:24:07 -0800 (PST) Received-SPF: pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) client-ip=2001:4830:134:3::11; Authentication-Results: mx.google.com; dkim=fail header.i=@linaro.org header.s=google header.b=FI+XjthO; spf=pass (google.com: domain of qemu-devel-bounces+patch=linaro.org@nongnu.org designates 2001:4830:134:3::11 as permitted sender) smtp.mailfrom="qemu-devel-bounces+patch=linaro.org@nongnu.org"; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from localhost ([::1]:34722 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gL8di-0004yM-MR for patch@linaro.org; Fri, 09 Nov 2018 10:24:06 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42465) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1gL8bC-0001CS-5r for qemu-devel@nongnu.org; Fri, 09 Nov 2018 10:21:31 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1gL8bA-00030Q-Fm for qemu-devel@nongnu.org; Fri, 09 Nov 2018 10:21:29 -0500 Received: from mail-wr1-x442.google.com ([2a00:1450:4864:20::442]:38703) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1gL8bA-0002xU-2N for qemu-devel@nongnu.org; Fri, 09 Nov 2018 10:21:28 -0500 Received: by mail-wr1-x442.google.com with SMTP id e3-v6so2298968wrs.5 for ; Fri, 09 Nov 2018 07:21:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=BbD6VI0WAZqcOWIe9t90I9j76OAQGf7qYc88DzkrQ3c=; b=FI+XjthORKzHYeHe4nGA+Y9YWreBdHdzRsGQDs7FBNPBbNNrFCm3SkXa0gUznnBGSh Du6yr22CNBYo45afB78+UwI/ce/nX3XKsLIbxc+sC2qG6tSsQ6P1jOR1dWv79YZ2bFev h+xSuGYcmjvXqpcgc9WZwX0oUOj+o2ll01xSI= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=BbD6VI0WAZqcOWIe9t90I9j76OAQGf7qYc88DzkrQ3c=; b=miNwqZTYCpk2/MXcRyVC8k2R3YzN8GY1iFiHxP978cTWvAR91Czzs4dTDKY0ziDPqk y5u+00quBm9fESw7GTofLw4qsTrCzdi6Wdsl3zylkqCkuL8lPSK52SoRk9a2jsncWcYX UAznasla+q5xPO3FLhnqjdbWuMl7PSnTVimn339vJvMJqnJVmT3W114t7522hk0V3fhk ZukQzcPVSy0l1a9hqyLGGI2NdARwtD3dliXhtZWlPs99C81sG9LAa5swEF4VgzXeLe4z Pnjv3z+wGRZawr8A4I7EWpxwpn1vtFcYWCUepXNIWXCFY0g1TTdgcA/IC9jfckywBWfm Bt4w== X-Gm-Message-State: AGRZ1gK0BX7cyokkUA2RqjDdmDbLs7fZqEQOi18qd5n96CZyHK7xA2kX /ifAxpbv1I0SGmT9bYsuLEcK7A== X-Received: by 2002:adf:ef85:: with SMTP id d5-v6mr8126702wro.163.1541776885898; Fri, 09 Nov 2018 07:21:25 -0800 (PST) Received: from zen.linaro.local ([81.128.185.34]) by smtp.gmail.com with ESMTPSA id e10-v6sm2019691wmg.23.2018.11.09.07.21.21 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 09 Nov 2018 07:21:25 -0800 (PST) Received: from zen.linaroharston (localhost [127.0.0.1]) by zen.linaro.local (Postfix) with ESMTP id 9C74B3E05B2; Fri, 9 Nov 2018 15:21:19 +0000 (GMT) From: =?utf-8?q?Alex_Benn=C3=A9e?= To: qemu-devel@nongnu.org Date: Fri, 9 Nov 2018 15:21:19 +0000 Message-Id: <20181109152119.9242-8-alex.bennee@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181109152119.9242-1-alex.bennee@linaro.org> References: <20181109152119.9242-1-alex.bennee@linaro.org> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4864:20::442 Subject: [Qemu-devel] [PATCH v3 7/7] arm: fix aa64_generate_debug_exceptions to work with EL2 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org, =?utf-8?q?Alex_Benn?= =?utf-8?b?w6ll?= Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" The test was incomplete and incorrectly caused debug exceptions to be generated when returning to EL2 after a failed attempt to single-step an EL1 instruction. Fix this while cleaning up the function a little. Signed-off-by: Alex Bennée --- v3 - further re-arrangement as suggested by rth --- target/arm/cpu.h | 39 ++++++++++++++++++++++++--------------- 1 file changed, 24 insertions(+), 15 deletions(-) -- 2.17.1 Reviewed-by: Richard Henderson diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 1efff21a18..814ff69bc2 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -2764,23 +2764,35 @@ static inline bool arm_v7m_csselr_razwi(ARMCPU *cpu) return (cpu->clidr & R_V7M_CLIDR_CTYPE_ALL_MASK) != 0; } +/* See AArch64.GenerateDebugExceptionsFrom() in ARM ARM pseudocode */ static inline bool aa64_generate_debug_exceptions(CPUARMState *env) { - if (arm_is_secure(env)) { - /* MDCR_EL3.SDD disables debug events from Secure state */ - if (extract32(env->cp15.mdcr_el3, 16, 1) != 0 - || arm_current_el(env) == 3) { - return false; - } + int cur_el = arm_current_el(env); + int debug_el; + + if (cur_el == 3) { + return false; } - if (arm_current_el(env) == arm_debug_target_el(env)) { - if ((extract32(env->cp15.mdscr_el1, 13, 1) == 0) - || (env->daif & PSTATE_D)) { - return false; - } + /* MDCR_EL3.SDD disables debug events from Secure state */ + if (arm_is_secure_below_el3(env) + && extract32(env->cp15.mdcr_el3, 16, 1)) { + return false; } - return true; + + /* + * Same EL to same EL debug exceptions need MDSCR_KDE enabled + * while not masking the (D)ebug bit in DAIF. + */ + debug_el = arm_debug_target_el(env); + + if (cur_el == debug_el) { + return extract32(env->cp15.mdscr_el1, 13, 1) + && !(env->daif & PSTATE_D); + } + + /* Otherwise the debug target needs to be a higher EL */ + return debug_el > cur_el; } static inline bool aa32_generate_debug_exceptions(CPUARMState *env) @@ -2833,9 +2845,6 @@ static inline bool aa32_generate_debug_exceptions(CPUARMState *env) * since the pseudocode has it at all callsites except for the one in * CheckSoftwareStep(), where it is elided because both branches would * always return the same value. - * - * Parts of the pseudocode relating to EL2 and EL3 are omitted because we - * don't yet implement those exception levels or their associated trap bits. */ static inline bool arm_generate_debug_exceptions(CPUARMState *env) {