From patchwork Mon Nov 12 07:26:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 150783 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2833374ljp; Sun, 11 Nov 2018 23:26:56 -0800 (PST) X-Google-Smtp-Source: AJdET5dRA/Dz8e0a6B2wqqp547IHn9r405wOGfVgvJ/CYSFDngXb5yROMV9OW8ql8En85exPJwcL X-Received: by 2002:a62:8145:: with SMTP id t66-v6mr19003152pfd.246.1542007616706; Sun, 11 Nov 2018 23:26:56 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542007616; cv=none; d=google.com; s=arc-20160816; b=OsokpjvGqk2MhESPWd7tSB9+DM+QyjOkAhuc0Ra16VbccdMPnvnJcyG9UtgbBp5NdE AGssfext3PmBlBhsUd28EQ+kbAFgZAvWXctCu9DrDvfbUEztRICXsb8d9kjvGLxKRJQq TSyTTj8jdtzgN61MUuGrs0Cj3m5YdyPHwBFbmCHdiozpTtLNbFmXgvgu+FRy2Wtvrbgh jvuAK93QT8vLkNZ0KXvy71bsCHdhcNKbPvCSi/MApG/TUj0ditiCMFKjNLLOqnjC5u1R DXa2IzjjqKoviBEmtDBXq+7kVhT6pCYWE0nLM2yqhASKigSYgCjIPHCsQQwHPcV5W+fq VRLQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=JoYHTM5siDk5a7AXQTh7AMd6iyQB0wQh5rEWFrlv6DI=; b=jnCFi7tm+qTkmbyQUY0cDBAmAHxrwmgt6M6V62V8x3lCQIi791It0WBms1URXZ62/8 aFnYy+DyzQTYOGKmYE6tKRySMSjn/JdBQ4Xe4Pbf0Nb88Z2ol1hPbpUBOdFf950Unz9z FKhSfQN57XIPKOexk8H1vxCdORa6d27+OrTv8/XEjfo7ur8JkAl/x7gtUDsB1/lOmGl6 YRcomwkfL5QQBu98BYy8aYiYAdFAhS8BcNv+Q5lDLupp3Cn7s8daB0iXv3AUCp6xKZ3l vo/VAjflH2AVVsqjA8MyZuYmxnwQqj2762Lh7YodZFqjXQISZbiQBbBIKqgwSLSV0afs GaNQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ST2yAi4P; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id y1-v6si17285871pli.131.2018.11.11.23.26.56; Sun, 11 Nov 2018 23:26:56 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=ST2yAi4P; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727050AbeKLRSo (ORCPT + 5 others); Mon, 12 Nov 2018 12:18:44 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:36668 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727046AbeKLRSo (ORCPT ); Mon, 12 Nov 2018 12:18:44 -0500 Received: by mail-pf1-f193.google.com with SMTP id d13-v6so3888338pfo.3 for ; Sun, 11 Nov 2018 23:26:45 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=JoYHTM5siDk5a7AXQTh7AMd6iyQB0wQh5rEWFrlv6DI=; b=ST2yAi4PZDOMHj7OjB/f/F8TyrRtQNo+4pVDZFLn+OuWQqNjRtNGKcM2ZbD6k4Coy4 HvcM9HZ6MTrYWe+wmJDw1XOKrt4TY1LtDnFKlwCgfPL1h0OtOuNpH0jFgYhfkWVVf99h X699rT71oo9aKh7StFMRyxQ1Mpt3LHRPdhCTQ= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=JoYHTM5siDk5a7AXQTh7AMd6iyQB0wQh5rEWFrlv6DI=; b=pJcRVHO+yf9iPebEOL0n67wlrFZar2FfrouIj+PA7EuG194jYbWiQeWVMAHgqSEh5u 6uQa1vNQ8MbzDHit7nJvKs1+0lwG0KLjM0Hb87Enld23ui1kRy9/EZbB7wYroVfsi5Tq lU8c0Z70FVI/RjjYyJlQlNqOq0pDndIjaWJiSs/P5KyWBML/1edWFxUL3gye9vyY4iWS X2EcqJ3vdi3TcEl+oCGABnwQTrIn65Sofgw7t3riD+k5iZGuUYF/ALRDN4JBa7NfiKFK Xfw/udcK+hjgKNTouiI3PMFjJKrqrlknkJV0L/4KfHHrHo8Jihss9shtF3LFYk1Opw1J 6E3w== X-Gm-Message-State: AGRZ1gJ82oVgTzk6upz3LgmxkgANRceFIpQileu9BiwzreiOB8Xf6iZD ZQ4uFp4G4oIQKV4gSShxPc4fwA== X-Received: by 2002:a62:178c:: with SMTP id 134-v6mr19414929pfx.29.1542007605069; Sun, 11 Nov 2018 23:26:45 -0800 (PST) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id w2-v6sm18668331pfn.89.2018.11.11.23.26.41 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 11 Nov 2018 23:26:44 -0800 (PST) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Mark Brown , Kishon Vijay Abraham I , Sekhar Nori , Chunyan Zhang Subject: [PATCH v2 1/3] mmc: sdhci: add support for using external DMA devices Date: Mon, 12 Nov 2018 15:26:04 +0800 Message-Id: <1542007566-9449-2-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1542007566-9449-1-git-send-email-zhang.chunyan@linaro.org> References: <1542007566-9449-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org Some standard SD host controllers can support both external dma controllers as well as ADMA/SDMA in which the SD host controller acts as DMA master. TI's omap controller is the case as an example. Currently the generic SDHCI code supports ADMA/SDMA integrated in the host controller but does not have any support for external DMA controllers implemented using dmaengine, meaning that custom code is needed for any systems that use an external DMA controller with SDHCI. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/Kconfig | 13 ++++ drivers/mmc/host/sdhci.c | 181 ++++++++++++++++++++++++++++++++++++++++++++++- drivers/mmc/host/sdhci.h | 8 +++ 3 files changed, 201 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 1b58739..7bf3eff 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -977,3 +977,16 @@ config MMC_SDHCI_OMAP If you have a controller with this interface, say Y or M here. If unsure, say N. + +config MMC_SDHCI_EXTERNAL_DMA + bool "Support external DMA in standard SD host controller" + depends on MMC_SDHCI + depends on DMA_ENGINE + help + This is an option for using external DMA device via dmaengine + framework. + + If you have a controller which support using external DMA device + for data transfer, can say Y. + + If unsure, say N. diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 99bdae5..853cc98 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -1309,6 +1310,158 @@ static void sdhci_del_timer(struct sdhci_host *host, struct mmc_request *mrq) del_timer(&host->timer); } +#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTERNAL_DMA) +static int sdhci_external_dma_init(struct sdhci_host *host) +{ + int ret = 0; + struct mmc_host *mmc = host->mmc; + + host->tx_chan = dma_request_chan(mmc->parent, "tx"); + if (IS_ERR(host->tx_chan)) { + ret = PTR_ERR(host->tx_chan); + if (ret != -EPROBE_DEFER) + pr_warn("Failed to request TX DMA channel.\n"); + host->tx_chan = NULL; + return ret; + } + + host->rx_chan = dma_request_chan(mmc->parent, "rx"); + if (IS_ERR(host->rx_chan)) { + if (host->tx_chan) { + dma_release_channel(host->tx_chan); + host->tx_chan = NULL; + } + + ret = PTR_ERR(host->rx_chan); + if (ret != -EPROBE_DEFER) + pr_warn("Failed to request RX DMA channel.\n"); + host->rx_chan = NULL; + } + + return ret; +} + +static inline struct dma_chan * +sdhci_external_dma_channel(struct sdhci_host *host, struct mmc_data *data) +{ + return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; +} + +static int sdhci_external_dma_setup(struct sdhci_host *host, + struct mmc_command *cmd) +{ + int ret = 0, i; + struct dma_async_tx_descriptor *desc; + struct mmc_data *data = cmd->data; + struct dma_chan *chan; + struct dma_slave_config cfg; + dma_cookie_t cookie; + + if (!host->mapbase) + return -EINVAL; + + cfg.src_addr = host->mapbase + SDHCI_BUFFER; + cfg.dst_addr = host->mapbase + SDHCI_BUFFER; + cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + cfg.src_maxburst = data->blksz / 4; + cfg.dst_maxburst = data->blksz / 4; + + /* Sanity check: all the SG entries must be aligned by block size. */ + for (i = 0; i < data->sg_len; i++) { + if ((data->sg + i)->length % data->blksz) + return -EINVAL; + } + + chan = sdhci_external_dma_channel(host, data); + + ret = dmaengine_slave_config(chan, &cfg); + if (ret) + return ret; + + desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, + mmc_get_dma_dir(data), + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc) + return -EINVAL; + + desc->callback = NULL; + desc->callback_param = NULL; + + cookie = dmaengine_submit(desc); + if (cookie < 0) + ret = cookie; + + return ret; +} + +static void sdhci_external_dma_release(struct sdhci_host *host) +{ + if (host->tx_chan) { + dma_release_channel(host->tx_chan); + host->tx_chan = NULL; + } + + if (host->rx_chan) { + dma_release_channel(host->rx_chan); + host->rx_chan = NULL; + } + + sdhci_switch_external_dma(host, false); +} + +static void sdhci_external_dma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + if (sdhci_external_dma_setup(host, cmd)) { + sdhci_external_dma_release(host); + pr_err("%s: Failed to setup external DMA, switch to the DMA/PIO which standard SDHCI provides.\n", + mmc_hostname(host->mmc)); + } else { + /* Prepare for using external dma */ + host->flags |= SDHCI_REQ_USE_DMA; + } + + sdhci_prepare_data(host, cmd); +} + +static void sdhci_external_dma_pre_transfer(struct sdhci_host *host, + struct mmc_command *cmd) +{ + struct dma_chan *chan = sdhci_external_dma_channel(host, cmd->data); + + if (cmd->opcode != MMC_SET_BLOCK_COUNT) { + sdhci_set_timeout(host, cmd); + dma_async_issue_pending(chan); + } +} +#else +static int sdhci_external_dma_init(struct sdhci_host *host) +{ + return 0; +} + +static void sdhci_external_dma_release(struct sdhci_host *host) +{} + +static void sdhci_external_dma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + /* If SDHCI_EXTDMA not supported, PIO will be used */ + sdhci_prepare_data(host, cmd); +} + +static void sdhci_external_dma_pre_transfer(struct sdhci_host *host, + struct mmc_command *cmd) +{} +#endif + +void sdhci_switch_external_dma(struct sdhci_host *host, bool en) +{ + host->use_external_dma = en; +} +EXPORT_SYMBOL_GPL(sdhci_switch_external_dma); + void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) { int flags; @@ -1355,7 +1508,10 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) host->data_cmd = cmd; } - sdhci_prepare_data(host, cmd); + if (host->use_external_dma) + sdhci_external_dma_prepare_data(host, cmd); + else + sdhci_prepare_data(host, cmd); sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); @@ -1397,6 +1553,9 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) timeout += 10 * HZ; sdhci_mod_timer(host, cmd->mrq, timeout); + if (host->use_external_dma) + sdhci_external_dma_pre_transfer(host, cmd); + sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); } EXPORT_SYMBOL_GPL(sdhci_send_command); @@ -4133,6 +4292,19 @@ int sdhci_setup_host(struct sdhci_host *host) return ret; } + if (host->use_external_dma) { + ret = sdhci_external_dma_init(host); + if (ret == -EPROBE_DEFER) + goto unreg; + + /* + * Fall back to use the DMA/PIO integrated in standard SDHCI + * instead of external DMA devices. + */ + if (ret) + sdhci_switch_external_dma(host, false); + } + return 0; unreg: @@ -4161,6 +4333,10 @@ void sdhci_cleanup_host(struct sdhci_host *host) dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + host->adma_table_sz, host->align_buffer, host->align_addr); + + if (host->use_external_dma) + sdhci_external_dma_release(host); + host->adma_table = NULL; host->align_buffer = NULL; } @@ -4295,6 +4471,9 @@ void sdhci_remove_host(struct sdhci_host *host, int dead) host->adma_table_sz, host->align_buffer, host->align_addr); + if (host->use_external_dma) + sdhci_external_dma_release(host); + host->adma_table = NULL; host->align_buffer = NULL; } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index b001cf4..8e50a97 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -475,6 +475,7 @@ struct sdhci_host { int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ + phys_addr_t mapbase; /* physical address base */ char *bounce_buffer; /* For packing SDMA reads/writes */ dma_addr_t bounce_addr; unsigned int bounce_buffer_size; @@ -524,6 +525,7 @@ struct sdhci_host { bool pending_reset; /* Cmd/data reset is pending */ bool irq_wake_enabled; /* IRQ wakeup is enabled */ bool v4_mode; /* Host Version 4 Enable */ + bool use_external_dma; struct mmc_request *mrqs_done[SDHCI_MAX_MRQS]; /* Requests done */ struct mmc_command *cmd; /* Current command */ @@ -552,6 +554,11 @@ struct sdhci_host { struct timer_list timer; /* Timer for timeouts */ struct timer_list data_timer; /* Timer for data timeouts */ +#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTERNAL_DMA) + struct dma_chan *rx_chan; + struct dma_chan *tx_chan; +#endif + u32 caps; /* CAPABILITY_0 */ u32 caps1; /* CAPABILITY_1 */ bool read_caps; /* Capability flags have been read */ @@ -785,5 +792,6 @@ void sdhci_start_tuning(struct sdhci_host *host); void sdhci_end_tuning(struct sdhci_host *host); void sdhci_reset_tuning(struct sdhci_host *host); void sdhci_send_tuning(struct sdhci_host *host, u32 opcode); +void sdhci_switch_external_dma(struct sdhci_host *host, bool en); #endif /* __SDHCI_HW_H */ From patchwork Mon Nov 12 07:26:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 150784 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2833409ljp; Sun, 11 Nov 2018 23:26:59 -0800 (PST) X-Google-Smtp-Source: AJdET5eYFOW8I5KJVAXlqCMIQDnEauyTNBz7Vo4sKn4aC1YzdCghkjXq5Ac0FZK1BFgj3RqXTYMU X-Received: by 2002:a63:d846:: with SMTP id k6mr16896186pgj.251.1542007619705; Sun, 11 Nov 2018 23:26:59 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542007619; cv=none; d=google.com; s=arc-20160816; b=sJfpkq2mqF8F7bWZ19n6qI2ReQQeQE9bNvuaJTBbcGzNOZ9Q13ao5tawTflKG/fGzq lOO+nzv/AR3vtaegffLRLyU8Z/fWCAahFETJh9X8Yw2XjHTFL0FXpQCBeTIus9As13XK ymaE/Tt8xV2Q1JwfnGbJTrlfeMiaw1ansrIDTOYwxXJCG5SBozrYed3K1J8y6FZEJa6C qSVPuekFp6PsA35DdsUNYZMlDLq4XTHC/Lh4EiuEY+cvW5vOROHfV1eKkKikrWOKcMez oRVehQQKtGm5cngAeAmP9Ma3Z2R4mlix3KeTXLlXRD+ZFwBKIrlTL2O8Ui9M95laTyFX rjKQ== ARC-Message-Signature: i=1; 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[209.132.180.67]) by mx.google.com with ESMTP id a18si16451712pgj.77.2018.11.11.23.26.59; Sun, 11 Nov 2018 23:26:59 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=IIygXA0t; spf=pass (google.com: best guess record for domain of linux-mmc-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-mmc-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727134AbeKLRS4 (ORCPT + 5 others); Mon, 12 Nov 2018 12:18:56 -0500 Received: from mail-pf1-f193.google.com ([209.85.210.193]:45566 "EHLO mail-pf1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727133AbeKLRS4 (ORCPT ); Mon, 12 Nov 2018 12:18:56 -0500 Received: by mail-pf1-f193.google.com with SMTP id g62so620819pfd.12 for ; Sun, 11 Nov 2018 23:26:57 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=n0shTLWVLOWZOTUoAQC89gB739nczZpYRMifTlqhkHs=; b=IIygXA0tF9qJAE2izQ37wk1wcPh87EQXM16RBKrjk9N+p1Mw5MDagA9ZZeN6jARZuj GzQJjqynG15eJ+1gkowjAU9KlzV4lkekuHnfcEnPLhrzxANGyG7+cmpQsGvmCMxFmEEQ fMqE+T6xEHykx96tzZqb5T8FwB6zp2W8KE3k4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=n0shTLWVLOWZOTUoAQC89gB739nczZpYRMifTlqhkHs=; b=oU4S+BcTU+auCYBtwNl0qUbrMjJ6CqZ3aNX1TYmTBhBTLkpeM/0QU/W3+1h4LQT/as 1joTvbwuMYQ0Bss7Rl0/9UccHfFANPOFH4mM1r+U2QRUYHLF//7whn2+Wb103Q2UcvuL cc7+wKriFgoDx2jOR4Mi9sSDTWNh9pksstna57mnToOVrm+kEB1uc7cCjcRoniaAS7wj 3Hn+u4xfVFQ7cdWxfo+jlb2LP2KFtANYc+yZ9El9jo5nXP900a3TQ9CT3o9vU+G+xjYZ SBZFKl9mXg01yra5BhguEhdsTBBz9uMJBypZgZwlPWppbESmYobVTbPBurPoiCYa4U1q 8Q7g== X-Gm-Message-State: AGRZ1gLxeQfXY0Am/isnTLJDv2wR2zScLUAOji/gdsAbGcWSJBlaxE7C XcYzJXx8FyKehC43tSU/R3gOnQ== X-Received: by 2002:a62:b802:: with SMTP id p2-v6mr18830394pfe.1.1542007617556; Sun, 11 Nov 2018 23:26:57 -0800 (PST) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id w2-v6sm18668331pfn.89.2018.11.11.23.26.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 11 Nov 2018 23:26:56 -0800 (PST) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Mark Brown , Kishon Vijay Abraham I , Sekhar Nori , Chunyan Zhang Subject: [PATCH v2 2/3] mmc: sdhci-omap: Add using external dma Date: Mon, 12 Nov 2018 15:26:05 +0800 Message-Id: <1542007566-9449-3-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1542007566-9449-1-git-send-email-zhang.chunyan@linaro.org> References: <1542007566-9449-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-mmc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-mmc@vger.kernel.org sdhci-omap can support both external dma controller via dmaengine framework as well as ADMA which standard SD host controller provides. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/sdhci-omap.c | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c index 88347ce..ccc79f2 100644 --- a/drivers/mmc/host/sdhci-omap.c +++ b/drivers/mmc/host/sdhci-omap.c @@ -896,6 +896,7 @@ static int sdhci_omap_probe(struct platform_device *pdev) const struct of_device_id *match; struct sdhci_omap_data *data; const struct soc_device_attribute *soc; + struct resource *regs; match = of_match_device(omap_sdhci_match, dev); if (!match) @@ -908,6 +909,10 @@ static int sdhci_omap_probe(struct platform_device *pdev) } offset = data->offset; + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!regs) + return -ENXIO; + host = sdhci_pltfm_init(pdev, &sdhci_omap_pdata, sizeof(*omap_host)); if (IS_ERR(host)) { @@ -924,6 +929,7 @@ static int sdhci_omap_probe(struct platform_device *pdev) omap_host->timing = MMC_TIMING_LEGACY; omap_host->flags = data->flags; host->ioaddr += offset; + host->mapbase = regs->start; mmc = host->mmc; sdhci_get_of_property(pdev); @@ -991,6 +997,7 @@ static int sdhci_omap_probe(struct platform_device *pdev) host->mmc_host_ops.execute_tuning = sdhci_omap_execute_tuning; host->mmc_host_ops.enable_sdio_irq = sdhci_omap_enable_sdio_irq; + sdhci_switch_external_dma(host, true); ret = sdhci_setup_host(host); if (ret) goto err_put_sync;