From patchwork Thu Dec 16 08:12:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 525905 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99652C433F5 for ; Thu, 16 Dec 2021 08:12:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234759AbhLPIMy (ORCPT ); Thu, 16 Dec 2021 03:12:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39244 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234756AbhLPIMy (ORCPT ); Thu, 16 Dec 2021 03:12:54 -0500 Received: from mail-pf1-x434.google.com (mail-pf1-x434.google.com [IPv6:2607:f8b0:4864:20::434]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id E0189C06173E for ; Thu, 16 Dec 2021 00:12:53 -0800 (PST) Received: by mail-pf1-x434.google.com with SMTP id r130so23047398pfc.1 for ; Thu, 16 Dec 2021 00:12:53 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yWUSbQkUZgDm9ckwYIe35qZ3PIrJiDFyNemu6s/fd2E=; b=FRXhyJuBoTMxVd5LAWqdvfUzkDyN+7jzR/O+GywEVib83JRPY8vjpaiNycyhx6wHA1 ot+4hMRW2qzeG2dpe+T6fapQdm1Js1mBEVshNj5dVqbjpiQawDLGHZLTGT9NRpmJvVrZ RhAQREdlIarlL01nCA3gJ0ClMJbIxQ+RjEtiKtwNe9m86E0cItzs0h1h1WDgTbRo1Toh zHteh9kVymtEuXP/Nz+21YmjIREHqj+CCMIA9rMNhaHNWVQ976A+0o1bBQqAQjkEVaId 3x3X9h4d86z+pHrfaELJwyMMxH32/k2T4hWEc+7M3EY7563b/+oh+jfAkJL3m0jd8rka 62zg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yWUSbQkUZgDm9ckwYIe35qZ3PIrJiDFyNemu6s/fd2E=; b=SFOueBWnIOnQrVFoJooELqjiBff0aBE8DKSdaNAtfXAzcJ33UhXPdXJkoOHKDRAsP0 k3y5MMbtdu8yF/49WXkonY0vYaCYjzuQ9/d/3Ro+1D3O9nMCgYiI9nq1qgDIWzdHNe88 LQvfsV5tN4qj69Ra9ClqObcnrBmq6tV/WWNuJ4RoVzDOD7lgMpDuxJYJvBw8Xji+Z7l6 FqkzcTbzKckTJaXIA5yhBk7i6OkRkhoSi0jscE3yX724irtReOWJfM9Tz2tpxbOXmd4U pxlguYWjrLvgfMtAGsYppZGjeP1WlecfkVfAwtrCxU+rF8xjDza61klsifenMkkyXQNA YZ+Q== X-Gm-Message-State: AOAM530JOC5ug9LUbSqrSP5XxNVc/VhJPNLzCFoKvg+CmF4oI8UX0SZd ABGgW9Mhk3qak2jxdUtZSm8u X-Google-Smtp-Source: ABdhPJxRZZowfM5tExkh5SMVDVfPFBEzU7WF1rUQGWy6g6uuTEUjLFGt3HKVAme2I4cnunfcbAECLw== X-Received: by 2002:a05:6a00:2405:b0:4a8:3294:743e with SMTP id z5-20020a056a00240500b004a83294743emr12772894pfh.61.1639642373351; Thu, 16 Dec 2021 00:12:53 -0800 (PST) Received: from localhost.localdomain ([117.193.208.121]) by smtp.gmail.com with ESMTPSA id u38sm326835pfg.4.2021.12.16.00.12.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 00:12:52 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam , Manivannan Sadhasivam Subject: [PATCH 01/10] bus: mhi: pci_generic: Add new device ID support for T99W175 Date: Thu, 16 Dec 2021 13:42:18 +0530 Message-Id: <20211216081227.237749-2-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Slark Xiao Add new device ID 0xe0bf for T99W175. This device ID is created because it is using Qualcomm SDX55 new base line. Test evidence as below: root@jbd-ThinkPad-P1-Gen-4:/dev# lspci -nn | grep Foxconn 0000:08:00.0 Wireless controller [0d40]: Foxconn International, Inc. Device [105b:e0bf] root@jbd-ThinkPad-P1-Gen-4:/dev# cat wwan0at0 & echo -ne "ati\r" > wwan0at0 [2] 2977 root@jbd-ThinkPad-P1-Gen-4:/dev# ati Manufacturer: Qualcomm Model: T99W175 Revision: T99W175.F0.6.0.0.6.CC.005 1 [Oct 21 2021 10:00:00] IMEI: +GCAP: +CGSM OK Signed-off-by: Slark Xiao Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20211029104918.3976-1-slark_xiao@163.com Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 59a4896a8030..94d8aa9c2eae 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -423,6 +423,9 @@ static const struct pci_device_id mhi_pci_id_table[] = { /* DW5930e (sdx55), Non-eSIM, It's also T99W175 */ { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0b1), .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info }, + /* T99W175 (sdx55), Based on Qualcomm new baseline */ + { PCI_DEVICE(PCI_VENDOR_ID_FOXCONN, 0xe0bf), + .driver_data = (kernel_ulong_t) &mhi_foxconn_sdx55_info }, /* MV31-W (Cinterion) */ { PCI_DEVICE(0x1269, 0x00b3), .driver_data = (kernel_ulong_t) &mhi_mv31_info }, From patchwork Thu Dec 16 08:12:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 524615 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5940FC433EF for ; Thu, 16 Dec 2021 08:13:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234776AbhLPINA (ORCPT ); Thu, 16 Dec 2021 03:13:00 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39288 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234763AbhLPINA (ORCPT ); Thu, 16 Dec 2021 03:13:00 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id BD7E9C061747 for ; Thu, 16 Dec 2021 00:12:59 -0800 (PST) Received: by mail-pj1-x1029.google.com with SMTP id a11-20020a17090a854b00b001b11aae38d6so2474500pjw.2 for ; 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Thu, 16 Dec 2021 00:12:59 -0800 (PST) Received: from localhost.localdomain ([117.193.208.121]) by smtp.gmail.com with ESMTPSA id u38sm326835pfg.4.2021.12.16.00.12.53 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 00:12:58 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam , stable@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH 02/10] bus: mhi: pci_generic: Graceful shutdown on freeze Date: Thu, 16 Dec 2021 13:42:19 +0530 Message-Id: <20211216081227.237749-3-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Loic Poulain There is no reason for shutting down MHI ungracefully on freeze, this causes the MHI host stack & device stack to not be aligned anymore since the proper MHI reset sequence is not performed for ungraceful shutdown. Fixes: 5f0c2ee1fe8d ("bus: mhi: pci-generic: Fix hibernation") Suggested-by: Bhaumik Bhatt Signed-off-by: Loic Poulain Reviewed-by: Bhaumik Bhatt Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1635268180-13699-1-git-send-email-loic.poulain@linaro.org Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 94d8aa9c2eae..4f72bbcc53c9 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -1021,7 +1021,7 @@ static int __maybe_unused mhi_pci_freeze(struct device *dev) * context. */ if (test_and_clear_bit(MHI_PCI_DEV_STARTED, &mhi_pdev->status)) { - mhi_power_down(mhi_cntrl, false); + mhi_power_down(mhi_cntrl, true); mhi_unprepare_after_power_down(mhi_cntrl); } From patchwork Thu Dec 16 08:12:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 525904 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5AC9C433EF for ; Thu, 16 Dec 2021 08:13:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234803AbhLPINH (ORCPT ); Thu, 16 Dec 2021 03:13:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39322 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234797AbhLPINE (ORCPT ); Thu, 16 Dec 2021 03:13:04 -0500 Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5DF95C061401 for ; Thu, 16 Dec 2021 00:13:04 -0800 (PST) Received: by mail-pf1-x432.google.com with SMTP id z6so22992725pfe.7 for ; Thu, 16 Dec 2021 00:13:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=1TchYC2sYvNDw2sG9vaLQfrSXPEIwDInNL253k++9l4=; b=bGBm2Wy/feTua+RHoRemV8rmgAZ2aW+ZytxgZkiBOjsEcETcoLCQP33QMVziyxSWpp AepkzMqupXFXnx0iY/qFCKB2ZTY3t/rrWpDO/K4I5JfVS/f3A1K8glTE+MnyDhE6aUlm gfC36BL3hN20M9kqNYnrdd/9sXRudOowNkPI1S5T5ST67zjrESE+wcckAi8TvdsdF/Yz vp+F2UnCXnUpeDtev6Ak7QafEUCkcW0tHvblYxplUxxfXCxP7/opgfN+ZypBj8mlBgMs hQwLQZE8RRb7GMjC4NQ+8goTPHCcyLF1/BJw/Uz3Yj3Xu+IQsEzJEByF0/SrRoodSRGV x/+w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=1TchYC2sYvNDw2sG9vaLQfrSXPEIwDInNL253k++9l4=; b=En7665Vrn3lUgQIpQcmiP84w8T06YZ7u6oKdAd6yk/iNG2qi4Nwsiwmdm+PJ33VnlU K0MMlJEdGq9e18YslhghRV+JXFEvy0YZLt6UCu+9O8QRCRhPclYWe7DiYrLF17/cObKf U5N02oouvowG541Ukyi7C//Pd49OAj9ezEfRckkduCB628sv7ksh4ki8BTXMUXnqOzKn XLrZxrXnQ5zHZfmNHbI60xPadHDHe8AkPjhMuo1MdfUYKkHiatu4U809Sqt+6YBp/Bui oanvwDvv0Xhby0NpcUWLfHIDqHaV3GVMpzDQrQ/61LVOt+f3mjwX5q3CUeQyRdlLhZyO f59g== X-Gm-Message-State: AOAM531NMWYH5vhVwlycvqaSnRn4hBoZGugv2FvSVEocPQc7rvqZ8MEc 6BaHrTTND9/muueVAhaUP7w4 X-Google-Smtp-Source: ABdhPJys1rR+Lt0muXfAPojG0n6xSytqNpvra5kWtXmE5nufJBcqoIjzfjNtN0rlljaH0GpF+myC3g== X-Received: by 2002:a62:8c55:0:b0:49f:df22:c4ca with SMTP id m82-20020a628c55000000b0049fdf22c4camr12961488pfd.11.1639642383837; Thu, 16 Dec 2021 00:13:03 -0800 (PST) Received: from localhost.localdomain ([117.193.208.121]) by smtp.gmail.com with ESMTPSA id u38sm326835pfg.4.2021.12.16.00.12.59 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 00:13:03 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH 03/10] bus: mhi: core: Use macros for execution environment features Date: Thu, 16 Dec 2021 13:42:20 +0530 Message-Id: <20211216081227.237749-4-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Bhaumik Bhatt The implementation for execution environment specific functionality is spread out. Use macros that help determine the paths to be taken. Signed-off-by: Bhaumik Bhatt Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/1636409978-31847-1-git-send-email-quic_bbhatt@quicinc.com Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/boot.c | 2 +- drivers/bus/mhi/core/internal.h | 3 ++- drivers/bus/mhi/core/pm.c | 2 +- 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/bus/mhi/core/boot.c b/drivers/bus/mhi/core/boot.c index 0a972620a403..74295d3cc662 100644 --- a/drivers/bus/mhi/core/boot.c +++ b/drivers/bus/mhi/core/boot.c @@ -417,7 +417,7 @@ void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl) } /* wait for ready on pass through or any other execution environment */ - if (mhi_cntrl->ee != MHI_EE_EDL && mhi_cntrl->ee != MHI_EE_PBL) + if (!MHI_FW_LOAD_CAPABLE(mhi_cntrl->ee)) goto fw_load_ready_state; fw_name = (mhi_cntrl->ee == MHI_EE_EDL) ? diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h index 3a732afaf73e..9d72b1d1e986 100644 --- a/drivers/bus/mhi/core/internal.h +++ b/drivers/bus/mhi/core/internal.h @@ -390,7 +390,8 @@ extern const char * const mhi_ee_str[MHI_EE_MAX]; #define MHI_IN_PBL(ee) (ee == MHI_EE_PBL || ee == MHI_EE_PTHRU || \ ee == MHI_EE_EDL) - +#define MHI_POWER_UP_CAPABLE(ee) (MHI_IN_PBL(ee) || ee == MHI_EE_AMSS) +#define MHI_FW_LOAD_CAPABLE(ee) (ee == MHI_EE_PBL || ee == MHI_EE_EDL) #define MHI_IN_MISSION_MODE(ee) (ee == MHI_EE_AMSS || ee == MHI_EE_WFW || \ ee == MHI_EE_FP) diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index fb99e3727155..0bb8d77515e3 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -1068,7 +1068,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) write_unlock_irq(&mhi_cntrl->pm_lock); /* Confirm that the device is in valid exec env */ - if (!MHI_IN_PBL(current_ee) && current_ee != MHI_EE_AMSS) { + if (!MHI_POWER_UP_CAPABLE(current_ee)) { dev_err(dev, "%s is not a valid EE for power on\n", TO_MHI_EXEC_STR(current_ee)); ret = -EIO; From patchwork Thu Dec 16 08:12:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 524614 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5306CC433F5 for ; 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Thu, 16 Dec 2021 00:13:08 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam Subject: [PATCH 04/10] bus: mhi: core: Minor style and comment fixes Date: Thu, 16 Dec 2021 13:42:21 +0530 Message-Id: <20211216081227.237749-5-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org This patch fixes the below checkpatch warnings in MHI bus: WARNING: Possible repeated word: 'events' + /* Process ctrl events events */ WARNING: Missing a blank line after declarations + struct mhi_buf_info info = { }; + buf = kmalloc(len, GFP_KERNEL); WARNING: Move const after static - use 'static const struct mhi_pm_transitions' +static struct mhi_pm_transitions const dev_state_transitions[] = { Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/main.c | 3 ++- drivers/bus/mhi/core/pm.c | 2 +- 2 files changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index b15c5bc37dd4..930aba666b67 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -1065,7 +1065,7 @@ void mhi_ctrl_ev_task(unsigned long data) return; } - /* Process ctrl events events */ + /* Process ctrl events */ ret = mhi_event->process_event(mhi_cntrl, mhi_event, U32_MAX); /* @@ -1464,6 +1464,7 @@ int mhi_prepare_channel(struct mhi_controller *mhi_cntrl, while (nr_el--) { void *buf; struct mhi_buf_info info = { }; + buf = kmalloc(len, GFP_KERNEL); if (!buf) { ret = -ENOMEM; diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index 0bb8d77515e3..7464f5d09973 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -42,7 +42,7 @@ * L3: LD_ERR_FATAL_DETECT <--> LD_ERR_FATAL_DETECT * LD_ERR_FATAL_DETECT -> DISABLE */ -static struct mhi_pm_transitions const dev_state_transitions[] = { +static const struct mhi_pm_transitions dev_state_transitions[] = { /* L0 States */ { MHI_PM_DISABLE, From patchwork Thu Dec 16 08:12:22 2021 Content-Type: text/plain; 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Thu, 16 Dec 2021 00:13:14 -0800 (PST) Received: from localhost.localdomain ([117.193.208.121]) by smtp.gmail.com with ESMTPSA id u38sm326835pfg.4.2021.12.16.00.13.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 00:13:13 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam , Manivannan Sadhasivam Subject: [PATCH 05/10] bus: mhi: pci_generic: Simplify code and axe the use of a deprecated API Date: Thu, 16 Dec 2021 13:42:22 +0530 Message-Id: <20211216081227.237749-6-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Christophe JAILLET The wrappers in include/linux/pci-dma-compat.h should go away. Replace 'pci_set_dma_mask/pci_set_consistent_dma_mask' by an equivalent and less verbose 'dma_set_mask_and_coherent()' call. Signed-off-by: Christophe JAILLET Reviewed-by: Hemant Kumar Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/bb3dc436fe142309a2334549db782c5ebb80a2be.1625718497.git.christophe.jaillet@wanadoo.fr Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 8 +------- 1 file changed, 1 insertion(+), 7 deletions(-) diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 4f72bbcc53c9..9ef41354237c 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -532,18 +532,12 @@ static int mhi_pci_claim(struct mhi_controller *mhi_cntrl, mhi_cntrl->regs = pcim_iomap_table(pdev)[bar_num]; mhi_cntrl->reg_len = pci_resource_len(pdev, bar_num); - err = pci_set_dma_mask(pdev, dma_mask); + err = dma_set_mask_and_coherent(&pdev->dev, dma_mask); if (err) { dev_err(&pdev->dev, "Cannot set proper DMA mask\n"); return err; } - err = pci_set_consistent_dma_mask(pdev, dma_mask); - if (err) { - dev_err(&pdev->dev, "set consistent dma mask failed\n"); - return err; - } - pci_set_master(pdev); return 0; From patchwork Thu Dec 16 08:12:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 524613 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76EA7C433EF for ; Thu, 16 Dec 2021 08:13:24 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234801AbhLPINX (ORCPT ); Thu, 16 Dec 2021 03:13:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39416 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234830AbhLPINU (ORCPT ); Thu, 16 Dec 2021 03:13:20 -0500 Received: from mail-pj1-x1029.google.com (mail-pj1-x1029.google.com [IPv6:2607:f8b0:4864:20::1029]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9FA27C06173E for ; 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Add the missing entry to ensure channel is correctly specified as a 'wake-capable' channel. Fixes: 0cbf260820fa ("bus: mhi: core: Add support for registering MHI controllers") Signed-off-by: Bhaumik Bhatt Reviewed-by: Manivannan Sadhasivam Cc: stable@vger.kernel.org Link: https://lore.kernel.org/r/1638320491-13382-1-git-send-email-quic_bbhatt@quicinc.com Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/init.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index 5aaca6d0f52b..f1ec34417592 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -788,6 +788,7 @@ static int parse_ch_cfg(struct mhi_controller *mhi_cntrl, mhi_chan->offload_ch = ch_cfg->offload_channel; mhi_chan->db_cfg.reset_req = ch_cfg->doorbell_mode_switch; mhi_chan->pre_alloc = ch_cfg->auto_queue; + mhi_chan->wake_capable = ch_cfg->wake_capable; /* * If MHI host allocates buffers, then the channel direction From patchwork Thu Dec 16 08:12:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 525902 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7FCC2C433EF for ; Thu, 16 Dec 2021 08:13:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234832AbhLPINa (ORCPT ); Thu, 16 Dec 2021 03:13:30 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39464 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234855AbhLPIN2 (ORCPT ); Thu, 16 Dec 2021 03:13:28 -0500 Received: from mail-pl1-x62d.google.com (mail-pl1-x62d.google.com [IPv6:2607:f8b0:4864:20::62d]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA0F9C061748 for ; Thu, 16 Dec 2021 00:13:25 -0800 (PST) Received: by mail-pl1-x62d.google.com with SMTP id u11so18849435plf.3 for ; Thu, 16 Dec 2021 00:13:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=enNvAidD7aC1MSQe5kOL/Uwk02cQQ2m1aOWlTzGJAQU=; b=QESxoDtBBXJwq0idcsyzVJiP5Xgi15Hl+mYL2yzNHK8FoVf+XgWIIhgSeJb+uQ2lwT BvLzlmXmUcsza25QUAlhHSbSxXQ4QZWx4Jypfq0l6pM/pZCoT8ZsON8ZtD6FOKYoJQu1 jzXCVLAFTX8b/viIkeznC3Q0f/dGrhHLzBThyVuihiHi3qt32oMqRFIw+oouvM18T94u CvypPQOla11GhxWekfkUxtcX9ENOWiapIiumxShhp9FAU2B0wH+WGsvNUoSgiUtdj2Xl fyYOZH1KcJrzoMUfWFEEBEplC2E7xgg9hBMSmxIbm4Q25uyHBgbeyysoMg15+PP5fu3l jtIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=enNvAidD7aC1MSQe5kOL/Uwk02cQQ2m1aOWlTzGJAQU=; b=4coKxWhDpE01DloSKuRWKAfowvClXsccbG/CEwO+Q+l2jG4YWHBhfb5ZaZQtCbe61T AtVOv66yk7Qm7qbqebYybr/kz3U6hxa7PUdPVr0y60aYuEuJw3VzNRdSJB4iewthgASq brOLdUT4M/BoTKZ3Vt144NQqW4kFp8+h0TLH9V9vs/8JNd+/Jvyf2SppmljBYtSUNzOh bFuYiuQi0wJzJJGNU3rRzlxVgFnKAWtWMT39x9IdMbdwY/PtEXRkq6XQuZGieobDxGru yMieBtlijUeetywHMSEPT0FPq1Bp+HB+NyeFTfkT9RCrMS4NxMOXXHBUNgYN6VjK272Y Tt4w== X-Gm-Message-State: AOAM533lMiZKGgQu4fQR8OFeiR62BYZIGtqCfVrb2x2fNPqw9SUUm22V KQ7zHXdi0ALvEu3patn8Jcpa X-Google-Smtp-Source: ABdhPJwlReClAX9+UMTwttFpEG/42fmLGQdm2dkTiZlLNsC/iQnt2ITEHo589IPN6Cc856LjR77ZJQ== X-Received: by 2002:a17:902:e750:b0:148:a2e8:277b with SMTP id p16-20020a170902e75000b00148a2e8277bmr8449380plf.130.1639642405385; Thu, 16 Dec 2021 00:13:25 -0800 (PST) Received: from localhost.localdomain ([117.193.208.121]) by smtp.gmail.com with ESMTPSA id u38sm326835pfg.4.2021.12.16.00.13.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 00:13:25 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam , stable@vger.kernel.org Subject: [PATCH 07/10] bus: mhi: core: Fix race while handling SYS_ERR at power up Date: Thu, 16 Dec 2021 13:42:24 +0530 Message-Id: <20211216081227.237749-8-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org During SYS_ERR condition, as a response to the MHI_RESET from host, some devices tend to issue BHI interrupt without clearing the SYS_ERR state in the device. This creates a race condition and causes a failure in booting up the device. The issue is seen on the Sierra Wireless EM9191 modem during SYS_ERR handling in mhi_async_power_up(). Once the host detects that the device is in SYS_ERR state, it issues MHI_RESET and waits for the device to process the reset request. During this time, the device triggers the BHI interrupt to the host without clearing SYS_ERR condition. So the host starts handling the SYS_ERR condition again. To fix this issue, let's register the IRQ handler only after handling the SYS_ERR check to avoid getting spurious IRQs from the device. Cc: stable@vger.kernel.org Fixes: e18d4e9fa79b ("bus: mhi: core: Handle syserr during power_up") Reported-by: Aleksander Morgado Tested-by: Aleksander Morgado Tested-by: Thomas Perrot Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/pm.c | 35 ++++++++++++----------------------- 1 file changed, 12 insertions(+), 23 deletions(-) diff --git a/drivers/bus/mhi/core/pm.c b/drivers/bus/mhi/core/pm.c index 7464f5d09973..9ae8532df5a3 100644 --- a/drivers/bus/mhi/core/pm.c +++ b/drivers/bus/mhi/core/pm.c @@ -1038,7 +1038,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) enum mhi_ee_type current_ee; enum dev_st_transition next_state; struct device *dev = &mhi_cntrl->mhi_dev->dev; - u32 val; + u32 interval_us = 25000; /* poll register field every 25 milliseconds */ int ret; dev_info(dev, "Requested to power ON\n"); @@ -1055,10 +1055,6 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) mutex_lock(&mhi_cntrl->pm_mutex); mhi_cntrl->pm_state = MHI_PM_DISABLE; - ret = mhi_init_irq_setup(mhi_cntrl); - if (ret) - goto error_setup_irq; - /* Setup BHI INTVEC */ write_lock_irq(&mhi_cntrl->pm_lock); mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0); @@ -1072,7 +1068,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) dev_err(dev, "%s is not a valid EE for power on\n", TO_MHI_EXEC_STR(current_ee)); ret = -EIO; - goto error_async_power_up; + goto error_exit; } state = mhi_get_mhi_state(mhi_cntrl); @@ -1081,20 +1077,12 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) if (state == MHI_STATE_SYS_ERR) { mhi_set_mhi_state(mhi_cntrl, MHI_STATE_RESET); - ret = wait_event_timeout(mhi_cntrl->state_event, - MHI_PM_IN_FATAL_STATE(mhi_cntrl->pm_state) || - mhi_read_reg_field(mhi_cntrl, - mhi_cntrl->regs, - MHICTRL, - MHICTRL_RESET_MASK, - MHICTRL_RESET_SHIFT, - &val) || - !val, - msecs_to_jiffies(mhi_cntrl->timeout_ms)); - if (!ret) { - ret = -EIO; + ret = mhi_poll_reg_field(mhi_cntrl, mhi_cntrl->regs, MHICTRL, + MHICTRL_RESET_MASK, MHICTRL_RESET_SHIFT, 0, + interval_us); + if (ret) { dev_info(dev, "Failed to reset MHI due to syserr state\n"); - goto error_async_power_up; + goto error_exit; } /* @@ -1104,6 +1092,10 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) mhi_write_reg(mhi_cntrl, mhi_cntrl->bhi, BHI_INTVEC, 0); } + ret = mhi_init_irq_setup(mhi_cntrl); + if (ret) + goto error_exit; + /* Transition to next state */ next_state = MHI_IN_PBL(current_ee) ? DEV_ST_TRANSITION_PBL : DEV_ST_TRANSITION_READY; @@ -1116,10 +1108,7 @@ int mhi_async_power_up(struct mhi_controller *mhi_cntrl) return 0; -error_async_power_up: - mhi_deinit_free_irq(mhi_cntrl); - -error_setup_irq: +error_exit: mhi_cntrl->pm_state = MHI_PM_DISABLE; mutex_unlock(&mhi_cntrl->pm_mutex); From patchwork Thu Dec 16 08:12:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 524612 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 85B3AC433FE for ; Thu, 16 Dec 2021 08:13:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234834AbhLPINd (ORCPT ); Thu, 16 Dec 2021 03:13:33 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39492 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234879AbhLPINc (ORCPT ); Thu, 16 Dec 2021 03:13:32 -0500 Received: from mail-pj1-x102a.google.com (mail-pj1-x102a.google.com [IPv6:2607:f8b0:4864:20::102a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CFC32C061401 for ; Thu, 16 Dec 2021 00:13:31 -0800 (PST) Received: by mail-pj1-x102a.google.com with SMTP id n15-20020a17090a160f00b001a75089daa3so1795759pja.1 for ; Thu, 16 Dec 2021 00:13:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=XISBkJ9Crd6jiFe2nR3x45N/LGif0AtQioDOU5UAxUw=; b=dzCg6eOZJ8u+crYspN4cNSeNmLfBCQ0LxLtycnczCIwcEEvRoepJIoqsjWRYmq92EW bvCSl92ZWVpgg30vsB3ZToW73W0mu3vvBOkHUxv3zk7Uh5XQmaw4uLM70CWnu8buGYne vJOrjLIlMHl3r2pdYl9AKJ6N2QmDhMtXHR3RIA1DDTijJXh/4M+pDkFCcRxp1k1tOYGq 7MYtjX21Doowg6F32vd/XjwP06PtTi2/20tOVgl87rtnuuiVzwcjbDJfbzgceNMnn3j5 Yje+2H1W/CiNTXyXyxaevdZHGVNK7lS+0KxP/DxZFA8R1czpnNpwi2bajcDWvpqIm6Du 7vKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=XISBkJ9Crd6jiFe2nR3x45N/LGif0AtQioDOU5UAxUw=; b=FRQRN7+vb2ePnMJJjc4ZUvCR8X9YLcvGNFE6m7klt0nc9/IJjVw28AM49D8gT6vyav QLobQQef6b9VP/oEpwIn7iBC7jJqWp6NBj1DXhSCwnsi0iEsDA77sl1ht+5W4DA0jF9u jYECaJ/N31Hhk0mF5RWmRIgiLMxy4EFzLapI9GtWYraZrvnEkHM+wfhvJ6SaYlzNBQ4F G9InZKuIxtg2rUENYc+kaXQCR9PzA9qNMv5+cgqMHnR+JVyaJJYSjixc1ij4/nhPSPFD 5O8vsMUPX3b+JObaIEqSdixueADB2yTPM7GBt39E8bODWmprVcqeRyxpZtqA538Q7oxL 9alw== X-Gm-Message-State: AOAM533PdJfPItVBQfb9kIjf24+F+5LDcXKmcQNgMrykIUGFrOwZZQKm iCt9ZMHH3OyE8v0gMQm/uKsh X-Google-Smtp-Source: ABdhPJyasEMKerkEr5YAA2ScuzdIAwjjnOuU/VubXO2lYKkr8h1yx6eSqE86eQ9xoMocFZQxYkbb3Q== X-Received: by 2002:a17:90a:3d41:: with SMTP id o1mr4602336pjf.215.1639642411340; Thu, 16 Dec 2021 00:13:31 -0800 (PST) Received: from localhost.localdomain ([117.193.208.121]) by smtp.gmail.com with ESMTPSA id u38sm326835pfg.4.2021.12.16.00.13.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 00:13:30 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam , Jakub Kicinski , "David S . Miller" Subject: [PATCH 08/10] bus: mhi: core: Add an API for auto queueing buffers for DL channel Date: Thu, 16 Dec 2021 13:42:25 +0530 Message-Id: <20211216081227.237749-9-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add a new API "mhi_prepare_for_transfer_autoqueue" for using with client drivers like QRTR to request MHI core to autoqueue buffers for the DL channel along with starting both UL and DL channels. So far, the "auto_queue" flag specified by the controller drivers in channel definition served this purpose but this will be removed at some point in future. Cc: netdev@vger.kernel.org Cc: Jakub Kicinski Cc: David S. Miller Cc: Greg Kroah-Hartman Acked-by: Jakub Kicinski Co-developed-by: Loic Poulain Signed-off-by: Loic Poulain Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/internal.h | 6 +++++- drivers/bus/mhi/core/main.c | 21 +++++++++++++++++---- include/linux/mhi.h | 21 ++++++++++++++++----- net/qrtr/mhi.c | 2 +- 4 files changed, 39 insertions(+), 11 deletions(-) diff --git a/drivers/bus/mhi/core/internal.h b/drivers/bus/mhi/core/internal.h index 9d72b1d1e986..e2e10474a9d9 100644 --- a/drivers/bus/mhi/core/internal.h +++ b/drivers/bus/mhi/core/internal.h @@ -682,8 +682,12 @@ void mhi_deinit_free_irq(struct mhi_controller *mhi_cntrl); void mhi_rddm_prepare(struct mhi_controller *mhi_cntrl, struct image_info *img_info); void mhi_fw_load_handler(struct mhi_controller *mhi_cntrl); + +/* Automatically allocate and queue inbound buffers */ +#define MHI_CH_INBOUND_ALLOC_BUFS BIT(0) int mhi_prepare_channel(struct mhi_controller *mhi_cntrl, - struct mhi_chan *mhi_chan); + struct mhi_chan *mhi_chan, unsigned int flags); + int mhi_init_chan_ctxt(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan); void mhi_deinit_chan_ctxt(struct mhi_controller *mhi_cntrl, diff --git a/drivers/bus/mhi/core/main.c b/drivers/bus/mhi/core/main.c index 930aba666b67..ffde617f93a3 100644 --- a/drivers/bus/mhi/core/main.c +++ b/drivers/bus/mhi/core/main.c @@ -1430,7 +1430,7 @@ static void mhi_unprepare_channel(struct mhi_controller *mhi_cntrl, } int mhi_prepare_channel(struct mhi_controller *mhi_cntrl, - struct mhi_chan *mhi_chan) + struct mhi_chan *mhi_chan, unsigned int flags) { int ret = 0; struct device *dev = &mhi_chan->mhi_dev->dev; @@ -1455,6 +1455,9 @@ int mhi_prepare_channel(struct mhi_controller *mhi_cntrl, if (ret) goto error_pm_state; + if (mhi_chan->dir == DMA_FROM_DEVICE) + mhi_chan->pre_alloc = !!(flags & MHI_CH_INBOUND_ALLOC_BUFS); + /* Pre-allocate buffer for xfer ring */ if (mhi_chan->pre_alloc) { int nr_el = get_nr_avail_ring_elements(mhi_cntrl, @@ -1610,8 +1613,7 @@ void mhi_reset_chan(struct mhi_controller *mhi_cntrl, struct mhi_chan *mhi_chan) read_unlock_bh(&mhi_cntrl->pm_lock); } -/* Move channel to start state */ -int mhi_prepare_for_transfer(struct mhi_device *mhi_dev) +static int __mhi_prepare_for_transfer(struct mhi_device *mhi_dev, unsigned int flags) { int ret, dir; struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; @@ -1622,7 +1624,7 @@ int mhi_prepare_for_transfer(struct mhi_device *mhi_dev) if (!mhi_chan) continue; - ret = mhi_prepare_channel(mhi_cntrl, mhi_chan); + ret = mhi_prepare_channel(mhi_cntrl, mhi_chan, flags); if (ret) goto error_open_chan; } @@ -1640,8 +1642,19 @@ int mhi_prepare_for_transfer(struct mhi_device *mhi_dev) return ret; } + +int mhi_prepare_for_transfer(struct mhi_device *mhi_dev) +{ + return __mhi_prepare_for_transfer(mhi_dev, 0); +} EXPORT_SYMBOL_GPL(mhi_prepare_for_transfer); +int mhi_prepare_for_transfer_autoqueue(struct mhi_device *mhi_dev) +{ + return __mhi_prepare_for_transfer(mhi_dev, MHI_CH_INBOUND_ALLOC_BUFS); +} +EXPORT_SYMBOL_GPL(mhi_prepare_for_transfer_autoqueue); + void mhi_unprepare_from_transfer(struct mhi_device *mhi_dev) { struct mhi_controller *mhi_cntrl = mhi_dev->mhi_cntrl; diff --git a/include/linux/mhi.h b/include/linux/mhi.h index 723985879035..271db1d6da85 100644 --- a/include/linux/mhi.h +++ b/include/linux/mhi.h @@ -717,15 +717,26 @@ void mhi_device_put(struct mhi_device *mhi_dev); /** * mhi_prepare_for_transfer - Setup UL and DL channels for data transfer. - * Allocate and initialize the channel context and - * also issue the START channel command to both - * channels. Channels can be started only if both - * host and device execution environments match and - * channels are in a DISABLED state. * @mhi_dev: Device associated with the channels + * + * Allocate and initialize the channel context and also issue the START channel + * command to both channels. Channels can be started only if both host and + * device execution environments match and channels are in a DISABLED state. */ int mhi_prepare_for_transfer(struct mhi_device *mhi_dev); +/** + * mhi_prepare_for_transfer_autoqueue - Setup UL and DL channels with auto queue + * buffers for DL traffic + * @mhi_dev: Device associated with the channels + * + * Allocate and initialize the channel context and also issue the START channel + * command to both channels. Channels can be started only if both host and + * device execution environments match and channels are in a DISABLED state. + * The MHI core will automatically allocate and queue buffers for the DL traffic. + */ +int mhi_prepare_for_transfer_autoqueue(struct mhi_device *mhi_dev); + /** * mhi_unprepare_from_transfer - Reset UL and DL channels for data transfer. * Issue the RESET channel command and let the diff --git a/net/qrtr/mhi.c b/net/qrtr/mhi.c index fa611678af05..18196e1c8c2f 100644 --- a/net/qrtr/mhi.c +++ b/net/qrtr/mhi.c @@ -79,7 +79,7 @@ static int qcom_mhi_qrtr_probe(struct mhi_device *mhi_dev, int rc; /* start channels */ - rc = mhi_prepare_for_transfer(mhi_dev); + rc = mhi_prepare_for_transfer_autoqueue(mhi_dev); if (rc) return rc; From patchwork Thu Dec 16 08:12:26 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 525901 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BF8D8C433EF for ; Thu, 16 Dec 2021 08:13:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234905AbhLPINj (ORCPT ); Thu, 16 Dec 2021 03:13:39 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39530 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234890AbhLPINh (ORCPT ); Thu, 16 Dec 2021 03:13:37 -0500 Received: from mail-pj1-x102c.google.com (mail-pj1-x102c.google.com [IPv6:2607:f8b0:4864:20::102c]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 240A6C06173E for ; Thu, 16 Dec 2021 00:13:37 -0800 (PST) Received: by mail-pj1-x102c.google.com with SMTP id r34-20020a17090a43a500b001b0f0837ce8so1791196pjg.2 for ; Thu, 16 Dec 2021 00:13:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hxZwgNBumLHqXO+2gnKFYa6p15JpU/b4UvoM1L0jYYQ=; b=jEMZloFE35t3CKK9Q1XULRGALD0dQREkLaOh7FGrNslUiLggkSo+jnOg3w9HuvbcrZ 1AHTAwrUGRie+jK3GXWuyBb3P8wSk3rTI4CatI0Lb8ttohSHCE/mtHW5NfQgbJSctVuO J1Jvv8Eo8oST1ffnNxcGaoWEciXBWRHhAvRB1pyV/QzhSn+sgXlKqBLQ3SrZT5vnzDPw uzE4rZEBFWmk2O17DwJH7QAIOdtVRDkGaO2EJq2TTQ48WHLawG/rjCi+wDdlVXcZgZBF LatkyxHKOx7YFGfa8PYIlu+CZHimVvZ/ica+0bDLG5Bg1VNUg9aR9Nfqszfeion8uuMX clOQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hxZwgNBumLHqXO+2gnKFYa6p15JpU/b4UvoM1L0jYYQ=; b=HFZpXlj2a+IE/OrtsFAEobduDmlQ2yNDylOOXh7DIv+mc5LClz+wsNVNeYBeqtZX+K GWmx5vYipIepUgUfwtg1vgJRK+cOKLqdu3Ps16adFQ34OYzk0NUWDy/6bCutBdbG7rUL UL1MwUT/I/ybnSQwC2qFUQgOTQAR5utUlRHDvdZ7731Gjs/UgzyCjNLGU/4g3ix0tvNA XaYiuJTGCfaerEjMZwRm6SXtAnVCdiPjFxNSxS/JMcZ0R+6M0nJEvRjRWMGR7z91M2wE JHwQthNfw4yoapSWJbyO8/jVBpoxBkiHW7A/pdcZ4HIaSyHo2y2GqTNCYT1Ab5ZDS1Jq 0m0w== X-Gm-Message-State: AOAM532dGgQ7xu2fpCr7hTIrCEaNsUyQAWXC2IT6Yn1cmkgfhd+TpVKL CeunmYWQrfEJdCLeEJe/kxba X-Google-Smtp-Source: ABdhPJxMap+dqOqwRpoo82JM7xEAD+1B483j3epvQBrDNW6ieQt84qKgjC3fi4v5xAP5aNs9Md3huA== X-Received: by 2002:a17:90b:1e04:: with SMTP id pg4mr4654111pjb.38.1639642416629; Thu, 16 Dec 2021 00:13:36 -0800 (PST) Received: from localhost.localdomain ([117.193.208.121]) by smtp.gmail.com with ESMTPSA id u38sm326835pfg.4.2021.12.16.00.13.31 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 00:13:36 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam , Manivannan Sadhasivam Subject: [PATCH 09/10] bus: mhi: core: Use correctly sized arguments for bit field Date: Thu, 16 Dec 2021 13:42:26 +0530 Message-Id: <20211216081227.237749-10-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Kees Cook The find.h APIs are designed to be used only on unsigned long arguments. This can technically result in a over-read, but it is harmless in this case. Regardless, fix it to avoid the warning seen under -Warray-bounds, which we'd like to enable globally: In file included from ./include/linux/bitmap.h:9, from ./include/linux/cpumask.h:12, from ./arch/x86/include/asm/cpumask.h:5, from ./arch/x86/include/asm/msr.h:11, from ./arch/x86/include/asm/processor.h:22, from ./arch/x86/include/asm/cpufeature.h:5, from ./arch/x86/include/asm/thread_info.h:53, from ./include/linux/thread_info.h:60, from ./arch/x86/include/asm/preempt.h:7, from ./include/linux/preempt.h:78, from ./include/linux/spinlock.h:55, from ./include/linux/wait.h:9, from ./include/linux/wait_bit.h:8, from ./include/linux/fs.h:6, from ./include/linux/debugfs.h:15, from drivers/bus/mhi/core/init.c:7: drivers/bus/mhi/core/init.c: In function 'to_mhi_pm_state_str': ./include/linux/find.h:187:37: warning: array subscript 'long unsigned int[0]' is partly outside array bounds of 'enum mhi_pm_state[1]' [-Warray-bounds] 187 | unsigned long val = *addr & GENMASK(size - 1, 0); | ^~~~~ drivers/bus/mhi/core/init.c:80:51: note: while referencing 'state' 80 | const char *to_mhi_pm_state_str(enum mhi_pm_state state) | ~~~~~~~~~~~~~~~~~~^~~~~ Signed-off-by: Kees Cook Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20211215232446.2069794-1-keescook@chromium.org [mani: changed the variable name "bits" to "pm_state"] Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/core/init.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/bus/mhi/core/init.c b/drivers/bus/mhi/core/init.c index f1ec34417592..046f407dc5d6 100644 --- a/drivers/bus/mhi/core/init.c +++ b/drivers/bus/mhi/core/init.c @@ -79,7 +79,8 @@ static const char * const mhi_pm_state_str[] = { const char *to_mhi_pm_state_str(enum mhi_pm_state state) { - int index = find_last_bit((unsigned long *)&state, 32); + unsigned long pm_state = state; + int index = find_last_bit(&pm_state, 32); if (index >= ARRAY_SIZE(mhi_pm_state_str)) return "Invalid State"; From patchwork Thu Dec 16 08:12:27 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 524611 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 736A5C433FE for ; Thu, 16 Dec 2021 08:13:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232381AbhLPINr (ORCPT ); Thu, 16 Dec 2021 03:13:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:39578 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234877AbhLPINm (ORCPT ); Thu, 16 Dec 2021 03:13:42 -0500 Received: from mail-pf1-x436.google.com (mail-pf1-x436.google.com [IPv6:2607:f8b0:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 91242C061756 for ; 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Thu, 16 Dec 2021 00:13:42 -0800 (PST) Received: from localhost.localdomain ([117.193.208.121]) by smtp.gmail.com with ESMTPSA id u38sm326835pfg.4.2021.12.16.00.13.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 16 Dec 2021 00:13:41 -0800 (PST) From: Manivannan Sadhasivam To: gregkh@linuxfoundation.org Cc: mhi@lists.linux.dev, hemantk@codeaurora.org, bbhatt@codeaurora.org, loic.poulain@linaro.org, thomas.perrot@bootlin.com, aleksander@aleksander.es, slark_xiao@163.com, christophe.jaillet@wanadoo.fr, keescook@chromium.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, netdev@vger.kernel.org, Manivannan Sadhasivam , Manivannan Sadhasivam Subject: [PATCH 10/10] bus: mhi: pci_generic: Introduce Sierra EM919X support Date: Thu, 16 Dec 2021 13:42:27 +0530 Message-Id: <20211216081227.237749-11-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> References: <20211216081227.237749-1-manivannan.sadhasivam@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org From: Thomas Perrot Add support for EM919X modems, this modem series is based on SDX55 qcom chip. It is mandatory to use the same ring for control+data and diag events. Signed-off-by: Thomas Perrot Tested-by: Aleksander Morgado Reviewed-by: Manivannan Sadhasivam Link: https://lore.kernel.org/r/20211123081541.648426-1-thomas.perrot@bootlin.com Signed-off-by: Manivannan Sadhasivam --- drivers/bus/mhi/pci_generic.c | 43 +++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) diff --git a/drivers/bus/mhi/pci_generic.c b/drivers/bus/mhi/pci_generic.c index 9ef41354237c..29607f7bc8da 100644 --- a/drivers/bus/mhi/pci_generic.c +++ b/drivers/bus/mhi/pci_generic.c @@ -403,7 +403,50 @@ static const struct mhi_pci_dev_info mhi_mv31_info = { .dma_data_width = 32, }; +static const struct mhi_channel_config mhi_sierra_em919x_channels[] = { + MHI_CHANNEL_CONFIG_UL_SBL(2, "SAHARA", 32, 0), + MHI_CHANNEL_CONFIG_DL_SBL(3, "SAHARA", 256, 0), + MHI_CHANNEL_CONFIG_UL(4, "DIAG", 32, 0), + MHI_CHANNEL_CONFIG_DL(5, "DIAG", 32, 0), + MHI_CHANNEL_CONFIG_UL(12, "MBIM", 128, 0), + MHI_CHANNEL_CONFIG_DL(13, "MBIM", 128, 0), + MHI_CHANNEL_CONFIG_UL(14, "QMI", 32, 0), + MHI_CHANNEL_CONFIG_DL(15, "QMI", 32, 0), + MHI_CHANNEL_CONFIG_UL(32, "DUN", 32, 0), + MHI_CHANNEL_CONFIG_DL(33, "DUN", 32, 0), + MHI_CHANNEL_CONFIG_HW_UL(100, "IP_HW0", 512, 1), + MHI_CHANNEL_CONFIG_HW_DL(101, "IP_HW0", 512, 2), +}; + +static struct mhi_event_config modem_sierra_em919x_mhi_events[] = { + /* first ring is control+data and DIAG ring */ + MHI_EVENT_CONFIG_CTRL(0, 2048), + /* Hardware channels request dedicated hardware event rings */ + MHI_EVENT_CONFIG_HW_DATA(1, 2048, 100), + MHI_EVENT_CONFIG_HW_DATA(2, 2048, 101) +}; + +static const struct mhi_controller_config modem_sierra_em919x_config = { + .max_channels = 128, + .timeout_ms = 24000, + .num_channels = ARRAY_SIZE(mhi_sierra_em919x_channels), + .ch_cfg = mhi_sierra_em919x_channels, + .num_events = ARRAY_SIZE(modem_sierra_em919x_mhi_events), + .event_cfg = modem_sierra_em919x_mhi_events, +}; + +static const struct mhi_pci_dev_info mhi_sierra_em919x_info = { + .name = "sierra-em919x", + .config = &modem_sierra_em919x_config, + .bar_num = MHI_PCI_DEFAULT_BAR_NUM, + .dma_data_width = 32, + .sideband_wake = false, +}; + static const struct pci_device_id mhi_pci_id_table[] = { + /* EM919x (sdx55), use the same vid:pid as qcom-sdx55m */ + { PCI_DEVICE_SUB(PCI_VENDOR_ID_QCOM, 0x0306, 0x18d7, 0x0200), + .driver_data = (kernel_ulong_t) &mhi_sierra_em919x_info }, { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0306), .driver_data = (kernel_ulong_t) &mhi_qcom_sdx55_info }, { PCI_DEVICE(PCI_VENDOR_ID_QCOM, 0x0304),