From patchwork Thu Dec 23 00:22:17 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527695 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 185F4C433EF for ; Thu, 23 Dec 2021 00:22:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345449AbhLWAWh (ORCPT ); Wed, 22 Dec 2021 19:22:37 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55186 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345439AbhLWAWe (ORCPT ); Wed, 22 Dec 2021 19:22:34 -0500 Received: from mail-pj1-x102b.google.com (mail-pj1-x102b.google.com [IPv6:2607:f8b0:4864:20::102b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CD5D2C061574; Wed, 22 Dec 2021 16:22:33 -0800 (PST) Received: by mail-pj1-x102b.google.com with SMTP id rj2-20020a17090b3e8200b001b1944bad25so4053967pjb.5; Wed, 22 Dec 2021 16:22:33 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=QmETOXOkNKQa2rKCeFKfspOjqOV7hD2bdN3ZZG5FHUI=; b=UC3LITshLiCeZPJfbMnFWKVzk+NdxgHQXUs2cuh5g0zkp5TWUKAhtNpar0sVngrS64 IORiZyiJDJTK9/p6Xe/jHOAIWxXxok7ftwOY8v0n3D7cSHnWmi1Xm5cJ7S6TVY0wTo1K sQaN8CZ+WFyz6qC33tdUpAbi9QJy9PZ8ajCfveE0wC96V5UKhGFWICSEPZ35BCC0/vJS KhSi6hPabCtBKGD3YoZU7kQ/QkrKeT+Bpv/eP3HikmynvOThLJt8L8zRxv7o1plvy6eY cIvaeZywe3GqhIfdQmkRtIOhMCEqHDikDCpaVfslgxv3Q2eOTmSUr0sj2G4huJOEagm1 c3Og== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=QmETOXOkNKQa2rKCeFKfspOjqOV7hD2bdN3ZZG5FHUI=; b=q1rPdpvL+rgshbPczNuVSLhCLiY7obPPyOZ2slr6jhqiixWSO3KHfL8pKWcbPLfW4v 9+kb/H2QyaURVnZtV0FhUx+Pil2LdOGGlDk9vQ3bsRIz2T/KgyLbrohlZ6yOXlrg5Dst Fv4bt4bNqKZpACuCkahWuZdWylRa7hQyajvUbq7n9J8GbzXY/e/mhwxTdQ7b6r2waFcP NntbnOQVMWZsIpPKiwHD9a/ptANnrioM83IfSQ1Qar2XGGFTbpTRI6lVw/rohY5f07eA Z8dvKlb3hBA/ghi8Rr6QQxR0zhJxyLQyatq9KRSPySQYPi6YZLXZNkF6DEzpumKI923k 1Zaw== X-Gm-Message-State: AOAM530s44T+4A24fJZ+bJ7XCo8ULSxetWFIwH+ey4nrFIDv/Z2ng/YS /dNXzjix2ZLeF7XmNpmh5fM= X-Google-Smtp-Source: ABdhPJwhz8YZlay9PUCTslrKMaxwhliG6OEIIBNm11WCw9aJY46qwiWx1rz70bxyRDenBBotVqJCVw== X-Received: by 2002:a17:90a:cb0d:: with SMTP id z13mr42268pjt.89.1640218953323; Wed, 22 Dec 2021 16:22:33 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.30 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:32 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 1/9] mtd: rawnand: brcmnand: Allow SoC to provide I/O operations Date: Wed, 22 Dec 2021 16:22:17 -0800 Message-Id: <20211223002225.3738385-2-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Allow a brcmnand_soc instance to provide a custom set of I/O operations which we will require when using this driver on a BCMA bus which is not directly memory mapped I/O. Update the nand_{read,write}_reg accordingly to use the SoC operations if provided. Signed-off-by: Florian Fainelli --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 14 ++++++++++++-- drivers/mtd/nand/raw/brcmnand/brcmnand.h | 23 +++++++++++++++++++++++ 2 files changed, 35 insertions(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index f75929783b94..7a1673b1b1af 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -594,13 +594,18 @@ enum { static inline u32 nand_readreg(struct brcmnand_controller *ctrl, u32 offs) { + if (brcmnand_soc_has_ops(ctrl->soc)) + return brcmnand_soc_read(ctrl->soc, offs); return brcmnand_readl(ctrl->nand_base + offs); } static inline void nand_writereg(struct brcmnand_controller *ctrl, u32 offs, u32 val) { - brcmnand_writel(val, ctrl->nand_base + offs); + if (brcmnand_soc_has_ops(ctrl->soc)) + brcmnand_soc_write(ctrl->soc, val, offs); + else + brcmnand_writel(val, ctrl->nand_base + offs); } static int brcmnand_revision_init(struct brcmnand_controller *ctrl) @@ -766,13 +771,18 @@ static inline void brcmnand_rmw_reg(struct brcmnand_controller *ctrl, static inline u32 brcmnand_read_fc(struct brcmnand_controller *ctrl, int word) { + if (brcmnand_soc_has_ops(ctrl->soc)) + return brcmnand_soc_read(ctrl->soc, ~0); return __raw_readl(ctrl->nand_fc + word * 4); } static inline void brcmnand_write_fc(struct brcmnand_controller *ctrl, int word, u32 val) { - __raw_writel(val, ctrl->nand_fc + word * 4); + if (brcmnand_soc_has_ops(ctrl->soc)) + brcmnand_soc_write(ctrl->soc, val, ~0); + else + __raw_writel(val, ctrl->nand_fc + word * 4); } static inline void edu_writel(struct brcmnand_controller *ctrl, diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.h b/drivers/mtd/nand/raw/brcmnand/brcmnand.h index eb498fbe505e..a3f2ad5f6572 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.h +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.h @@ -11,12 +11,19 @@ struct platform_device; struct dev_pm_ops; +struct brcmnand_io_ops; struct brcmnand_soc { bool (*ctlrdy_ack)(struct brcmnand_soc *soc); void (*ctlrdy_set_enabled)(struct brcmnand_soc *soc, bool en); void (*prepare_data_bus)(struct brcmnand_soc *soc, bool prepare, bool is_param); + const struct brcmnand_io_ops *ops; +}; + +struct brcmnand_io_ops { + u32 (*read_reg)(struct brcmnand_soc *soc, u32 offset); + void (*write_reg)(struct brcmnand_soc *soc, u32 val, u32 offset); }; static inline void brcmnand_soc_data_bus_prepare(struct brcmnand_soc *soc, @@ -58,6 +65,22 @@ static inline void brcmnand_writel(u32 val, void __iomem *addr) writel_relaxed(val, addr); } +static inline bool brcmnand_soc_has_ops(struct brcmnand_soc *soc) +{ + return soc && soc->ops && soc->ops->read_reg && soc->ops->write_reg; +} + +static inline u32 brcmnand_soc_read(struct brcmnand_soc *soc, u32 offset) +{ + return soc->ops->read_reg(soc, offset); +} + +static inline void brcmnand_soc_write(struct brcmnand_soc *soc, u32 val, + u32 offset) +{ + soc->ops->write_reg(soc, val, offset); +} + int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc); int brcmnand_remove(struct platform_device *pdev); From patchwork Thu Dec 23 00:22:18 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527998 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4C471C433EF for ; Thu, 23 Dec 2021 00:22:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345500AbhLWAWl (ORCPT ); Wed, 22 Dec 2021 19:22:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55194 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345454AbhLWAWf (ORCPT ); Wed, 22 Dec 2021 19:22:35 -0500 Received: from mail-pj1-x1031.google.com (mail-pj1-x1031.google.com [IPv6:2607:f8b0:4864:20::1031]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8628DC061401; Wed, 22 Dec 2021 16:22:35 -0800 (PST) Received: by mail-pj1-x1031.google.com with SMTP id v16so3603550pjn.1; Wed, 22 Dec 2021 16:22:35 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DknGyPcGjNy3srT0IigmczMVpbDaJUX0db4clA7nVyE=; b=QxfW+YUo9bh17Swjkq0zfV9nRzqa+6MeWsmnb00FFEZs5uI2lLJ3EkzIrANj6bcSUl c5+jLzpvHhIxlOWm0akQNmgBAmTIio5TXxTf3XGidCVA6qAA3IjUilqlbdrrxzUuWkUv PmZsW9jvdLZJ2PZrg7CbyXIWCAQskyUTO6rHDvTUbi9v7fi7nBeDNtxgKcsePdo6Dc7J T0lnyiO9padNcOdNawQqcKEOLZO2EZ8xG7D9CI0M4FFpWeHC9BwetVt5Us2H4MXxe7z7 6deM+2JSNcPSW/IN4Gy1+b9nIPz4JcGzqvKOt7RjqIPawe6xyeUATroXMcFD8Ra42/d0 UkDQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=DknGyPcGjNy3srT0IigmczMVpbDaJUX0db4clA7nVyE=; b=5v4vYNNobgSNcAjntM3NdpLQG76hp8Tzh6phVJs9vEwnbc5YxsVsYenIx6FTcQSnzJ 4SlU1hAn/1ZnreW+lEp7yNLJfC53ITX4nVC4ZDtXRBahW2NMI6oUiC0iviu08dBCgFlT ah9TpOs1Uz362FEVNCY23j6l0bgzi5JnmKTu4Sj7u3twteUaB+XqIHpUQJQV6HfLNU2d Mni/T2ZTEc7XcnVkt43odMubf/RPxJxSExmo9Syl2NdNNrcwrCxT87qSVhJkYFcuRJaE 1AVw7ji5kmIqkQDX6Aoj29A/4hCr3TaEoXeoQTpc6IBa4jvvPhfY+W5RkeAYJb3gKo1P wJzg== X-Gm-Message-State: AOAM530KGZPm0KmYbcI+U0cDIA6NI42zJgBMMgymzhW6g057xuOCoSDi 5wtlz7ZfWYl5t3dgNozJQgA= X-Google-Smtp-Source: ABdhPJyWP5a3vUVMkg6PgbOpBWjwpnAx/lSUHLsZXUV83dbGPFKmgEnhKi29+REeORMYHIDI8QR2og== X-Received: by 2002:a17:902:d682:b0:148:c928:1fa1 with SMTP id v2-20020a170902d68200b00148c9281fa1mr4949461ply.155.1640218955024; Wed, 22 Dec 2021 16:22:35 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:34 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 2/9] mtd: rawnand: brcmnand: Assign soc as early as possible Date: Wed, 22 Dec 2021 16:22:18 -0800 Message-Id: <20211223002225.3738385-3-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org In order to key off the brcmnand_probe() code in subsequent changes depending upon ctlr->soc, assign that variable as early as possible, instead of much later when we have checked that it is non-NULL. Signed-off-by: Florian Fainelli --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 7a1673b1b1af..fcea5a7443e8 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -3008,6 +3008,7 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) dev_set_drvdata(dev, ctrl); ctrl->dev = dev; + ctrl->soc = soc; init_completion(&ctrl->done); init_completion(&ctrl->dma_done); @@ -3148,8 +3149,6 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) * interesting ways */ if (soc) { - ctrl->soc = soc; - ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0, DRV_NAME, ctrl); From patchwork Thu Dec 23 00:22:19 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527694 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 63B5CC4332F for ; Thu, 23 Dec 2021 00:22:44 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345510AbhLWAWl (ORCPT ); Wed, 22 Dec 2021 19:22:41 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55202 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345469AbhLWAWh (ORCPT ); Wed, 22 Dec 2021 19:22:37 -0500 Received: from mail-pf1-x429.google.com (mail-pf1-x429.google.com [IPv6:2607:f8b0:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 3DF5EC061574; Wed, 22 Dec 2021 16:22:37 -0800 (PST) Received: by mail-pf1-x429.google.com with SMTP id v11so3742476pfu.2; Wed, 22 Dec 2021 16:22:37 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=igV+0PYJ8LgFBo0u2TcB0EcsmeY4woP3bELald8J87k=; b=IkOkTM0nQMWsqsA8TsFwC1jyekX63htbHYb7OcaRLvWw9x3E9Am5hhV6hugOwjwgqu 99lIUBcPvnecQcDFnGK9HlsGfOqy05UbgnM+I16eOeK7vo56xTFHoLnseFzU94sb3xtE Gi7vhRtNVHoRR9ROjMKdiIy9cc4y2lpmyo7csvM6VSJKpD3oj1lvw2VjNy6VUgK0R7QW sxGymUfy3b+CnGudIjMqE8tXBgUYfi79gohXtV9MJgrkIkeVodQPrjySpvu+WxJqdI90 2bPFUVUsd22zpkg1RXfJ2vgZDNWbH6y9azv65UD2Vb89SeCrILkSL8wt26vNVTUqofaB 7BCg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=igV+0PYJ8LgFBo0u2TcB0EcsmeY4woP3bELald8J87k=; b=6HI6it2hOrvLdZp4Bx5fds06l31ZgHEzZmgnNckK4ufVvK5VhoTYRgSHqdyu5Mf9RT LAX5xv2PD2UGqW+fosW832C+Ki/9qveB33nBCPG46FlewSgS6/u9eTwFmQuNnsUs60mJ MdFTL5KT8iBAuMnFsfGPFvoBvdIS0r3YifRWutJQAUzonDQmhhQG/FUc17hnh9d12Tns 4kOnh3aQ1DVay+TdychLevumbv/2WURGu1djeBX4TKKa8Zc6BUIxOmHzY4GN+48hhW0X IOHO0sN1L4z0QlVfqqLSJXYvMvOA3/Pty74LkbIKv3qijrsd8GaLjj1GaHeNoaVfLj9y aFrg== X-Gm-Message-State: AOAM530UsB1W7shOxBIyMEAEy2xOEKqoFvVgaMsfEEAELpZ1eSyh/yvk mfYRnPrkxobch+7Jx5n0ayA= X-Google-Smtp-Source: ABdhPJxSckAZe9DaFM1bKLCv01xSnOpLQbV9TIEX6AathClFk7dRqG6dOadtWskP52LFfxtnCFC1dA== X-Received: by 2002:a05:6a00:1582:b0:4ba:e636:391 with SMTP id u2-20020a056a00158200b004bae6360391mr100399pfk.55.1640218956782; Wed, 22 Dec 2021 16:22:36 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.35 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:36 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 3/9] mtd: rawnand: brcmnand: Avoid pdev in brcmnand_init_cs() Date: Wed, 22 Dec 2021 16:22:19 -0800 Message-Id: <20211223002225.3738385-4-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org In preparation for encapsulation more of what the loop calling brcmnand_init_cs() does, avoid using platform_device when it is the device behind platform_device that we are using for printing errors. No functional change. Signed-off-by: Florian Fainelli --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index fcea5a7443e8..35f8d8e02d4a 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2763,7 +2763,7 @@ static const struct nand_controller_ops brcmnand_controller_ops = { static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) { struct brcmnand_controller *ctrl = host->ctrl; - struct platform_device *pdev = host->pdev; + struct device *dev = ctrl->dev; struct mtd_info *mtd; struct nand_chip *chip; int ret; @@ -2771,7 +2771,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) ret = of_property_read_u32(dn, "reg", &host->cs); if (ret) { - dev_err(&pdev->dev, "can't get chip-select\n"); + dev_err(dev, "can't get chip-select\n"); return -ENXIO; } @@ -2780,13 +2780,13 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) nand_set_flash_node(chip, dn); nand_set_controller_data(chip, host); - mtd->name = devm_kasprintf(&pdev->dev, GFP_KERNEL, "brcmnand.%d", + mtd->name = devm_kasprintf(dev, GFP_KERNEL, "brcmnand.%d", host->cs); if (!mtd->name) return -ENOMEM; mtd->owner = THIS_MODULE; - mtd->dev.parent = &pdev->dev; + mtd->dev.parent = dev; chip->legacy.cmd_ctrl = brcmnand_cmd_ctrl; chip->legacy.cmdfunc = brcmnand_cmdfunc; From patchwork Thu Dec 23 00:22:20 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527997 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34CBDC433FE for ; Thu, 23 Dec 2021 00:22:47 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345524AbhLWAWo (ORCPT ); Wed, 22 Dec 2021 19:22:44 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55212 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345493AbhLWAWj (ORCPT ); Wed, 22 Dec 2021 19:22:39 -0500 Received: from mail-pj1-x1035.google.com (mail-pj1-x1035.google.com [IPv6:2607:f8b0:4864:20::1035]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 71595C061574; Wed, 22 Dec 2021 16:22:39 -0800 (PST) Received: by mail-pj1-x1035.google.com with SMTP id gj24so3628375pjb.0; Wed, 22 Dec 2021 16:22:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=F2NATCUWUg4iwnRGoqM+mgzKzp/1tXDebp9cGfC5HfA=; b=OkvKBUsGESkn9oq3lyl1KbJ8FGgqluSGLkS7IDTN0WsZiBYkxuPVNKZbs1RYS5T6u4 x0wbqRMPulF/zKWIdAba3clMX3vnNJrtwqGl3PAHPziIUbQVwUnrVR4WRXjkS7Q3s5eI 3xAc+ImwQLgy/q6vQ7Dvuzt5w21haF7mia58Fl2M16RadovRJC4ozxvnD5lcy1aabKic uJJnDYOfCjlcfVUJQyLkVyGYEYDcFmmsfSBgoCHlVJ5C2EPg/hVscwHp7VQ96M+6sdEY sq9SFghUcWesgJ96cWs5VNx5ism+i64xPGERCJ2uZ1ZPYVTK+dACkvGodDyeqvRsf1sV 4lRg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=F2NATCUWUg4iwnRGoqM+mgzKzp/1tXDebp9cGfC5HfA=; b=IX0Je3I3v8iPDMsKCMcU+VKYqETovfnm2yQRq5+yJz6x7DzTSMLC8WfwkWLgeIU2yY tojNTXRdztyOd5LyI19A9VbMfz5T/EWvBxbNPf5GMBVXC5PjbIQOdu/PU/dhJfDI5NVF umVl1j/abk2zCib2PICrTSCt2jZP0i5kFbonzP+YwOtTWbQwu7Yfjabgq5noQtg3ZrGj +Dy2E4R67N1UqChL4R36YbUu6SsYMTxGM7ENmljkHPIiSvd2LloV/4NZwUDZgF1jjAez UAo4OM+IdVJxirZrXpTjUXtorwiBe4pH8G16njzmKEh1KnX7848XfjYVG742dAqYhQZm jUkg== X-Gm-Message-State: AOAM53178X3tgzbq3vR5xpZBbk/WFTRjNCoU6xQ0vl65N02y8c6pSfBI ZBNpXHRK+u9CylcXEJQ1SwY= X-Google-Smtp-Source: ABdhPJwjNO0Ihj3L5T0ypAgnFYpoTOdk2YWaXKlYWeEVPK/HEnwmcop3KmKEUFbkY0u8nZRvReO5mw== X-Received: by 2002:a17:90b:4a09:: with SMTP id kk9mr45266pjb.53.1640218958532; Wed, 22 Dec 2021 16:22:38 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.36 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:38 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 4/9] mtd: rawnand: brcmnand: Move OF operations out of brcmnand_init_cs() Date: Wed, 22 Dec 2021 16:22:20 -0800 Message-Id: <20211223002225.3738385-5-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org In order to initialize a given chip select object for use by the brcmnand driver, move all of the Device Tree specific routines outside of brcmnand_init_cs() in order to make it usable in a platform data configuration which will be necessary for supporting BCMA chips. Signed-off-by: Florian Fainelli --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 35f8d8e02d4a..60a7f375df83 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -2760,7 +2760,7 @@ static const struct nand_controller_ops brcmnand_controller_ops = { .attach_chip = brcmnand_attach_chip, }; -static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) +static int brcmnand_init_cs(struct brcmnand_host *host) { struct brcmnand_controller *ctrl = host->ctrl; struct device *dev = ctrl->dev; @@ -2769,16 +2769,9 @@ static int brcmnand_init_cs(struct brcmnand_host *host, struct device_node *dn) int ret; u16 cfg_offs; - ret = of_property_read_u32(dn, "reg", &host->cs); - if (ret) { - dev_err(dev, "can't get chip-select\n"); - return -ENXIO; - } - mtd = nand_to_mtd(&host->chip); chip = &host->chip; - nand_set_flash_node(chip, dn); nand_set_controller_data(chip, host); mtd->name = devm_kasprintf(dev, GFP_KERNEL, "brcmnand.%d", host->cs); @@ -3179,7 +3172,16 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) host->pdev = pdev; host->ctrl = ctrl; - ret = brcmnand_init_cs(host, child); + ret = of_property_read_u32(dn, "reg", &host->cs); + if (ret) { + dev_err(dev, "can't get chip-select\n"); + devm_kfree(dev, host); + continue; + } + + nand_set_flash_node(&host->chip, dn); + + ret = brcmnand_init_cs(host); if (ret) { devm_kfree(dev, host); continue; /* Try all chip-selects */ From patchwork Thu Dec 23 00:22:21 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527692 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2069BC433FE for ; Thu, 23 Dec 2021 00:22:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345598AbhLWAWv (ORCPT ); Wed, 22 Dec 2021 19:22:51 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55216 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345498AbhLWAWl (ORCPT ); Wed, 22 Dec 2021 19:22:41 -0500 Received: from mail-pl1-x630.google.com (mail-pl1-x630.google.com [IPv6:2607:f8b0:4864:20::630]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id CE4DFC06173F; Wed, 22 Dec 2021 16:22:40 -0800 (PST) Received: by mail-pl1-x630.google.com with SMTP id j13so3045513plx.4; Wed, 22 Dec 2021 16:22:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uyUAWvS1gGoBBI9YnGm7NS9rETUeD3abG1ViwzHmvu4=; b=VTCer4Mtp8RLzMSH8RC2nIFh/FXARGwSh+ydQ/Ax+I+fTFnqaP2yerzTydFctlr16O ypRLn6pM0sZW+eEs5j3m6uqIftECAtEBSyNnSxxMydBnh+puZuZ9f9GUPODlp96Y9Kp2 3f+rs5DTXec0vcDs44+/1wz7NKLOecyqGUlXlGN0lv1UR2mudPzTDq432geawrgpMRVh gyLP/LrMqJ934tiegUuQRt6ZMnvdEd+TB11lpO53Sk9BPN2OmVR8AwxpCWjWuSLrhqmT NOwwZ4lTnDRBUge8dvQ4HJVWmj25Ej9AeTS2EE65OOAgPi3xauzZ3akmDVLB9olpWEQ7 NNrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uyUAWvS1gGoBBI9YnGm7NS9rETUeD3abG1ViwzHmvu4=; b=mJxh8Li+rpnCXjjf/iwKb0kAPd43cZw0XxfboGgPrYLq+1Cye14A9CxM7OOKlQQLOH hYwjOLmotSCjZ+j4Un8XsrxNsXKuzxVzdVs/tnq8B383xi9pq8KOZtYn904hGOZigcN9 8FTLR3nb4+t6ToZnX80BjRBJRHCSL57Dktf6kCcWducn8Hdoga8Bu+FfNSKuv3lGe/gH RMz5gcnKGE9v+R4BKxarYL1fTEvhiw8ZSfz5sqbCJwBD2OFWPe5HM2j0v37JEnInu5Bd thgW72dAdUaTWYBFe6z9ObUwW9nXAi5i3gfS8O8N3Fww5nmUM7gial4jXyyakOfbi5ap ZKWw== X-Gm-Message-State: AOAM532dTuSLqhSiwWrxDsfP2sLmozWl0oqCSqc9NYDq/KX4cMz64ixI KHMZMMB5As93HrPjCC27jqQ= X-Google-Smtp-Source: ABdhPJy8wqp8KEVSmde4I2+jqXBoLwY02wjsZ6DHtmHFxSVGRiOxohuSF6x6WR9Hnxh/kobAf+wCeA== X-Received: by 2002:a17:902:d2c1:b0:148:f6af:f2c5 with SMTP id n1-20020a170902d2c100b00148f6aff2c5mr107318plc.7.1640218960290; Wed, 22 Dec 2021 16:22:40 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:39 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 5/9] mtd: rawnand: brcmnand: Allow working without interrupts Date: Wed, 22 Dec 2021 16:22:21 -0800 Message-Id: <20211223002225.3738385-6-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org The BCMA devices include the brcmnand controller but they do not wire up any interrupt line, allow the main interrupt to be optional and update the completion path to also check for the lack of an interrupt line. Signed-off-by: Florian Fainelli --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 52 +++++++++++------------- 1 file changed, 24 insertions(+), 28 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 60a7f375df83..e7947cff4dd1 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -213,7 +213,7 @@ struct brcmnand_controller { void __iomem *nand_base; void __iomem *nand_fc; /* flash cache */ void __iomem *flash_dma_base; - unsigned int irq; + int irq; unsigned int dma_irq; int nand_version; @@ -1602,7 +1602,7 @@ static bool brcmstb_nand_wait_for_completion(struct nand_chip *chip) bool err = false; int sts; - if (mtd->oops_panic_write) { + if (mtd->oops_panic_write || ctrl->irq < 0) { /* switch to interrupt polling and PIO mode */ disable_ctrl_irqs(ctrl); sts = bcmnand_ctrl_poll_status(ctrl, NAND_CTRL_RDY, @@ -3130,33 +3130,29 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) } /* IRQ */ - ctrl->irq = platform_get_irq(pdev, 0); - if ((int)ctrl->irq < 0) { - dev_err(dev, "no IRQ defined\n"); - ret = -ENODEV; - goto err; - } - - /* - * Some SoCs integrate this controller (e.g., its interrupt bits) in - * interesting ways - */ - if (soc) { - ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0, - DRV_NAME, ctrl); + ctrl->irq = platform_get_irq_optional(pdev, 0); + if (ctrl->irq >= 0) { + /* + * Some SoCs integrate this controller (e.g., its interrupt bits) in + * interesting ways + */ + if (soc) { + ret = devm_request_irq(dev, ctrl->irq, brcmnand_irq, 0, + DRV_NAME, ctrl); - /* Enable interrupt */ - ctrl->soc->ctlrdy_ack(ctrl->soc); - ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true); - } else { - /* Use standard interrupt infrastructure */ - ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0, - DRV_NAME, ctrl); - } - if (ret < 0) { - dev_err(dev, "can't allocate IRQ %d: error %d\n", - ctrl->irq, ret); - goto err; + /* Enable interrupt */ + ctrl->soc->ctlrdy_ack(ctrl->soc); + ctrl->soc->ctlrdy_set_enabled(ctrl->soc, true); + } else { + /* Use standard interrupt infrastructure */ + ret = devm_request_irq(dev, ctrl->irq, brcmnand_ctlrdy_irq, 0, + DRV_NAME, ctrl); + } + if (ret < 0) { + dev_err(dev, "can't allocate IRQ %d: error %d\n", + ctrl->irq, ret); + goto err; + } } for_each_available_child_of_node(dn, child) { From patchwork Thu Dec 23 00:22:22 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527693 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 567EEC433EF for ; Thu, 23 Dec 2021 00:22:49 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345556AbhLWAWr (ORCPT ); Wed, 22 Dec 2021 19:22:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55228 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345514AbhLWAWm (ORCPT ); Wed, 22 Dec 2021 19:22:42 -0500 Received: from mail-pf1-x435.google.com (mail-pf1-x435.google.com [IPv6:2607:f8b0:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id A0E74C061747; Wed, 22 Dec 2021 16:22:42 -0800 (PST) Received: by mail-pf1-x435.google.com with SMTP id b22so3720894pfb.5; Wed, 22 Dec 2021 16:22:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=WrwpWLxiWx6mZCJiyoZtcTWmNjs4loZOAYfkmQ38gh0=; b=B5ylfhV86Rh/vvH/mHcn/Ip2WU2wGp+wP2S70p2/h9wG9kF5AtkOfIc/o12mAJyBEa ditS8hsoUaFat25XFpsKemcKqZGs6ibOjam+Gi79vx9oec1ghP2AGwDIO8PUT5odGuo6 Vw4M3zAySgvCIaqfvVQnp6qnhCi67jVY/vF61g8pScetURs0GF7OM8IAMPEQjzbfH3oc lRjYUMOwO1kEWp+roPQx2QdCSJBZKS/H7tf8Oh8x1SQQoArAU+SeoaBjhcQwhq5zz2KD Zq17T3kkoHy1Ww3H0kMLS1hKKPnubuuja3aKm5baG8hRxG1ri1MQNZxWuYMhGBLuWCOF JRrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=WrwpWLxiWx6mZCJiyoZtcTWmNjs4loZOAYfkmQ38gh0=; b=uqFqEIF9Id//Y6BsThX7ZtmW6cA4Yy/+CrqQmWWlS4T4yzE/6Th3Dc9EQFAKbDVxES eGALG/3+fzdGg6EKAqjA2EWpcoOo8DhP3vPthdsor9yUHEgXxV2jJtuBi3IOkqj3x8sV 6x60+fh616qBeqV/DHgHU8s+W6dXyy4akGfH2Gf8zdxMV1Uebcq3hBoQFOI/RoMAPKqL TPz/3FLhfQUzNa5vBtlBFcIXw7s0UK39KF4UoyvAuI74Q6+GXogpX6LxM2iU7+L/EVEy isx01Ezgst7egEGBhUn0eRACo/X84Bzaw+UL4aljEjTCIg5d39LGIdWIuUB6UwnjAM8q /4vQ== X-Gm-Message-State: AOAM533ZtYUd9d8ybkTSu+RZXFvEm//9KUNxa0UtCoba0FouQblGf2hr eBhCDHqol9CDcmjF7R0FHb1upeF/5xQ= X-Google-Smtp-Source: ABdhPJyOPmJ6pH73MHEOBhkp5drVGU20fMMShEKfzZx4cNcOOCFlptto5aYiO766wpa+qFlf4BkCDw== X-Received: by 2002:a63:416:: with SMTP id 22mr89208pge.133.1640218962033; Wed, 22 Dec 2021 16:22:42 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.40 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:41 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 6/9] mtd: rawnand: brcmnand: Add platform data structure for BCMA Date: Wed, 22 Dec 2021 16:22:22 -0800 Message-Id: <20211223002225.3738385-7-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Update the BCMA's chipcommon nand flash driver to detect which chip-select is used and pass that information via platform data to the brcmnand driver. Make sure that the brcmnand platform data structure is always at the beginning of the platform data of the "nflash" device created by BCMA to allow brcmnand to safely de-reference it. Signed-off-by: Florian Fainelli --- MAINTAINERS | 1 + drivers/bcma/driver_chipcommon_nflash.c | 17 ++++++++++++++++- include/linux/bcma/bcma_driver_chipcommon.h | 5 +++++ include/linux/platform_data/brcmnand.h | 12 ++++++++++++ 4 files changed, 34 insertions(+), 1 deletion(-) create mode 100644 include/linux/platform_data/brcmnand.h diff --git a/MAINTAINERS b/MAINTAINERS index 8912b2c1260c..37062172083c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3965,6 +3965,7 @@ L: linux-mtd@lists.infradead.org L: bcm-kernel-feedback-list@broadcom.com S: Maintained F: drivers/mtd/nand/raw/brcmnand/ +F: include/linux/platform_data/brcmnand.h BROADCOM STB PCIE DRIVER M: Jim Quinlan diff --git a/drivers/bcma/driver_chipcommon_nflash.c b/drivers/bcma/driver_chipcommon_nflash.c index d4f699aef8c4..9457f4b7ea9d 100644 --- a/drivers/bcma/driver_chipcommon_nflash.c +++ b/drivers/bcma/driver_chipcommon_nflash.c @@ -7,18 +7,25 @@ #include "bcma_private.h" +#include #include +#include #include +static const char *bcma_nflash_alt_name = "bcma_brcmnand"; + struct platform_device bcma_nflash_dev = { .name = "bcma_nflash", .num_resources = 0, }; +static const char *probes[] = { "bcm47xxpart", NULL }; + /* Initialize NAND flash access */ int bcma_nflash_init(struct bcma_drv_cc *cc) { struct bcma_bus *bus = cc->core->bus; + u32 reg; if (bus->chipinfo.id != BCMA_CHIP_ID_BCM4706 && cc->core->id.rev != 38) { @@ -33,8 +40,16 @@ int bcma_nflash_init(struct bcma_drv_cc *cc) cc->nflash.present = true; if (cc->core->id.rev == 38 && - (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT)) + (cc->status & BCMA_CC_CHIPST_5357_NAND_BOOT)) { cc->nflash.boot = true; + /* Determine the chip select that is being used */ + reg = bcma_cc_read32(cc, BCMA_CC_NAND_CS_NAND_SELECT) & 0xff; + cc->nflash.brcmnand_info.chip_select = ffs(reg) - 1; + cc->nflash.brcmnand_info.part_probe_types = probes; + cc->nflash.brcmnand_info.ecc_stepsize = 512; + cc->nflash.brcmnand_info.ecc_strength = 1; + bcma_nflash_dev.name = bcma_nflash_alt_name; + } /* Prepare platform device, but don't register it yet. It's too early, * malloc (required by device_private_init) is not available yet. */ diff --git a/include/linux/bcma/bcma_driver_chipcommon.h b/include/linux/bcma/bcma_driver_chipcommon.h index d35b9206096d..e3314f746bfa 100644 --- a/include/linux/bcma/bcma_driver_chipcommon.h +++ b/include/linux/bcma/bcma_driver_chipcommon.h @@ -3,6 +3,7 @@ #define LINUX_BCMA_DRIVER_CC_H_ #include +#include #include /** ChipCommon core registers. **/ @@ -599,6 +600,10 @@ struct bcma_sflash { #ifdef CONFIG_BCMA_NFLASH struct bcma_nflash { + /* Must be the fist member for the brcmnand driver to + * de-reference that structure. + */ + struct brcmnand_platform_data brcmnand_info; bool present; bool boot; /* This is the flash the SoC boots from */ }; diff --git a/include/linux/platform_data/brcmnand.h b/include/linux/platform_data/brcmnand.h new file mode 100644 index 000000000000..8b8777985dce --- /dev/null +++ b/include/linux/platform_data/brcmnand.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +#ifndef BRCMNAND_PLAT_DATA_H +#define BRCMNAND_PLAT_DATA_H + +struct brcmnand_platform_data { + int chip_select; + const char * const *part_probe_types; + unsigned int ecc_stepsize; + unsigned int ecc_strength; +}; + +#endif /* BRCMNAND_PLAT_DATA_H */ From patchwork Thu Dec 23 00:22:23 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527996 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 4EAE9C433EF for ; Thu, 23 Dec 2021 00:22:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345574AbhLWAWt (ORCPT ); Wed, 22 Dec 2021 19:22:49 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55240 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345495AbhLWAWo (ORCPT ); Wed, 22 Dec 2021 19:22:44 -0500 Received: from mail-pl1-x636.google.com (mail-pl1-x636.google.com [IPv6:2607:f8b0:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5AFB7C061748; Wed, 22 Dec 2021 16:22:44 -0800 (PST) Received: by mail-pl1-x636.google.com with SMTP id x15so3055106plg.1; Wed, 22 Dec 2021 16:22:44 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ooOQpqGI8yqwBdhnAO1DTOd+XDWRopDBw4/NhIv0RTg=; b=Caau2MVJF8vOqLzcwoVJXvMhtrKVgzUKS7PfAM0T86L5n6vh3B5MtIy4/0vpJflYMk 8o8O97LLzApN2bfBSOuJpaMQQxa1GFs31k74LvcYSDIkjAbezmh99XHexENvLCNprvrG qoo/VAhQuqVPEUfszUKj4xDs+Nk/cJ82RVgF20dS8FT5kSs/ayOMxIe2FDgK4ShFRzJ5 QQ5YVpQmoMoZoQhiFYsRUpTvsVshweqH6AfWc64S4kEYgoriaWvJHsKqPoad/us8KpwT gGTpy8Musa+aPKHIeRnKTOeLEaVgYR0UYiN+Rsj1CTbWmsZqk+wE64BBS5Au920rBMyL a74g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ooOQpqGI8yqwBdhnAO1DTOd+XDWRopDBw4/NhIv0RTg=; b=462VMHyHrsXxJtjU4BLY5mjr7rRX8TnFvP2s4lDfkPJCNe1tHcpLgr60JM07mffnpT Lgy2ngHAtZpmFORa2pZeJqEW1Gth9r69Kgq/d9tELZoriCD+psnAO+M1EuYVSpQcMKqX iwiNJFKzEpyqj+mE9NdCc+8DmiD37BxH9zDHvWMjft7WlC63y+WVf/YmEzMWSfIKy1fK T5nzpTZ7XJYgL1sFM9sKHYbE/orE0ZW9GphgD+qoXFiol+kQu+x66bhnUjoAq+fxoz6Y dznF+ZFkUt1M96QApAWZF6GKUDRy1Okx9wByCBzjTN7pWs69daO1LTWBf69+UIF+mINT 892w== X-Gm-Message-State: AOAM530b/i1ESW5saPggs6/aPhlgrRm41e/Cmf6N8vutTNR4qEgePdGO 0WpAA6Mu3NDGt2WCqx2YV9M= X-Google-Smtp-Source: ABdhPJxa7BlJTDNL5Bl9zH3S6qNvt+nePjZ4VIg972BHLrDi/rIXlBQtfu1Tm6HFn1XrrNRYwtePuw== X-Received: by 2002:a17:90a:6b44:: with SMTP id x4mr49967pjl.27.1640218963819; Wed, 22 Dec 2021 16:22:43 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:43 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 7/9] mtd: rawnand: brcmnand: Allow platform data instantation Date: Wed, 22 Dec 2021 16:22:23 -0800 Message-Id: <20211223002225.3738385-8-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Make use of the recently refactored code in brcmnand_init_cs() and derive the chip-select from the platform data that is supplied. Update the various code paths to avoid relying on possibly non-existent resources, too. Signed-off-by: Florian Fainelli --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 45 ++++++++++++++++++------ 1 file changed, 35 insertions(+), 10 deletions(-) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index e7947cff4dd1..2f2aaa554282 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -9,6 +9,7 @@ #include #include #include +#include #include #include #include @@ -2760,7 +2761,8 @@ static const struct nand_controller_ops brcmnand_controller_ops = { .attach_chip = brcmnand_attach_chip, }; -static int brcmnand_init_cs(struct brcmnand_host *host) +static int brcmnand_init_cs(struct brcmnand_host *host, + const char * const *part_probe_types) { struct brcmnand_controller *ctrl = host->ctrl; struct device *dev = ctrl->dev; @@ -2813,7 +2815,7 @@ static int brcmnand_init_cs(struct brcmnand_host *host) if (ret) return ret; - ret = mtd_device_register(mtd, NULL, 0); + ret = mtd_device_parse_register(mtd, part_probe_types, NULL, NULL, 0); if (ret) nand_cleanup(chip); @@ -2982,17 +2984,15 @@ static int brcmnand_edu_setup(struct platform_device *pdev) int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) { + struct brcmnand_platform_data *pd = dev_get_platdata(&pdev->dev); struct device *dev = &pdev->dev; struct device_node *dn = dev->of_node, *child; struct brcmnand_controller *ctrl; + struct brcmnand_host *host; struct resource *res; int ret; - /* We only support device-tree instantiation */ - if (!dn) - return -ENODEV; - - if (!of_match_node(brcmnand_of_match, dn)) + if (dn && !of_match_node(brcmnand_of_match, dn)) return -ENODEV; ctrl = devm_kzalloc(dev, sizeof(*ctrl), GFP_KERNEL); @@ -3013,7 +3013,7 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) /* NAND register range */ res = platform_get_resource(pdev, IORESOURCE_MEM, 0); ctrl->nand_base = devm_ioremap_resource(dev, res); - if (IS_ERR(ctrl->nand_base)) + if (IS_ERR(ctrl->nand_base) && !brcmnand_soc_has_ops(soc)) return PTR_ERR(ctrl->nand_base); /* Enable clock before using NAND registers */ @@ -3157,7 +3157,6 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) for_each_available_child_of_node(dn, child) { if (of_device_is_compatible(child, "brcm,nandcs")) { - struct brcmnand_host *host; host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); if (!host) { @@ -3177,7 +3176,7 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) nand_set_flash_node(&host->chip, dn); - ret = brcmnand_init_cs(host); + ret = brcmnand_init_cs(host, NULL); if (ret) { devm_kfree(dev, host); continue; /* Try all chip-selects */ @@ -3187,6 +3186,32 @@ int brcmnand_probe(struct platform_device *pdev, struct brcmnand_soc *soc) } } + if (!list_empty(&ctrl->host_list)) + return 0; + + if (!pd) { + ret = -ENODEV; + goto err; + } + + /* If we got there we must have been probing via platform data */ + host = devm_kzalloc(dev, sizeof(*host), GFP_KERNEL); + if (!host) { + ret = -ENOMEM; + goto err; + } + host->pdev = pdev; + host->ctrl = ctrl; + host->cs = pd->chip_select; + host->chip.ecc.size = pd->ecc_stepsize; + host->chip.ecc.strength = pd->ecc_strength; + + ret = brcmnand_init_cs(host, pd->part_probe_types); + if (ret) + goto err; + + list_add_tail(&host->node, &ctrl->host_list); + /* No chip-selects could initialize properly */ if (list_empty(&ctrl->host_list)) { ret = -ENODEV; From patchwork Thu Dec 23 00:22:24 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527691 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 438BEC433EF for ; Thu, 23 Dec 2021 00:23:00 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345585AbhLWAW6 (ORCPT ); Wed, 22 Dec 2021 19:22:58 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55252 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345544AbhLWAWq (ORCPT ); Wed, 22 Dec 2021 19:22:46 -0500 Received: from mail-pf1-x42a.google.com (mail-pf1-x42a.google.com [IPv6:2607:f8b0:4864:20::42a]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1B654C061756; Wed, 22 Dec 2021 16:22:46 -0800 (PST) Received: by mail-pf1-x42a.google.com with SMTP id t123so3693659pfc.13; Wed, 22 Dec 2021 16:22:46 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=yy0dKp0QqTKRDDm+DzMuRMtHniPa8Xch60bze9ubGZk=; b=oiAcd/kTGkJc+314HWZKIChHC7+TT85eKuknVt2Qrl8fgIWwHb4HZLCou6kEMJC6dG kCTzfc6Kr6EpxJUfSYWl+8oE5OK2D8o+Nm0h7ql13+5TALigNZZeRApbq6regGDtSBBL YaszKtin8mMpaoJs9XguPE/UvrytJjv8GgNjG9pBw4Jmx+pzb4VTjgG+Y5dRnd5HYq0c fGXZPnXlyu3Wvifus+DHtjdqcGdKRPoWQeaChpnd6vrzgUjzwnnXkQpk3RubZWUdFXWn PwsLixClBkBVFpKtFCUFvDm4y249kx/F933+WTZWnCerksgh8P81xdJLIajz8hIJhlno fI1w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=yy0dKp0QqTKRDDm+DzMuRMtHniPa8Xch60bze9ubGZk=; b=4ZD+EhFl21h/AoyWKc5XuRN/AdWFaF7F9m5BwnzHIrmkT+0rSe/WlLiez4LCLT8yz0 yiQPhPeqD6iMPPyIVZ0dpZpDv4auIyj4f97afdSdD1L2sOkqCZ+QzXbo+HTF+1kKVGif vFWJknRXPVCQol8FQl5LVJT9O+ctJm4241/5s9C2hu3x3KX58zhDKS2nxHvMGzIvdyts xwYA1cP97HTT41HBhNoq6pYvaAkQSC7Pbc2aj93yZzxdzfqSYZMiq3euZjqgOi746AOj cdvq9aWLiFdPg7rH+hY53vIAz9Tot9Z5NnEsUhfin0BQ6ssG/PPnvBOD/je9GIGigEYa jdIA== X-Gm-Message-State: AOAM533ywqmYP1jQwX+v9V40FN4Fl3Wd0HOJVzBiE8ZL540pZNroadei VF9MAL27GrIvCTmWH0fPllk= X-Google-Smtp-Source: ABdhPJyEsAVWK4JWRbMSF91GaDuMQ+6a9Y/KzuHDIAlj+nme3qw1QD74G5FuOcQ6YCrjDXd27UQEEw== X-Received: by 2002:a05:6a00:18a9:b0:4ba:d14d:88 with SMTP id x41-20020a056a0018a900b004bad14d0088mr158299pfh.59.1640218965581; Wed, 22 Dec 2021 16:22:45 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.44 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:45 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 8/9] mtd: rawnand: brcmnand: BCMA controller uses command shift of 0 Date: Wed, 22 Dec 2021 16:22:24 -0800 Message-Id: <20211223002225.3738385-9-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org For some odd and unexplained reason the BCMA NAND controller, albeit revision 3.4 uses a command shift of 0 instead of 24 as it should be, quirk that. Signed-off-by: Florian Fainelli --- drivers/mtd/nand/raw/brcmnand/brcmnand.c | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/drivers/mtd/nand/raw/brcmnand/brcmnand.c b/drivers/mtd/nand/raw/brcmnand/brcmnand.c index 2f2aaa554282..2dfb94c4cc93 100644 --- a/drivers/mtd/nand/raw/brcmnand/brcmnand.c +++ b/drivers/mtd/nand/raw/brcmnand/brcmnand.c @@ -908,6 +908,12 @@ static void brcmnand_wr_corr_thresh(struct brcmnand_host *host, u8 val) static inline int brcmnand_cmd_shift(struct brcmnand_controller *ctrl) { + /* Kludge for the BCMA-based NAND controller which does not actually + * shift the command + */ + if (ctrl->nand_version == 0x0304 && brcmnand_soc_has_ops(ctrl->soc)) + return 0; + if (ctrl->nand_version < 0x0602) return 24; return 0; From patchwork Thu Dec 23 00:22:25 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Florian Fainelli X-Patchwork-Id: 527995 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29723C433FE for ; Thu, 23 Dec 2021 00:22:58 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1345559AbhLWAWy (ORCPT ); Wed, 22 Dec 2021 19:22:54 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:55264 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1345560AbhLWAWs (ORCPT ); Wed, 22 Dec 2021 19:22:48 -0500 Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA888C061748; Wed, 22 Dec 2021 16:22:47 -0800 (PST) Received: by mail-pl1-x631.google.com with SMTP id n16so3055195plc.2; Wed, 22 Dec 2021 16:22:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B/4Rn7jIc8ftTpjbra5Wz6AYzDCXpGuGFG/j7apzAik=; b=k6QCX/Ymv3gTQg74d/r3VQ8KxAJut/r/mMAyglcbQoosZaQOtfDT6jibnZznuXisXx zjhLP4XTp7TkPoQhHJtwYy77zh23RYLDF47tTkwaOzxIl1D1iGvQO4ECpT92sMt46pNR DoZ2q6nZs00ALvhjrsCJewcG86zxAZx/lwXJZrnIjgJcGhi3rx+CS68tIi7ucDmIHBNd HM70noNpm5QVQQ9fv7YOPqQdQSPKgEmze6j44hRk4yfOsL2cbO5sCPA+6ltRPxdJEULT /mMAo+u1iDHTZzTOohV5p4vWg5j93ip36gIwOLTidJTzPOJymoQJz6R/sOO2LeWihtYx 34Sw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B/4Rn7jIc8ftTpjbra5Wz6AYzDCXpGuGFG/j7apzAik=; b=ElyuoyD6W1erk+kw/jgx9oN+Iy4ojcfplFE1jWVZuSfHVSXvksMmF66wF5QCenbUZJ RGrrK/b5H8WHN3xAkC4GCKE3kD+E7hmEZsmtNz3pRZVF9PN9TifPS5tMisAOXmkltVCd 76Sc3Gq4gbFHvefY0OPXqdYXgFT2444DfCgpxD0iRZ09AnBCkbT2uNGeY8QIc2QO0afT vSc2ojNB8KAk9wAeISvhhV3ESgtnehZzDp7gA1XEARTotDT6AeGy2RBAAYBiynxXOmUt VjuvohhUMFwyh7iBpv3zDaoNLKTfjfYWMMExxpONc4q2oQP+AMAHH3CiKwf9f8rQ17Jj /1/g== X-Gm-Message-State: AOAM533GHIxkmwhk+SXwneqxmdPzP9wRXlh2zjRzYBCvtnq//Y5gXT4d IrY580CnoNqjDDnMoguQYeo= X-Google-Smtp-Source: ABdhPJyzDrnhUwQuP4xuG3Evu4ES9qduMUAMVa3xWuELq7+dUMTbs70knDE5wWTvDMQDdRDuUjq/aw== X-Received: by 2002:a17:90b:314b:: with SMTP id ip11mr261023pjb.133.1640218967349; Wed, 22 Dec 2021 16:22:47 -0800 (PST) Received: from fainelli-desktop.igp.broadcom.net ([192.19.223.252]) by smtp.gmail.com with ESMTPSA id e24sm6720703pjt.45.2021.12.22.16.22.45 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 22 Dec 2021 16:22:46 -0800 (PST) From: Florian Fainelli To: linux-mtd@lists.infradead.org Cc: Florian Fainelli , =?utf-8?b?UmFmYcWCIE1pxYJlY2tp?= , Miquel Raynal , Richard Weinberger , Vignesh Raghavendra , Brian Norris , Kamal Dasu , Arnd Bergmann , Cai Huoqing , Colin Ian King , linux-kernel@vger.kernel.org (open list), linux-wireless@vger.kernel.org (open list:BROADCOM SPECIFIC AMBA DRIVER (BCMA)), bcm-kernel-feedback-list@broadcom.com (open list:BROADCOM STB NAND FLASH DRIVER) Subject: [PATCH 9/9] mtd: rawnand: brcmnand: Add BCMA shim Date: Wed, 22 Dec 2021 16:22:25 -0800 Message-Id: <20211223002225.3738385-10-f.fainelli@gmail.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20211223002225.3738385-1-f.fainelli@gmail.com> References: <20211223002225.3738385-1-f.fainelli@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Add a BCMA shim to allow us to register the brcmnand driver using the BCMA bus which provides indirect memory mapped access to SoC registers. There are a number of registers that need to be byte swapped because they are natively big endian, coming directly from the NAND chip, and there is no bus interface unlike the iProc or STB platforms that performs the byte swapping for us. Signed-off-by: Florian Fainelli --- drivers/mtd/nand/raw/Kconfig | 11 ++ drivers/mtd/nand/raw/brcmnand/Makefile | 2 + drivers/mtd/nand/raw/brcmnand/bcma_nand.c | 131 ++++++++++++++++++++++ 3 files changed, 144 insertions(+) create mode 100644 drivers/mtd/nand/raw/brcmnand/bcma_nand.c diff --git a/drivers/mtd/nand/raw/Kconfig b/drivers/mtd/nand/raw/Kconfig index 0a45d3c6c15b..f643e02e5559 100644 --- a/drivers/mtd/nand/raw/Kconfig +++ b/drivers/mtd/nand/raw/Kconfig @@ -208,6 +208,17 @@ config MTD_NAND_BRCMNAND originally designed for Set-Top Box but is used on various BCM7xxx, BCM3xxx, BCM63xxx, iProc/Cygnus and more. +if MTD_NAND_BRCMNAND + +config MTD_NAND_BRCMNAND_BCMA + tristate "Broadcom BCMA NAND controller" + depends on BCMA_NFLASH + depends on BCMA + help + Enables the BRCMNAND controller over BCMA on BCM47186/BCM5358 SoCs. + +endif # MTD_NAND_BRCMNAND + config MTD_NAND_BCM47XXNFLASH tristate "BCM4706 BCMA NAND controller" depends on BCMA_NFLASH diff --git a/drivers/mtd/nand/raw/brcmnand/Makefile b/drivers/mtd/nand/raw/brcmnand/Makefile index 195b845e48b8..16dc7254200e 100644 --- a/drivers/mtd/nand/raw/brcmnand/Makefile +++ b/drivers/mtd/nand/raw/brcmnand/Makefile @@ -6,3 +6,5 @@ obj-$(CONFIG_MTD_NAND_BRCMNAND) += bcm63138_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += bcm6368_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmstb_nand.o obj-$(CONFIG_MTD_NAND_BRCMNAND) += brcmnand.o + +obj-$(CONFIG_MTD_NAND_BRCMNAND_BCMA) += bcma_nand.o diff --git a/drivers/mtd/nand/raw/brcmnand/bcma_nand.c b/drivers/mtd/nand/raw/brcmnand/bcma_nand.c new file mode 100644 index 000000000000..e3be9ecf0761 --- /dev/null +++ b/drivers/mtd/nand/raw/brcmnand/bcma_nand.c @@ -0,0 +1,131 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Copyright © 2021 Broadcom + */ +#include +#include +#include +#include +#include +#include + +#include "brcmnand.h" + +struct brcmnand_bcma_soc { + struct brcmnand_soc soc; + struct bcma_drv_cc *cc; +}; + +static inline bool brcmnand_bcma_needs_swapping(u32 offset) +{ + switch (offset) { + case BCMA_CC_NAND_SPARE_RD0: + case BCMA_CC_NAND_SPARE_RD4: + case BCMA_CC_NAND_SPARE_RD8: + case BCMA_CC_NAND_SPARE_RD12: + case BCMA_CC_NAND_SPARE_WR0: + case BCMA_CC_NAND_SPARE_WR4: + case BCMA_CC_NAND_SPARE_WR8: + case BCMA_CC_NAND_SPARE_WR12: + case BCMA_CC_NAND_DEVID: + case BCMA_CC_NAND_DEVID_X: + case BCMA_CC_NAND_SPARE_RD16: + case BCMA_CC_NAND_SPARE_RD20: + case BCMA_CC_NAND_SPARE_RD24: + case BCMA_CC_NAND_SPARE_RD28: + return true; + } + + return false; +} + +static u32 brcmnand_bcma_read_reg(struct brcmnand_soc *soc, u32 offset) +{ + struct brcmnand_bcma_soc *sc; + u32 val; + + sc = container_of(soc, struct brcmnand_bcma_soc, soc); + + /* Offset into the NAND block and deal with the flash cache separately */ + if (offset == ~0) + offset = BCMA_CC_NAND_CACHE_DATA; + else + offset += BCMA_CC_NAND_REVISION; + + val = bcma_cc_read32(sc->cc, offset); + + /* Swap if necessary */ + if (brcmnand_bcma_needs_swapping(offset)) + val = be32_to_cpu(val); + return val; +} + +static void brcmnand_bcma_write_reg(struct brcmnand_soc *soc, u32 val, + u32 offset) +{ + struct brcmnand_bcma_soc *sc; + + sc = container_of(soc, struct brcmnand_bcma_soc, soc); + + /* Offset into the NAND block */ + if (offset == ~0) + offset = BCMA_CC_NAND_CACHE_DATA; + else + offset += BCMA_CC_NAND_REVISION; + + /* Swap if necessary */ + if (brcmnand_bcma_needs_swapping(offset)) + val = cpu_to_be32(val); + + bcma_cc_write32(sc->cc, offset, val); +} + +static struct brcmnand_io_ops brcmnand_bcma_io_ops = { + .read_reg = brcmnand_bcma_read_reg, + .write_reg = brcmnand_bcma_write_reg, +}; + +static void brcmnand_bcma_prepare_data_bus(struct brcmnand_soc *soc, bool prepare, + bool is_param) +{ + struct brcmnand_bcma_soc *sc; + + sc = container_of(soc, struct brcmnand_bcma_soc, soc); + + bcma_cc_write32(sc->cc, BCMA_CC_NAND_CACHE_ADDR, 0); +} + +static int brcmnand_bcma_nand_probe(struct platform_device *pdev) +{ + struct bcma_nflash *nflash = dev_get_platdata(&pdev->dev); + struct brcmnand_bcma_soc *soc; + + soc = devm_kzalloc(&pdev->dev, sizeof(*soc), GFP_KERNEL); + if (!soc) + return -ENOMEM; + + soc->cc = container_of(nflash, struct bcma_drv_cc, nflash); + soc->soc.prepare_data_bus = brcmnand_bcma_prepare_data_bus; + soc->soc.ops = &brcmnand_bcma_io_ops; + + if (soc->cc->core->bus->chipinfo.id == BCMA_CHIP_ID_BCM4706) { + dev_err(&pdev->dev, "Use bcm47xxnflash for 4706!\n"); + return -ENODEV; + } + + return brcmnand_probe(pdev, &soc->soc); +} + +static struct platform_driver brcmnand_bcma_nand_driver = { + .probe = brcmnand_bcma_nand_probe, + .remove = brcmnand_remove, + .driver = { + .name = "bcma_brcmnand", + .pm = &brcmnand_pm_ops, + } +}; +module_platform_driver(brcmnand_bcma_nand_driver); + +MODULE_LICENSE("GPL v2"); +MODULE_AUTHOR("Braodcom"); +MODULE_DESCRIPTION("NAND driver for BCMA chips");