From patchwork Sun Jan 9 02:49:03 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 530824 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 752FEC433EF for ; Sun, 9 Jan 2022 02:47:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235100AbiAICrF (ORCPT ); Sat, 8 Jan 2022 21:47:05 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42134 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235105AbiAICrE (ORCPT ); Sat, 8 Jan 2022 21:47:04 -0500 Received: from mail-wr1-x429.google.com (mail-wr1-x429.google.com [IPv6:2a00:1450:4864:20::429]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 315AFC061746 for ; Sat, 8 Jan 2022 18:47:04 -0800 (PST) Received: by mail-wr1-x429.google.com with SMTP id e9so18024374wra.2 for ; Sat, 08 Jan 2022 18:47:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZhVNeBs7vzyROSZpuaXTYGD6xm3M8v73/QT84NJecB8=; b=ciMo0djpXFXBlackzsTMPliC28rb6byUGCUJp01rgrVj4PYlSXt4v7yCmh4bKfk2r6 tvZIcT/hYKYodpwqXJ9nUd8KGaYXYbpO9SwbBet2F1b0hmpsHm5pEyY1I/lF27R2UEMw zhim6znrmafogvpr9FQrxZfrXkswgRmfoiUeEiMsokaI81Ty+ZTu2tD3FsXUlu8dWT+Q ht50ZYJUkq+NTXd9JZvUGCxFKR3YObvEXUsC6vFBOXsMJ5Z4plP+Mf8RaTHNE8hJG1Uc l1AiuVt0YHXl3nCKZyDM3y2mN2IBrcYBTfodNMLh5DRp2ouwkeEQRe8YMx6ekZNpjk6Z hOfA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZhVNeBs7vzyROSZpuaXTYGD6xm3M8v73/QT84NJecB8=; b=GuEsIjKEs7fmirMzPfgCOHjerz3M/71nqbhNFY1c3zylAk5GUj4Dw1X2f8MzGuUydV cV2u14QlqE7Y52R8c+KN6kjRwdmuqy4myL1xaVtiQUTNFSQ5QsmmsROsess9SqoUwK3Z 7LRu2XRDBs1SEM97ngKkTBILlNjQRPlxsa1roP9lP9Z8HDksiA+wVUdj+h2mcbM0vrn9 ba5pN0NE80ampEQxQSfirwVA5NfvzrYXN1dtNzo361i4wnZJ6IDp9gRwFrRPDx2wDcB7 3wStE1EUrvcWfV/jSNmWvCNwaorZ+glFZjp8rV0ABgC+LAr5L4u9h6gqsRtjbD48WNJL HOyA== X-Gm-Message-State: AOAM531ep2ymJNNZBB0/shi2woYE1EiEWGphbSld0BFRJSypHtD1j/SI rhM8QAWX1W72slBcTC2fCZZ05ygFi9JIkw== X-Google-Smtp-Source: ABdhPJwY30Ib6h3mW2+HA2MZmdHyS2szKOqpIHzgIJZ2Ek6wEVXfTxOQZXvjWBTTeBHjzmF5XVfFRQ== X-Received: by 2002:adf:f90c:: with SMTP id b12mr53550210wrr.123.1641696422424; Sat, 08 Jan 2022 18:47:02 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id l13sm3341748wrs.73.2022.01.08.18.47.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Jan 2022 18:47:02 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, mchehab@kernel.org, hverkuil@xs4all.nl, robert.foss@linaro.org Cc: jonathan@marek.ca, andrey.konovalov@linaro.org, todor.too@gmail.com, agross@kernel.org, bjorn.andersson@linaro.org, jgrahsl@snap.com, hfink@snap.com, vladimir.zapolskiy@linaro.org, dmitry.baryshkov@linaro.org, bryan.odonoghue@linaro.org, devicetree@vger.kernel.org, robh@kernel.org Subject: [PATCH v2 1/8] media: dt-bindings: media: camss: Fixup vdda regulator descriptions sdm845 Date: Sun, 9 Jan 2022 02:49:03 +0000 Message-Id: <20220109024910.2041763-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220109024910.2041763-1-bryan.odonoghue@linaro.org> References: <20220109024910.2041763-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org If we review the schematic for RB3 Thundercomm document Turbox-845 we see that the CAMSS CSI PHY has the same basic power-rail layout as UFS, PCIe and USB PHYs. We should therefore have two regulator declarations as is the case for UFS, PCIe and USB. Cc: devicetree@vger.kernel.org Cc: robh@kernel.org Signed-off-by: Bryan O'Donoghue Reviewed-by: Robert Foss --- .../bindings/media/qcom,sdm845-camss.yaml | 14 ++++++++++---- 1 file changed, 10 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml index 9ca5dfa7f2260..ae0642b9ae5ec 100644 --- a/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml +++ b/Documentation/devicetree/bindings/media/qcom,sdm845-camss.yaml @@ -203,9 +203,13 @@ properties: - const: vfe1 - const: vfe_lite - vdda-supply: + vdda-phy-supply: description: - Definition of the regulator used as analog power supply. + Phandle to a regulator supply to PHY core block. + + vdda-pll-supply: + description: + Phandle to 1.8V regulator supply to PHY refclk pll block. required: - clock-names @@ -217,7 +221,8 @@ required: - power-domains - reg - reg-names - - vdda-supply + - vdda-phy-supply + - vdda-pll-supply additionalProperties: false @@ -361,7 +366,8 @@ examples: "vfe1", "vfe_lite"; - vdda-supply = <®_2v8>; + vdda-phy-supply = <&vreg_l1a_0p875>; + vdda-pll-supply = <&vreg_l26a_1p2>; ports { #address-cells = <1>; From patchwork Sun Jan 9 02:49:05 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 530823 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 55A81C433FE for ; Sun, 9 Jan 2022 02:47:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235115AbiAICrH (ORCPT ); Sat, 8 Jan 2022 21:47:07 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42150 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235106AbiAICrG (ORCPT ); Sat, 8 Jan 2022 21:47:06 -0500 Received: from mail-wm1-x331.google.com (mail-wm1-x331.google.com [IPv6:2a00:1450:4864:20::331]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7B029C06173F for ; Sat, 8 Jan 2022 18:47:06 -0800 (PST) Received: by mail-wm1-x331.google.com with SMTP id 2-20020a05600c02c200b003470f96e778so4981009wmn.5 for ; Sat, 08 Jan 2022 18:47:06 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=P5MT7rEoiiCVz2gFm3EQaB2V5VAMjaCUk3cu8vjhwBg=; b=s4QDAkrsbWWo6Op4Bso41dYSVGBQ6LLu61q/iu0h/7q4ZEr5wvuSBdqC7UlxMYWe9F LsuuEAgyokh8rIVuXJyLR0/cG8+EAOkfGzxMyBgPyUFjuT04JiL7JqAKLmaGbvMBzCEs 87sYK+95NA5L5+pEhcui2NeiAGQc5iRfkDyMzFDU7wOgZQeg4t3XZgmjED2RdzevL8+j efZ8f/hmlEggdblxpC3VNOB22/Ui6DHapKJb6wk51sthiYCDRILqs3YaeT3KT29pNQWt lTJO+ZBddOy4FLA4F1M2BrZeqQ1jqx7Qu/KkH8v+snagVxEov3NqdB9I7GAqcaGskT1r iJug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=P5MT7rEoiiCVz2gFm3EQaB2V5VAMjaCUk3cu8vjhwBg=; b=ChF+K//FQ3EgFutWXplEE5qxcOh6gDrT0yn137an6bN4tnZm6VK9kTH7ayynkVyImz 9LSW9QRZPO1yw4QvwdQUn9lAwCXLy+SxydDXSBrzlp6q2nLLaO4RBbwrZX8CWr0znGTd VQJibMzLHaE5boNky92R1lLQ8AeHlGAxCSWjPbhXpfIEAAiyVHRUY1KvCfNFtOqRfdDh 6t1bNWP8cQtBuX/b1n91yJZJBxrN8hGvZV3f+xY9eKni2r2C2tBcKRfmbSfLfl3fdN8i xoDFr4N4X9fuG/C6YMcXCoWxbstPF1iK83PMJLG7BDCDolMg5kpiGReFq8yvKH/yfa/g 5sEw== X-Gm-Message-State: AOAM533iuMJnl/yQ8j1L+R86+7Sicjs6AIMLBqen1y1lS6FlqVJZiZPu SglWvyimnmw3YHPPHggpXIUlm2/XMieXnA== X-Google-Smtp-Source: ABdhPJySua1hDFonprSsYul58orghyPVu/tAE9uq2rOtsCJ4iSxANWWAFHGV03Benjfn+g3o310Big== X-Received: by 2002:a05:600c:5027:: with SMTP id n39mr16622051wmr.148.1641696424723; Sat, 08 Jan 2022 18:47:04 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id l13sm3341748wrs.73.2022.01.08.18.47.03 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Jan 2022 18:47:04 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, mchehab@kernel.org, hverkuil@xs4all.nl, robert.foss@linaro.org Cc: jonathan@marek.ca, andrey.konovalov@linaro.org, todor.too@gmail.com, agross@kernel.org, bjorn.andersson@linaro.org, jgrahsl@snap.com, hfink@snap.com, vladimir.zapolskiy@linaro.org, dmitry.baryshkov@linaro.org, bryan.odonoghue@linaro.org Subject: [PATCH v2 3/8] arm64: dts: qcom: sdm845: Rename camss vdda-supply to vdda-phy-supply Date: Sun, 9 Jan 2022 02:49:05 +0000 Message-Id: <20220109024910.2041763-4-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220109024910.2041763-1-bryan.odonoghue@linaro.org> References: <20220109024910.2041763-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org The dts entry vdda-supply connects to a common vdda-phy-supply rail. Rename to reflect what the functionality is. Signed-off-by: Bryan O'Donoghue Reviewed-by: Robert Foss --- arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index 13f80a0b6faaa..c4db88dbf8766 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -1115,7 +1115,7 @@ &cci { }; &camss { - vdda-supply = <&vreg_l1a_0p875>; + vdda-phy-supply = <&vreg_l1a_0p875>; status = "ok"; From patchwork Sun Jan 9 02:49:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 530821 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 34006C433EF for ; Sun, 9 Jan 2022 02:47:12 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235101AbiAICrK (ORCPT ); Sat, 8 Jan 2022 21:47:10 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42170 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235118AbiAICrJ (ORCPT ); Sat, 8 Jan 2022 21:47:09 -0500 Received: from mail-wm1-x32f.google.com (mail-wm1-x32f.google.com [IPv6:2a00:1450:4864:20::32f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 9F6D2C061401 for ; Sat, 8 Jan 2022 18:47:08 -0800 (PST) Received: by mail-wm1-x32f.google.com with SMTP id n19-20020a7bc5d3000000b003466ef16375so7686356wmk.1 for ; Sat, 08 Jan 2022 18:47:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=iuR+ZNhYn3JubCtk0VoYspUuU6Ez1dyaX3NwYBur+qE=; b=JquMZkAx/lTRS3xu/UWjzMNrL0smkjlwkc7uGMUd7WL8g+g/k6eUd0oZDEuwv8TqkH 9aa6FjeWXaAH3UGYnRuO6Xijh+dmbloe0Y7OllriJfAf6LAMQcgxrJ5W5cI/dlsVZEGe WJSmvXMMJwxEBBbvablHYGdCscpubOfCuJWA1lJs1yuzTPIJUbsVpeOO5MOUZ8nppOxY /G1B3ioI6mXx6Xc9k7erS1pkxfYCm46XXgH+QuOZ9d473Yw24T/ogvgW3643B0LBHqgh Dn5O0Wg8XL0wt2tiu3FfV8EXJXqrSJUpMZqvUeNRFLcPZyur2wvkwOPjQ5nsOK6IOQUS v27g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=iuR+ZNhYn3JubCtk0VoYspUuU6Ez1dyaX3NwYBur+qE=; b=26n2YkDM71OqfRKgNdQp8322LN/XzxiJbIezjZQXR/gVugPByjL7r334/s75Pjt96/ MDDPEu3lUQ9vRpWg+Ub109C9cI99IX37ikncn350oHdx6jqoB6kDSKeQkKAMCUBNcb4x xcFNtx/gyb3a64E1ACwYBZW0/s9Q5HKxWBar4NLJTxDX901Qeo8ckjTrSoxTEtCe06A3 UwvxzgwhmLA3jljSzWM4cb5OX90DmHFtNnY/8obpiStEyBvASNsKQQ8n/VOSBh5/dPri kdiPo/pUMzBXuyd/rsuZumi0WUsDgZOYb0V1nYpbXH8VHiY/0VsR95lA8bmJuqERqz0Y JUoA== X-Gm-Message-State: AOAM532qB9KCYdHjrg3Ub5OklnP7eOJH3t0ZHUc2L5E6qveLHueQzNWx rarepgCnXf4WUVCJNQLMYfwHXLkxl6pRpQ== X-Google-Smtp-Source: ABdhPJyWCZCIW6Wfbuc67Uxy6Vrp6SbgXge06POg7JBLvpEIq/l7bCu8KJrFqmVBpvjthPyuGfJO5A== X-Received: by 2002:a7b:cb55:: with SMTP id v21mr16397194wmj.77.1641696426795; Sat, 08 Jan 2022 18:47:06 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id l13sm3341748wrs.73.2022.01.08.18.47.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Jan 2022 18:47:06 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, mchehab@kernel.org, hverkuil@xs4all.nl, robert.foss@linaro.org Cc: jonathan@marek.ca, andrey.konovalov@linaro.org, todor.too@gmail.com, agross@kernel.org, bjorn.andersson@linaro.org, jgrahsl@snap.com, hfink@snap.com, vladimir.zapolskiy@linaro.org, dmitry.baryshkov@linaro.org, bryan.odonoghue@linaro.org Subject: [PATCH v2 5/8] media: camss: Add regulator_bulk support Date: Sun, 9 Jan 2022 02:49:07 +0000 Message-Id: <20220109024910.2041763-6-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220109024910.2041763-1-bryan.odonoghue@linaro.org> References: <20220109024910.2041763-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add the ability to enable or disable multiple regulators in bulk with camss. This is useful for sm8250, sdm845 and it looks like sdm660 where we have more than one CSI regulator to do at once. It should just work for standalone existing vdda regulators and parts which don't have an explicitly defined CSI regulator. Signed-off-by: Bryan O'Donoghue Reported-by: Vladimir Zapolskiy Reviewed-by: Robert Foss --- .../media/platform/qcom/camss/camss-csid.c | 43 ++++++--- .../media/platform/qcom/camss/camss-csid.h | 3 +- drivers/media/platform/qcom/camss/camss.c | 94 +++++++++---------- drivers/media/platform/qcom/camss/camss.h | 2 +- 4 files changed, 79 insertions(+), 63 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss-csid.c b/drivers/media/platform/qcom/camss/camss-csid.c index 32f82e471bae1..00ef35e7786d4 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.c +++ b/drivers/media/platform/qcom/camss/camss-csid.c @@ -173,7 +173,8 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) if (ret < 0) return ret; - ret = csid->vdda ? regulator_enable(csid->vdda) : 0; + ret = regulator_bulk_enable(csid->num_supplies, + csid->supplies); if (ret < 0) { pm_runtime_put_sync(dev); return ret; @@ -181,16 +182,16 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) ret = csid_set_clock_rates(csid); if (ret < 0) { - if (csid->vdda) - regulator_disable(csid->vdda); + regulator_bulk_disable(csid->num_supplies, + csid->supplies); pm_runtime_put_sync(dev); return ret; } ret = camss_enable_clocks(csid->nclocks, csid->clock, dev); if (ret < 0) { - if (csid->vdda) - regulator_disable(csid->vdda); + regulator_bulk_disable(csid->num_supplies, + csid->supplies); pm_runtime_put_sync(dev); return ret; } @@ -201,8 +202,8 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) if (ret < 0) { disable_irq(csid->irq); camss_disable_clocks(csid->nclocks, csid->clock); - if (csid->vdda) - regulator_disable(csid->vdda); + regulator_bulk_disable(csid->num_supplies, + csid->supplies); pm_runtime_put_sync(dev); return ret; } @@ -211,7 +212,8 @@ static int csid_set_power(struct v4l2_subdev *sd, int on) } else { disable_irq(csid->irq); camss_disable_clocks(csid->nclocks, csid->clock); - ret = csid->vdda ? regulator_disable(csid->vdda) : 0; + regulator_bulk_disable(csid->num_supplies, + csid->supplies); pm_runtime_put_sync(dev); if (version == CAMSS_8250 || version == CAMSS_845) vfe_put(vfe); @@ -660,15 +662,28 @@ int msm_csid_subdev_init(struct camss *camss, struct csid_device *csid, } /* Regulator */ + for (i = 0; i < ARRAY_SIZE(res->regulators); i++) { + if (res->regulators[i]) + csid->num_supplies++; + } - csid->vdda = NULL; - if (res->regulator[0]) - csid->vdda = devm_regulator_get(dev, res->regulator[0]); - if (IS_ERR(csid->vdda)) { - dev_err(dev, "could not get regulator\n"); - return PTR_ERR(csid->vdda); + if (csid->num_supplies) { + csid->supplies = devm_kmalloc_array(camss->dev, + csid->num_supplies, + sizeof(csid->supplies), + GFP_KERNEL); + if (!csid->supplies) + return -ENOMEM; } + for (i = 0; i < csid->num_supplies; i++) + csid->supplies[i].supply = res->regulators[i]; + + ret = devm_regulator_bulk_get(camss->dev, csid->num_supplies, + csid->supplies); + if (ret) + return ret; + init_completion(&csid->reset_complete); return 0; diff --git a/drivers/media/platform/qcom/camss/camss-csid.h b/drivers/media/platform/qcom/camss/camss-csid.h index 17a50fa426be1..f06040e44c515 100644 --- a/drivers/media/platform/qcom/camss/camss-csid.h +++ b/drivers/media/platform/qcom/camss/camss-csid.h @@ -152,7 +152,8 @@ struct csid_device { char irq_name[30]; struct camss_clock *clock; int nclocks; - struct regulator *vdda; + struct regulator_bulk_data *supplies; + int num_supplies; struct completion reset_complete; struct csid_testgen_config testgen; struct csid_phy_config phy; diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index d9905e737d88d..419c48c4f1d52 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -34,7 +34,7 @@ static const struct resources csiphy_res_8x16[] = { /* CSIPHY0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, .clock_rate = { { 0 }, { 0 }, @@ -46,7 +46,7 @@ static const struct resources csiphy_res_8x16[] = { /* CSIPHY1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" }, .clock_rate = { { 0 }, { 0 }, @@ -60,7 +60,7 @@ static const struct resources csiphy_res_8x16[] = { static const struct resources csid_res_8x16[] = { /* CSID0 */ { - .regulator = { "vdda" }, + .regulators = { "vdda" }, .clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb", "csi0", "csi0_phy", "csi0_pix", "csi0_rdi" }, .clock_rate = { { 0 }, @@ -77,7 +77,7 @@ static const struct resources csid_res_8x16[] = { /* CSID1 */ { - .regulator = { "vdda" }, + .regulators = { "vdda" }, .clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb", "csi1", "csi1_phy", "csi1_pix", "csi1_rdi" }, .clock_rate = { { 0 }, @@ -107,7 +107,7 @@ static const struct resources_ispif ispif_res_8x16 = { static const struct resources vfe_res_8x16[] = { /* VFE0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "vfe0", "csi_vfe0", "vfe_ahb", "vfe_axi", "ahb" }, .clock_rate = { { 0 }, @@ -129,7 +129,7 @@ static const struct resources vfe_res_8x16[] = { static const struct resources csiphy_res_8x96[] = { /* CSIPHY0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer" }, .clock_rate = { { 0 }, { 0 }, @@ -141,7 +141,7 @@ static const struct resources csiphy_res_8x96[] = { /* CSIPHY1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer" }, .clock_rate = { { 0 }, { 0 }, @@ -153,7 +153,7 @@ static const struct resources csiphy_res_8x96[] = { /* CSIPHY2 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy2_timer" }, .clock_rate = { { 0 }, { 0 }, @@ -167,7 +167,7 @@ static const struct resources csiphy_res_8x96[] = { static const struct resources csid_res_8x96[] = { /* CSID0 */ { - .regulator = { "vdda" }, + .regulators = { "vdda" }, .clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb", "csi0", "csi0_phy", "csi0_pix", "csi0_rdi" }, .clock_rate = { { 0 }, @@ -184,7 +184,7 @@ static const struct resources csid_res_8x96[] = { /* CSID1 */ { - .regulator = { "vdda" }, + .regulators = { "vdda" }, .clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb", "csi1", "csi1_phy", "csi1_pix", "csi1_rdi" }, .clock_rate = { { 0 }, @@ -201,7 +201,7 @@ static const struct resources csid_res_8x96[] = { /* CSID2 */ { - .regulator = { "vdda" }, + .regulators = { "vdda" }, .clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb", "csi2", "csi2_phy", "csi2_pix", "csi2_rdi" }, .clock_rate = { { 0 }, @@ -218,7 +218,7 @@ static const struct resources csid_res_8x96[] = { /* CSID3 */ { - .regulator = { "vdda" }, + .regulators = { "vdda" }, .clock = { "top_ahb", "ispif_ahb", "csi3_ahb", "ahb", "csi3", "csi3_phy", "csi3_pix", "csi3_rdi" }, .clock_rate = { { 0 }, @@ -249,7 +249,7 @@ static const struct resources_ispif ispif_res_8x96 = { static const struct resources vfe_res_8x96[] = { /* VFE0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ahb", "vfe0", "csi_vfe0", "vfe_ahb", "vfe0_ahb", "vfe_axi", "vfe0_stream"}, .clock_rate = { { 0 }, @@ -267,7 +267,7 @@ static const struct resources vfe_res_8x96[] = { /* VFE1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ahb", "vfe1", "csi_vfe1", "vfe_ahb", "vfe1_ahb", "vfe_axi", "vfe1_stream"}, .clock_rate = { { 0 }, @@ -287,7 +287,7 @@ static const struct resources vfe_res_8x96[] = { static const struct resources csiphy_res_660[] = { /* CSIPHY0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy0_timer", "csi0_phy", "csiphy_ahb2crif" }, .clock_rate = { { 0 }, @@ -301,7 +301,7 @@ static const struct resources csiphy_res_660[] = { /* CSIPHY1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy1_timer", "csi1_phy", "csiphy_ahb2crif" }, .clock_rate = { { 0 }, @@ -315,7 +315,7 @@ static const struct resources csiphy_res_660[] = { /* CSIPHY2 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "top_ahb", "ispif_ahb", "ahb", "csiphy2_timer", "csi2_phy", "csiphy_ahb2crif" }, .clock_rate = { { 0 }, @@ -331,7 +331,7 @@ static const struct resources csiphy_res_660[] = { static const struct resources csid_res_660[] = { /* CSID0 */ { - .regulator = { "vdda", "vdd_sec" }, + .regulators = { "vdda", "vdd_sec" }, .clock = { "top_ahb", "ispif_ahb", "csi0_ahb", "ahb", "csi0", "csi0_phy", "csi0_pix", "csi0_rdi", "cphy_csid0" }, @@ -351,7 +351,7 @@ static const struct resources csid_res_660[] = { /* CSID1 */ { - .regulator = { "vdda", "vdd_sec" }, + .regulators = { "vdda", "vdd_sec" }, .clock = { "top_ahb", "ispif_ahb", "csi1_ahb", "ahb", "csi1", "csi1_phy", "csi1_pix", "csi1_rdi", "cphy_csid1" }, @@ -371,7 +371,7 @@ static const struct resources csid_res_660[] = { /* CSID2 */ { - .regulator = { "vdda", "vdd_sec" }, + .regulators = { "vdda", "vdd_sec" }, .clock = { "top_ahb", "ispif_ahb", "csi2_ahb", "ahb", "csi2", "csi2_phy", "csi2_pix", "csi2_rdi", "cphy_csid2" }, @@ -391,7 +391,7 @@ static const struct resources csid_res_660[] = { /* CSID3 */ { - .regulator = { "vdda", "vdd_sec" }, + .regulators = { "vdda", "vdd_sec" }, .clock = { "top_ahb", "ispif_ahb", "csi3_ahb", "ahb", "csi3", "csi3_phy", "csi3_pix", "csi3_rdi", "cphy_csid3" }, @@ -425,7 +425,7 @@ static const struct resources_ispif ispif_res_660 = { static const struct resources vfe_res_660[] = { /* VFE0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "throttle_axi", "top_ahb", "ahb", "vfe0", "csi_vfe0", "vfe_ahb", "vfe0_ahb", "vfe_axi", "vfe0_stream"}, @@ -446,7 +446,7 @@ static const struct resources vfe_res_660[] = { /* VFE1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "throttle_axi", "top_ahb", "ahb", "vfe1", "csi_vfe1", "vfe_ahb", "vfe1_ahb", "vfe_axi", "vfe1_stream"}, @@ -469,7 +469,7 @@ static const struct resources vfe_res_660[] = { static const struct resources csiphy_res_845[] = { /* CSIPHY0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src", "cpas_ahb", "cphy_rx_src", "csiphy0", "csiphy0_timer_src", "csiphy0_timer" }, @@ -487,7 +487,7 @@ static const struct resources csiphy_res_845[] = { /* CSIPHY1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src", "cpas_ahb", "cphy_rx_src", "csiphy1", "csiphy1_timer_src", "csiphy1_timer" }, @@ -505,7 +505,7 @@ static const struct resources csiphy_res_845[] = { /* CSIPHY2 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src", "cpas_ahb", "cphy_rx_src", "csiphy2", "csiphy2_timer_src", "csiphy2_timer" }, @@ -523,7 +523,7 @@ static const struct resources csiphy_res_845[] = { /* CSIPHY3 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi", "soc_ahb", "slow_ahb_src", "cpas_ahb", "cphy_rx_src", "csiphy3", "csiphy3_timer_src", "csiphy3_timer" }, @@ -543,7 +543,7 @@ static const struct resources csiphy_res_845[] = { static const struct resources csid_res_845[] = { /* CSID0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", "soc_ahb", "vfe0", "vfe0_src", "vfe0_cphy_rx", "csi0", @@ -563,7 +563,7 @@ static const struct resources csid_res_845[] = { /* CSID1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", "soc_ahb", "vfe1", "vfe1_src", "vfe1_cphy_rx", "csi1", @@ -583,7 +583,7 @@ static const struct resources csid_res_845[] = { /* CSID2 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", "soc_ahb", "vfe_lite", "vfe_lite_src", "vfe_lite_cphy_rx", "csi2", @@ -605,7 +605,7 @@ static const struct resources csid_res_845[] = { static const struct resources vfe_res_845[] = { /* VFE0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src", "soc_ahb", "vfe0", "vfe0_axi", "vfe0_src", "csi0", @@ -625,7 +625,7 @@ static const struct resources vfe_res_845[] = { /* VFE1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src", "soc_ahb", "vfe1", "vfe1_axi", "vfe1_src", "csi1", @@ -645,7 +645,7 @@ static const struct resources vfe_res_845[] = { /* VFE-lite */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi", "cpas_ahb", "slow_ahb_src", "soc_ahb", "vfe_lite", "vfe_lite_src", "csi2", @@ -666,7 +666,7 @@ static const struct resources vfe_res_845[] = { static const struct resources csiphy_res_8250[] = { /* CSIPHY0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "csiphy0", "csiphy0_timer" }, .clock_rate = { { 400000000 }, { 300000000 } }, @@ -675,7 +675,7 @@ static const struct resources csiphy_res_8250[] = { }, /* CSIPHY1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "csiphy1", "csiphy1_timer" }, .clock_rate = { { 400000000 }, { 300000000 } }, @@ -684,7 +684,7 @@ static const struct resources csiphy_res_8250[] = { }, /* CSIPHY2 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "csiphy2", "csiphy2_timer" }, .clock_rate = { { 400000000 }, { 300000000 } }, @@ -693,7 +693,7 @@ static const struct resources csiphy_res_8250[] = { }, /* CSIPHY3 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "csiphy3", "csiphy3_timer" }, .clock_rate = { { 400000000 }, { 300000000 } }, @@ -702,7 +702,7 @@ static const struct resources csiphy_res_8250[] = { }, /* CSIPHY4 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "csiphy4", "csiphy4_timer" }, .clock_rate = { { 400000000 }, { 300000000 } }, @@ -711,7 +711,7 @@ static const struct resources csiphy_res_8250[] = { }, /* CSIPHY5 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "csiphy5", "csiphy5_timer" }, .clock_rate = { { 400000000 }, { 300000000 } }, @@ -723,7 +723,7 @@ static const struct resources csiphy_res_8250[] = { static const struct resources csid_res_8250[] = { /* CSID0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "vfe0_csid", "vfe0_cphy_rx", "vfe0", "vfe0_areg", "vfe0_ahb" }, .clock_rate = { { 400000000 }, { 400000000 }, @@ -735,7 +735,7 @@ static const struct resources csid_res_8250[] = { }, /* CSID1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "vfe1_csid", "vfe1_cphy_rx", "vfe1", "vfe1_areg", "vfe1_ahb" }, .clock_rate = { { 400000000 }, { 400000000 }, @@ -747,7 +747,7 @@ static const struct resources csid_res_8250[] = { }, /* CSID2 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "vfe_lite_csid", "vfe_lite_cphy_rx", "vfe_lite", "vfe_lite_ahb" }, .clock_rate = { { 400000000 }, { 400000000 }, @@ -758,7 +758,7 @@ static const struct resources csid_res_8250[] = { }, /* CSID3 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "vfe_lite_csid", "vfe_lite_cphy_rx", "vfe_lite", "vfe_lite_ahb" }, .clock_rate = { { 400000000 }, { 400000000 }, @@ -772,7 +772,7 @@ static const struct resources csid_res_8250[] = { static const struct resources vfe_res_8250[] = { /* VFE0 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi_src", "slow_ahb_src", "cpas_ahb", "camnoc_axi", "vfe0_ahb", "vfe0_areg", "vfe0", "vfe0_axi", "cam_hf_axi" }, @@ -790,7 +790,7 @@ static const struct resources vfe_res_8250[] = { }, /* VFE1 */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi_src", "slow_ahb_src", "cpas_ahb", "camnoc_axi", "vfe1_ahb", "vfe1_areg", "vfe1", "vfe1_axi", "cam_hf_axi" }, @@ -808,7 +808,7 @@ static const struct resources vfe_res_8250[] = { }, /* VFE2 (lite) */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi_src", "slow_ahb_src", "cpas_ahb", "camnoc_axi", "vfe_lite_ahb", "vfe_lite_axi", "vfe_lite", "cam_hf_axi" }, @@ -825,7 +825,7 @@ static const struct resources vfe_res_8250[] = { }, /* VFE3 (lite) */ { - .regulator = { NULL }, + .regulators = { NULL }, .clock = { "camnoc_axi_src", "slow_ahb_src", "cpas_ahb", "camnoc_axi", "vfe_lite_ahb", "vfe_lite_axi", "vfe_lite", "cam_hf_axi" }, diff --git a/drivers/media/platform/qcom/camss/camss.h b/drivers/media/platform/qcom/camss/camss.h index 9c644e638a948..c9b3e0df5be8f 100644 --- a/drivers/media/platform/qcom/camss/camss.h +++ b/drivers/media/platform/qcom/camss/camss.h @@ -42,7 +42,7 @@ #define CAMSS_RES_MAX 17 struct resources { - char *regulator[CAMSS_RES_MAX]; + char *regulators[CAMSS_RES_MAX]; char *clock[CAMSS_RES_MAX]; u32 clock_rate[CAMSS_RES_MAX][CAMSS_RES_MAX]; char *reg[CAMSS_RES_MAX]; From patchwork Sun Jan 9 02:49:09 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 530822 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 67679C4167E for ; Sun, 9 Jan 2022 02:47:13 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235123AbiAICrM (ORCPT ); Sat, 8 Jan 2022 21:47:12 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42184 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235107AbiAICrK (ORCPT ); Sat, 8 Jan 2022 21:47:10 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 856FAC061401 for ; Sat, 8 Jan 2022 18:47:10 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id l12-20020a7bc34c000000b003467c58cbdfso7214852wmj.2 for ; Sat, 08 Jan 2022 18:47:10 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=uHGFo7A4Jb7kn9oKiHksVUVvNjGV4U5pwC2vz2G8Qfc=; b=lLSB0pOGYKyVZ25tfis5x9jSTMu8QwqdP0/B+ZvIPnaFH1Y7igMzH0rwePj9006hlV 3XPmjZf/PAqdd4OVvpZPeOOa5tLGk8/rGiq5SKk7VZnefGJSS2CEMAiQBp1A+KuhJp+O 2VN/wzVTstHxRvmcRbzs+zOYU3GT1+U8OW9wAwC+7Wd4PLBxRZV8fVuitW1U//aXYc+P OrXS6ZIAmqdaPXEjXriSuTMOXYp/ZTaz5b/hmhURTT6ZsUW23jf5TMDUj6QYLbgGAfe3 ElbXKKuKf5omIG+Cv0n9Q5EzMS4ehVE104JMwNuY1OWh8RMtcCOmgpte07CvlHg6w8fM negw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=uHGFo7A4Jb7kn9oKiHksVUVvNjGV4U5pwC2vz2G8Qfc=; b=XsrJvi+1klVPf5YuZ3J0oABvtNrNIxuCYCoIsH2foPrETMhcJhl/UjMVapiaKRdigp ivKUOXzeQ/ETTqoirBxbp0Qv5hoZ8qtn9RABqz9wqAHNJl6sCsDwVDmo7qzPFEq4rbxI L+y5+BLJjzRMInEqq3Vzjd5PAImLNlXPJK8UDNIarqlGTsCLa8Edu+p4uB01G0cNSNSF vmcmNlFZs/QWpLI+Z1PHOaiQOCvqpkNXal4JncUZSGuLeT+Ub9NahL6X/lrVizxBy+y2 IL/XCadux2N7wM95lgan2Mtig21aEfyd8qP3W2IP8arcph+Cn0TjCWYuVNLIZbUCUe89 qSJg== X-Gm-Message-State: AOAM533eWGm5JXE51p0dF35KKq/O7WgJe6v7ht8OBXctK+3kTxdFEP8M eUNs8PAbQEq9sMAp8NWlDy/Ah6QulrQiWw== X-Google-Smtp-Source: ABdhPJzgueyvnH/YxztRWSDEOZGW6LizDU74zyNCWJDjOiCoEnNSfD5IxhiIJ+uKPUILnSp2s5hQXg== X-Received: by 2002:a05:600c:1c9f:: with SMTP id k31mr16520568wms.159.1641696428858; Sat, 08 Jan 2022 18:47:08 -0800 (PST) Received: from sagittarius-a.chello.ie (188-141-3-169.dynamic.upc.ie. [188.141.3.169]) by smtp.gmail.com with ESMTPSA id l13sm3341748wrs.73.2022.01.08.18.47.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 08 Jan 2022 18:47:08 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-media@vger.kernel.org, mchehab@kernel.org, hverkuil@xs4all.nl, robert.foss@linaro.org Cc: jonathan@marek.ca, andrey.konovalov@linaro.org, todor.too@gmail.com, agross@kernel.org, bjorn.andersson@linaro.org, jgrahsl@snap.com, hfink@snap.com, vladimir.zapolskiy@linaro.org, dmitry.baryshkov@linaro.org, bryan.odonoghue@linaro.org Subject: [PATCH v2 7/8] media: camss: Point sdm845 at the correct vdda regulators Date: Sun, 9 Jan 2022 02:49:09 +0000 Message-Id: <20220109024910.2041763-8-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220109024910.2041763-1-bryan.odonoghue@linaro.org> References: <20220109024910.2041763-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Reviewing the RB3 schematic its clear that we have missed out on defining one of the power-rails associated with the CSI PHY. Other PHYs such as the UFS, PCIe and USB connect to these rails and define each regulator individually. This means if we were to switch off the other various PHYs which enable these rails, the CAMSS would not appropriately power-on the CSI PHY. Signed-off-by: Bryan O'Donoghue Reviewed-by: Robert Foss --- drivers/media/platform/qcom/camss/camss.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/media/platform/qcom/camss/camss.c b/drivers/media/platform/qcom/camss/camss.c index dcb37a739c95b..859b397912cc8 100644 --- a/drivers/media/platform/qcom/camss/camss.c +++ b/drivers/media/platform/qcom/camss/camss.c @@ -543,7 +543,7 @@ static const struct resources csiphy_res_845[] = { static const struct resources csid_res_845[] = { /* CSID0 */ { - .regulators = { NULL }, + .regulators = { "vdda-phy", "vdda-pll" }, .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", "soc_ahb", "vfe0", "vfe0_src", "vfe0_cphy_rx", "csi0", @@ -563,7 +563,7 @@ static const struct resources csid_res_845[] = { /* CSID1 */ { - .regulators = { NULL }, + .regulators = { "vdda-phy", "vdda-pll" }, .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", "soc_ahb", "vfe1", "vfe1_src", "vfe1_cphy_rx", "csi1", @@ -583,7 +583,7 @@ static const struct resources csid_res_845[] = { /* CSID2 */ { - .regulators = { NULL }, + .regulators = { "vdda-phy", "vdda-pll" }, .clock = { "cpas_ahb", "cphy_rx_src", "slow_ahb_src", "soc_ahb", "vfe_lite", "vfe_lite_src", "vfe_lite_cphy_rx", "csi2",