From patchwork Sun Jan 9 17:29:52 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 530878 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F1FE4C433F5 for ; Sun, 9 Jan 2022 17:34:22 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235280AbiAIReW (ORCPT ); Sun, 9 Jan 2022 12:34:22 -0500 Received: from mout.gmx.net ([212.227.15.19]:57781 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234494AbiAIReU (ORCPT ); Sun, 9 Jan 2022 12:34:20 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1641749652; bh=MOFjIoYuYz3a6U9sFm3D7hME9fb4DnPcgdo1gj/6qb0=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=UgEsTqhvRH8KvmhcckXGkPp+rDYVJhD9QGrA+7g/pdq+9/RbWuvrfMudOHe7YoOuw Bb+4MDCqfPXX+XIBwpENi1GuQQKjRRYQPwTmiFAuxhFgEn+knXd/UGwo0LVZogXznr C0PpxxvOdSbvFwtTXRw6ht3UMv1vs3WYnJHSWG5Y= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([89.0.222.244]) by mail.gmx.net (mrgmx004 [212.227.17.190]) with ESMTPSA (Nemesis) id 1MN5iZ-1mpuAz17LR-00J23M; Sun, 09 Jan 2022 18:34:12 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, Andy Shevchenko , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= , Rob Herring Subject: [PATCH v4 1/9] dt-bindings: arm/npcm: Add binding for global control registers (GCR) Date: Sun, 9 Jan 2022 18:29:52 +0100 Message-Id: <20220109173000.1242703-2-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220109173000.1242703-1-j.neuschaefer@gmx.net> References: <20220109173000.1242703-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:ztSF5v5bx0P0Xz5y9nkAdqjiP/XUgvvz2+IaEIneM08rrCGzSmE qEHgmW7GXgERLlOWZgW4M1KUjg0li5txo9Sw2Uc3RmxTAa9WCyX7prTDY0FvPFBJgQHhz1G BgyXVoYP57YQGB3lvXtjL4Gjo8m5X6bf4NIJ2imK/J+glygqtYITW0ja+QqywukTdgFwk2+ y/6FVv3p90ajkeG8dJCBA== X-UI-Out-Filterresults: notjunk:1;V03:K0:WJv/i/bnJqQ=:fOkmB1Ab5nLabHDOrcF4kM h4VIpJqxa0sA1HAcefZlM9AphF8ODY4SbmOINH4dOQFmjv0ikv52gbPllg8J7P+Vbr3hcGgqm QPe5xd/6pQlNPrRBGSEYMxGLvOHmUWIzadcmRM2TN/AIuDhe5Jm9+KLdjuOIKgjP5bz2jDSXu YtHZCay5R1lubfNJQZx6bpVdcFmZeV9N6/6Nx9+2cONYuniaTH2093bwA7ORSzGr2w1WjK+DY dOxciFRhkqMy2VyF6h0NgSlwY/bEGjBPZ3dGJJT0uQ3ZHmEC0Z7ik15NaGcp9MsERnMBwnrYk K+vddVEPz5/cNy3GrZFjqsbHRZ/XrBha7suD3XgDDyTthIljxJ9hm0+dQB0mSh0I5u/720ED1 qCi5NMiImddW7tEMMwZHfOHizJ7QEFbuISF4z1q3PVaSGqc0NgAX7tqDqWI3doQiFX4Kbee8Y kqBO8jiLuUVX486F6Z8Z/uBmz5UNxs8kzC657aeblFuWVkKyuCAzH3nZ5PIEiQo9gFXgVKRQy DkowIzsVODrvLx+KzPPOWZqWIrpDMjnfwfN360HNXNFZPqN5GYK4nkDXoxcTMSV9FNSMZ9La0 x/zTjPUkhg8vweYlqypMYS4QBInFMY7RTFR/HwZ3evZUublet8UDUM717Z66FyYIo3wHA8GmS hUbFu2O4rACk/GrNUFLps9XcVrkNsxJ5PS2ZBqGxBwfCh8fX6SqkwgZMwxRK8UUp3PuTAVMUb iLVGQmyA3IgNL0lDpa1HZADpXl8pkyqAmfCiTGEMvBO6Bjysa9h5j9Wj87U2PQaN1vzt1bi3Y iB+0ww4D/3DjvBVcy92PqgBo0SqYr5PRMR4dYRAw8X8+BD0c18uAZlt/3rC0v8NorvF8llokc Lj3wczI6UQGhbqcEQ53VWo/Kb145OZtD4jo/OiJDuP6RF2zfFHsrIQfZ/pl67oMC0IhOLTTGy ACiu+uEiWt2ZwtEUtwWfYgR4E9MGgv1zTqjJNp/7fHZx2p0JwjISzoHoBr0LC17syp3ZIOkpX May/4719MhIJ5tFjyLOWnMjDgOJCoQCz1cqgsmO2Bna5KPVKKGrLHBcSpSCAXTjEweywXsjyN 9IYJug3vro0iYc= Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org A nuvoton,*-gcr node is present in nuvoton-common-npcm7xx.dtsi and will be added to nuvoton-wpcm450.dtsi. It is necessary for the NPCM7xx and WPCM450 pinctrl drivers, and may later be used to retrieve SoC model and version information. This patch adds a binding to describe this node. Signed-off-by: Jonathan Neuschäfer Reviewed-by: Rob Herring --- v4: - Add Rob's R-b v3: - Make a few changes suggested by Rob Herring - Change name of mux-controller node to appease the linter v2: - https://lore.kernel.org/lkml/20211207210823.1975632-2-j.neuschaefer@gmx.net/ - Rename node in example to syscon@800000 - Add subnode to example v1: - https://lore.kernel.org/lkml/20210602120329.2444672-2-j.neuschaefer@gmx.net/ --- .../bindings/arm/npcm/nuvoton,gcr.yaml | 48 +++++++++++++++++++ 1 file changed, 48 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml -- 2.30.2 diff --git a/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml new file mode 100644 index 0000000000000..fcb211add7d37 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/npcm/nuvoton,gcr.yaml @@ -0,0 +1,48 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/npcm/nuvoton,gcr.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Global Control Registers block in Nuvoton SoCs + +maintainers: + - Jonathan Neuschäfer + +description: + The Global Control Registers (GCR) are a block of registers in Nuvoton SoCs + that expose misc functionality such as chip model and version information or + pinmux settings. + +properties: + compatible: + items: + - enum: + - nuvoton,wpcm450-gcr + - nuvoton,npcm750-gcr + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + +required: + - compatible + - reg + +additionalProperties: + type: object + +examples: + - | + gcr: syscon@800000 { + compatible = "nuvoton,npcm750-gcr", "syscon", "simple-mfd"; + reg = <0x800000 0x1000>; + + mux-controller { + compatible = "mmio-mux"; + #mux-control-cells = <1>; + mux-reg-masks = <0x38 0x07>; + idle-states = <2>; + }; + }; From patchwork Sun Jan 9 17:29:53 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 530877 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A9AA1C433F5 for ; Sun, 9 Jan 2022 17:34:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236272AbiAIReY (ORCPT ); Sun, 9 Jan 2022 12:34:24 -0500 Received: from mout.gmx.net ([212.227.17.22]:55791 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S234495AbiAIReW (ORCPT ); Sun, 9 Jan 2022 12:34:22 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1641749655; bh=iPSBD2awiftOLogxsCMiyQPe19EVPJ9UGcWv/u2KUGk=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=ATJsY33T9YmuKdN+uMLJvhbXsPtAxZtIC38JHDnj04sP4X9R4hGGa14virZ3nRrBI aTc3/c/TSb9J0vkv/PHg8pJXCQ4iNkBZmah/YR1zwxZgCGjoDxEnU0xu1mhXZKNNeF q+PhqNfWAUqKIO8d3earntctczFsQsWN2OPn8vQw= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([89.0.222.244]) by mail.gmx.net (mrgmx104 [212.227.17.168]) with ESMTPSA (Nemesis) id 1N4hzj-1mP89B43rb-011i7j; Sun, 09 Jan 2022 18:34:15 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, Andy Shevchenko , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH v4 2/9] MAINTAINERS: Match all of bindings/arm/npcm/ as part of NPCM architecture Date: Sun, 9 Jan 2022 18:29:53 +0100 Message-Id: <20220109173000.1242703-3-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220109173000.1242703-1-j.neuschaefer@gmx.net> References: <20220109173000.1242703-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:COUIWzWI3NV8k793KkNeU7tCZhSj5gGen+76B2rEC21V4/TOUhM rFExiA4PoIeY4vfvFVZxtWB6P++xcu/O6mxpK0LsbOp2zxWmddopaqcNqB56rTJmeCHR2b/ jqVYrGSNgGRuxYGtGkOsoBDjyFQVaY9CgbKbubr7u8MZPoQvFQOiM+8opA4K0XZTAyuef1q 2r12ZDwiBoWTDYGO1q0qg== X-UI-Out-Filterresults: notjunk:1;V03:K0:JsIHhT4hU4g=:u+Qx8ueXfXPIxFGDu9zfO+ +TLRmpjHI82Ur694DkG9nrhG/DVtKfcVnoWw8jU3ogq/eTQBbcZUA2a3zd56WnTixyL6PXiwg LBPv6pJo0TG8agfJUkh1792X+i+VrAbcpPGN3W9ZHQsyqufSlROgnFsvzMNXwfjaTv4OGEDY5 lD1XM58N+eSEvR4lfnkBtEv/iNlksZCVfIxDcsEZCsmvTa+16FHGhtwS9Ucicu9t91unEwSeE 4RO2yV+52tliahtEnfHinmsGRcrw2Rx7UPdkIdGNhegw4I1nV4oHhP0PJHcycOmfXAmfjJqoX 0pFmETpvKfiCcYGrIrRd7eZoz9aUIUvypxX5NYxcdxmOOISfjkmPfyHsaM+GekVNsxbY2F39J LY3clNkEEINnFfHNadlp2ouGBQE6YVyAYDc4WyBluMzQulMw9Tp8yphkdDOj/jGtzME3BESFL egV3+HauBSCV6kcmNFDQ6uz2eC7U+d/Sw+TdsnKwHdOofPg9lNKTyi6r3Jyr+fTw6/wtKPLIB roaxzqoqrXl4kz9nxj58mDJcR3u1ECy70KZ3m/vfT/uEdDFv6IpzwQq3mQnoi4ALu5+nfRIE9 qmWeQ2liR5Tj/85UsEaxUTwk6QV+UCPbImSZFQJrJTLgrB9WFKltV89jqws8dYCPavaL3bwH1 g/q7UTodHnqPTW+J72ucWNL0SqH+gFmE9RKV/IDS7rdmfXskoTBoRW71yK2rW55Zmkhr4ejC/ gYDhvjNd70g+ArTEgEOP4cylwrYzxyViwV2JVm0EY5E2aUeLoyn/bmOt7S/R4PvUfqwTWS4yO JFBx6mNs4a469y9DyW6cHa1Su8av64I/EehnXZWfxXvHaBEmFmdbjyIm/l7BxWMsxw6wfz7eM 3fwNZZgo1alZxnGq2eqRLvRvNda8LJSCdTY+xXhwG3q5/YViVGTzeQnkCULSe0O9E9e22dVwl hVxaYxCVuj3VOFAtQnpi2fqu46jgPODL0Eetd3OlrBxQpt4ko0npnvdD+twRB3I/lMgdrNoWb h46jVVpjGdxzA8XsmbnfLzBOgAH2dPAzb+ks7Kp8XsT37hiZDJ8Qpbob/zwiAfdBNFPuYN+/c 9P0cB6m7JHeluw= Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org All files in Documentation/devicetree/bindings/arm/npcm/ belong to the Nuvoton NPCM architecture, even when their names might not spell it out explicitly. Signed-off-by: Jonathan Neuschäfer --- v2-v4: - no changes v1: - https://lore.kernel.org/lkml/20210602120329.2444672-3-j.neuschaefer@gmx.net/ --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) -- 2.30.2 diff --git a/MAINTAINERS b/MAINTAINERS index 8912b2c1260ca..123c967936785 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2338,6 +2338,7 @@ L: openbmc@lists.ozlabs.org (moderated for non-subscribers) S: Supported F: Documentation/devicetree/bindings/*/*/*npcm* F: Documentation/devicetree/bindings/*/*npcm* +F: Documentation/devicetree/bindings/arm/npcm/* F: arch/arm/boot/dts/nuvoton-npcm* F: arch/arm/mach-npcm/ F: drivers/*/*npcm* From patchwork Sun Jan 9 17:29:55 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 530876 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99606C433F5 for ; Sun, 9 Jan 2022 17:35:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236281AbiAIRfE (ORCPT ); Sun, 9 Jan 2022 12:35:04 -0500 Received: from mout.gmx.net ([212.227.17.21]:47619 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236304AbiAIRea (ORCPT ); Sun, 9 Jan 2022 12:34:30 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1641749658; bh=MzNV+Ew8Kcz8tHvFYSVGLn9WgNZJcXMDEpnUMsGSMGc=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=izJLsAaXn4BGUmzFE7nGJP8BC3vG4icubhKfo6P4gyfo4FubpKc3vSTPROY34EH5b RCLkhBXQQcLtyirBI5SEj9bKHIx9Vw7jJ7JyYi+fScSsJaX0GMFw8deYutxsHIyD10 PW5NrUVwSQvpGvJBtjvrpVJMNCGydxFwO3ELV69o= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([89.0.222.244]) by mail.gmx.net (mrgmx104 [212.227.17.168]) with ESMTPSA (Nemesis) id 1MMGNC-1mpdCG0mpi-00JHSM; Sun, 09 Jan 2022 18:34:18 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, Andy Shevchenko , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH v4 4/9] dt-bindings: pinctrl: Add Nuvoton WPCM450 Date: Sun, 9 Jan 2022 18:29:55 +0100 Message-Id: <20220109173000.1242703-5-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220109173000.1242703-1-j.neuschaefer@gmx.net> References: <20220109173000.1242703-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:+e5e9zy6PaVX9aNRCGFjIEMGSCogpJPsO38iu3m0ZstboNq5l7A 7ToEBKQWF3dqcc0ycBk62ZMKPHkMZbVoiHPiLjvOZK9ykE9dE3U84OgzL+foiUdFXGqPY75 LpilR+UtNPQpLXiZoXlgnGLPfSSm31tRoBiRfbp8QGza4SUMr1mHXvoKbFoYQ5+gb/lOJWh H+sM7aNTEe51wiaEffvAA== X-UI-Out-Filterresults: notjunk:1;V03:K0:wOaVi85GUQQ=:gbFHmLD43pAKl1ro014MmV KWnTnO5/sQh6W694nC/05Kmp3gylb/5RbTWDGKipbHSQVo3dQMULYagWL9nLQif2ygGDdFKtF zZcwZ9V/+67sH8+Ff8V6rAAXDNtmQz4q7hHQqtuLB2aA27Um4lTbQQUkhe/XDUcCyYPAkqoHE 1KUK0XrJDhK0egjdThOMDRYoEGH7Frl9mTmDYYQ61BSqPQh3DBC/2aagXOLVHDBay5mUObvCx cc6pGnHVCjH9PJedfzyE4eaAg/Vad0Z8eg/sLcmTlFUYuOQ/O2rENcJPAZZpTnmtNkRsjecW5 Y5+Qj3xFN5CCDBcqiCy1IFUIdCb4DcSMEofkcktO6ZuKJ69GHd2JgYoodOmzLCkQAzhDwlSeU 0i+APuDD0Aqh+eUOEw5URNx1dFCu7ZaI5r2l83slhWnuFE18F/VknKvzooD5Kx8sIJP/ZcB2P RKrXMV6PzctWFIgRCK+SoDa785tQ8nL7huNvRyKTmSNsXyYiK5o0dfQ5Mt4HB/KPH94xl5Za0 NTXvIRaQ25d5yZBS/U8sxcwgZ+wyiQdjb+m169Fqeksgpsjbq4Y1/QwLlNT8rl1QpO8YJSCqi DER4mVjfoR43xHQydBgPjzoLAsD0W6aTs8f42MoX0/TFt9iRKCfQO3WF9yK3QjbR2qL7VJP/C bM+gj0bOdtngmxK0UL0+oAjx3HKoT9wEje3xIB0XQiLZLTbzXIEgbw6HnOlNljNB/Sp8gYUTH 59Fib4OaXKpgNrupQp/obh2FBlbI8OSnZouUN0mCJjmn7DdQZzyl5MFIO0yBzQuabzdUts7UX De4/M1dC0GHjfBcQ9P0/aJfBdocZy54voJU9ehgJuAFVqnjSCodVO1IVclIgfqQ/lMMxWsS9k Xny1GW7ED5K5UtvhXz58rznWIRCd4twuK5UWasIM2nXDKxiUcNCTBe8aqbUYD14cu7gbw0crR 6cuaLTuC1EqtQQlBCyso/5WBLF3BWSh74Ruh4dDAYqWstD6HZIucMzVp0c7ZoVkGPJMDHOsFL ZIdXf+LTMr+GSwIiYQeFvxom3SXXBSX2sOlQWzDvpu2p86jLnxkLhb5564HsnGh6COnUHQ/E0 991Brno7kQhTPI= Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org This binding is heavily based on the one for NPCM7xx, because the hardware is similar. There are some notable differences, however: - The addresses of GPIO banks are not physical addresses but simple indices (0 to 7), because the GPIO registers are not laid out in convenient blocks. - Pinmux settings can explicitly specify that the GPIO mode is used. Certain pins support blink patterns in hardware. This is currently not modelled in the DT binding. Signed-off-by: Jonathan Neuschäfer --- v4: - Small improvements around gpio node addresses, suggested by Rob Herring v3: - https://lore.kernel.org/lkml/20211224200935.93817-5-j.neuschaefer@gmx.net/ - Make changes suggested by Rob Herring - Fix lint errors - Simplify child node patterns - Remove if/type=object/then trick - Reduce interrupts.maxItems to 3: 4 aren't necessary - Replace list of gpio0/1/2/etc. with pattern - Remove nuvoton,interrupt-map again, to simplify the binding - Make tuples clearer v2: - https://lore.kernel.org/lkml/20211207210823.1975632-5-j.neuschaefer@gmx.net/ - Move GPIO into subnodes - Improve use of quotes - Remove unnecessary minItems/maxItems lines - Remove "phandle: true" - Use separate prefixes for pinmux and pincfg nodes - Add nuvoton,interrupt-map property - Make it possible to set pinmux to GPIO explicitly v1: - https://lore.kernel.org/lkml/20210602120329.2444672-5-j.neuschaefer@gmx.net/ --- .../pinctrl/nuvoton,wpcm450-pinctrl.yaml | 160 ++++++++++++++++++ 1 file changed, 160 insertions(+) create mode 100644 Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml -- 2.30.2 diff --git a/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml new file mode 100644 index 0000000000000..47a56b83a610d --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/nuvoton,wpcm450-pinctrl.yaml @@ -0,0 +1,160 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/nuvoton,wpcm450-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Nuvoton WPCM450 pin control and GPIO + +maintainers: + - Jonathan Neuschäfer + +properties: + compatible: + const: nuvoton,wpcm450-pinctrl + + reg: + maxItems: 1 + + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + +patternProperties: + # There are three kinds of subnodes: + # 1. a GPIO controller node for each GPIO bank + # 2. a pinmux node configures pin muxing for a group of pins (e.g. rmii2) + # 3. a pinconf node configures properties of a single pin + + "^gpio@[0-7]$": + type: object + + description: + Eight GPIO banks (gpio@0 to gpio@7), that each contain between 14 and 18 + GPIOs. Some GPIOs support interrupts. + + properties: + reg: + minimum: 0 + maximum: 7 + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 3 + description: + The interrupts associated with this GPIO bank + + required: + - reg + - gpio-controller + - '#gpio-cells' + + "^mux-": + $ref: pinmux-node.yaml# + + properties: + groups: + description: + One or more groups of pins to mux to a certain function + items: + enum: [ smb3, smb4, smb5, scs1, scs2, scs3, smb0, smb1, smb2, bsp, + hsp1, hsp2, r1err, r1md, rmii2, r2err, r2md, kbcc, dvo, + clko, smi, uinc, gspi, mben, xcs2, xcs1, sdio, sspi, fi0, + fi1, fi2, fi3, fi4, fi5, fi6, fi7, fi8, fi9, fi10, fi11, + fi12, fi13, fi14, fi15, pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, + pwm6, pwm7, hg0, hg1, hg2, hg3, hg4, hg5, hg6, hg7 ] + function: + description: + The function that a group of pins is muxed to + enum: [ smb3, smb4, smb5, scs1, scs2, scs3, smb0, smb1, smb2, bsp, + hsp1, hsp2, r1err, r1md, rmii2, r2err, r2md, kbcc, dvo0, + dvo1, dvo2, dvo3, dvo4, dvo5, dvo6, dvo7, clko, smi, uinc, + gspi, mben, xcs2, xcs1, sdio, sspi, fi0, fi1, fi2, fi3, fi4, + fi5, fi6, fi7, fi8, fi9, fi10, fi11, fi12, fi13, fi14, fi15, + pwm0, pwm1, pwm2, pwm3, pwm4, pwm5, pwm6, pwm7, hg0, hg1, + hg2, hg3, hg4, hg5, hg6, hg7, gpio ] + + dependencies: + groups: [ function ] + function: [ groups ] + + additionalProperties: false + + "^cfg-": + $ref: pincfg-node.yaml# + + properties: + pins: + description: + A list of pins to configure in certain ways, such as enabling + debouncing + items: + pattern: "^gpio1?[0-9]{1,2}$" + + input-debounce: true + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + #include + #include + pinctrl: pinctrl@b8003000 { + compatible = "nuvoton,wpcm450-pinctrl"; + reg = <0xb8003000 0x1000>; + #address-cells = <1>; + #size-cells = <0>; + + gpio0: gpio@0 { + reg = <0>; + gpio-controller; + #gpio-cells = <2>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>, + <3 IRQ_TYPE_LEVEL_HIGH>, + <4 IRQ_TYPE_LEVEL_HIGH>; + }; + + mux-rmii2 { + groups = "rmii2"; + function = "rmii2"; + }; + + pinmux_uid: mux-uid { + groups = "gspi", "sspi"; + function = "gpio"; + }; + + pinctrl_uid: cfg-uid { + pins = "gpio14"; + input-debounce = <1>; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_uid>, <&pinmux_uid>; + + uid { + label = "UID"; + linux,code = <102>; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + }; + }; From patchwork Sun Jan 9 17:29:58 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 530874 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F0C5C43217 for ; Sun, 9 Jan 2022 17:35:10 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S236367AbiAIRfI (ORCPT ); Sun, 9 Jan 2022 12:35:08 -0500 Received: from mout.gmx.net ([212.227.17.20]:40225 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236362AbiAIRef (ORCPT ); Sun, 9 Jan 2022 12:34:35 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1641749666; bh=9XPuSrijaVuSFlI6x1GuLlPapXp5wlvz5FaTSoN6P4M=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=b5iCVKNMEfqOxVLmSCzKn/kQBwsJcG2VmIqW2XaVb5Tn+4Q0B4YcEvV+leinWiMMR GxRvcBq2KRhXcpU2hCXRSuYo4dz16UAl204ZEhjiD+kaOyUiShhbd3DuxMbhmKo17z 23xaTdeqbIiVBbySlogLhd6VfbiAgwsoSlVkuZ/I= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([89.0.222.244]) by mail.gmx.net (mrgmx104 [212.227.17.168]) with ESMTPSA (Nemesis) id 1MSt8Q-1mwFxv3J54-00UJCA; Sun, 09 Jan 2022 18:34:25 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, Andy Shevchenko , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH v4 7/9] ARM: dts: wpcm450: Add pin functions Date: Sun, 9 Jan 2022 18:29:58 +0100 Message-Id: <20220109173000.1242703-8-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220109173000.1242703-1-j.neuschaefer@gmx.net> References: <20220109173000.1242703-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:A4gTyO/EMHBziWBAitNEiroYxoWqEQ40FwzGPf1wcRVI/tiT9XM uIfQrt5xjpV3CF6I4wlq+Nnh6GY/eF38OjLQ05hO6QUB1FNyXV4A8nSmkDbF6NzRU8vNdQ+ xNbXLyOi/TkBY7FZrizmaiqcPdc/1PUjbzvs3jkMj0++gFXYfEfhXLvcFHrmH6D6rE4YadR i9eK7k6zozIVYTUActbwg== X-UI-Out-Filterresults: notjunk:1;V03:K0:V+7dhiqZ6bM=:+oZGRATAjXkEPFeP/42uW8 lmi2ct8X/u8vCSK3GHH/s/MEkwPD7+BfeiRfaEj4KtTyHkDupwRmoeC/CZhTknqcOAHpb9Wvz n/zvZdxpKRIZEPTFCtijdIW8/rvAxUY3erot9uvvGRnwdA9f98nOZnRcovzEVsaCe4LExaHix aGEBkRUmBXZ46zXGT3yBu9hSCe54k3Wi5bPq0vZzVq02EPgHkjk6oaJ1C1HUJhAXWpM/NoDJr kfBS35V0LK9y+dPni3bpAIhPX6s1EI121/G9hg140Z6fePwfrq8DmU5U+poQWLD6UdTQZ8G1x N3oYzMJHHh8/7Wd43MiyNgaQXhLrF2p84kc65TLct+DbqSkWxU6d9+DtvS4gFBV7G8eO+NdHc 4SfayyUM/DF/OyuIUSVdN2PNO4+9o69ADcghc8AFO68Fm3B0LU8fUBlRUD0mYAr3YQqsj3Xgq SARRIWbpJIfVQYQAnoD1XouR5YAZbKJ/CJwiMC+eVezQLd5izRPYTQUOajepHhVbDHbunQcHe /kmzDg3fYMJyJbaExhnfwSfIN2OxyctPV68awwAl7ws82RtPJfyIDVO5S9HznptAeCk3GAjZJ D6Qx7tIjYSK41U5eVG046S4wxDFBaX+2p9idOe9HbzIZfoueebhfieNPn3G8I8V+OLMtW1qeX 40LadXHU8lXe5Nq5fUALt/dhcaAQB00aCtncGdo9HQhpikbLzkPQMh4L3SdHK2GzA6FCFiwNf xwEeL+W8LwGLUaYyz6qEbVO5vCOygOT44QDli3I95LDk2xHdrWHT4sPgF0n7r3ng4ksGKV9Dk xb1dRkqiBMKX5o3Gh2D/4qcQJ06cZHMqLlZJ6K+UWTY3Zj71CkshwbcTmvoRFsp9jQibDq5C+ 7sAAFWb/X2Vdkz0X6LZuw9YD0vL/dDj2s4PrM0bMd9ukSFiQ1+j5eos4oajmWR+ss4MdXehaH T+qZMMLBLIsqAotB2GFjTGoxAFtwc5yGELPwGQQUq2mjNfCYdlhNV+3QCKsFm6YQZaCIx4HZ/ cR359vKXFjFjwf691yMG9Hv4OigKk21v8YT2xJeqmqnqFishxsTRce9nYK4L4cEquRR+q+vOJ 7o+7MD6oRhor7s= Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org As done in nuvoton-common-npcm7xx.dtsi, this patch adds pinmux nodes for all pin functions to nuvoton-wpcm450.dtsi. Signed-off-by: Jonathan Neuschäfer --- I'm not quite convinced of the value of this patch, as the pin functions could easily be specified in board.dts files when needed. v4: - no changes v3: - Adjust to schema changes v2: - no changes v1: - https://lore.kernel.org/lkml/20210602120329.2444672-8-j.neuschaefer@gmx.net/ --- arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 305 +++++++++++++++++++++++++ 1 file changed, 305 insertions(+) -- 2.30.2 diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi index 66c35626c80a6..0c547bd88bdbd 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi +++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi @@ -148,6 +148,311 @@ gpio7: gpio@7 { gpio-controller; #gpio-cells = <2>; }; + + smb3_pins: mux-smb3 { + groups = "smb3"; + function = "smb3"; + }; + + smb4_pins: mux-smb4 { + groups = "smb4"; + function = "smb4"; + }; + + smb5_pins: mux-smb5 { + groups = "smb5"; + function = "smb5"; + }; + + scs1_pins: mux-scs1 { + groups = "scs1"; + function = "scs1"; + }; + + scs2_pins: mux-scs2 { + groups = "scs2"; + function = "scs2"; + }; + + scs3_pins: mux-scs3 { + groups = "scs3"; + function = "scs3"; + }; + + smb0_pins: mux-smb0 { + groups = "smb0"; + function = "smb0"; + }; + + smb1_pins: mux-smb1 { + groups = "smb1"; + function = "smb1"; + }; + + smb2_pins: mux-smb2 { + groups = "smb2"; + function = "smb2"; + }; + + bsp_pins: mux-bsp { + groups = "bsp"; + function = "bsp"; + }; + + hsp1_pins: mux-hsp1 { + groups = "hsp1"; + function = "hsp1"; + }; + + hsp2_pins: mux-hsp2 { + groups = "hsp2"; + function = "hsp2"; + }; + + r1err_pins: mux-r1err { + groups = "r1err"; + function = "r1err"; + }; + + r1md_pins: mux-r1md { + groups = "r1md"; + function = "r1md"; + }; + + rmii2_pins: mux-rmii2 { + groups = "rmii2"; + function = "rmii2"; + }; + + r2err_pins: mux-r2err { + groups = "r2err"; + function = "r2err"; + }; + + r2md_pins: mux-r2md { + groups = "r2md"; + function = "r2md"; + }; + + kbcc_pins: mux-kbcc { + groups = "kbcc"; + function = "kbcc"; + }; + + dvo0_pins: mux-dvo0 { + groups = "dvo"; + function = "dvo0"; + }; + + dvo3_pins: mux-dvo3 { + groups = "dvo"; + function = "dvo3"; + }; + + clko_pins: mux-clko { + groups = "clko"; + function = "clko"; + }; + + smi_pins: mux-smi { + groups = "smi"; + function = "smi"; + }; + + uinc_pins: mux-uinc { + groups = "uinc"; + function = "uinc"; + }; + + gspi_pins: mux-gspi { + groups = "gspi"; + function = "gspi"; + }; + + mben_pins: mux-mben { + groups = "mben"; + function = "mben"; + }; + + xcs2_pins: mux-xcs2 { + groups = "xcs2"; + function = "xcs2"; + }; + + xcs1_pins: mux-xcs1 { + groups = "xcs1"; + function = "xcs1"; + }; + + sdio_pins: mux-sdio { + groups = "sdio"; + function = "sdio"; + }; + + sspi_pins: mux-sspi { + groups = "sspi"; + function = "sspi"; + }; + + fi0_pins: mux-fi0 { + groups = "fi0"; + function = "fi0"; + }; + + fi1_pins: mux-fi1 { + groups = "fi1"; + function = "fi1"; + }; + + fi2_pins: mux-fi2 { + groups = "fi2"; + function = "fi2"; + }; + + fi3_pins: mux-fi3 { + groups = "fi3"; + function = "fi3"; + }; + + fi4_pins: mux-fi4 { + groups = "fi4"; + function = "fi4"; + }; + + fi5_pins: mux-fi5 { + groups = "fi5"; + function = "fi5"; + }; + + fi6_pins: mux-fi6 { + groups = "fi6"; + function = "fi6"; + }; + + fi7_pins: mux-fi7 { + groups = "fi7"; + function = "fi7"; + }; + + fi8_pins: mux-fi8 { + groups = "fi8"; + function = "fi8"; + }; + + fi9_pins: mux-fi9 { + groups = "fi9"; + function = "fi9"; + }; + + fi10_pins: mux-fi10 { + groups = "fi10"; + function = "fi10"; + }; + + fi11_pins: mux-fi11 { + groups = "fi11"; + function = "fi11"; + }; + + fi12_pins: mux-fi12 { + groups = "fi12"; + function = "fi12"; + }; + + fi13_pins: mux-fi13 { + groups = "fi13"; + function = "fi13"; + }; + + fi14_pins: mux-fi14 { + groups = "fi14"; + function = "fi14"; + }; + + fi15_pins: mux-fi15 { + groups = "fi15"; + function = "fi15"; + }; + + pwm0_pins: mux-pwm0 { + groups = "pwm0"; + function = "pwm0"; + }; + + pwm1_pins: mux-pwm1 { + groups = "pwm1"; + function = "pwm1"; + }; + + pwm2_pins: mux-pwm2 { + groups = "pwm2"; + function = "pwm2"; + }; + + pwm3_pins: mux-pwm3 { + groups = "pwm3"; + function = "pwm3"; + }; + + pwm4_pins: mux-pwm4 { + groups = "pwm4"; + function = "pwm4"; + }; + + pwm5_pins: mux-pwm5 { + groups = "pwm5"; + function = "pwm5"; + }; + + pwm6_pins: mux-pwm6 { + groups = "pwm6"; + function = "pwm6"; + }; + + pwm7_pins: mux-pwm7 { + groups = "pwm7"; + function = "pwm7"; + }; + + hg0_pins: mux-hg0 { + groups = "hg0"; + function = "hg0"; + }; + + hg1_pins: mux-hg1 { + groups = "hg1"; + function = "hg1"; + }; + + hg2_pins: mux-hg2 { + groups = "hg2"; + function = "hg2"; + }; + + hg3_pins: mux-hg3 { + groups = "hg3"; + function = "hg3"; + }; + + hg4_pins: mux-hg4 { + groups = "hg4"; + function = "hg4"; + }; + + hg5_pins: mux-hg5 { + groups = "hg5"; + function = "hg5"; + }; + + hg6_pins: mux-hg6 { + groups = "hg6"; + function = "hg6"; + }; + + hg7_pins: mux-hg7 { + groups = "hg7"; + function = "hg7"; + }; }; }; }; From patchwork Sun Jan 9 17:29:59 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= X-Patchwork-Id: 530875 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 29646C433F5 for ; Sun, 9 Jan 2022 17:35:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234374AbiAIRfH (ORCPT ); Sun, 9 Jan 2022 12:35:07 -0500 Received: from mout.gmx.net ([212.227.17.21]:44859 "EHLO mout.gmx.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S236352AbiAIRee (ORCPT ); Sun, 9 Jan 2022 12:34:34 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gmx.net; s=badeba3b8450; t=1641749667; bh=ETxQ+T/X/+6s3tPz9+APQpnz3DH8sFghpJZtkB4Iu9c=; h=X-UI-Sender-Class:From:To:Cc:Subject:Date:In-Reply-To:References; b=XFlZt9ZQj9dssMb/CLRHxUFXq+uzA+XQhspAHTcxvLa+3OpbAXnyZzozViCLxboxj LiLVEAgsp/Gf6yFL3c3TQ6ZAGHTEFhRzUtV2ZGUryFH+7/+c4fP3DXdhD8tboVJ+3v Ey7aHzbZBJA2NdI4jsoYhR88wKC+TxMqdYsx5ojM= X-UI-Sender-Class: 01bb95c1-4bf8-414a-932a-4f6e2808ef9c Received: from longitude ([89.0.222.244]) by mail.gmx.net (mrgmx104 [212.227.17.168]) with ESMTPSA (Nemesis) id 1Mzyuc-1mC9aP0ENC-00wzfJ; Sun, 09 Jan 2022 18:34:27 +0100 From: =?utf-8?q?Jonathan_Neusch=C3=A4fer?= To: linux-gpio@vger.kernel.org, devicetree@vger.kernel.org Cc: Linus Walleij , Rob Herring , openbmc@lists.ozlabs.org, Tomer Maimon , Joel Stanley , linux-kernel@vger.kernel.org, Andy Shevchenko , Avi Fishman , Tali Perry , Patrick Venture , Nancy Yuen , Benjamin Fair , =?utf-8?q?Jonathan_Neusch=C3=A4fer?= Subject: [PATCH v4 8/9] ARM: dts: wpcm450-supermicro-x9sci-ln4f: Add GPIO LEDs and buttons Date: Sun, 9 Jan 2022 18:29:59 +0100 Message-Id: <20220109173000.1242703-9-j.neuschaefer@gmx.net> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220109173000.1242703-1-j.neuschaefer@gmx.net> References: <20220109173000.1242703-1-j.neuschaefer@gmx.net> MIME-Version: 1.0 X-Provags-ID: V03:K1:lkSwl2UrCD7/dlt1TWC5XCxvrHKCbWfQJIE5ySD7ONxUaHyrcB3 wQsdRRjXXm6IdjNWh4qYGsiWaLc+jqoKQVukZidoN9wB3cx4DtSJV9/dzqRfm4VR1TMARBD 4cHMemMUkt/+aLXqudtQOvt+WmAX1MFzsLCJt8qmly4B8z6W+sxePdvSYuw+DluKR97IYzv dAr1fa1aI70qdQV7ND9gg== X-UI-Out-Filterresults: notjunk:1;V03:K0:ynMmLROqad4=:LjDKKVAaC8UVbzqpjgz16f VJ0Jy/fPalAGPn2OjAstco4Y8yGiesSogrTqntoB3zRlIIOZaxkCFtKmrpbcicWWJmrpxUaCf Blo302wyEIThOBR3Vx7M++tYekq9b65xdeiFC9ovgX8c0YM3KIkW7b7x8AKKWq0nchyC75aLx mDUoQf/8P4RMoHETukwnq6UX+k8jGoXUgQtDcYWnSGHCa3xlk7rUwf02Kc5U4mGwjyeJBNxx+ 5rTY1zmCRysGEqLMyQFNX7p5NchGPts7nyUwhI9skur7YS1XW0TK4F4OGgbibdDqL96BZNABq rmglCBhGTV2J5yI/icvayKOOddMAKPEF7Vu6KtDeSFZSnmH6YwyuTFcra0t+prB8iFj/fPZeX NhG+10Yi6ZVdIuvpHZlKXpOjRgxEBDP2BeWzIMMdwmydIAEHQvMHyVBySx7YeVURkF3pT2jfm +ReqwdY/KzqdYKoTgljCWERhSF5TwXmC8OM4+FLTScDsd47/H7MqvT6GJ2VkoHijCDJlAIleU ohVHlDFm0AOb7itZa15XaTserYe8CWDPgAJIeQAQMTS4H1uy0zukCDcZ4h9KqCwvooKQjl+T0 8YFIRXdMgJLvYqPDhK3DDH5OPQQ2ZhVnzujqYkVLEiDuWJAD0XrEzScgtzlSWSAU4ACGg6dJQ KHVW1saouykGKq36j3OTdMLEa0S2Fkq7YJVFMVL8z43s4JsEA1UV8eFvLiM/9Q03sOtbSmGa1 9allqybtPW8tQforXDJo5msOBGJHNbU7BO5oeQu/njlpp4Zas/AQBLJCR5cvOZ3/q1ildxKac sYXiMpKgkjlYNGk4eVYgcSK9sdZkJ3rvm6NxHAcSBEK6SmUizjbQBioX7SgbdCyBW+cBEypp4 pWOvAPxEhtzYv0BP60P5h2rhopnky0dtDKTMgK8UaOzu5ihh3V97IR5SLg6Dm42278Ci1Y5at aqGliLFOW1InG2kg6VTMl7qlk+7deo0i/biapmciv0w7lz1DvjziSBQHP111NYEru0LEMsJ5V 5YXHTUpBRN2MCrk+fibg2eq7fauk5KYRiFdgB6yBv/qeVnP2wT7ff5pZtzXNeckzksyOuDzdz 8CCrPkNnHBPQ50= Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org The Supermicro X9SCi-LN4F server mainboard has a two LEDs and a button under the control of the BMC. This patch makes them accessible under Linux running on the BMC. Signed-off-by: Jonathan Neuschäfer --- v4: - no changes v3: - Adjust to schema changes v2: - https://lore.kernel.org/lkml/20211207210823.1975632-9-j.neuschaefer@gmx.net/ - Adjust to new GPIO controller names - Explicitly set pinmux to GPIO for GPIO keys and LEDs v1: - https://lore.kernel.org/lkml/20210602120329.2444672-9-j.neuschaefer@gmx.net/ --- .../nuvoton-wpcm450-supermicro-x9sci-ln4f.dts | 43 +++++++++++++++++++ 1 file changed, 43 insertions(+) -- 2.30.2 diff --git a/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts b/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts index 83f27fbf4e939..3ee61251a16d0 100644 --- a/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts +++ b/arch/arm/boot/dts/nuvoton-wpcm450-supermicro-x9sci-ln4f.dts @@ -8,6 +8,9 @@ #include "nuvoton-wpcm450.dtsi" +#include +#include + / { model = "Supermicro X9SCi-LN4F BMC"; compatible = "supermicro,x9sci-ln4f-bmc", "nuvoton,wpcm450"; @@ -20,6 +23,46 @@ memory@0 { device_type = "memory"; reg = <0 0x08000000>; /* 128 MiB */ }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&key_pins>; + + uid { + label = "UID button"; + linux,code = ; + gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>; + }; + }; + + gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 = <&led_pins>; + + uid { + label = "UID"; + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; + }; + + heartbeat { + label = "heartbeat"; + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>; + }; + }; +}; + +&pinctrl { + key_pins: mux-keys { + groups = "gspi", "sspi"; + function = "gpio"; + }; + + led_pins: mux-leds { + groups = "hg3", "hg0", "pwm4"; + function = "gpio"; + }; }; &serial0 {