From patchwork Tue Jan 18 13:16:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 532986 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 68845C433F5 for ; Tue, 18 Jan 2022 13:16:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241907AbiARNQk (ORCPT ); Tue, 18 Jan 2022 08:16:40 -0500 Received: from mx1.tq-group.com ([93.104.207.81]:30785 "EHLO mx1.tq-group.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241360AbiARNQj (ORCPT ); Tue, 18 Jan 2022 08:16:39 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1642511799; x=1674047799; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/o6MmTbpFIjUnuZdxv6xZk80oeBZ2Pk9GWe8PY2e5ls=; b=hE3qb/R6pVQ0dU8l5PwfflTzmjdFl1vQO8lXgBgea74IhZQDmBNWbFQn pMCCt3LvDtvCn22cjDQOxcL7uuWhzfzAVqHLkyzlzV0hD1PJzW4nFWEY3 Ip0jvll/WJ9TuXTVtM6Dsjh9DT3i9LRTHxhh9fR48pM6n93+Kou/5RIsx 6FVHA/Dpka8boASopBp7jal2YzCP/1OGGtS+NFanSlLkN2p9gM4jrU312 a/VZJCWykkvBjia94vReDIbN9Xvv5YYiarE4FEo5Ul5ucoZOKI0YR8qRt gEMQDFpnE+VtTMSW5Hhq83RQ5TdOyjjedGhCfaiQlpj5nTN1n3Y/y3gpg w==; X-IronPort-AV: E=Sophos;i="5.88,297,1635199200"; d="scan'208";a="21564687" Received: from unknown (HELO tq-pgp-pr1.tq-net.de) ([192.168.6.15]) by mx1-pgp.tq-group.com with ESMTP; 18 Jan 2022 14:16:37 +0100 Received: from mx1.tq-group.com ([192.168.6.7]) by tq-pgp-pr1.tq-net.de (PGP Universal service); Tue, 18 Jan 2022 14:16:37 +0100 X-PGP-Universal: processed; by tq-pgp-pr1.tq-net.de on Tue, 18 Jan 2022 14:16:37 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1642511797; x=1674047797; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=/o6MmTbpFIjUnuZdxv6xZk80oeBZ2Pk9GWe8PY2e5ls=; b=cWFzLF2XzZDxLxFATwWJlqWm712mIgJ2WI8xv7q0pfuysi/JU30SbGEj alWCSruyoAjnZN7xKmdN5b4Ujp64ruZL6/SVD/8fIi8A8v1Z5J0O2biEW Lh6UrKlc9QT+P49gkm0a0avVVdZekLuEKtLWAyDihT5vawp22WrQTdVpB RnQRYg+s+MFgCi635twXyiDJE4vXDGegdBLDtux9ghmPX2JCHF9YH6zhp HKlH8DrDUQ929M5ONyFVT7Fg5O2Aasftxv2u74gQScQOqlg8AdBU2qQRV J0K5RHHIxh6kxxH0WvCWoNFDAqZ72FgqlPvFRkkJryzZG/CXDDxgpuZoe w==; X-IronPort-AV: E=Sophos;i="5.88,297,1635199200"; d="scan'208";a="21564686" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 18 Jan 2022 14:16:37 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id 8D8B9280065; Tue, 18 Jan 2022 14:16:36 +0100 (CET) From: Alexander Stein To: Greg Kroah-Hartman , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , NXP Linux Team , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Li Jun Subject: [PATCH v3 2/4] dt-bindings: usb: dwc3-imx8mp: Add imx8mp specific flags Date: Tue, 18 Jan 2022 14:16:24 +0100 Message-Id: <20220118131626.926394-3-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220118131626.926394-1-alexander.stein@ew.tq-group.com> References: <20220118131626.926394-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org This adds bindings for features in the USB glue block. They allow setting polarity of PWR and OC as well as disabling port power control. Also permanently attached can be annotated as well. Additional IO address and clock are needed. Signed-off-by: Alexander Stein --- .../bindings/usb/fsl,imx8mp-dwc3.yaml | 38 ++++++++++++++++--- 1 file changed, 32 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml index 974032b1fda0..ff48b4e8427d 100644 --- a/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml +++ b/Documentation/devicetree/bindings/usb/fsl,imx8mp-dwc3.yaml @@ -15,9 +15,9 @@ properties: const: fsl,imx8mp-dwc3 reg: - maxItems: 1 - description: Address and length of the register set for the wrapper of - dwc3 core on the SOC. + items: + - description: Address and length of the register set for HSIO Block Control + - description: Address and length of the register set for the wrapper of dwc3 core on the SOC. "#address-cells": enum: [ 1, 2 ] @@ -43,11 +43,35 @@ properties: items: - description: system hsio root clock. - description: suspend clock, used for usb wakeup logic. + - description: clock for the USB glue block clock-names: items: - const: hsio - const: suspend + - const: phy + + fsl,permanently-attached: + type: boolean + description: + Indicates if the device atached to a downstream port is + permanently attached. + + fsl,disable-port-power-control: + type: boolean + description: + Indicates whether the host controller implementation includes port + power control. Defines Bit 3 in capability register (HCCPARAMS). + + fsl,over-current-active-low: + type: boolean + description: + Over current signal polarity is active low. + + fsl,power-active-low: + type: boolean + description: + Power pad (PWR) polarity is active low. # Required child node: @@ -74,10 +98,12 @@ examples: #include usb3_0: usb@32f10100 { compatible = "fsl,imx8mp-dwc3"; - reg = <0x32f10100 0x8>; + reg = <0x32f10100 0x8>, + <0x381f0000 0x20>; clocks = <&clk IMX8MP_CLK_HSIO_ROOT>, - <&clk IMX8MP_CLK_USB_ROOT>; - clock-names = "hsio", "suspend"; + <&clk IMX8MP_CLK_USB_ROOT>, + <&clk IMX8MP_CLK_USB_PHY_ROOT>; + clock-names = "hsio", "suspend", "phy"; interrupts = ; #address-cells = <1>; #size-cells = <1>; From patchwork Tue Jan 18 13:16:25 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexander Stein X-Patchwork-Id: 532985 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id B030CC43219 for ; Tue, 18 Jan 2022 13:16:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S241360AbiARNQm (ORCPT ); Tue, 18 Jan 2022 08:16:42 -0500 Received: from mx1.tq-group.com ([93.104.207.81]:30777 "EHLO mx1.tq-group.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S241721AbiARNQk (ORCPT ); Tue, 18 Jan 2022 08:16:40 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1642511800; x=1674047800; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=n2wi0VyDHml3t8zyGPZu/XZ547LV3Cu4QkPHY8CA61U=; b=PZvIGzEk9qXFhEZ5YoEqoQaYFALAJ/mppu6ioR4UBEA2R4mOMMXZwfya QrQh5+OMMA8B9f0ie8pgN9HgJkzTtLhXYw3whg3Kq5xvtXfkDzrW0WPzh p4nl87morWnKVHyK/O5V3Bxcdvkwm5kqWVao7thP1BYhSpD8Ygntfjnx1 Dwei66Eai2h6gNQB4akvXM/WP5i3OS+YLxZnRWjyeP6lsm/U4vwl9DnK8 ZcC4lsaqGxfwX91vOMc7P59bjSu9gafX8wTCFrN7RQHIavFAT/YsjDRFY Oyeuh0SjykVmwtR/mZgHr7IHFThsBlDdg71GhHVhy12kbtkR5sT+rdmdb g==; X-IronPort-AV: E=Sophos;i="5.88,297,1635199200"; d="scan'208";a="21564689" Received: from unknown (HELO tq-pgp-pr1.tq-net.de) ([192.168.6.15]) by mx1-pgp.tq-group.com with ESMTP; 18 Jan 2022 14:16:37 +0100 Received: from mx1.tq-group.com ([192.168.6.7]) by tq-pgp-pr1.tq-net.de (PGP Universal service); Tue, 18 Jan 2022 14:16:37 +0100 X-PGP-Universal: processed; by tq-pgp-pr1.tq-net.de on Tue, 18 Jan 2022 14:16:37 +0100 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tq-group.com; i=@tq-group.com; q=dns/txt; s=key1; t=1642511797; x=1674047797; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=n2wi0VyDHml3t8zyGPZu/XZ547LV3Cu4QkPHY8CA61U=; b=FgVJ8OK5d5qd3jRNM8IX+w7SnaGGlHDAbqvNayy+CLwHmeKiZPOn1uOm MZIVnvBLMhvCajaNxPL6AYaH4j0JwwHZw8yMuqCtKHDO8GkH/6qzjk/nG oWm12KptzewH6lBwRP+z193vofH1OZ17l6gN+Bdm14zGzReBMvv5BWZZf ByYcKpCkKIL40DoP4tUSqFj9TFw+lHkFasLwPy7OJ/qBEA4ElzWJIMDmf 4HkCVdN+uaqdtD+rWnwEQJunniCzr60dthKFTXOpDIfsH2cAcboUjS/UC pFC2PIVH+xLt7BmT+VQaeD300+hPayVpvpM7BUSYNwqILjfsVhC0F8VUO w==; X-IronPort-AV: E=Sophos;i="5.88,297,1635199200"; d="scan'208";a="21564688" Received: from vtuxmail01.tq-net.de ([10.115.0.20]) by mx1.tq-group.com with ESMTP; 18 Jan 2022 14:16:37 +0100 Received: from steina-w.tq-net.de (unknown [10.123.49.12]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by vtuxmail01.tq-net.de (Postfix) with ESMTPSA id C33BA280075; Tue, 18 Jan 2022 14:16:36 +0100 (CET) From: Alexander Stein To: Greg Kroah-Hartman , Rob Herring , Shawn Guo , Sascha Hauer , Fabio Estevam Cc: Alexander Stein , NXP Linux Team , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Li Jun Subject: [PATCH v3 3/4] usb: dwc3: imx8mp: Add support for setting SOC specific flags Date: Tue, 18 Jan 2022 14:16:25 +0100 Message-Id: <20220118131626.926394-4-alexander.stein@ew.tq-group.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220118131626.926394-1-alexander.stein@ew.tq-group.com> References: <20220118131626.926394-1-alexander.stein@ew.tq-group.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The i.MX8MP glue layer has support for the following flags: * over-current polarity * PWR pad polarity * controlling PPC flag in HCCPARAMS register * permanent port attach for usb2 & usb3 port Allow setting these flags by supporting specific flags in the glue node. In order to get this to work an additional IORESOURCE_MEM and clock is necessary. For backward compatibility this is purely optional. Signed-off-by: Alexander Stein --- drivers/usb/dwc3/dwc3-imx8mp.c | 81 ++++++++++++++++++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/drivers/usb/dwc3/dwc3-imx8mp.c b/drivers/usb/dwc3/dwc3-imx8mp.c index 1c8fe657b3a9..3df4313b3740 100644 --- a/drivers/usb/dwc3/dwc3-imx8mp.c +++ b/drivers/usb/dwc3/dwc3-imx8mp.c @@ -36,17 +36,66 @@ #define USB_WAKEUP_EN_MASK GENMASK(5, 0) +/* USB glue registers */ +#define USB_CTRL0 0x00 +#define USB_CTRL1 0x04 + +#define USB_CTRL0_PORTPWR_EN BIT(12) /* 1 - PPC enabled (default) */ +#define USB_CTRL0_USB3_FIXED BIT(22) /* 1 - USB3 permanent attached */ +#define USB_CTRL0_USB2_FIXED BIT(23) /* 1 - USB2 permanent attached */ + +#define USB_CTRL1_OC_POLARITY BIT(16) /* 0 - HIGH / 1 - LOW */ +#define USB_CTRL1_PWR_POLARITY BIT(17) /* 0 - HIGH / 1 - LOW */ + struct dwc3_imx8mp { struct device *dev; struct platform_device *dwc3; void __iomem *hsio_blk_base; + void __iomem *glue_base; struct clk *hsio_clk; struct clk *suspend_clk; + struct clk *phy_clk; int irq; bool pm_suspended; bool wakeup_pending; }; +static void imx8mp_configure_glue(struct dwc3_imx8mp *dwc3_imx) +{ + struct device *dev = dwc3_imx->dev; + u32 value; + + if ((!dwc3_imx->glue_base) || (!dwc3_imx->phy_clk)) + return; + + value = readl(dwc3_imx->glue_base + USB_CTRL0); + + if (device_property_read_bool(dev, "fsl,permanently-attached")) + value |= (USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED); + else + value &= ~(USB_CTRL0_USB2_FIXED | USB_CTRL0_USB3_FIXED); + + if (device_property_read_bool(dev, "fsl,disable-port-power-control")) + value &= ~(USB_CTRL0_PORTPWR_EN); + else + value |= USB_CTRL0_PORTPWR_EN; + + writel(value, dwc3_imx->glue_base + USB_CTRL0); + + value = readl(dwc3_imx->glue_base + USB_CTRL1); + if (device_property_read_bool(dev, "fsl,over-current-active-low")) + value |= USB_CTRL1_OC_POLARITY; + else + value &= ~USB_CTRL1_OC_POLARITY; + + if (device_property_read_bool(dev, "fsl,power-active-low")) + value |= USB_CTRL1_PWR_POLARITY; + else + value &= ~USB_CTRL1_PWR_POLARITY; + + writel(value, dwc3_imx->glue_base + USB_CTRL1); +} + static void dwc3_imx8mp_wakeup_enable(struct dwc3_imx8mp *dwc3_imx) { struct dwc3 *dwc3 = platform_get_drvdata(dwc3_imx->dwc3); @@ -100,6 +149,7 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) struct device *dev = &pdev->dev; struct device_node *dwc3_np, *node = dev->of_node; struct dwc3_imx8mp *dwc3_imx; + struct resource *res; int err, irq; if (!node) { @@ -119,6 +169,15 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) if (IS_ERR(dwc3_imx->hsio_blk_base)) return PTR_ERR(dwc3_imx->hsio_blk_base); + res = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (!res) { + dev_warn(dev, "Base address for glue layer missing. Continuing without, some features are missing though."); + } else { + dwc3_imx->glue_base = devm_ioremap_resource(dev, res); + if (IS_ERR(dwc3_imx->glue_base)) + return PTR_ERR(dwc3_imx->glue_base); + } + dwc3_imx->hsio_clk = devm_clk_get(dev, "hsio"); if (IS_ERR(dwc3_imx->hsio_clk)) { err = PTR_ERR(dwc3_imx->hsio_clk); @@ -145,6 +204,24 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) goto disable_hsio_clk; } + dwc3_imx->phy_clk = devm_clk_get(dev, "phy"); + if (PTR_ERR(dwc3_imx->phy_clk) == -ENOENT) { + dev_warn(dev, "PHY clock missing. Continuing without, some features are missing though."); + dwc3_imx->phy_clk = NULL; + } else if (IS_ERR(dwc3_imx->phy_clk)) { + err = PTR_ERR(dwc3_imx->phy_clk); + dev_err(dev, "Failed to get phy clk, err=%d\n", err); + goto disable_suspend_clk; + } + + if (dwc3_imx->phy_clk) { + err = clk_prepare_enable(dwc3_imx->phy_clk); + if (err) { + dev_err(dev, "Failed to enable phy clk, err=%d\n", err); + goto disable_suspend_clk; + } + } + irq = platform_get_irq(pdev, 0); if (irq < 0) { err = irq; @@ -152,6 +229,8 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) } dwc3_imx->irq = irq; + imx8mp_configure_glue(dwc3_imx); + pm_runtime_set_active(dev); pm_runtime_enable(dev); err = pm_runtime_get_sync(dev); @@ -199,6 +278,8 @@ static int dwc3_imx8mp_probe(struct platform_device *pdev) pm_runtime_disable(dev); pm_runtime_put_noidle(dev); disable_clks: + clk_disable_unprepare(dwc3_imx->phy_clk); +disable_suspend_clk: clk_disable_unprepare(dwc3_imx->suspend_clk); disable_hsio_clk: clk_disable_unprepare(dwc3_imx->hsio_clk);