From patchwork Mon Nov 19 21:18:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 151520 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3184877ljp; Mon, 19 Nov 2018 13:20:35 -0800 (PST) X-Google-Smtp-Source: AFSGD/WTDXpxgpsz9llmsagLNWyRpMggZH2kuysOBcKIuIq/kdKUTPMXFWhB29/W55se5Y1ej+lT X-Received: by 2002:a65:6094:: with SMTP id t20mr6149578pgu.285.1542662435291; Mon, 19 Nov 2018 13:20:35 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542662435; cv=none; d=google.com; s=arc-20160816; b=AWrN/DXcEiGuDMOseip+YKxbc111bqjKBxQgU2A47xA16Je5cLkdtLBkTcZkJFR1Bk 0CxZaJGfIjExJMp6/YJuZ1uouHi439qAEvmoQhHPFhueH7Dzuw4tNU1GwFPeSobX3aBK wXteIgNGh44iY+ZA+8TZA+ALJb6/N5skg32OQh9O+LL99I303ROHEdidLkeTXz0J61Qn zpqRl52PzQVnQtKZjaP67M6rr2Muhz4R8BA4i8sXcMcYugAntqIedNCB3BhfM0SSSRho 3KrFHnsIuh3egDIyOkj9cxaPijTeyS/Ad+0aYcJssE1Cppbc+d9NyOPDWGRsWuonrrIw 2+2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=GdXLbhZS4suMb9/mphscskmQOAUSxilD2McB76kOo1M=; b=hG4PuDfzTdxY2RIctlAt6vRMw66HiNMTf+sdTZSdS9TckcPEf/6LMx4bcj50rg9jBr 7T3pLGACTB3FE5vUGwybbaTkDroAXdZ3Li0iYEveDq52VL6oCWxfGG/SWNRJXaN2+03H VZjEqE8UMigVNg1og1K0ivWr/Ovp3u59uPz9p2RG/SZVZ7+NIVBN/qy6k5zjwwt6E2t5 iAlPHIUbsyZbtxJQDul97pCHVHc44HyuHNIkQrV5ZzcZTQPg74ZnCMF988DYl7Zgjbq4 9w7rmhGDoMV8QNTeetgg57PzFTx10XfzIp3MZHxOPKmaKQ2KS8x+JuzREeYmdH6fAV3r R5OQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id m142si19689176pfd.171.2018.11.19.13.20.34; Mon, 19 Nov 2018 13:20:35 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731018AbeKTHqC (ORCPT + 32 others); Tue, 20 Nov 2018 02:46:02 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:51144 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730209AbeKTHqC (ORCPT ); Tue, 20 Nov 2018 02:46:02 -0500 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 9898596A0D366; Tue, 20 Nov 2018 05:20:29 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.47.88.214) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.408.0; Tue, 20 Nov 2018 05:20:22 +0800 From: Salil Mehta To: CC: , , , , , , , liuzhongzhu Subject: [PATCH net-next 1/8] net: hns3: Add debugfs framework registration Date: Mon, 19 Nov 2018 21:18:38 +0000 Message-ID: <20181119211845.23168-2-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20181119211845.23168-1-salil.mehta@huawei.com> References: <20181119211845.23168-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.88.214] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: liuzhongzhu Add the debugfs framework to the driver and create a debugfs command interface for each device. example command: "echo queue info > cmd" Query the packet forwarding queue information. Signed-off-by: liuzhongzhu Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/Makefile | 2 +- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 136 ++++++++++++++++++ .../net/ethernet/hisilicon/hns3/hns3_enet.c | 17 ++- .../net/ethernet/hisilicon/hns3/hns3_enet.h | 4 + 5 files changed, 157 insertions(+), 3 deletions(-) create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c -- 2.17.1 diff --git a/drivers/net/ethernet/hisilicon/hns3/Makefile b/drivers/net/ethernet/hisilicon/hns3/Makefile index 002534f12b66..d01bf536eb86 100644 --- a/drivers/net/ethernet/hisilicon/hns3/Makefile +++ b/drivers/net/ethernet/hisilicon/hns3/Makefile @@ -9,6 +9,6 @@ obj-$(CONFIG_HNS3) += hns3vf/ obj-$(CONFIG_HNS3) += hnae3.o obj-$(CONFIG_HNS3_ENET) += hns3.o -hns3-objs = hns3_enet.o hns3_ethtool.o +hns3-objs = hns3_enet.o hns3_ethtool.o hns3_debugfs.o hns3-$(CONFIG_HNS3_DCB) += hns3_dcbnl.o diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index 4a39feaba8b2..f32f075991f5 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -566,6 +566,7 @@ struct hnae3_handle { u32 numa_node_mask; /* for multi-chip support */ u8 netdev_flags; + struct dentry *hnae3_dbgfs; }; #define hnae3_set_field(origin, mask, shift, val) \ diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c new file mode 100644 index 000000000000..9bc6ceb6fbc1 --- /dev/null +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -0,0 +1,136 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (c) 2018-2019 Hisilicon Limited. + +#include +#include + +#include "hnae3.h" +#include "hns3_enet.h" + +#define HNS3_DBG_READ_LEN 256 + +static struct dentry *hns3_dbgfs_root; + +static void hns3_dbg_help(struct hnae3_handle *h) +{ + dev_info(&h->pdev->dev, "available commands\n"); + dev_info(&h->pdev->dev, "queue info [number]\n"); + dev_info(&h->pdev->dev, "dump fd tcam\n"); +} + +static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer, + size_t count, loff_t *ppos) +{ + int uncopy_bytes; + char *buf; + int len; + + if (*ppos != 0) + return 0; + + if (count < HNS3_DBG_READ_LEN) + return -ENOSPC; + + buf = kzalloc(HNS3_DBG_READ_LEN, GFP_KERNEL); + if (!buf) + return -ENOMEM; + + len = snprintf(buf, HNS3_DBG_READ_LEN, "%s\n", + "Please echo help to cmd to get help information"); + uncopy_bytes = copy_to_user(buffer, buf, len); + + kfree(buf); + + if (uncopy_bytes) + return -EFAULT; + + return (*ppos = len); +} + +static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, + size_t count, loff_t *ppos) +{ + struct hnae3_handle *handle = filp->private_data; + char *cmd_buf, *cmd_buf_tmp; + int uncopied_bytes; + int ret = 0; + + if (*ppos != 0) + return 0; + + cmd_buf = kzalloc(count + 1, GFP_KERNEL); + if (!cmd_buf) + return count; + + uncopied_bytes = copy_from_user(cmd_buf, buffer, count); + if (uncopied_bytes) { + kfree(cmd_buf); + return -EFAULT; + } + + cmd_buf[count] = '\0'; + + cmd_buf_tmp = strchr(cmd_buf, '\n'); + if (cmd_buf_tmp) { + *cmd_buf_tmp = '\0'; + count = cmd_buf_tmp - cmd_buf + 1; + } + + if (strncmp(cmd_buf, "help", 4) == 0) + hns3_dbg_help(handle); + + if (ret) + hns3_dbg_help(handle); + + kfree(cmd_buf); + cmd_buf = NULL; + + return count; +} + +static const struct file_operations hns3_dbg_cmd_fops = { + .owner = THIS_MODULE, + .open = simple_open, + .read = hns3_dbg_cmd_read, + .write = hns3_dbg_cmd_write, +}; + +void hns3_dbg_init(struct hnae3_handle *handle) +{ + const char *name = pci_name(handle->pdev); + struct dentry *pfile; + + handle->hnae3_dbgfs = debugfs_create_dir(name, hns3_dbgfs_root); + if (!handle->hnae3_dbgfs) + return; + + pfile = debugfs_create_file("cmd", 0600, handle->hnae3_dbgfs, handle, + &hns3_dbg_cmd_fops); + if (!pfile) { + debugfs_remove_recursive(handle->hnae3_dbgfs); + handle->hnae3_dbgfs = NULL; + dev_warn(&handle->pdev->dev, "create file for %s fail\n", + name); + } +} + +void hns3_dbg_uninit(struct hnae3_handle *handle) +{ + debugfs_remove_recursive(handle->hnae3_dbgfs); + handle->hnae3_dbgfs = NULL; +} + +void hns3_dbg_register_debugfs(const char *debugfs_dir_name) +{ + hns3_dbgfs_root = debugfs_create_dir(debugfs_dir_name, NULL); + if (!hns3_dbgfs_root) { + pr_warn("Register debugfs for %s fail\n", debugfs_dir_name); + return; + } +} + +void hns3_dbg_unregister_debugfs(void) +{ + debugfs_remove_recursive(hns3_dbgfs_root); + hns3_dbgfs_root = NULL; +} diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c index 7f81db3df041..d1b2de2ecc89 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.c @@ -3620,6 +3620,8 @@ static int hns3_client_init(struct hnae3_handle *handle) hns3_dcbnl_setup(handle); + hns3_dbg_init(handle); + /* MTU range: (ETH_MIN_MTU(kernel default) - 9702) */ netdev->max_mtu = HNS3_MAX_MTU; @@ -3676,6 +3678,8 @@ static void hns3_client_uninit(struct hnae3_handle *handle, bool reset) hns3_put_ring_config(priv); + hns3_dbg_uninit(handle); + priv->ring_data = NULL; out_netdev_free: @@ -4245,15 +4249,23 @@ static int __init hns3_init_module(void) INIT_LIST_HEAD(&client.node); + hns3_dbg_register_debugfs(hns3_driver_name); + ret = hnae3_register_client(&client); if (ret) - return ret; + goto err_reg_client; ret = pci_register_driver(&hns3_driver); if (ret) - hnae3_unregister_client(&client); + goto err_reg_driver; return ret; + +err_reg_driver: + hnae3_unregister_client(&client); +err_reg_client: + hns3_dbg_unregister_debugfs(); + return ret; } module_init(hns3_init_module); @@ -4265,6 +4277,7 @@ static void __exit hns3_exit_module(void) { pci_unregister_driver(&hns3_driver); hnae3_unregister_client(&client); + hns3_dbg_unregister_debugfs(); } module_exit(hns3_exit_module); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h index bbf227ba30f8..4e4b48ba78e3 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_enet.h @@ -683,4 +683,8 @@ void hns3_dcbnl_setup(struct hnae3_handle *handle); static inline void hns3_dcbnl_setup(struct hnae3_handle *handle) {} #endif +void hns3_dbg_init(struct hnae3_handle *handle); +void hns3_dbg_uninit(struct hnae3_handle *handle); +void hns3_dbg_register_debugfs(const char *debugfs_dir_name); +void hns3_dbg_unregister_debugfs(void); #endif From patchwork Mon Nov 19 21:18:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 151521 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3185145ljp; Mon, 19 Nov 2018 13:20:49 -0800 (PST) X-Google-Smtp-Source: AJdET5drhDd2jsrMv2wyphATBFBBc1VpCi+DIN0W/PucuNORDLpcs05/0/vV0SxlCwrpz+uRNbHl X-Received: by 2002:a17:902:108a:: with SMTP id c10-v6mr23480597pla.171.1542662449576; Mon, 19 Nov 2018 13:20:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542662449; cv=none; d=google.com; s=arc-20160816; b=x7LrWlXJnyMUK0qwhO5jfcgRpWRMe/njQcHV7blyjB6nBGsL+AVfQ1Ibph+CO02mFc BInjVgXoQCIG8QGVk3vTZ1Ffk4XmwbFjU2fmTG90WiaiKNhEn5ELLwrrTMWKmTZq9f2u apz1B1QLpidd0Layz21tnuzh7YQQ684Z8sXqWIExCFvIzRepw74FPBSW5R7z6PCWvJl2 GQr58gB3OJDoA2/EPyYKqNv9qkkMlB1/K9lg9gXqp+BfdEtQJmwQcRuMiK2K31uYq/sR F4Ro2atuuwJBHuxcGFd/iYFeh5dnkuO7YK3DvWJgiGNbEJdfovy8fGrvcTIk60j+haJO YJkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=w/8MAiu9LlMbzyqiJijK4E/5JkrIzILwfrYL0HnfzFc=; b=pJjzUNaop1r9JyyOmp1RwHe4/E8aMWXYgQu+O038Nb+5g+H1w7zZj8YcvtCh7jcycr 5MEb00HLCD4o3awHUZ5YStR2LK3EkGG3DuJD9jOk5+nWFpbJ2XG6ltltOP8FEYKbis2H W/oBzu03Ng91l7Jb6w+k3rXH8MCv15IvTXzDvqJocp8IfmgtbMc43H8+MdLHIjp6mHH9 DUQz3WAXP2bchYp5MFCXwwqCKuaLgYUgykTgoURiJmDNAsvn/fY5swZuZNcktBIpvsgz G+uhAypmGMkB8a6m+UvCUKR3W9Hr5rV/qKcaagUp9HEWUO1PXOwcrkBb6G3Y8IOVTbeQ Fw8Q== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f184-v6si34080743pfb.252.2018.11.19.13.20.49; Mon, 19 Nov 2018 13:20:49 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731053AbeKTHqS (ORCPT + 32 others); Tue, 20 Nov 2018 02:46:18 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:14685 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730790AbeKTHqS (ORCPT ); Tue, 20 Nov 2018 02:46:18 -0500 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id E40BC4CB6F111; Tue, 20 Nov 2018 05:20:43 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.47.88.214) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.408.0; Tue, 20 Nov 2018 05:20:33 +0800 From: Salil Mehta To: CC: , , , , , , , liuzhongzhu Subject: [PATCH net-next 2/8] net: hns3: Add "queue info" query function Date: Mon, 19 Nov 2018 21:18:39 +0000 Message-ID: <20181119211845.23168-3-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20181119211845.23168-1-salil.mehta@huawei.com> References: <20181119211845.23168-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.88.214] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: liuzhongzhu Query the queue information of the current NIC such as BD size, queue header and tail pointer. This patch adds support for debugfs command: echo queue info 1 > cmd it can print queue config information... root@(none)# echo queue info 1 > cmd hns3 0000:7d:00.0: queue info hns3 0000:7d:00.0: RX(1) BASE ADD: 0x00000000ffb58000 hns3 0000:7d:00.0: RX(1) RING BD NUM: 127 hns3 0000:7d:00.0: RX(1) RING BD LEN: 2 hns3 0000:7d:00.0: RX(1) RING TAIL: 120 hns3 0000:7d:00.0: RX(1) RING HEAD: 0 hns3 0000:7d:00.0: RX(1) RING FBDNUM: 0 hns3 0000:7d:00.0: RX(1) RING PKTNUM: 0 hns3 0000:7d:00.0: TX(1) BASE ADD: 0x00000000fffd8000 hns3 0000:7d:00.0: TX(1) RING BD NUM: 127 hns3 0000:7d:00.0: TX(1) RING TC: 0 hns3 0000:7d:00.0: TX(1) RING TAIL: 2 hns3 0000:7d:00.0: TX(1) RING HEAD: 2 hns3 0000:7d:00.0: TX(1) RING FBDNUM: 0 hns3 0000:7d:00.0: TX(1) RING OFFSET: 0 hns3 0000:7d:00.0: TX(1) RING PKTNUM: 0 root@(none)# Signed-off-by: liuzhongzhu Signed-off-by: Salil Mehta --- .../ethernet/hisilicon/hns3/hns3_debugfs.c | 122 ++++++++++++++++++ 1 file changed, 122 insertions(+) -- 2.17.1 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 9bc6ceb6fbc1..04b0789d439d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -11,6 +11,120 @@ static struct dentry *hns3_dbgfs_root; +static int hns3_dbg_queue_info(struct hnae3_handle *h, char *cmd_buf) +{ + struct hns3_nic_priv *priv = h->priv; + struct hns3_nic_ring_data *ring_data; + struct hns3_enet_ring *ring; + u32 base_add_l, base_add_h; + u32 queue_num, queue_max; + u32 value, i = 0; + int cnt; + + if (!priv->ring_data) { + dev_err(&h->pdev->dev, "ring_data is NULL\n"); + return -EFAULT; + } + + queue_max = h->kinfo.num_tqps; + cnt = kstrtouint(&cmd_buf[11], 0, &queue_num); + if (cnt) + queue_num = 0; + else + queue_max = queue_num + 1; + + dev_info(&h->pdev->dev, "queue info\n"); + + if (queue_num >= h->kinfo.num_tqps) { + dev_err(&h->pdev->dev, + "Queue number(%u) is out of range(%u)\n", queue_num, + h->kinfo.num_tqps - 1); + return -EINVAL; + } + + ring_data = priv->ring_data; + for (i = queue_num; i < queue_max; i++) { + /* Each cycle needs to determine whether the instance is reset, + * to prevent reference to invalid memory. And need to ensure + * that the following code is executed within 100ms. + */ + if (test_bit(HNS3_NIC_STATE_INITED, &priv->state) || + test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) + return -EPERM; + + ring = ring_data[i + h->kinfo.num_tqps].ring; + base_add_h = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_BASEADDR_H_REG); + base_add_l = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_BASEADDR_L_REG); + dev_info(&h->pdev->dev, "RX(%d) BASE ADD: 0x%08x%08x\n", i, + base_add_h, base_add_l); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_BD_NUM_REG); + dev_info(&h->pdev->dev, "RX(%d) RING BD NUM: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_BD_LEN_REG); + dev_info(&h->pdev->dev, "RX(%d) RING BD LEN: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_TAIL_REG); + dev_info(&h->pdev->dev, "RX(%d) RING TAIL: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_HEAD_REG); + dev_info(&h->pdev->dev, "RX(%d) RING HEAD: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_FBDNUM_REG); + dev_info(&h->pdev->dev, "RX(%d) RING FBDNUM: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_RX_RING_PKTNUM_RECORD_REG); + dev_info(&h->pdev->dev, "RX(%d) RING PKTNUM: %u\n", i, value); + + ring = ring_data[i].ring; + base_add_h = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_BASEADDR_H_REG); + base_add_l = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_BASEADDR_L_REG); + dev_info(&h->pdev->dev, "TX(%d) BASE ADD: 0x%08x%08x\n", i, + base_add_h, base_add_l); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_BD_NUM_REG); + dev_info(&h->pdev->dev, "TX(%d) RING BD NUM: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_TC_REG); + dev_info(&h->pdev->dev, "TX(%d) RING TC: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_TAIL_REG); + dev_info(&h->pdev->dev, "TX(%d) RING TAIL: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_HEAD_REG); + dev_info(&h->pdev->dev, "TX(%d) RING HEAD: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_FBDNUM_REG); + dev_info(&h->pdev->dev, "TX(%d) RING FBDNUM: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_OFFSET_REG); + dev_info(&h->pdev->dev, "TX(%d) RING OFFSET: %u\n", i, value); + + value = readl_relaxed(ring->tqp->io_base + + HNS3_RING_TX_RING_PKTNUM_RECORD_REG); + dev_info(&h->pdev->dev, "TX(%d) RING PKTNUM: %u\n\n", i, + value); + } + + return 0; +} + static void hns3_dbg_help(struct hnae3_handle *h) { dev_info(&h->pdev->dev, "available commands\n"); @@ -51,6 +165,7 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, size_t count, loff_t *ppos) { struct hnae3_handle *handle = filp->private_data; + struct hns3_nic_priv *priv = handle->priv; char *cmd_buf, *cmd_buf_tmp; int uncopied_bytes; int ret = 0; @@ -58,6 +173,11 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, if (*ppos != 0) return 0; + /* Judge if the instance is being reset. */ + if (test_bit(HNS3_NIC_STATE_INITED, &priv->state) || + test_bit(HNS3_NIC_STATE_RESETTING, &priv->state)) + return 0; + cmd_buf = kzalloc(count + 1, GFP_KERNEL); if (!cmd_buf) return count; @@ -78,6 +198,8 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, if (strncmp(cmd_buf, "help", 4) == 0) hns3_dbg_help(handle); + else if (strncmp(cmd_buf, "queue info", 10) == 0) + ret = hns3_dbg_queue_info(handle, cmd_buf); if (ret) hns3_dbg_help(handle); From patchwork Mon Nov 19 21:18:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 151522 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3185227ljp; Mon, 19 Nov 2018 13:20:55 -0800 (PST) X-Google-Smtp-Source: AJdET5fnwbQc7IRWOwSTM1WFAZoVNTuyjCJMDdUIWtJYZw7Xd+tpRnrOa0gDDCsBN04ElDog1zyy X-Received: by 2002:a62:59cd:: with SMTP id k74-v6mr24690880pfj.243.1542662455814; Mon, 19 Nov 2018 13:20:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542662455; cv=none; d=google.com; s=arc-20160816; b=y7SYoLl5jQK17h7C6GSKqaNulnohX0xZPhLlPGo0eXzeXMkIBoA1bb+3FZChEYTtrb vOruHWvJk6ar7zvwImGyslKuaecVxBoTSG0FP5KWz/7yayFL3V+PCz3AzJ81jFjhTe0G 4o5DOEM1Aa6MBMddOmsa7QPWHF7B1Cz855tHFqaQ6Zeb9w/m9+SKz6DlXzgkZxidKADl BxCqmMiHFtnlct6Lyye55nhI2D/KGD7Ez8uZPctVp1ahlrurT4Usp88EJZCErpd6dUuD Q3PEVcDl67OObnz3OmGBGCz4esvwck0bA8ZJ6N3huIdagouppvC2XS29XyIo2yI8Vfn3 IBvw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=Y51pVdrwjV1P8rrJd1vO4XFuxlXO1XNw3Lj0Uktywx0=; b=DN0tVnoqq5gTSQfvyojDNfsDr3Pk/XkER2ptNCGRqu7U39895B9vFwAWgMoP4BESss OZP2t4pckp/gSgbtF0UKl7aWFOgkqQoA34iA6CyFtMFoGXr3THj5+FLBjxhL1oGMY5Pw vUBOlL5HXAFTIYZzxe/OX3YMdG5IbAhLrV84fx1P3PdZN6UCb6tTeNzBMvkyiGeBakRp xEk/Vb66ubTV3bjFzTxTSq2g86tfZTuzuDuu7vIx17lOXWKh5dzOS2p+ycuEL3kDFSeP /Nf1lCjlxbU2a2p0nJYPZ/9WovGYB/4z0L+pxnZNWEvET9F7vJGUaTCJU8pazFxECRsu gr2g== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id q25si25845241pgv.541.2018.11.19.13.20.55; Mon, 19 Nov 2018 13:20:55 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731072AbeKTHqX (ORCPT + 32 others); Tue, 20 Nov 2018 02:46:23 -0500 Received: from szxga05-in.huawei.com ([45.249.212.191]:14686 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730790AbeKTHqX (ORCPT ); Tue, 20 Nov 2018 02:46:23 -0500 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 01B305D175259; Tue, 20 Nov 2018 05:20:49 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.47.88.214) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.408.0; Tue, 20 Nov 2018 05:20:43 +0800 From: Salil Mehta To: CC: , , , , , , , liuzhongzhu Subject: [PATCH net-next 3/8] net: hns3: Add "FD flow table" info query function Date: Mon, 19 Nov 2018 21:18:40 +0000 Message-ID: <20181119211845.23168-4-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20181119211845.23168-1-salil.mehta@huawei.com> References: <20181119211845.23168-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.88.214] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: liuzhongzhu All the Flow Director rules are stored in tcam blocks. For each bit of tcam entry, the match value depends on two input value(x, y). debugfs command: echo dump fd tcam > cmd Sample output: root@(none)# echo dump fd tcam > cmd hns3 0000:7d:00.0: read result tcam key x(31): hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 08000000 hns3 0000:7d:00.0: 00000600 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: read result tcam key y(31): hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: f7ff0000 hns3 0000:7d:00.0: 0000f900 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 00000000 hns3 0000:7d:00.0: 0000fff8 root@(none)# Signed-off-by: liuzhongzhu Signed-off-by: Salil Mehta --- drivers/net/ethernet/hisilicon/hns3/hnae3.h | 1 + .../ethernet/hisilicon/hns3/hns3_debugfs.c | 2 + .../ethernet/hisilicon/hns3/hns3pf/Makefile | 2 +- .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 77 +++++++++++++++++++ .../hisilicon/hns3/hns3pf/hclge_main.c | 1 + .../hisilicon/hns3/hns3pf/hclge_main.h | 1 + .../hisilicon/hns3/hns3pf/hclge_main.h.rej | 12 +++ 7 files changed, 95 insertions(+), 1 deletion(-) create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c create mode 100644 drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h.rej -- 2.17.1 diff --git a/drivers/net/ethernet/hisilicon/hns3/hnae3.h b/drivers/net/ethernet/hisilicon/hns3/hnae3.h index f32f075991f5..a1707b77c47f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hnae3.h +++ b/drivers/net/ethernet/hisilicon/hns3/hnae3.h @@ -453,6 +453,7 @@ struct hnae3_ae_ops { struct ethtool_rxnfc *cmd, u32 *rule_locs); int (*restore_fd_rules)(struct hnae3_handle *handle); void (*enable_fd)(struct hnae3_handle *handle, bool enable); + int (*dbg_run_cmd)(struct hnae3_handle *handle, char *cmd_buf); pci_ers_result_t (*process_hw_error)(struct hnae3_ae_dev *ae_dev); bool (*get_hw_reset_stat)(struct hnae3_handle *handle); bool (*ae_dev_resetting)(struct hnae3_handle *handle); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 04b0789d439d..366fb7f4dce9 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -200,6 +200,8 @@ static ssize_t hns3_dbg_cmd_write(struct file *filp, const char __user *buffer, hns3_dbg_help(handle); else if (strncmp(cmd_buf, "queue info", 10) == 0) ret = hns3_dbg_queue_info(handle, cmd_buf); + else if (handle->ae_algo->ops->dbg_run_cmd) + ret = handle->ae_algo->ops->dbg_run_cmd(handle, cmd_buf); if (ret) hns3_dbg_help(handle); diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile b/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile index 580e81743681..fffe8c1c45d3 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/Makefile @@ -6,6 +6,6 @@ ccflags-y := -Idrivers/net/ethernet/hisilicon/hns3 obj-$(CONFIG_HNS3_HCLGE) += hclge.o -hclge-objs = hclge_main.o hclge_cmd.o hclge_mdio.o hclge_tm.o hclge_mbx.o hclge_err.o +hclge-objs = hclge_main.o hclge_cmd.o hclge_mdio.o hclge_tm.o hclge_mbx.o hclge_err.o hclge_debugfs.o hclge-$(CONFIG_HNS3_DCB) += hclge_dcb.o diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c new file mode 100644 index 000000000000..feaf33216d7f --- /dev/null +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -0,0 +1,77 @@ +// SPDX-License-Identifier: GPL-2.0+ +// Copyright (c) 2018-2019 Hisilicon Limited. + +#include + +#include "hclge_cmd.h" +#include "hclge_main.h" +#include "hnae3.h" + +static void hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage, + bool sel_x, u32 loc) +{ + struct hclge_fd_tcam_config_1_cmd *req1; + struct hclge_fd_tcam_config_2_cmd *req2; + struct hclge_fd_tcam_config_3_cmd *req3; + struct hclge_desc desc[3]; + int ret, i; + u32 *req; + + hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_FD_TCAM_OP, true); + desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); + hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_FD_TCAM_OP, true); + desc[1].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT); + hclge_cmd_setup_basic_desc(&desc[2], HCLGE_OPC_FD_TCAM_OP, true); + + req1 = (struct hclge_fd_tcam_config_1_cmd *)desc[0].data; + req2 = (struct hclge_fd_tcam_config_2_cmd *)desc[1].data; + req3 = (struct hclge_fd_tcam_config_3_cmd *)desc[2].data; + + req1->stage = stage; + req1->xy_sel = sel_x ? 1 : 0; + req1->index = cpu_to_le32(loc); + + ret = hclge_cmd_send(&hdev->hw, desc, 3); + if (ret) + return; + + dev_info(&hdev->pdev->dev, " read result tcam key %s(%u):\n", + sel_x ? "x" : "y", loc); + + req = (u32 *)req1->tcam_data; + for (i = 0; i < 2; i++) + dev_info(&hdev->pdev->dev, "%08x\n", *req++); + + req = (u32 *)req2->tcam_data; + for (i = 0; i < 6; i++) + dev_info(&hdev->pdev->dev, "%08x\n", *req++); + + req = (u32 *)req3->tcam_data; + for (i = 0; i < 5; i++) + dev_info(&hdev->pdev->dev, "%08x\n", *req++); +} + +static void hclge_dbg_fd_tcam(struct hclge_dev *hdev) +{ + u32 i; + + for (i = 0; i < hdev->fd_cfg.rule_num[0]; i++) { + hclge_dbg_fd_tcam_read(hdev, 0, true, i); + hclge_dbg_fd_tcam_read(hdev, 0, false, i); + } +} + +int hclge_dbg_run_cmd(struct hnae3_handle *handle, char *cmd_buf) +{ + struct hclge_vport *vport = hclge_get_vport(handle); + struct hclge_dev *hdev = vport->back; + + if (strncmp(cmd_buf, "dump fd tcam", 12) == 0) { + hclge_dbg_fd_tcam(hdev); + } else { + dev_info(&hdev->pdev->dev, "unknown command\n"); + return -EINVAL; + } + + return 0; +} diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c index f78b8e188443..696cb53013bc 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.c @@ -7826,6 +7826,7 @@ static const struct hnae3_ae_ops hclge_ops = { .get_fd_all_rules = hclge_get_all_rules, .restore_fd_rules = hclge_restore_fd_entries, .enable_fd = hclge_enable_fd, + .dbg_run_cmd = hclge_dbg_run_cmd, .process_hw_error = hclge_process_ras_hw_error, .get_hw_reset_stat = hclge_get_hw_reset_stat, .ae_dev_resetting = hclge_ae_dev_resetting, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h index 5f24dd41d7eb..4122ad1aab1f 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h @@ -814,4 +814,5 @@ int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id); int hclge_vport_start(struct hclge_vport *vport); void hclge_vport_stop(struct hclge_vport *vport); int hclge_set_vport_mtu(struct hclge_vport *vport, int new_mtu); +int hclge_dbg_run_cmd(struct hnae3_handle *handle, char *cmd_buf); #endif diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h.rej b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h.rej new file mode 100644 index 000000000000..be7d0dea06e7 --- /dev/null +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_main.h.rej @@ -0,0 +1,12 @@ +*************** int hclge_set_vlan_filter(struct hnae3_handle *handle, __be16 proto, +*** 800,803 **** + void hclge_reset_vf_queue(struct hclge_vport *vport, u16 queue_id); + int hclge_cfg_flowctrl(struct hclge_dev *hdev); + int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id); + #endif +--- 800,804 ---- + void hclge_reset_vf_queue(struct hclge_vport *vport, u16 queue_id); + int hclge_cfg_flowctrl(struct hclge_dev *hdev); + int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id); ++ int hclge_dbg_run_cmd(struct hnae3_handle *handle, char *cmd_buf); + #endif From patchwork Mon Nov 19 21:18:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 151523 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3185493ljp; Mon, 19 Nov 2018 13:21:11 -0800 (PST) X-Google-Smtp-Source: AJdET5dSljfgBMq4oo+an5Ez+N5Zx8ev/HFph/3Ct0WBRL9lULQ2efrGTK8arrtziSbRFezvWiGR X-Received: by 2002:a62:e30d:: with SMTP id g13mr12964462pfh.151.1542662471391; Mon, 19 Nov 2018 13:21:11 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542662471; cv=none; d=google.com; s=arc-20160816; b=0Pli6ulNqF0WB+B2yRR4h5UdShz246+1fLq7R1SSez0eevAEYPRmb3rsq09FWDN3lv xKl5ZRTsIBTOXFxdHd49mohngKIpubCJS5u0+t5RiqNMDowQ4Z+SXO7oFfz7wR5Khd0n YZtFxPsqVq1kU2dp2ZxgJMCdXVOQ+W/qyGyeGUZ+oxfRY0tzrvjUIBicXA/cUmQntbH7 AykayNJoRzBvWFdYLhbuvdpG4w6xYxLdXhoUPl9LYFrKdOhRWrXioh0fBrRAc1eOT/LQ SXtH+KkqM9fdzgFrfSElvK4wOrco9fRzBCqplJ3DOsrA/AWZEH9wUNVdxBbr7Uc3+wg2 vLsw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=xdRGLIC/Ue8EUwbdftDa9KNS5sX4CzEHBhU7J13F30M=; b=gpDvyZJcp62SV9BCCY20H5VyS9TnPYlgQuQDkcHkFFmoDOSPP2n52vAPjPXcuPCULS NK0C1ch+yfsxEiN256mRsOgKlf2pC9srMh26HKzBr9wfiLMnulnOD/5uvk3I6D4pnoEY Kq8GTymeGK7ty1Z+01ruJWqxJDckESHUuzTYrFtbZaKn2S8slELcka0FYMGQjAfkZI3a +HWCfLSatvbmyibCx+/xtTIcHmgZV6zD65TLi4azEuV5c8A9BVSSuZNrMeHlohuEInFI AKoIEgjUdso8K5Sblx+9/BbQFCZnonvlicEOWbHtS7IvEqMu8mYOn4Jws9Ph2duS1ONz I1wA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id bg7si8806707plb.149.2018.11.19.13.21.10; Mon, 19 Nov 2018 13:21:11 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731088AbeKTHqj (ORCPT + 32 others); Tue, 20 Nov 2018 02:46:39 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:51312 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730141AbeKTHqi (ORCPT ); Tue, 20 Nov 2018 02:46:38 -0500 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.59]) by Forcepoint Email with ESMTP id 1F02BBC34D775; Tue, 20 Nov 2018 05:21:05 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.47.88.214) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.408.0; Tue, 20 Nov 2018 05:20:56 +0800 From: Salil Mehta To: CC: , , , , , , , liuzhongzhu Subject: [PATCH net-next 4/8] net: hns3: Add "tc config" info query function Date: Mon, 19 Nov 2018 21:18:41 +0000 Message-ID: <20181119211845.23168-5-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20181119211845.23168-1-salil.mehta@huawei.com> References: <20181119211845.23168-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.88.214] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: liuzhongzhu This patch prints tc config information. debugfs command: echo dump tc > cmd Sample Output: root@(none)# echo dump tc > cmd hns3 0000:7d:00.0: weight_offset: 14 hns3 0000:7d:00.0: tc(0): no sp mode hns3 0000:7d:00.0: tc(1): no sp mode hns3 0000:7d:00.0: tc(2): no sp mode hns3 0000:7d:00.0: tc(3): no sp mode hns3 0000:7d:00.0: tc(4): no sp mode hns3 0000:7d:00.0: tc(5): no sp mode hns3 0000:7d:00.0: tc(6): no sp mode hns3 0000:7d:00.0: tc(7): no sp mode root@(none)# Signed-off-by: liuzhongzhu Signed-off-by: Salil Mehta --- .../ethernet/hisilicon/hns3/hns3_debugfs.c | 1 + .../hisilicon/hns3/hns3pf/hclge_cmd.h | 1 + .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 40 +++++++++++++++++++ .../ethernet/hisilicon/hns3/hns3pf/hclge_tm.h | 6 +++ 4 files changed, 48 insertions(+) -- 2.17.1 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index 366fb7f4dce9..b19f7ad5e45a 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -130,6 +130,7 @@ static void hns3_dbg_help(struct hnae3_handle *h) dev_info(&h->pdev->dev, "available commands\n"); dev_info(&h->pdev->dev, "queue info [number]\n"); dev_info(&h->pdev->dev, "dump fd tcam\n"); + dev_info(&h->pdev->dev, "dump tc\n"); } static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h index aef044d08b11..2b90410eeac2 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_cmd.h @@ -126,6 +126,7 @@ enum hclge_opcode_type { HCLGE_OPC_TM_PRI_SCH_MODE_CFG = 0x0813, HCLGE_OPC_TM_QS_SCH_MODE_CFG = 0x0814, HCLGE_OPC_TM_BP_TO_QSET_MAPPING = 0x0815, + HCLGE_OPC_ETS_TC_WEIGHT = 0x0843, /* Packet buffer allocate commands */ HCLGE_OPC_TX_BUFF_ALLOC = 0x0901, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index feaf33216d7f..484a10b5dcc2 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -5,8 +5,46 @@ #include "hclge_cmd.h" #include "hclge_main.h" +#include "hclge_tm.h" #include "hnae3.h" +static void hclge_title_idx_print(struct hclge_dev *hdev, bool flag, int index, + char *title_buf, char *true_buf, + char *false_buf) +{ + if (flag) + dev_info(&hdev->pdev->dev, "%s(%d): %s\n", title_buf, index, + true_buf); + else + dev_info(&hdev->pdev->dev, "%s(%d): %s\n", title_buf, index, + false_buf); +} + +static void hclge_dbg_dump_tc(struct hclge_dev *hdev) +{ + struct hclge_ets_tc_weight_cmd *ets_weight; + struct hclge_desc desc; + int i, ret; + + hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_ETS_TC_WEIGHT, true); + + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) { + dev_err(&hdev->pdev->dev, "dump tc fail, status is %d.\n", ret); + return; + } + + ets_weight = (struct hclge_ets_tc_weight_cmd *)desc.data; + + dev_info(&hdev->pdev->dev, "dump tc\n"); + dev_info(&hdev->pdev->dev, "weight_offset: %u\n", + ets_weight->weight_offset); + + for (i = 0; i < HNAE3_MAX_TC; i++) + hclge_title_idx_print(hdev, ets_weight->tc_weight[i], i, + "tc", "no sp mode", "sp mode"); +} + static void hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage, bool sel_x, u32 loc) { @@ -68,6 +106,8 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, char *cmd_buf) if (strncmp(cmd_buf, "dump fd tcam", 12) == 0) { hclge_dbg_fd_tcam(hdev); + } else if (strncmp(cmd_buf, "dump tc", 7) == 0) { + hclge_dbg_dump_tc(hdev); } else { dev_info(&hdev->pdev->dev, "unknown command\n"); return -EINVAL; diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h index 25eef13a3e14..03474d5ed376 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.h @@ -55,6 +55,12 @@ struct hclge_qs_weight_cmd { u8 dwrr; }; +struct hclge_ets_tc_weight_cmd { + u8 tc_weight[HNAE3_MAX_TC]; + u8 weight_offset; + u8 rsvd[15]; +}; + #define HCLGE_TM_SHAP_IR_B_MSK GENMASK(7, 0) #define HCLGE_TM_SHAP_IR_B_LSH 0 #define HCLGE_TM_SHAP_IR_U_MSK GENMASK(11, 8) From patchwork Mon Nov 19 21:18:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Salil Mehta X-Patchwork-Id: 151524 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3185633ljp; Mon, 19 Nov 2018 13:21:20 -0800 (PST) X-Google-Smtp-Source: AJdET5fdgw0BY+/igZQEA9fygbNfwtPNqftOpeZvThn5Gl4t6Peurwr31f1wxVrNDmnbT6Vr6Bpa X-Received: by 2002:a17:902:6848:: with SMTP id f8mr23501407pln.300.1542662480727; Mon, 19 Nov 2018 13:21:20 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1542662480; cv=none; d=google.com; s=arc-20160816; b=Y9weH0Z6XSbXDYLDSDaV0baYfF06sAThBExTd4E+C3SmKvPzYziwegf1Mi/mHYE1rO KzAdg77lbidazaoJUFgHaq7noo6sd7fxyM81gKvX8vCrkD3OaZJbPziWxDVD1dU4izK2 PG17BeOTlnbXGZkTPVqkUTGxSthqaop7T9hRPPE68Lu2K1+2RW5/x7fgA2iblXer2WyI /QIW1vep0T+/3VVy1ULNsQtrHmkTzhtGtAQB4up9yvaIpDBQrYgNDW7dQntsvfgPqKDK Sp4i0Scv58GZGlskOusJcHaQQJ/8IensO0wf74qR1LU7BUygWZGct0TMKr0tiP+6OGwD wt/g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from; bh=H7oThrBxhxzDlgjhTcNV65KKct5NBN1nzGKmtMUZOcQ=; b=JtoeaW4G180AhSLDjW1tFFmcMsq+pf7rZUTOg5QzqTJs6WZVLutivxjLtIF24QNoYO mQNRX9wj8vGpnIstpcgke548eEyFrix4e2ywpfdlvgPSjjpydxhXarXmUT2JXtktYjP+ hgZ+Qo6lQFAN1j59M7WzHban3iG0G6L4BuAy8hEY6EzK/nyxl0f+i1sL29NSxZM3d8Kx dnWEJz3YB7//Io0toz7F8Y90c1rNLmY8xI5lE6D8FvfgALByxrOsYXqE40SHHdXRptD9 oTHNkbcetItFfIi/nElg0pr0y72ciQ+QcPzu1id+6FQl6M3uJbjkhOLwdu5S6MmVPaZd 6sHA== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s11si40394906pgi.324.2018.11.19.13.21.20; Mon, 19 Nov 2018 13:21:20 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1731110AbeKTHqs (ORCPT + 32 others); Tue, 20 Nov 2018 02:46:48 -0500 Received: from szxga06-in.huawei.com ([45.249.212.32]:51361 "EHLO huawei.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1730141AbeKTHqs (ORCPT ); Tue, 20 Nov 2018 02:46:48 -0500 Received: from DGGEMS410-HUB.china.huawei.com (unknown [172.30.72.60]) by Forcepoint Email with ESMTP id 3E8FC426F7EA3; Tue, 20 Nov 2018 05:21:15 +0800 (CST) Received: from S00293818-DELL1.china.huawei.com (10.47.88.214) by DGGEMS410-HUB.china.huawei.com (10.3.19.210) with Microsoft SMTP Server id 14.3.408.0; Tue, 20 Nov 2018 05:21:04 +0800 From: Salil Mehta To: CC: , , , , , , , liuzhongzhu Subject: [PATCH net-next 5/8] net: hns3: Add "tm config" info query function Date: Mon, 19 Nov 2018 21:18:42 +0000 Message-ID: <20181119211845.23168-6-salil.mehta@huawei.com> X-Mailer: git-send-email 2.8.3 In-Reply-To: <20181119211845.23168-1-salil.mehta@huawei.com> References: <20181119211845.23168-1-salil.mehta@huawei.com> MIME-Version: 1.0 X-Originating-IP: [10.47.88.214] X-CFilter-Loop: Reflected Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org From: liuzhongzhu This patch prints Transmit Module's Traffic sched related config information. debugfs command: echo dump tm > cmd Sample output: root@(none)# echo dump tm > cmd hns3 0000:7d:00.0: dump tm hns3 0000:7d:00.0: PG_TO_PRI gp_id: 0 hns3 0000:7d:00.0: PG_TO_PRI map: 0x1 hns3 0000:7d:00.0: QS_TO_PRI qs_id: 0 hns3 0000:7d:00.0: QS_TO_PRI priority: 0 hns3 0000:7d:00.0: QS_TO_PRI link_vld: 1 hns3 0000:7d:00.0: NQ_TO_QS nq_id: 0 hns3 0000:7d:00.0: NQ_TO_QS qset_id: 1024 hns3 0000:7d:00.0: PG pg_id: 0 hns3 0000:7d:00.0: PG dwrr: 100 hns3 0000:7d:00.0: QS qs_id: 0 hns3 0000:7d:00.0: QS dwrr: 100 hns3 0000:7d:00.0: PRI pri_id: 0 hns3 0000:7d:00.0: PRI dwrr: 100 hns3 0000:7d:00.0: PRI_C pri_id: 0 hns3 0000:7d:00.0: PRI_C pri_shapping: 0x2850000 hns3 0000:7d:00.0: PRI_P pri_id: 0 hns3 0000:7d:00.0: PRI_P pri_shapping: 0x2850796 hns3 0000:7d:00.0: PG_C pg_id: 0 hns3 0000:7d:00.0: PG_C pg_shapping: 0x2850000 hns3 0000:7d:00.0: PG_P pg_id: 0 hns3 0000:7d:00.0: PG_P pg_shapping: 0x2850496 hns3 0000:7d:00.0: PORT port_shapping: 0x2850296 hns3 0000:7d:00.0: PG_SCH pg_id: 0 hns3 0000:7d:00.0: PRI_SCH pg_id: 0 hns3 0000:7d:00.0: QS_SCH pg_id: 0 hns3 0000:7d:00.0: BP_TO_QSET pg_id: 0 hns3 0000:7d:00.0: BP_TO_QSET pg_shapping: 0x0 hns3 0000:7d:00.0: BP_TO_QSET qs_bit_map: 0x0 root@(none)# Signed-off-by: liuzhongzhu Signed-off-by: Salil Mehta --- .../ethernet/hisilicon/hns3/hns3_debugfs.c | 1 + .../hisilicon/hns3/hns3pf/hclge_debugfs.c | 199 ++++++++++++++++++ 2 files changed, 200 insertions(+) -- 2.17.1 diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c index b19f7ad5e45a..5e938879ca66 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3_debugfs.c @@ -131,6 +131,7 @@ static void hns3_dbg_help(struct hnae3_handle *h) dev_info(&h->pdev->dev, "queue info [number]\n"); dev_info(&h->pdev->dev, "dump fd tcam\n"); dev_info(&h->pdev->dev, "dump tc\n"); + dev_info(&h->pdev->dev, "dump tm\n"); } static ssize_t hns3_dbg_cmd_read(struct file *filp, char __user *buffer, diff --git a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c index 484a10b5dcc2..e6f70260fd9d 100644 --- a/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c +++ b/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c @@ -45,6 +45,203 @@ static void hclge_dbg_dump_tc(struct hclge_dev *hdev) "tc", "no sp mode", "sp mode"); } +static void hclge_dbg_dump_tm_pg(struct hclge_dev *hdev) +{ + struct hclge_port_shapping_cmd *port_shap_cfg_cmd; + struct hclge_bp_to_qs_map_cmd *bp_to_qs_map_cmd; + struct hclge_pg_shapping_cmd *pg_shap_cfg_cmd; + enum hclge_opcode_type cmd; + struct hclge_desc desc; + int ret; + + pg_shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "PG_C pg_id: %u\n", pg_shap_cfg_cmd->pg_id); + dev_info(&hdev->pdev->dev, "PG_C pg_shapping: 0x%x\n", + pg_shap_cfg_cmd->pg_shapping_para); + + cmd = HCLGE_OPC_TM_PG_P_SHAPPING; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_pg_cmd_send; + + pg_shap_cfg_cmd = (struct hclge_pg_shapping_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "PG_P pg_id: %u\n", pg_shap_cfg_cmd->pg_id); + dev_info(&hdev->pdev->dev, "PG_P pg_shapping: 0x%x\n", + pg_shap_cfg_cmd->pg_shapping_para); + + cmd = HCLGE_OPC_TM_PORT_SHAPPING; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_pg_cmd_send; + + port_shap_cfg_cmd = (struct hclge_port_shapping_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "PORT port_shapping: 0x%x\n", + port_shap_cfg_cmd->port_shapping_para); + + cmd = HCLGE_OPC_TM_PG_SCH_MODE_CFG; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_pg_cmd_send; + + dev_info(&hdev->pdev->dev, "PG_SCH pg_id: %u\n", desc.data[0]); + + cmd = HCLGE_OPC_TM_PRI_SCH_MODE_CFG; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_pg_cmd_send; + + dev_info(&hdev->pdev->dev, "PRI_SCH pg_id: %u\n", desc.data[0]); + + cmd = HCLGE_OPC_TM_QS_SCH_MODE_CFG; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_pg_cmd_send; + + dev_info(&hdev->pdev->dev, "QS_SCH pg_id: %u\n", desc.data[0]); + + cmd = HCLGE_OPC_TM_BP_TO_QSET_MAPPING; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_pg_cmd_send; + + bp_to_qs_map_cmd = (struct hclge_bp_to_qs_map_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "BP_TO_QSET pg_id: %u\n", + bp_to_qs_map_cmd->tc_id); + dev_info(&hdev->pdev->dev, "BP_TO_QSET pg_shapping: 0x%x\n", + bp_to_qs_map_cmd->qs_group_id); + dev_info(&hdev->pdev->dev, "BP_TO_QSET qs_bit_map: 0x%x\n", + bp_to_qs_map_cmd->qs_bit_map); + return; + +err_tm_pg_cmd_send: + dev_err(&hdev->pdev->dev, "dump tm_pg fail(0x%x), status is %d\n", + cmd, ret); +} + +static void hclge_dbg_dump_tm(struct hclge_dev *hdev) +{ + struct hclge_priority_weight_cmd *priority_weight; + struct hclge_pg_to_pri_link_cmd *pg_to_pri_map; + struct hclge_qs_to_pri_link_cmd *qs_to_pri_map; + struct hclge_nq_to_qs_link_cmd *nq_to_qs_map; + struct hclge_pri_shapping_cmd *shap_cfg_cmd; + struct hclge_pg_weight_cmd *pg_weight; + struct hclge_qs_weight_cmd *qs_weight; + enum hclge_opcode_type cmd; + struct hclge_desc desc; + int ret; + + cmd = HCLGE_OPC_TM_PG_TO_PRI_LINK; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + pg_to_pri_map = (struct hclge_pg_to_pri_link_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "dump tm\n"); + dev_info(&hdev->pdev->dev, "PG_TO_PRI gp_id: %u\n", + pg_to_pri_map->pg_id); + dev_info(&hdev->pdev->dev, "PG_TO_PRI map: 0x%x\n", + pg_to_pri_map->pri_bit_map); + + cmd = HCLGE_OPC_TM_QS_TO_PRI_LINK; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + qs_to_pri_map = (struct hclge_qs_to_pri_link_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "QS_TO_PRI qs_id: %u\n", + qs_to_pri_map->qs_id); + dev_info(&hdev->pdev->dev, "QS_TO_PRI priority: %u\n", + qs_to_pri_map->priority); + dev_info(&hdev->pdev->dev, "QS_TO_PRI link_vld: %u\n", + qs_to_pri_map->link_vld); + + cmd = HCLGE_OPC_TM_NQ_TO_QS_LINK; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + nq_to_qs_map = (struct hclge_nq_to_qs_link_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "NQ_TO_QS nq_id: %u\n", nq_to_qs_map->nq_id); + dev_info(&hdev->pdev->dev, "NQ_TO_QS qset_id: %u\n", + nq_to_qs_map->qset_id); + + cmd = HCLGE_OPC_TM_PG_WEIGHT; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + pg_weight = (struct hclge_pg_weight_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "PG pg_id: %u\n", pg_weight->pg_id); + dev_info(&hdev->pdev->dev, "PG dwrr: %u\n", pg_weight->dwrr); + + cmd = HCLGE_OPC_TM_QS_WEIGHT; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + qs_weight = (struct hclge_qs_weight_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "QS qs_id: %u\n", qs_weight->qs_id); + dev_info(&hdev->pdev->dev, "QS dwrr: %u\n", qs_weight->dwrr); + + cmd = HCLGE_OPC_TM_PRI_WEIGHT; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + priority_weight = (struct hclge_priority_weight_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "PRI pri_id: %u\n", priority_weight->pri_id); + dev_info(&hdev->pdev->dev, "PRI dwrr: %u\n", priority_weight->dwrr); + + cmd = HCLGE_OPC_TM_PRI_C_SHAPPING; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "PRI_C pri_id: %u\n", shap_cfg_cmd->pri_id); + dev_info(&hdev->pdev->dev, "PRI_C pri_shapping: 0x%x\n", + shap_cfg_cmd->pri_shapping_para); + + cmd = HCLGE_OPC_TM_PRI_P_SHAPPING; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + shap_cfg_cmd = (struct hclge_pri_shapping_cmd *)desc.data; + dev_info(&hdev->pdev->dev, "PRI_P pri_id: %u\n", shap_cfg_cmd->pri_id); + dev_info(&hdev->pdev->dev, "PRI_P pri_shapping: 0x%x\n", + shap_cfg_cmd->pri_shapping_para); + + cmd = HCLGE_OPC_TM_PG_C_SHAPPING; + hclge_cmd_setup_basic_desc(&desc, cmd, true); + ret = hclge_cmd_send(&hdev->hw, &desc, 1); + if (ret) + goto err_tm_cmd_send; + + hclge_dbg_dump_tm_pg(hdev); + + return; + +err_tm_cmd_send: + dev_err(&hdev->pdev->dev, "dump tm fail(0x%x), status is %d\n", + cmd, ret); +} + static void hclge_dbg_fd_tcam_read(struct hclge_dev *hdev, u8 stage, bool sel_x, u32 loc) { @@ -108,6 +305,8 @@ int hclge_dbg_run_cmd(struct hnae3_handle *handle, char *cmd_buf) hclge_dbg_fd_tcam(hdev); } else if (strncmp(cmd_buf, "dump tc", 7) == 0) { hclge_dbg_dump_tc(hdev); + } else if (strncmp(cmd_buf, "dump tm", 7) == 0) { + hclge_dbg_dump_tm(hdev); } else { dev_info(&hdev->pdev->dev, "unknown command\n"); return -EINVAL;