From patchwork Fri Jan 21 21:06:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 533874 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 99BBAC4332F for ; Fri, 21 Jan 2022 21:06:27 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232050AbiAUVG0 (ORCPT ); Fri, 21 Jan 2022 16:06:26 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50058 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229989AbiAUVGX (ORCPT ); Fri, 21 Jan 2022 16:06:23 -0500 Received: from mail-lf1-x131.google.com (mail-lf1-x131.google.com [IPv6:2a00:1450:4864:20::131]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 6E059C06173B for ; Fri, 21 Jan 2022 13:06:22 -0800 (PST) Received: by mail-lf1-x131.google.com with SMTP id u6so4626534lfm.10 for ; Fri, 21 Jan 2022 13:06:22 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=zxJMNd08fBIp+phPJjWAVZVWzjoHZnrrt+sPMY4L3X0=; b=U0SJ6kNwlAVK9R+AcmLc81cHW/T42DMoHeozc8q6GPXb0tpw3UTaqJzZPAinfU4LOn 5iLOc5E4IeQhREBs5haYK/qGXvQFLyOpUh4vQ9KgXQjEkW9f0i7mNa/blIxfK7tSsKR7 Xf9IHn9QYDn7RXE04gBqyRa3UC+vEVQ3EhfE+QPOB43rqCv8qJ4bQHX+Tyea7yf/FVT5 6FByPF5KiXvtDkYX0Bo82KAkyH8DZ+kMciiJwTP60Y02VOQHZgSD/2pkXkPFSCyf6g9x bIESuf3zFmrAT2NyxLYpovwvF7amHE8JL8ezlBVQ/77Q+MlC1hsfADO/UfgegDXsjQNY j+nw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=zxJMNd08fBIp+phPJjWAVZVWzjoHZnrrt+sPMY4L3X0=; b=blBOm+XlrCMl9vQXnKfUXgEDAnX0pkBd2T4oDAUwC2kMncUQPSbMI9oJOhqHmjnv5f NMub7xEhE5EuPaUYvnbll1CqIodmq5/Yj6styWiwkwqTrIN6Wp+GHl1dxvFKQqygE56H U5UychhUkgizcVBW8Bm3zqLtlykkTO0HMq9sYy5fO1r2bm/g5dHT7aBYOwHqsT+3V8QL h6m76D8NpzHCWBIXupEeBUmCI3/czPsIQE1xdeJKqDAQm241XH6mTVeiSwKqEnGBg8d2 rP+VeTTlOmJ5IWbtjGnnqg4lwjqw/0vEOUEGaZNANmAi9T1TQgrU7WMNJr3XKckBoL9C aFOQ== X-Gm-Message-State: AOAM533hDMaXl2qrPVy2rhzA/9sWHFwBIB0CsecGQfMDqjEhefHYoTu0 D9K7XngrdTyJWjkmna4nDeu/Xw== X-Google-Smtp-Source: ABdhPJzaDDU0OKXCYAq0mbfnqeGh81j0gQXOcW5KGFYmTrSX1bXNsjhXvftg7xP82vTRHwSgoAkeUA== X-Received: by 2002:a19:645b:: with SMTP id b27mr4916176lfj.262.1642799180808; Fri, 21 Jan 2022 13:06:20 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v10sm279125ljk.44.2022.01.21.13.06.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 13:06:20 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v5 1/6] drm/msm/dpu: drop unused lm_max_width from RM Date: Sat, 22 Jan 2022 00:06:13 +0300 Message-Id: <20220121210618.3482550-2-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> References: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org No code uses lm_max_width from resource manager, so drop it. Instead of calculating the lm_max_width, code can use max_mixer_width field from the hw catalog. Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12 ------------ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 4 ---- 2 files changed, 16 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index f9c83d6e427a..b5b1ea1e4de6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -114,18 +114,6 @@ int dpu_rm_init(struct dpu_rm *rm, goto fail; } rm->mixer_blks[lm->id - LM_0] = &hw->base; - - if (!rm->lm_max_width) { - rm->lm_max_width = lm->sblk->maxwidth; - } else if (rm->lm_max_width != lm->sblk->maxwidth) { - /* - * Don't expect to have hw where lm max widths differ. - * If found, take the min. - */ - DPU_ERROR("unsupported: lm maxwidth differs\n"); - if (rm->lm_max_width > lm->sblk->maxwidth) - rm->lm_max_width = lm->sblk->maxwidth; - } } for (i = 0; i < cat->merge_3d_count; i++) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 1f12c8d5b8aa..0f27759211b5 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -20,8 +20,6 @@ struct dpu_global_state; * @ctl_blks: array of ctl hardware resources * @intf_blks: array of intf hardware resources * @dspp_blks: array of dspp hardware resources - * @lm_max_width: cached layer mixer maximum width - * @rm_lock: resource manager mutex */ struct dpu_rm { struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0]; @@ -30,8 +28,6 @@ struct dpu_rm { struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0]; struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0]; struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0]; - - uint32_t lm_max_width; }; /** From patchwork Fri Jan 21 21:06:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 534293 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 76E00C433F5 for ; Fri, 21 Jan 2022 21:06:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232585AbiAUVG1 (ORCPT ); Fri, 21 Jan 2022 16:06:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50066 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S231514AbiAUVGY (ORCPT ); Fri, 21 Jan 2022 16:06:24 -0500 Received: from mail-lf1-x12b.google.com (mail-lf1-x12b.google.com [IPv6:2a00:1450:4864:20::12b]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 86F6EC06173D for ; Fri, 21 Jan 2022 13:06:23 -0800 (PST) Received: by mail-lf1-x12b.google.com with SMTP id bu18so36357039lfb.5 for ; Fri, 21 Jan 2022 13:06:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=gbDYfYkXzgmiEZGNTQVBb6LTE3GRv8HVsbajZEr2dIk=; b=vdcnX1xS5hTwnCvfbiEqPJiR77PcyU1Y9bya0cA8O52sBjiDPfjXG+qIm2DBrhszyt Zy2tK1s9rXxBYKa+s7kskeK4/yC09B4HogYMlmQp0rJ/Pt26yNC4Vx8geszM0uYcKaIt vKUyGs2Sm36c+5IqxsVoWWQVfzN7uV9G4pV0Bh+IFsoFHcOivw3Iq3Kfexg2+sQZDqj1 XY1bTpwYtonMuD8h3Tnvdm9tj+UsWWdDo41L0MvuNpIVT/D049wsInMqTT8g5qwQHpVj JPoBLb31wSJX/tkXxASNof9ctZaLd7KZ6oRoX/bI/TVDMEK1OzAS5DZ35dYtrWmFaUFA hGkA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=gbDYfYkXzgmiEZGNTQVBb6LTE3GRv8HVsbajZEr2dIk=; b=oD+vjHAkSy3AecWAWLS3+PtXdq5COQDUXDWLsJeqAjjM6YAj5z60DQscijzm8wDYUB Di9vVQe7DOJxV6OetxST5BxUJp2iymdP1jhfmNGlHySkE55Z7E0FD7Bdvviz8i0E2G79 4ObMX+KVPTDSM1wRXzEWCxbaKZkvlHaHXrRLcpghyamWcJ93nrvqVdInMyjemexOgQrZ aZlH86uTuHlbZHAi53E804yncJknzEbNHCgnjmje1Dpm0HYNVywSssojSTBWWGNoDLmC EwQeCGCgzD2fB/BxMRpVrTM9nkatYiR0PvCvW5UiFGz6twmoa8RmJaixaCGGh0nCYnTm Id5A== X-Gm-Message-State: AOAM531mLMdJpZy/yBAHEPW/iYM5aV7DStYMsGksZrceE4Cus9cJvvca QRpLNkoApkxU0kqQP25oAVRTFQ== X-Google-Smtp-Source: ABdhPJxWdxw5YmwlxYgYXx5IYmFhk/j/OaZLrLiihXTr1uY50tCWFiUyjjGiGQOVCo1AGiJMRKIG0g== X-Received: by 2002:ac2:424a:: with SMTP id m10mr146163lfl.361.1642799181923; Fri, 21 Jan 2022 13:06:21 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v10sm279125ljk.44.2022.01.21.13.06.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 13:06:21 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v5 2/6] drm/msm/dpu: add DSPP blocks teardown Date: Sat, 22 Jan 2022 00:06:14 +0300 Message-Id: <20220121210618.3482550-3-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> References: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add missing calls to dpu_hw_dspp_destroy() to free resources allocated for DSPP hardware blocks. Fixes: e47616df008b ("drm/msm/dpu: add support for color processing blocks in dpu driver") Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index b5b1ea1e4de6..63ed0d7df848 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -35,6 +35,14 @@ int dpu_rm_destroy(struct dpu_rm *rm) { int i; + for (i = 0; i < ARRAY_SIZE(rm->dspp_blks); i++) { + struct dpu_hw_dspp *hw; + + if (rm->dspp_blks[i]) { + hw = to_dpu_hw_dspp(rm->dspp_blks[i]); + dpu_hw_dspp_destroy(hw); + } + } for (i = 0; i < ARRAY_SIZE(rm->pingpong_blks); i++) { struct dpu_hw_pingpong *hw; From patchwork Fri Jan 21 21:06:15 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 533873 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id F06E8C43217 for ; Fri, 21 Jan 2022 21:06:28 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S231514AbiAUVG1 (ORCPT ); Fri, 21 Jan 2022 16:06:27 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50068 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229817AbiAUVGZ (ORCPT ); Fri, 21 Jan 2022 16:06:25 -0500 Received: from mail-lf1-x136.google.com (mail-lf1-x136.google.com [IPv6:2a00:1450:4864:20::136]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7C3EFC061401 for ; Fri, 21 Jan 2022 13:06:24 -0800 (PST) Received: by mail-lf1-x136.google.com with SMTP id u6so4626710lfm.10 for ; Fri, 21 Jan 2022 13:06:24 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=L5k2PHqUOM6R9/uvgIgfTZt6WVZko8zU1tx1plMBCD4=; b=WA1wyYYt5s3YwaDCKkAig54oZtJIUf6BU6XjPUVfJNf/BodzstjFKCTyDyzC60lmIU 4cPVcrzc5adwKVsDnY5LgMOVFLqSHX2y0A5usvUWJ8RAuG3dLtMZcsGxR7rURYvcBJzg 2ma1mjlLye20OAOen+x4KURAbfRzRSDYEznxiYmzpdQkISV5kfHn8i8JvgFB1SRrY8iZ Vz6lPeofaPijzsBf+nNbTKWlL6eei6Lf+I91aOSnXoCTEqMIMS/0SEHrO+RsXRbr7JJq rB657FiyKCpUqmjRzRzzJ8Bwemtu6E+b2HgwYfkdPaVT/2pnV5coaDxYRqvlxYjEt6cD sGmg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=L5k2PHqUOM6R9/uvgIgfTZt6WVZko8zU1tx1plMBCD4=; b=NNdyarJ23WPDb5uHJNFIgyqYlWbYoAeOF24uvj4CGY9D3pGQ0WjyoeV0a1KVwPciMT +WmjByQiUcDmCAAezcsaMsxe91kuMTNm1xVfa4YKUSrjU6pPLYv/Uw7VXXFe6uF+0iWs HvtT6sabqSnIAX69OczqWMzvxs3k6Dbpu/vSs36EH3NOdKzBjfo8L0ypJfbTyQXsUsWS 8Pf4Bdb3pQ/7Aq4XkA+PO6ISjS1ePF07wg5ren6Oz4qwKR8d39mi3pCyFpGpeJdG3+pV Lxj5/xoURf5uhJ6Sk3M0XsCDq/XykG7uKA/uk6gdfD9jhIXwf1CqpmKKJTQZI/67PZEo HYzg== X-Gm-Message-State: AOAM5320a38FrYpdRg6j9/6e3h5TehMzzhY4IWK9wbT2FVkmyCgNAwkp uyZ2FgMhmWda4R73MAHwoefx3g== X-Google-Smtp-Source: ABdhPJyZdiGTvF6nZBT5F5/Vl9oLNsMPmIEg24MUknHVWIFo4mtgIuf80mfCM8zfb+EUtkzJIt5qHw== X-Received: by 2002:a05:6512:3d12:: with SMTP id d18mr4944152lfv.213.1642799182721; Fri, 21 Jan 2022 13:06:22 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v10sm279125ljk.44.2022.01.21.13.06.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 13:06:22 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v5 3/6] drm/msm/dpu: get INTF blocks directly rather than through RM Date: Sat, 22 Jan 2022 00:06:15 +0300 Message-Id: <20220121210618.3482550-4-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> References: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org INTF blocks are not really handled by resource manager, they are assigned at dpu_encoder_setup_display using dpu_encoder_get_intf(). Then this allocation is passed to RM and then returned to then dpu_encoder. So allocate them outside of RM and use them directly. Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c | 36 +--------- drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h | 16 ----- .../gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 5 -- .../drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 8 --- .../drm/msm/disp/dpu1/dpu_encoder_phys_vid.c | 8 --- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 68 ++----------------- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 8 +++ 8 files changed, 16 insertions(+), 134 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c index 1e648db439f9..11f7126728db 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.c @@ -420,26 +420,6 @@ int dpu_encoder_get_linecount(struct drm_encoder *drm_enc) return linecount; } -void dpu_encoder_get_hw_resources(struct drm_encoder *drm_enc, - struct dpu_encoder_hw_resources *hw_res) -{ - struct dpu_encoder_virt *dpu_enc = NULL; - int i = 0; - - dpu_enc = to_dpu_encoder_virt(drm_enc); - DPU_DEBUG_ENC(dpu_enc, "\n"); - - /* Query resources used by phys encs, expected to be without overlap */ - memset(hw_res, 0, sizeof(*hw_res)); - - for (i = 0; i < dpu_enc->num_phys_encs; i++) { - struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; - - if (phys->ops.get_hw_resources) - phys->ops.get_hw_resources(phys, hw_res); - } -} - static void dpu_encoder_destroy(struct drm_encoder *drm_enc) { struct dpu_encoder_virt *dpu_enc = NULL; @@ -973,7 +953,7 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, struct dpu_hw_blk *hw_lm[MAX_CHANNELS_PER_ENC]; struct dpu_hw_blk *hw_dspp[MAX_CHANNELS_PER_ENC] = { NULL }; int num_lm, num_ctl, num_pp; - int i, j; + int i; if (!drm_enc) { DPU_ERROR("invalid encoder\n"); @@ -1040,8 +1020,6 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, cstate->num_mixers = num_lm; for (i = 0; i < dpu_enc->num_phys_encs; i++) { - int num_blk; - struct dpu_hw_blk *hw_blk[MAX_CHANNELS_PER_ENC]; struct dpu_encoder_phys *phys = dpu_enc->phys_encs[i]; if (!dpu_enc->hw_pp[i]) { @@ -1059,16 +1037,8 @@ static void dpu_encoder_virt_mode_set(struct drm_encoder *drm_enc, phys->hw_pp = dpu_enc->hw_pp[i]; phys->hw_ctl = to_dpu_hw_ctl(hw_ctl[i]); - num_blk = dpu_rm_get_assigned_resources(&dpu_kms->rm, - global_state, drm_enc->base.id, DPU_HW_BLK_INTF, - hw_blk, ARRAY_SIZE(hw_blk)); - for (j = 0; j < num_blk; j++) { - struct dpu_hw_intf *hw_intf; - - hw_intf = to_dpu_hw_intf(hw_blk[i]); - if (hw_intf->idx == phys->intf_idx) - phys->hw_intf = hw_intf; - } + if (phys->intf_idx >= INTF_0 && phys->intf_idx < INTF_MAX) + phys->hw_intf = dpu_rm_get_intf(&dpu_kms->rm, phys->intf_idx); if (!phys->hw_intf) { DPU_ERROR_ENC(dpu_enc, diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h index e241914a9677..722dd7db6bdf 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder.h @@ -18,22 +18,6 @@ #define IDLE_TIMEOUT (66 - 16/2) -/** - * Encoder functions and data types - * @intfs: Interfaces this encoder is using, INTF_MODE_NONE if unused - */ -struct dpu_encoder_hw_resources { - enum dpu_intf_mode intfs[INTF_MAX]; -}; - -/** - * dpu_encoder_get_hw_resources - Populate table of required hardware resources - * @encoder: encoder pointer - * @hw_res: resource table to populate with encoder required resources - */ -void dpu_encoder_get_hw_resources(struct drm_encoder *encoder, - struct dpu_encoder_hw_resources *hw_res); - /** * dpu_encoder_assign_crtc - Link the encoder to the crtc it's assigned to * @encoder: encoder pointer diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index e7270eb6b84b..42febfce79c7 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h @@ -91,9 +91,6 @@ struct dpu_encoder_virt_ops { * @disable: DRM Call. Disable mode. * @atomic_check: DRM Call. Atomic check new DRM state. * @destroy: DRM Call. Destroy and release resources. - * @get_hw_resources: Populate the structure with the hardware - * resources that this phys_enc is using. - * Expect no overlap between phys_encs. * @control_vblank_irq Register/Deregister for VBLANK IRQ * @wait_for_commit_done: Wait for hardware to have flushed the * current pending frames to hardware @@ -129,8 +126,6 @@ struct dpu_encoder_phys_ops { struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state); void (*destroy)(struct dpu_encoder_phys *encoder); - void (*get_hw_resources)(struct dpu_encoder_phys *encoder, - struct dpu_encoder_hw_resources *hw_res); int (*control_vblank_irq)(struct dpu_encoder_phys *enc, bool enable); int (*wait_for_commit_done)(struct dpu_encoder_phys *phys_enc); int (*wait_for_tx_complete)(struct dpu_encoder_phys *phys_enc); diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index 34a6940d12c5..7d2beea9cc4e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c @@ -534,13 +534,6 @@ static void dpu_encoder_phys_cmd_destroy(struct dpu_encoder_phys *phys_enc) kfree(cmd_enc); } -static void dpu_encoder_phys_cmd_get_hw_resources( - struct dpu_encoder_phys *phys_enc, - struct dpu_encoder_hw_resources *hw_res) -{ - hw_res->intfs[phys_enc->intf_idx - INTF_0] = INTF_MODE_CMD; -} - static void dpu_encoder_phys_cmd_prepare_for_kickoff( struct dpu_encoder_phys *phys_enc) { @@ -736,7 +729,6 @@ static void dpu_encoder_phys_cmd_init_ops( ops->enable = dpu_encoder_phys_cmd_enable; ops->disable = dpu_encoder_phys_cmd_disable; ops->destroy = dpu_encoder_phys_cmd_destroy; - ops->get_hw_resources = dpu_encoder_phys_cmd_get_hw_resources; ops->control_vblank_irq = dpu_encoder_phys_cmd_control_vblank_irq; ops->wait_for_commit_done = dpu_encoder_phys_cmd_wait_for_commit_done; ops->prepare_for_kickoff = dpu_encoder_phys_cmd_prepare_for_kickoff; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c index ddd9d89cd456..db6a9b896e42 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_vid.c @@ -465,13 +465,6 @@ static void dpu_encoder_phys_vid_destroy(struct dpu_encoder_phys *phys_enc) kfree(phys_enc); } -static void dpu_encoder_phys_vid_get_hw_resources( - struct dpu_encoder_phys *phys_enc, - struct dpu_encoder_hw_resources *hw_res) -{ - hw_res->intfs[phys_enc->intf_idx - INTF_0] = INTF_MODE_VIDEO; -} - static int dpu_encoder_phys_vid_wait_for_vblank( struct dpu_encoder_phys *phys_enc) { @@ -680,7 +673,6 @@ static void dpu_encoder_phys_vid_init_ops(struct dpu_encoder_phys_ops *ops) ops->enable = dpu_encoder_phys_vid_enable; ops->disable = dpu_encoder_phys_vid_disable; ops->destroy = dpu_encoder_phys_vid_destroy; - ops->get_hw_resources = dpu_encoder_phys_vid_get_hw_resources; ops->control_vblank_irq = dpu_encoder_phys_vid_control_vblank_irq; ops->wait_for_commit_done = dpu_encoder_phys_vid_wait_for_commit_done; ops->wait_for_vblank = dpu_encoder_phys_vid_wait_for_vblank; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index 2d385b4b7f5e..3f518c809e33 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -144,7 +144,6 @@ struct dpu_global_state { uint32_t pingpong_to_enc_id[PINGPONG_MAX - PINGPONG_0]; uint32_t mixer_to_enc_id[LM_MAX - LM_0]; uint32_t ctl_to_enc_id[CTL_MAX - CTL_0]; - uint32_t intf_to_enc_id[INTF_MAX - INTF_0]; uint32_t dspp_to_enc_id[DSPP_MAX - DSPP_0]; }; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 63ed0d7df848..8df21a46308e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -28,7 +28,6 @@ static inline bool reserved_by_other(uint32_t *res_map, int idx, */ struct dpu_rm_requirements { struct msm_display_topology topology; - struct dpu_encoder_hw_resources hw_res; }; int dpu_rm_destroy(struct dpu_rm *rm) @@ -448,54 +447,6 @@ static int _dpu_rm_reserve_ctls( return 0; } -static int _dpu_rm_reserve_intf( - struct dpu_rm *rm, - struct dpu_global_state *global_state, - uint32_t enc_id, - uint32_t id) -{ - int idx = id - INTF_0; - - if (idx < 0 || idx >= ARRAY_SIZE(rm->intf_blks)) { - DPU_ERROR("invalid intf id: %d", id); - return -EINVAL; - } - - if (!rm->intf_blks[idx]) { - DPU_ERROR("couldn't find intf id %d\n", id); - return -EINVAL; - } - - if (reserved_by_other(global_state->intf_to_enc_id, idx, enc_id)) { - DPU_ERROR("intf id %d already reserved\n", id); - return -ENAVAIL; - } - - global_state->intf_to_enc_id[idx] = enc_id; - return 0; -} - -static int _dpu_rm_reserve_intf_related_hw( - struct dpu_rm *rm, - struct dpu_global_state *global_state, - uint32_t enc_id, - struct dpu_encoder_hw_resources *hw_res) -{ - int i, ret = 0; - u32 id; - - for (i = 0; i < ARRAY_SIZE(hw_res->intfs); i++) { - if (hw_res->intfs[i] == INTF_MODE_NONE) - continue; - id = i + INTF_0; - ret = _dpu_rm_reserve_intf(rm, global_state, enc_id, id); - if (ret) - return ret; - } - - return ret; -} - static int _dpu_rm_make_reservation( struct dpu_rm *rm, struct dpu_global_state *global_state, @@ -517,11 +468,6 @@ static int _dpu_rm_make_reservation( return ret; } - ret = _dpu_rm_reserve_intf_related_hw(rm, global_state, enc->base.id, - &reqs->hw_res); - if (ret) - return ret; - return ret; } @@ -530,8 +476,6 @@ static int _dpu_rm_populate_requirements( struct dpu_rm_requirements *reqs, struct msm_display_topology req_topology) { - dpu_encoder_get_hw_resources(enc, &reqs->hw_res); - reqs->topology = req_topology; DRM_DEBUG_KMS("num_lm: %d num_enc: %d num_intf: %d\n", @@ -561,8 +505,6 @@ void dpu_rm_release(struct dpu_global_state *global_state, ARRAY_SIZE(global_state->mixer_to_enc_id), enc->base.id); _dpu_rm_clear_mapping(global_state->ctl_to_enc_id, ARRAY_SIZE(global_state->ctl_to_enc_id), enc->base.id); - _dpu_rm_clear_mapping(global_state->intf_to_enc_id, - ARRAY_SIZE(global_state->intf_to_enc_id), enc->base.id); } int dpu_rm_reserve( @@ -626,11 +568,6 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, hw_to_enc_id = global_state->ctl_to_enc_id; max_blks = ARRAY_SIZE(rm->ctl_blks); break; - case DPU_HW_BLK_INTF: - hw_blks = rm->intf_blks; - hw_to_enc_id = global_state->intf_to_enc_id; - max_blks = ARRAY_SIZE(rm->intf_blks); - break; case DPU_HW_BLK_DSPP: hw_blks = rm->dspp_blks; hw_to_enc_id = global_state->dspp_to_enc_id; @@ -656,3 +593,8 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, return num_blks; } + +struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx) +{ + return to_dpu_hw_intf(rm->intf_blks[intf_idx - INTF_0]); +} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 0f27759211b5..ee50f6651b6e 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -84,5 +84,13 @@ void dpu_rm_release(struct dpu_global_state *global_state, int dpu_rm_get_assigned_resources(struct dpu_rm *rm, struct dpu_global_state *global_state, uint32_t enc_id, enum dpu_hw_blk_type type, struct dpu_hw_blk **blks, int blks_size); + +/** + * dpu_rm_get_intf - Return a struct dpu_hw_intf instance given it's index. + * @rm: DPU Resource Manager handle + * @intf_idx: INTF's index + */ +struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx); + #endif /* __DPU_RM_H__ */ From patchwork Fri Jan 21 21:06:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 534292 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id BFC1FC4332F for ; Fri, 21 Jan 2022 21:06:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229817AbiAUVG2 (ORCPT ); Fri, 21 Jan 2022 16:06:28 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50076 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232237AbiAUVG0 (ORCPT ); Fri, 21 Jan 2022 16:06:26 -0500 Received: from mail-lj1-x22e.google.com (mail-lj1-x22e.google.com [IPv6:2a00:1450:4864:20::22e]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7ECCDC06173B for ; Fri, 21 Jan 2022 13:06:25 -0800 (PST) Received: by mail-lj1-x22e.google.com with SMTP id t14so1944555ljh.8 for ; Fri, 21 Jan 2022 13:06:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9AFRMJgK0nyYghOSw9TsyUQaZPsdSU3tPBxO//doHq4=; b=FQVMsEwk2YwnuGl9qO+PZ2V0crB4qZTzeWwZAlL7rLcKup8R9rQyvln72xvCDmvsnV iYJLG2XVeSkv5DwkGv0//Gs/kB4ma0QZyYmZ3QRQZE6rZC9lI7BQG1sztCyJXKOspmZ0 jLquS6HtqFgDRVMk4HoFO4qtQ1Sjzt99mSktXQviPbcSmSOt2E75dx9Vf/H35RC+oruh f3+qKZG69wmufrr1gg8IavXIsvfDK56IbJc5MTFlBmqYsDCXl5jzjEXkzjZ/U1ECZdwV 52u9mzrQMQjpn96bdZsGrrrBNARS6FAljdgVQ2fIbgGW+7tDesSQWP+ijpaUh0A6hOpn UVQA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9AFRMJgK0nyYghOSw9TsyUQaZPsdSU3tPBxO//doHq4=; b=pyjSvJZr4mkSz48vuYQL2CPgJiQ4+jsdG1szY1BwMsj2tEb1n2ddcG7tVnssBOYjnF A/N1kuTx69w7BHGbOsEYGrfG7hBqNL5MGjpTr0jY3d+wBaeuv/fD4tgCikEDyguxpB2f H3rLNpgFVsFScuElule2xYF2JFn4TQ8d0DEYhdaPq1WiFEIba8kUH35dUerZUUnxLOJo BC2NOF/jWGp8TI9pHejgXFrCHqRj0wrKq92b727hxjKid5xMBmD2wFW2qarhIbj8t0bh Urt6RPOfH7yerPzVnnuGg3MIkWzdv9uUx4i/0FrpN0zXej+kpRzWKlzm238aS+R9M7FV OkzA== X-Gm-Message-State: AOAM532RFjigUNJV/9E52dYzVfmJohrr3xr9geIIePQYIV0M2zqlnYxJ qgF2GGgqWwYA5PWYp1fYelIqBg== X-Google-Smtp-Source: ABdhPJxD+lD2OCevw7/8RPqaUcYSl2oi+CfkryQ7ncpqbSrzGvysbBwfP8gmQ8Kcs8l3XgqChkTZZA== X-Received: by 2002:a2e:8e79:: with SMTP id t25mr4507753ljk.186.1642799183849; Fri, 21 Jan 2022 13:06:23 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v10sm279125ljk.44.2022.01.21.13.06.22 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 13:06:23 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v5 4/6] drm/msm/dpu: stop embedding dpu_hw_blk into dpu_hw_intf Date: Sat, 22 Jan 2022 00:06:16 +0300 Message-Id: <20220121210618.3482550-5-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> References: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Now as dpu_hw_intf is not hanled by dpu_rm_get_assigned_resources, there is no point in embedding the (empty) struct dpu_hw_blk into dpu_hw_intf (and using typecasts between dpu_hw_blk and dpu_hw_intf). Drop it and use dpu_hw_intf directly. Signed-off-by: Dmitry Baryshkov Reviewed-by: Stephen Boyd Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h | 11 ----------- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 17 +++-------------- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 9 ++++++--- 3 files changed, 9 insertions(+), 28 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h index 3568be80dab5..230d122fa43b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_intf.h @@ -78,7 +78,6 @@ struct dpu_hw_intf_ops { }; struct dpu_hw_intf { - struct dpu_hw_blk base; struct dpu_hw_blk_reg_map hw; /* intf */ @@ -90,16 +89,6 @@ struct dpu_hw_intf { struct dpu_hw_intf_ops ops; }; -/** - * to_dpu_hw_intf - convert base object dpu_hw_base to container - * @hw: Pointer to base hardware block - * return: Pointer to hardware block container - */ -static inline struct dpu_hw_intf *to_dpu_hw_intf(struct dpu_hw_blk *hw) -{ - return container_of(hw, struct dpu_hw_intf, base); -} - /** * dpu_hw_intf_init(): Initializes the intf driver for the passed * interface idx. diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 8df21a46308e..96554e962e38 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -74,14 +74,8 @@ int dpu_rm_destroy(struct dpu_rm *rm) dpu_hw_ctl_destroy(hw); } } - for (i = 0; i < ARRAY_SIZE(rm->intf_blks); i++) { - struct dpu_hw_intf *hw; - - if (rm->intf_blks[i]) { - hw = to_dpu_hw_intf(rm->intf_blks[i]); - dpu_hw_intf_destroy(hw); - } - } + for (i = 0; i < ARRAY_SIZE(rm->hw_intf); i++) + dpu_hw_intf_destroy(rm->hw_intf[i]); return 0; } @@ -179,7 +173,7 @@ int dpu_rm_init(struct dpu_rm *rm, DPU_ERROR("failed intf object creation: err %d\n", rc); goto fail; } - rm->intf_blks[intf->id - INTF_0] = &hw->base; + rm->hw_intf[intf->id - INTF_0] = hw; } for (i = 0; i < cat->ctl_count; i++) { @@ -593,8 +587,3 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, return num_blks; } - -struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx) -{ - return to_dpu_hw_intf(rm->intf_blks[intf_idx - INTF_0]); -} diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index ee50f6651b6e..9b13200a050a 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -18,14 +18,14 @@ struct dpu_global_state; * @pingpong_blks: array of pingpong hardware resources * @mixer_blks: array of layer mixer hardware resources * @ctl_blks: array of ctl hardware resources - * @intf_blks: array of intf hardware resources + * @hw_intf: array of intf hardware resources * @dspp_blks: array of dspp hardware resources */ struct dpu_rm { struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0]; struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0]; struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0]; - struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0]; + struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0]; struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0]; struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0]; }; @@ -90,7 +90,10 @@ int dpu_rm_get_assigned_resources(struct dpu_rm *rm, * @rm: DPU Resource Manager handle * @intf_idx: INTF's index */ -struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx); +static inline struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_intf intf_idx) +{ + return rm->hw_intf[intf_idx - INTF_0]; +} #endif /* __DPU_RM_H__ */ From patchwork Fri Jan 21 21:06:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 533872 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id D5D41C4321E for ; Fri, 21 Jan 2022 21:06:29 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232237AbiAUVG3 (ORCPT ); Fri, 21 Jan 2022 16:06:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50078 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S229989AbiAUVG1 (ORCPT ); Fri, 21 Jan 2022 16:06:27 -0500 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 7A4B2C06173D for ; Fri, 21 Jan 2022 13:06:26 -0800 (PST) Received: by mail-lf1-x129.google.com with SMTP id br17so36318215lfb.6 for ; Fri, 21 Jan 2022 13:06:26 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=HACSLRAJTlm7BMAPuR4eurye88UGsf0f2NbWhCbmGEA=; b=MIus+nplDxpSNK/ib6qq1BFF0mBzL5WUhur4Trk6OuhGZTDRlU6NV3fX761lL6KOdW OHbDuih1CR/M0b6tgdDv8Ki1Ds4MxSD8dmKvekgtTeJCbooIiCa1EKdempyucvxAZDPx TJaQ7soqXcLN2otM0RsTmWOxFWyBSUWGELo3rYQkcNeOjpAT1sq6BSRq70E8FCyIVlS6 gWQAhHw9q068i5H0suJ5IBWBKj2a8gGLawBMXOZb6Gtf70ChGDPAudI0GTxg11kL42k4 X5zbe+4JKgSIKlowx7R3aB1k0fE4yDhRk/B5EHtRwBN/hu2Jp26Rbu/GhNpPAZp81uJv KLkQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=HACSLRAJTlm7BMAPuR4eurye88UGsf0f2NbWhCbmGEA=; b=JWpepF2+EO6kDmwueB2IG3deSbcfmwoqgw9E5pEXYt0Nw+aSLP0wTyLoyxSPEhlCUr F2YWyYn4cgxRvCNtU2Loc6SxG72JXtx4YFiOFOHnkYDAERrMCLf2v1oVk+U+y7XBiHGf xIo9HPVD64dOfitOTZwK3MSu6z0K0hZxKJbszioQ0d1S5ReBcly7KtvGin6KtYRzf+Qw yqv4SzROQo+K7/lF3KKKGHzu2JSX+gDNehDc03xbGWj22o51pb+t0ZpnHAvoL03ZqIQK qtDRhyqWF6GpWBwXps7vaV5NWVIzQT2OtpK035Y5f2fwuIbMSNR5GJ1NUfk5+j2aJelq dD3A== X-Gm-Message-State: AOAM532NX2sqVYfXsoF/SVyWgzAjlRzIi+P6yQJ+BwZtUoFLMmkrpu37 sbAjqWJMPu3JyvQ2pwkkbAUehQ== X-Google-Smtp-Source: ABdhPJxg1niv4tD6fSTzrRnGAjE2soBYkgvk6apaxB6/S8kfoBwjYBpdeDLXWHZ4yyxduLuNX2frag== X-Received: by 2002:a05:6512:3443:: with SMTP id j3mr3354095lfr.120.1642799184804; Fri, 21 Jan 2022 13:06:24 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v10sm279125ljk.44.2022.01.21.13.06.23 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 13:06:24 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v5 5/6] drm/msm/dpu: fix error handling in dpu_rm_init Date: Sat, 22 Jan 2022 00:06:17 +0300 Message-Id: <20220121210618.3482550-6-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> References: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Using IS_ERR_OR_NULL() together with PTR_ERR() is a typical mistake. If the value is NULL, then the function will return 0 instead of a proper return code. Moreover none of dpu_hw_*_init() functions can return NULL. So, replace all dpu_rm_init()'s IS_ERR_OR_NULL() calls with IS_ERR(). Signed-off-by: Dmitry Baryshkov Reviewed-by: Abhinav Kumar --- drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 96554e962e38..7497538adae1 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -109,7 +109,7 @@ int dpu_rm_init(struct dpu_rm *rm, continue; } hw = dpu_hw_lm_init(lm->id, mmio, cat); - if (IS_ERR_OR_NULL(hw)) { + if (IS_ERR(hw)) { rc = PTR_ERR(hw); DPU_ERROR("failed lm object creation: err %d\n", rc); goto fail; @@ -126,7 +126,7 @@ int dpu_rm_init(struct dpu_rm *rm, continue; } hw = dpu_hw_merge_3d_init(merge_3d->id, mmio, cat); - if (IS_ERR_OR_NULL(hw)) { + if (IS_ERR(hw)) { rc = PTR_ERR(hw); DPU_ERROR("failed merge_3d object creation: err %d\n", rc); @@ -144,7 +144,7 @@ int dpu_rm_init(struct dpu_rm *rm, continue; } hw = dpu_hw_pingpong_init(pp->id, mmio, cat); - if (IS_ERR_OR_NULL(hw)) { + if (IS_ERR(hw)) { rc = PTR_ERR(hw); DPU_ERROR("failed pingpong object creation: err %d\n", rc); @@ -168,7 +168,7 @@ int dpu_rm_init(struct dpu_rm *rm, continue; } hw = dpu_hw_intf_init(intf->id, mmio, cat); - if (IS_ERR_OR_NULL(hw)) { + if (IS_ERR(hw)) { rc = PTR_ERR(hw); DPU_ERROR("failed intf object creation: err %d\n", rc); goto fail; @@ -185,7 +185,7 @@ int dpu_rm_init(struct dpu_rm *rm, continue; } hw = dpu_hw_ctl_init(ctl->id, mmio, cat); - if (IS_ERR_OR_NULL(hw)) { + if (IS_ERR(hw)) { rc = PTR_ERR(hw); DPU_ERROR("failed ctl object creation: err %d\n", rc); goto fail; @@ -202,7 +202,7 @@ int dpu_rm_init(struct dpu_rm *rm, continue; } hw = dpu_hw_dspp_init(dspp->id, mmio, cat); - if (IS_ERR_OR_NULL(hw)) { + if (IS_ERR(hw)) { rc = PTR_ERR(hw); DPU_ERROR("failed dspp object creation: err %d\n", rc); goto fail; From patchwork Fri Jan 21 21:06:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Dmitry Baryshkov X-Patchwork-Id: 534291 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 1B3BCC43219 for ; Fri, 21 Jan 2022 21:06:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S229989AbiAUVG3 (ORCPT ); Fri, 21 Jan 2022 16:06:29 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:50088 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233171AbiAUVG2 (ORCPT ); Fri, 21 Jan 2022 16:06:28 -0500 Received: from mail-lf1-x129.google.com (mail-lf1-x129.google.com [IPv6:2a00:1450:4864:20::129]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 84E9CC06173B for ; Fri, 21 Jan 2022 13:06:27 -0800 (PST) Received: by mail-lf1-x129.google.com with SMTP id u14so5336466lfo.11 for ; Fri, 21 Jan 2022 13:06:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=vmgkqgqoCtzPCMYYy+6eXohS4KrBEXGt/+AgN0mFU54=; b=KkJJX6rvY92HGXZa1gEH0yJTDAr6y4LGcQw8W92bvi2Fxtc2MEjkOzkZFUiSuvUHtR 3MaHJbDErfMmP6VFLMvpD55zUGaeEw2vU2+9ACuPRB4+LGZaj9hAzb8ar0qMNblkMYG6 o2uGX3DJbNQn0xIM3vlRmLqswI092HXmYRuHmRwwoJAhfMPiEekRiLFaH6kAxsEUcDhG IXQ2kxSs8do5T5DjwtsYMJV1g8cytL6XtIBOmLZMsB3b5jcK9qps850gLxS9m31NIJp4 kXqeIEWKVgmUrIXlvJDr2cpOg8PYVK5MgiHEaiiiP4VCk6ErbydhJAxW5XlH6NwFHoLI b1Xw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=vmgkqgqoCtzPCMYYy+6eXohS4KrBEXGt/+AgN0mFU54=; b=B64mq1iqG1c0fjfM4LAp8QHGVyptrqykzM+Ms4cso8tPgolf6tfNQ6Vg07Zu4AgnSM OBsdcf3oEd+QDr4CrdXWmlJmUG0O72O2Vc8yOmlFktU97nUD95f0ZRsJkA2ueBckMaY8 eDW8K24J0YZ05afB3LcIElNJGZ5YulJHZ/ueV9JrlKRBCXdPQQV1NUH58K+iEyltNd5m BqLZLXjo5MnEthqyfpOL47/q1S/tbbIL6HGhEgOBUxtMcN1vGCoLGM93zkpYgG1rkwtN 2WZledlYsV+7lEcxOWoSr+cPOREkR4Z5+4gKc/8WEURuEC5AD7B3icDgafZoSaBCXku8 YHPQ== X-Gm-Message-State: AOAM531w7Rka+qmMyg2S7JyMhsacuZZiyr1Z2D6KzcLZPBAtO43rpmM0 8EUoRihEXWaDF479o2sPZsUrgg== X-Google-Smtp-Source: ABdhPJyNaSD7oF4wGEVnZprFLw7hRhmF+yzcqW88z8cjwacN7j2106+xdesnb1Z36+84Hu4eBzWp2Q== X-Received: by 2002:ac2:5f0f:: with SMTP id 15mr4995057lfq.462.1642799185849; Fri, 21 Jan 2022 13:06:25 -0800 (PST) Received: from eriador.lan ([37.153.55.125]) by smtp.gmail.com with ESMTPSA id v10sm279125ljk.44.2022.01.21.13.06.24 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 21 Jan 2022 13:06:25 -0800 (PST) From: Dmitry Baryshkov To: Bjorn Andersson , Rob Clark , Sean Paul , Abhinav Kumar Cc: Stephen Boyd , David Airlie , Daniel Vetter , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org Subject: [PATCH v5 6/6] drm/msm/dpu: move VBIF blocks handling to dpu_rm Date: Sat, 22 Jan 2022 00:06:18 +0300 Message-Id: <20220121210618.3482550-7-dmitry.baryshkov@linaro.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> References: <20220121210618.3482550-1-dmitry.baryshkov@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Move handling of VBIF blocks into dpu_rm. This serves the purpose of unification of handling of all hardware blocks inside the DPU driver. This removes hand-coded loops in dpu_vbif (which look for necessary VBIF instance by looping through the dpu_kms->hw_vbif and comparing vbif_idx). Signed-off-by: Dmitry Baryshkov --- drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h | 1 + drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 28 +-------------------- drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 - drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c | 19 ++++++++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h | 12 +++++++++ drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c | 26 ++++++------------- 6 files changed, 40 insertions(+), 47 deletions(-) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h index 6417aa28d32c..895e86dabcb6 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_vbif.h @@ -8,6 +8,7 @@ #include "dpu_hw_catalog.h" #include "dpu_hw_mdss.h" #include "dpu_hw_util.h" +#include "dpu_hw_blk.h" struct dpu_hw_vbif; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 47fe11a84a77..4a1983d8561b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c @@ -782,8 +782,6 @@ static long dpu_kms_round_pixclk(struct msm_kms *kms, unsigned long rate, static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms) { - int i; - if (dpu_kms->hw_intr) dpu_hw_intr_destroy(dpu_kms->hw_intr); dpu_kms->hw_intr = NULL; @@ -791,15 +789,6 @@ static void _dpu_kms_hw_destroy(struct dpu_kms *dpu_kms) /* safe to call these more than once during shutdown */ _dpu_kms_mmu_destroy(dpu_kms); - if (dpu_kms->catalog) { - for (i = 0; i < dpu_kms->catalog->vbif_count; i++) { - u32 vbif_idx = dpu_kms->catalog->vbif[i].id; - - if ((vbif_idx < VBIF_MAX) && dpu_kms->hw_vbif[vbif_idx]) - dpu_hw_vbif_destroy(dpu_kms->hw_vbif[vbif_idx]); - } - } - if (dpu_kms->rm_init) dpu_rm_destroy(&dpu_kms->rm); dpu_kms->rm_init = false; @@ -1027,7 +1016,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms) { struct dpu_kms *dpu_kms; struct drm_device *dev; - int i, rc = -EINVAL; + int rc = -EINVAL; if (!kms) { DPU_ERROR("invalid kms\n"); @@ -1116,21 +1105,6 @@ static int dpu_kms_hw_init(struct msm_kms *kms) goto power_error; } - for (i = 0; i < dpu_kms->catalog->vbif_count; i++) { - u32 vbif_idx = dpu_kms->catalog->vbif[i].id; - - dpu_kms->hw_vbif[i] = dpu_hw_vbif_init(vbif_idx, - dpu_kms->vbif[vbif_idx], dpu_kms->catalog); - if (IS_ERR_OR_NULL(dpu_kms->hw_vbif[vbif_idx])) { - rc = PTR_ERR(dpu_kms->hw_vbif[vbif_idx]); - if (!dpu_kms->hw_vbif[vbif_idx]) - rc = -EINVAL; - DPU_ERROR("failed to init vbif %d: %d\n", vbif_idx, rc); - dpu_kms->hw_vbif[vbif_idx] = NULL; - goto power_error; - } - } - rc = dpu_core_perf_init(&dpu_kms->perf, dev, dpu_kms->catalog, _dpu_kms_get_clk(dpu_kms, "core")); if (rc) { diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h index 3f518c809e33..b96c901483ae 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h @@ -105,7 +105,6 @@ struct dpu_kms { struct dpu_rm rm; bool rm_init; - struct dpu_hw_vbif *hw_vbif[VBIF_MAX]; struct dpu_hw_mdp *hw_mdp; bool has_danger_ctrl; diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c index 7497538adae1..6d49666c4e77 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.c @@ -76,6 +76,8 @@ int dpu_rm_destroy(struct dpu_rm *rm) } for (i = 0; i < ARRAY_SIZE(rm->hw_intf); i++) dpu_hw_intf_destroy(rm->hw_intf[i]); + for (i = 0; i < ARRAY_SIZE(rm->hw_vbif); i++) + dpu_hw_vbif_destroy(rm->hw_vbif[i]); return 0; } @@ -210,6 +212,23 @@ int dpu_rm_init(struct dpu_rm *rm, rm->dspp_blks[dspp->id - DSPP_0] = &hw->base; } + for (i = 0; i < cat->vbif_count; i++) { + struct dpu_hw_vbif *hw; + const struct dpu_vbif_cfg *vbif = &cat->vbif[i]; + + if (vbif->id < VBIF_0 || vbif->id >= VBIF_MAX) { + DPU_ERROR("skip vbif %d with invalid id\n", vbif->id); + continue; + } + hw = dpu_hw_vbif_init(vbif->id, mmio, cat); + if (IS_ERR(hw)) { + rc = PTR_ERR(hw); + DPU_ERROR("failed vbif object creation: err %d\n", rc); + goto fail; + } + rm->hw_vbif[vbif->id - VBIF_0] = hw; + } + return 0; fail: diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h index 9b13200a050a..a15977bdceeb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_rm.h @@ -20,6 +20,7 @@ struct dpu_global_state; * @ctl_blks: array of ctl hardware resources * @hw_intf: array of intf hardware resources * @dspp_blks: array of dspp hardware resources + * @hw_vbif: array of vbif hardware resources */ struct dpu_rm { struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0]; @@ -28,6 +29,7 @@ struct dpu_rm { struct dpu_hw_intf *hw_intf[INTF_MAX - INTF_0]; struct dpu_hw_blk *dspp_blks[DSPP_MAX - DSPP_0]; struct dpu_hw_blk *merge_3d_blks[MERGE_3D_MAX - MERGE_3D_0]; + struct dpu_hw_vbif *hw_vbif[VBIF_MAX - VBIF_0]; }; /** @@ -95,5 +97,15 @@ static inline struct dpu_hw_intf *dpu_rm_get_intf(struct dpu_rm *rm, enum dpu_in return rm->hw_intf[intf_idx - INTF_0]; } +/** + * dpu_rm_get_vbif - Return a struct dpu_hw_vbif instance given it's index. + * @rm: DPU Resource Manager handle + * @vbif_idx: VBIF's index + */ +static inline struct dpu_hw_vbif *dpu_rm_get_vbif(struct dpu_rm *rm, enum dpu_vbif vbif_idx) +{ + return rm->hw_vbif[vbif_idx - VBIF_0]; +} + #endif /* __DPU_RM_H__ */ diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c index 21d20373eb8b..00ac2aa81651 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_vbif.c @@ -152,15 +152,10 @@ void dpu_vbif_set_ot_limit(struct dpu_kms *dpu_kms, struct dpu_hw_mdp *mdp; bool forced_on = false; u32 ot_lim; - int ret, i; + int ret; mdp = dpu_kms->hw_mdp; - - for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) { - if (dpu_kms->hw_vbif[i] && - dpu_kms->hw_vbif[i]->idx == params->vbif_idx) - vbif = dpu_kms->hw_vbif[i]; - } + vbif = dpu_rm_get_vbif(&dpu_kms->rm, params->vbif_idx); if (!vbif || !mdp) { DRM_DEBUG_ATOMIC("invalid arguments vbif %d mdp %d\n", @@ -216,14 +211,7 @@ void dpu_vbif_set_qos_remap(struct dpu_kms *dpu_kms, } mdp = dpu_kms->hw_mdp; - for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) { - if (dpu_kms->hw_vbif[i] && - dpu_kms->hw_vbif[i]->idx == params->vbif_idx) { - vbif = dpu_kms->hw_vbif[i]; - break; - } - } - + vbif = dpu_rm_get_vbif(&dpu_kms->rm, params->vbif_idx); if (!vbif || !vbif->cap) { DPU_ERROR("invalid vbif %d\n", params->vbif_idx); return; @@ -261,8 +249,8 @@ void dpu_vbif_clear_errors(struct dpu_kms *dpu_kms) struct dpu_hw_vbif *vbif; u32 i, pnd, src; - for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) { - vbif = dpu_kms->hw_vbif[i]; + for (i = VBIF_0; i < VBIF_MAX; i++) { + vbif = dpu_rm_get_vbif(&dpu_kms->rm, i); if (vbif && vbif->ops.clear_errors) { vbif->ops.clear_errors(vbif, &pnd, &src); if (pnd || src) { @@ -278,8 +266,8 @@ void dpu_vbif_init_memtypes(struct dpu_kms *dpu_kms) struct dpu_hw_vbif *vbif; int i, j; - for (i = 0; i < ARRAY_SIZE(dpu_kms->hw_vbif); i++) { - vbif = dpu_kms->hw_vbif[i]; + for (i = VBIF_0; i < VBIF_MAX; i++) { + vbif = dpu_rm_get_vbif(&dpu_kms->rm, i); if (vbif && vbif->cap && vbif->ops.set_mem_type) { for (j = 0; j < vbif->cap->memtype_count; j++) vbif->ops.set_mem_type(