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[94.253.144.81]) by smtp.googlemail.com with ESMTPSA id c22sm13094334eds.72.2022.01.31.05.30.56 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 05:30:56 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, brgl@bgdev.pl, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh@kernel.org, skhan@linuxfoundation.org Cc: luka.perkov@sartura.hr, Robert Marko Subject: [PATCH v10 1/6] mfd: simple-mfd-i2c: Add Delta TN48M CPLD support Date: Mon, 31 Jan 2022 14:30:44 +0100 Message-Id: <20220131133049.77780-2-robert.marko@sartura.hr> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220131133049.77780-1-robert.marko@sartura.hr> References: <20220131133049.77780-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M switches have a Lattice CPLD that serves multiple purposes including being a GPIO expander. So, lets use the simple I2C MFD driver to provide the MFD core. Also add a virtual symbol which pulls in the simple-mfd-i2c driver and provide a common symbol on which the subdevice drivers can depend on. Signed-off-by: Robert Marko Acked-for-MFD-by: Lee Jones --- Changes in v9: * Rebased onto 5.17-rc1 Changes in v9: * Depend on ARCH_MVEBU or COMPILE_TEST Changes in v2: * Drop the custom MFD driver and header * Use simple I2C MFD driver --- drivers/mfd/Kconfig | 11 +++++++++++ drivers/mfd/simple-mfd-i2c.c | 1 + 2 files changed, 12 insertions(+) diff --git a/drivers/mfd/Kconfig b/drivers/mfd/Kconfig index ba0b3eb131f1..be1ad8ce54aa 100644 --- a/drivers/mfd/Kconfig +++ b/drivers/mfd/Kconfig @@ -297,6 +297,17 @@ config MFD_ASIC3 This driver supports the ASIC3 multifunction chip found on many PDAs (mainly iPAQ and HTC based ones) +config MFD_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD driver" + depends on I2C + depends on ARCH_MVEBU || COMPILE_TEST + select MFD_SIMPLE_MFD_I2C + help + Select this option to enable support for Delta Networks TN48M switch + CPLD. It consists of reset and GPIO drivers. CPLD provides GPIOS-s + for the SFP slots as well as power supply related information. + SFP support depends on the GPIO driver being selected. + config PMIC_DA903X bool "Dialog Semiconductor DA9030/DA9034 PMIC Support" depends on I2C=y diff --git a/drivers/mfd/simple-mfd-i2c.c b/drivers/mfd/simple-mfd-i2c.c index 51536691ad9d..0d6a51ed6286 100644 --- a/drivers/mfd/simple-mfd-i2c.c +++ b/drivers/mfd/simple-mfd-i2c.c @@ -64,6 +64,7 @@ static int simple_mfd_i2c_probe(struct i2c_client *i2c) static const struct of_device_id simple_mfd_i2c_of_match[] = { { .compatible = "kontron,sl28cpld" }, + { .compatible = "delta,tn48m-cpld" }, {} }; MODULE_DEVICE_TABLE(of, simple_mfd_i2c_of_match); From patchwork Mon Jan 31 13:30:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 538569 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8827CC4332F for ; Mon, 31 Jan 2022 13:31:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378808AbiAaNbC (ORCPT ); Mon, 31 Jan 2022 08:31:02 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51570 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378806AbiAaNbB (ORCPT ); Mon, 31 Jan 2022 08:31:01 -0500 Received: from mail-ed1-x534.google.com (mail-ed1-x534.google.com [IPv6:2a00:1450:4864:20::534]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 014E9C061714 for ; Mon, 31 Jan 2022 05:31:01 -0800 (PST) Received: by mail-ed1-x534.google.com with SMTP id c24so27045990edy.4 for ; Mon, 31 Jan 2022 05:31:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=dyOxlnF56fGFvmWlFeMFje49EyLTFgsIjGjI1oGHJXQ=; b=ez8GBhvi9YgiNQeS5F9M47uLlt4ytrPcD8aBMn/tPMQXM2+Lb7b4kp9VV+l65xH0uo IpAuQi15+2IvIRlh6RV45UmwSEa00x8RUEYzPKfvkm2Gr2VlKUMSl9pYIM/KcfVnYDtn w+4hivismuAKnNAT/iNqBi1/SV+ETFsu4C3LiK1J+35xZAXffwZWkXwsWdB0tEE9ZJX5 /01FxHtXMkgo2iyFttRKIPmf1cfH29MJq3WAQLOKsqld9PuCk2pHD2+IcLTeSaMxRY5b C5jAS5cZa1xgQ9anEYTzdFYegRXQOp4Xo221AFJHwP54kBl1JZTThXaB7kMBxyr7mQtS J9Yw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=dyOxlnF56fGFvmWlFeMFje49EyLTFgsIjGjI1oGHJXQ=; b=BAKOTKZBn7fH8wXK+tnQdZpNnbKMHVPRp7PwmF/oo6L1Zig2a/V/oqif/24nVvMZKH /fkG37SrZXbvaDZZQq/QRMKJC+EJ6mmPDQWsW57F+ZBp5C5gX7rfEspBxik5xNufZlDr /UszaLCZmLrRX8JlnI+Ve5x24gC9klJFPxQb3tQrSTWvKFuu/OH6PPhogJpZv0Pd7NmF zKXi8BI1nyoPYzEm7bG5+P8QUtnFMDLoOy5C0Ye8PvxSNLFwyZM6cbLLjZJDPUeMYNf9 AfUepR6qFd2W4aZ9mrM9cTUgG/kviGQPEgXtpeKQsk8D7SbMGTLt1aBD0m0WBzXmqW6d wR0g== X-Gm-Message-State: AOAM530IeDMt/C9lXwySCgwWhUUKacqjug84LlLuB9YnL1mBkdoS3cdN pICvjKBF9718HkXScu7lRM+JeA== X-Google-Smtp-Source: ABdhPJz1VD5sHKHWyFu16J6uThq2t+Uz16u/ZIm/fMUv73jvInYu4Q4qYjehg3Io14G1j1Uq0SV+8w== X-Received: by 2002:aa7:d313:: with SMTP id p19mr21381970edq.380.1643635859596; Mon, 31 Jan 2022 05:30:59 -0800 (PST) Received: from fedora.robimarko.hr (cpezg-94-253-144-81-cbl.xnet.hr. [94.253.144.81]) by smtp.googlemail.com with ESMTPSA id c22sm13094334eds.72.2022.01.31.05.30.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 05:30:59 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, brgl@bgdev.pl, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh@kernel.org, skhan@linuxfoundation.org Cc: luka.perkov@sartura.hr, Robert Marko , Andy Shevchenko , Michael Walle Subject: [PATCH v10 2/6] gpio: Add Delta TN48M CPLD GPIO driver Date: Mon, 31 Jan 2022 14:30:45 +0100 Message-Id: <20220131133049.77780-3-robert.marko@sartura.hr> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220131133049.77780-1-robert.marko@sartura.hr> References: <20220131133049.77780-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M switch has an onboard Lattice CPLD that is used as a GPIO expander. The CPLD provides 12 pins in total on the TN48M, but on more advanced switch models it provides up to 192 pins, so the driver is extendable to support more switches. Signed-off-by: Robert Marko Reviewed-by: Andy Shevchenko Reviewed-by: Michael Walle Reviewed-by: Linus Walleij Acked-by: Bartosz Golaszewski --- Changes in v10: * Rebase onto 5.17-rc1 Changes in v9: * Use {} instead of {0} for initialising the regmap config per Andys comment * Fix spelling mistake in KConfig Changes in v8: * No need to assing NULL to gpio_config per Andys comment Changes in v7: * Change compatibles, reduce their number * Rework the driver to be easily extendible to support more devices * Use match data to populate configuration * Drop reviews and ACK-s as the driver changed Changes in v6: * Drop unused header * Return the return value of device_property_read_u32() instead of a hardcoded return Changes in v2: * Rewrite to use simple I2C MFD and GPIO regmap * Drop DT bindings for pin numbering --- drivers/gpio/Kconfig | 12 +++++ drivers/gpio/Makefile | 1 + drivers/gpio/gpio-tn48m.c | 100 ++++++++++++++++++++++++++++++++++++++ 3 files changed, 113 insertions(+) create mode 100644 drivers/gpio/gpio-tn48m.c diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 1c211b4c63be..c822cf6146cf 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig @@ -1346,6 +1346,18 @@ config GPIO_TIMBERDALE help Add support for the GPIO IP in the timberdale FPGA. +config GPIO_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD GPIO driver" + depends on MFD_TN48M_CPLD + select GPIO_REGMAP + help + This enables support for the GPIOs found on the Delta + Networks TN48M switch Lattice CPLD. It provides 12 pins in total, + they are input-only or output-only type. + + This driver can also be built as a module. If so, the + module will be called gpio-tn48m. + config GPIO_TPS65086 tristate "TI TPS65086 GPO" depends on MFD_TPS65086 diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index edbaa3cb343c..3b68a9808154 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile @@ -148,6 +148,7 @@ obj-$(CONFIG_GPIO_TEGRA186) += gpio-tegra186.o obj-$(CONFIG_GPIO_TEGRA) += gpio-tegra.o obj-$(CONFIG_GPIO_THUNDERX) += gpio-thunderx.o obj-$(CONFIG_GPIO_TIMBERDALE) += gpio-timberdale.o +obj-$(CONFIG_GPIO_TN48M_CPLD) += gpio-tn48m.o obj-$(CONFIG_GPIO_TPIC2810) += gpio-tpic2810.o obj-$(CONFIG_GPIO_TPS65086) += gpio-tps65086.o obj-$(CONFIG_GPIO_TPS65218) += gpio-tps65218.o diff --git a/drivers/gpio/gpio-tn48m.c b/drivers/gpio/gpio-tn48m.c new file mode 100644 index 000000000000..cd4a80b22794 --- /dev/null +++ b/drivers/gpio/gpio-tn48m.c @@ -0,0 +1,100 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Delta TN48M CPLD GPIO driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#include +#include +#include +#include +#include +#include +#include + +enum tn48m_gpio_type { + TN48M_GP0 = 1, + TN48M_GPI, +}; + +struct tn48m_gpio_config { + int ngpio; + int ngpio_per_reg; + enum tn48m_gpio_type type; +}; + +static const struct tn48m_gpio_config tn48m_gpo_config = { + .ngpio = 4, + .ngpio_per_reg = 4, + .type = TN48M_GP0, +}; + +static const struct tn48m_gpio_config tn48m_gpi_config = { + .ngpio = 4, + .ngpio_per_reg = 4, + .type = TN48M_GPI, +}; + +static int tn48m_gpio_probe(struct platform_device *pdev) +{ + const struct tn48m_gpio_config *gpio_config; + struct gpio_regmap_config config = {}; + struct regmap *regmap; + u32 base; + int ret; + + if (!pdev->dev.parent) + return -ENODEV; + + gpio_config = device_get_match_data(&pdev->dev); + if (!gpio_config) + return -ENODEV; + + ret = device_property_read_u32(&pdev->dev, "reg", &base); + if (ret) + return ret; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + config.regmap = regmap; + config.parent = &pdev->dev; + config.ngpio = gpio_config->ngpio; + config.ngpio_per_reg = gpio_config->ngpio_per_reg; + switch (gpio_config->type) { + case TN48M_GP0: + config.reg_set_base = base; + break; + case TN48M_GPI: + config.reg_dat_base = base; + break; + default: + return -EINVAL; + } + + return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config)); +} + +static const struct of_device_id tn48m_gpio_of_match[] = { + { .compatible = "delta,tn48m-gpo", .data = &tn48m_gpo_config }, + { .compatible = "delta,tn48m-gpi", .data = &tn48m_gpi_config }, + { } +}; +MODULE_DEVICE_TABLE(of, tn48m_gpio_of_match); + +static struct platform_driver tn48m_gpio_driver = { + .driver = { + .name = "delta-tn48m-gpio", + .of_match_table = tn48m_gpio_of_match, + }, + .probe = tn48m_gpio_probe, +}; +module_platform_driver(tn48m_gpio_driver); + +MODULE_AUTHOR("Robert Marko "); +MODULE_DESCRIPTION("Delta TN48M CPLD GPIO driver"); +MODULE_LICENSE("GPL"); From patchwork Mon Jan 31 13:30:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 539142 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id C74EAC433F5 for ; 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[94.253.144.81]) by smtp.googlemail.com with ESMTPSA id c22sm13094334eds.72.2022.01.31.05.31.00 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 05:31:01 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, brgl@bgdev.pl, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh@kernel.org, skhan@linuxfoundation.org Cc: luka.perkov@sartura.hr, Robert Marko Subject: [PATCH v10 3/6] dt-bindings: reset: Add Delta TN48M Date: Mon, 31 Jan 2022 14:30:46 +0100 Message-Id: <20220131133049.77780-4-robert.marko@sartura.hr> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220131133049.77780-1-robert.marko@sartura.hr> References: <20220131133049.77780-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add header for the Delta TN48M CPLD provided resets. Signed-off-by: Robert Marko Acked-by: Philipp Zabel --- include/dt-bindings/reset/delta,tn48m-reset.h | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 include/dt-bindings/reset/delta,tn48m-reset.h diff --git a/include/dt-bindings/reset/delta,tn48m-reset.h b/include/dt-bindings/reset/delta,tn48m-reset.h new file mode 100644 index 000000000000..d4e9ed12de3e --- /dev/null +++ b/include/dt-bindings/reset/delta,tn48m-reset.h @@ -0,0 +1,20 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ +/* + * Delta TN48M CPLD GPIO driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#ifndef _DT_BINDINGS_RESET_TN48M_H +#define _DT_BINDINGS_RESET_TN48M_H + +#define CPU_88F7040_RESET 0 +#define CPU_88F6820_RESET 1 +#define MAC_98DX3265_RESET 2 +#define PHY_88E1680_RESET 3 +#define PHY_88E1512_RESET 4 +#define POE_RESET 5 + +#endif /* _DT_BINDINGS_RESET_TN48M_H */ From patchwork Mon Jan 31 13:30:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 538568 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A2139C433F5 for ; Mon, 31 Jan 2022 13:31:07 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378873AbiAaNbG (ORCPT ); Mon, 31 Jan 2022 08:31:06 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51616 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378872AbiAaNbF (ORCPT ); Mon, 31 Jan 2022 08:31:05 -0500 Received: from mail-ed1-x52f.google.com (mail-ed1-x52f.google.com [IPv6:2a00:1450:4864:20::52f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id EA62AC061744 for ; Mon, 31 Jan 2022 05:31:04 -0800 (PST) Received: by mail-ed1-x52f.google.com with SMTP id u24so26586708eds.11 for ; Mon, 31 Jan 2022 05:31:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Q09tJ844iqO/ZrH4dAVvNJQ8z2LScJto7U8HkH5YPKc=; b=OLKgbqXs349XvdBdx4i4ic7bSTt8BNMPxUHKziH2O3YTiv3yeCFvwDMI5asMbJPvdE +JXv7NjOsmu53iOCmKEJBNmtxmGg4SuUo54GKAOL3t+h9i5KOhgYJBeNraRRX24WKlhJ WWbMNlrLiQjONR1gu0F1jwa/YboyaFOqNk1W2C+vWJK8okzPqazarFOXU5M8sK8KGHG7 l5utoU/ehER5/4Ka65ouU04UOVtXO+vT1pCAelCSQKn3z1kf0PNhoJT9kUr8/sDJ1vbQ bT98kajSBQKhldu42o3iFj8ROittfZC67wfY+RcCq4rP0AtoKs655S0W/DPpy5oWhjT8 ZwaA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Q09tJ844iqO/ZrH4dAVvNJQ8z2LScJto7U8HkH5YPKc=; b=oKgwnG3tiRr1wHwkRNUfTtPwBo9DMLOdIwqLfuDvTiOEdxZXe5SUdgeHwacsJZAqcG IY0rgK3UwhrOUuzEy1ZfM8lohR8PHGkWjEhxPAqnm8zOCAznjfv7P0+mFV+hWPW5UMb6 Fa9UFhlfcqERn4+093QYim6VnaTflhzFv122K17YlDvKTf+XctBwrtmrpRXdFGJWnaC1 Kh3cuzU8ZV06DJekaw/Hzp+388suk4lmJoVSuun1BhoBIOIzk6KON/G94NKPqZJTG/o3 ujOF/bu2PhZ2GOBAO6JAFu2OuduzG2/0KXL8qxLovFt7vLPMZzR15iFkNCluozEXoBip +Slw== X-Gm-Message-State: AOAM53166794QhYUuFiFD70VNZ6EoZpVmmeOK6SRbtnVk6XoKfwIwzO5 7rSR5Q3Ek+JGhIAq9XSYbHjjpg== X-Google-Smtp-Source: ABdhPJylNCzcNZhvCt+vflAJXaPg4T1Yo7sGROqhDIwhZ+eewhOKlFCaRCVy5bKwDSi03oagHBjgvg== X-Received: by 2002:a50:fc14:: with SMTP id i20mr20432866edr.261.1643635863477; Mon, 31 Jan 2022 05:31:03 -0800 (PST) Received: from fedora.robimarko.hr (cpezg-94-253-144-81-cbl.xnet.hr. [94.253.144.81]) by smtp.googlemail.com with ESMTPSA id c22sm13094334eds.72.2022.01.31.05.31.01 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 05:31:02 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, brgl@bgdev.pl, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh@kernel.org, skhan@linuxfoundation.org Cc: luka.perkov@sartura.hr, Robert Marko , Andy Shevchenko Subject: [PATCH v10 4/6] reset: Add Delta TN48M CPLD reset controller Date: Mon, 31 Jan 2022 14:30:47 +0100 Message-Id: <20220131133049.77780-5-robert.marko@sartura.hr> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220131133049.77780-1-robert.marko@sartura.hr> References: <20220131133049.77780-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Delta TN48M CPLD exposes resets for the following: * 88F7040 SoC * 88F6820 SoC * 98DX3265 switch MAC-s * 88E1680 PHY-s * 88E1512 PHY * PoE PSE controller Controller supports only self clearing resets. Signed-off-by: Robert Marko Reviewed-by: Philipp Zabel Reviewed-by: Andy Shevchenko --- Changes in v10: * Rebase onto 5.17-rc1 Changes in v9: * Expand KConfig help per Andys comment * Drop the comma in of_device_id per Andys comment Changes in v8: * Drop of.h and include mod_devicetable.h per Andys comment * Mark the units used in timeout and sleep defines for the timeout poller Changes in v5: * Allow COMPILE_TEST as well * Default to MFD_TN48M_CPLD Changes in v4: * Drop assert and deassert as only self-clearing resets are support by the HW * Make sure that reset is cleared before returning from reset. reset --- drivers/reset/Kconfig | 13 ++++ drivers/reset/Makefile | 1 + drivers/reset/reset-tn48m.c | 128 ++++++++++++++++++++++++++++++++++++ 3 files changed, 142 insertions(+) create mode 100644 drivers/reset/reset-tn48m.c diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 6f8ba0ddc05f..b496028b6bfa 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -256,6 +256,19 @@ config RESET_TI_SYSCON you wish to use the reset framework for such memory-mapped devices, say Y here. Otherwise, say N. +config RESET_TN48M_CPLD + tristate "Delta Networks TN48M switch CPLD reset controller" + depends on MFD_TN48M_CPLD || COMPILE_TEST + default MFD_TN48M_CPLD + help + This enables the reset controller driver for the Delta TN48M CPLD. + It provides reset signals for Armada 7040 and 385 SoC-s, Alleycat 3X + switch MAC-s, Alaska OOB ethernet PHY, Quad Alaska ethernet PHY-s and + Microchip PD69200 PoE PSE controller. + + This driver can also be built as a module. If so, the module will be + called reset-tn48m. + config RESET_UNIPHIER tristate "Reset controller driver for UniPhier SoCs" depends on ARCH_UNIPHIER || COMPILE_TEST diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index bd0a97be18b5..a80a9c4008a7 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -33,6 +33,7 @@ obj-$(CONFIG_RESET_STARFIVE_JH7100) += reset-starfive-jh7100.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_TI_SCI) += reset-ti-sci.o obj-$(CONFIG_RESET_TI_SYSCON) += reset-ti-syscon.o +obj-$(CONFIG_RESET_TN48M_CPLD) += reset-tn48m.o obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o obj-$(CONFIG_RESET_UNIPHIER_GLUE) += reset-uniphier-glue.o obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o diff --git a/drivers/reset/reset-tn48m.c b/drivers/reset/reset-tn48m.c new file mode 100644 index 000000000000..130027291b6e --- /dev/null +++ b/drivers/reset/reset-tn48m.c @@ -0,0 +1,128 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * Delta TN48M CPLD reset driver + * + * Copyright (C) 2021 Sartura Ltd. + * + * Author: Robert Marko + */ + +#include +#include +#include +#include +#include +#include +#include + +#include + +#define TN48M_RESET_REG 0x10 + +#define TN48M_RESET_TIMEOUT_US 125000 +#define TN48M_RESET_SLEEP_US 10 + +struct tn48_reset_map { + u8 bit; +}; + +struct tn48_reset_data { + struct reset_controller_dev rcdev; + struct regmap *regmap; +}; + +static const struct tn48_reset_map tn48m_resets[] = { + [CPU_88F7040_RESET] = {0}, + [CPU_88F6820_RESET] = {1}, + [MAC_98DX3265_RESET] = {2}, + [PHY_88E1680_RESET] = {4}, + [PHY_88E1512_RESET] = {6}, + [POE_RESET] = {7}, +}; + +static inline struct tn48_reset_data *to_tn48_reset_data( + struct reset_controller_dev *rcdev) +{ + return container_of(rcdev, struct tn48_reset_data, rcdev); +} + +static int tn48m_control_reset(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct tn48_reset_data *data = to_tn48_reset_data(rcdev); + unsigned int val; + + regmap_update_bits(data->regmap, TN48M_RESET_REG, + BIT(tn48m_resets[id].bit), 0); + + return regmap_read_poll_timeout(data->regmap, + TN48M_RESET_REG, + val, + val & BIT(tn48m_resets[id].bit), + TN48M_RESET_SLEEP_US, + TN48M_RESET_TIMEOUT_US); +} + +static int tn48m_control_status(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct tn48_reset_data *data = to_tn48_reset_data(rcdev); + unsigned int regval; + int ret; + + ret = regmap_read(data->regmap, TN48M_RESET_REG, ®val); + if (ret < 0) + return ret; + + if (BIT(tn48m_resets[id].bit) & regval) + return 0; + else + return 1; +} + +static const struct reset_control_ops tn48_reset_ops = { + .reset = tn48m_control_reset, + .status = tn48m_control_status, +}; + +static int tn48m_reset_probe(struct platform_device *pdev) +{ + struct tn48_reset_data *data; + struct regmap *regmap; + + regmap = dev_get_regmap(pdev->dev.parent, NULL); + if (!regmap) + return -ENODEV; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + data->regmap = regmap; + + data->rcdev.owner = THIS_MODULE; + data->rcdev.ops = &tn48_reset_ops; + data->rcdev.nr_resets = ARRAY_SIZE(tn48m_resets); + data->rcdev.of_node = pdev->dev.of_node; + + return devm_reset_controller_register(&pdev->dev, &data->rcdev); +} + +static const struct of_device_id tn48m_reset_of_match[] = { + { .compatible = "delta,tn48m-reset" }, + { } +}; +MODULE_DEVICE_TABLE(of, tn48m_reset_of_match); + +static struct platform_driver tn48m_reset_driver = { + .driver = { + .name = "delta-tn48m-reset", + .of_match_table = tn48m_reset_of_match, + }, + .probe = tn48m_reset_probe, +}; +module_platform_driver(tn48m_reset_driver); + +MODULE_AUTHOR("Robert Marko "); +MODULE_DESCRIPTION("Delta TN48M CPLD reset driver"); +MODULE_LICENSE("GPL"); From patchwork Mon Jan 31 13:30:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 539141 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 9A915C4332F for ; Mon, 31 Jan 2022 13:31:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378947AbiAaNbI (ORCPT ); Mon, 31 Jan 2022 08:31:08 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51632 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378903AbiAaNbH (ORCPT ); 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[94.253.144.81]) by smtp.googlemail.com with ESMTPSA id c22sm13094334eds.72.2022.01.31.05.31.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 05:31:05 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, brgl@bgdev.pl, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh@kernel.org, skhan@linuxfoundation.org Cc: luka.perkov@sartura.hr, Robert Marko Subject: [PATCH v10 5/6] dt-bindings: mfd: Add Delta TN48M CPLD drivers bindings Date: Mon, 31 Jan 2022 14:30:48 +0100 Message-Id: <20220131133049.77780-6-robert.marko@sartura.hr> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220131133049.77780-1-robert.marko@sartura.hr> References: <20220131133049.77780-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add binding documents for the Delta TN48M CPLD drivers. Signed-off-by: Robert Marko --- Changes in v7: * Update bindings to reflect driver updates Changes in v3: * Include bindings for reset driver Changes in v2: * Implement MFD as a simple I2C MFD * Add GPIO bindings as separate --- .../bindings/gpio/delta,tn48m-gpio.yaml | 39 ++++++++ .../bindings/mfd/delta,tn48m-cpld.yaml | 90 +++++++++++++++++++ .../bindings/reset/delta,tn48m-reset.yaml | 35 ++++++++ 3 files changed, 164 insertions(+) create mode 100644 Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml create mode 100644 Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml create mode 100644 Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml diff --git a/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml b/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml new file mode 100644 index 000000000000..e3e668a12091 --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml @@ -0,0 +1,39 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/delta,tn48m-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD GPIO controller + +maintainers: + - Robert Marko + +description: | + This module is part of the Delta TN48M multi-function device. For more + details see ../mfd/delta,tn48m-cpld.yaml. + + Delta TN48M has an onboard Lattice CPLD that is used as an GPIO expander. + It provides 12 pins in total, they are input-only or ouput-only type. + +properties: + compatible: + enum: + - delta,tn48m-gpo + - delta,tn48m-gpi + + reg: + maxItems: 1 + + "#gpio-cells": + const: 2 + + gpio-controller: true + +required: + - compatible + - reg + - "#gpio-cells" + - gpio-controller + +additionalProperties: false diff --git a/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml new file mode 100644 index 000000000000..f6967c1f6235 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/delta,tn48m-cpld.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD controller + +maintainers: + - Robert Marko + +description: | + Lattice CPLD onboard the TN48M switches is used for system + management. + + It provides information about the hardware model, revision, + PSU status etc. + + It is also being used as a GPIO expander and reset controller + for the switch MAC-s and other peripherals. + +properties: + compatible: + const: delta,tn48m-cpld + + reg: + description: + I2C device address. + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 0 + +required: + - compatible + - reg + - "#address-cells" + - "#size-cells" + +patternProperties: + "^gpio(@[0-9a-f]+)?$": + $ref: ../gpio/delta,tn48m-gpio.yaml + + "^reset-controller?$": + $ref: ../reset/delta,tn48m-reset.yaml + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + cpld@41 { + compatible = "delta,tn48m-cpld"; + reg = <0x41>; + #address-cells = <1>; + #size-cells = <0>; + + gpio@31 { + compatible = "delta,tn48m-gpo"; + reg = <0x31>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@3a { + compatible = "delta,tn48m-gpi"; + reg = <0x3a>; + gpio-controller; + #gpio-cells = <2>; + }; + + gpio@40 { + compatible = "delta,tn48m-gpi"; + reg = <0x40>; + gpio-controller; + #gpio-cells = <2>; + }; + + reset-controller { + compatible = "delta,tn48m-reset"; + #reset-cells = <1>; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml b/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml new file mode 100644 index 000000000000..0e5ee8decc0d --- /dev/null +++ b/Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml @@ -0,0 +1,35 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/reset/delta,tn48m-reset.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Delta Networks TN48M CPLD reset controller + +maintainers: + - Robert Marko + +description: | + This module is part of the Delta TN48M multi-function device. For more + details see ../mfd/delta,tn48m-cpld.yaml. + + Reset controller modules provides resets for the following: + * 88F7040 SoC + * 88F6820 SoC + * 98DX3265 switch MAC-s + * 88E1680 PHY-s + * 88E1512 PHY + * PoE PSE controller + +properties: + compatible: + const: delta,tn48m-reset + + "#reset-cells": + const: 1 + +required: + - compatible + - "#reset-cells" + +additionalProperties: false From patchwork Mon Jan 31 13:30:49 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Marko X-Patchwork-Id: 538567 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5F8DCC433EF for ; Mon, 31 Jan 2022 13:31:21 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1378959AbiAaNbT (ORCPT ); Mon, 31 Jan 2022 08:31:19 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51654 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1378929AbiAaNbI (ORCPT ); Mon, 31 Jan 2022 08:31:08 -0500 Received: from mail-ej1-x636.google.com (mail-ej1-x636.google.com [IPv6:2a00:1450:4864:20::636]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 92545C061401 for ; Mon, 31 Jan 2022 05:31:08 -0800 (PST) Received: by mail-ej1-x636.google.com with SMTP id me13so43197213ejb.12 for ; Mon, 31 Jan 2022 05:31:08 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sartura-hr.20210112.gappssmtp.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=EX1odtfBD4UedrnN227KhfFXE8Bgba6hkIYrQUe1h0c=; b=SaRoAOB60fsaYmCYxnDhOhUmgArcJAUmxxaIREj9H0tWnfFrc0K69d6r7xb0n1F0HG I1/xGvQFbTXcHKZH7k+qlklRSNjMmT+M+zrH/Ys3GUvpJx/t7nqBrM+MGO9pPqDINgsp WL83o3Q3hSFFQ7hv/PuzKhDjwREeLjiIw5FqU22/c2ybPITahRsBuItAtnKPJCw9nTJ+ kNWoSnBA6iKT0lXxKKYLLN/UQmn/RF+UBZAAl/Raq4yWUioTB2K/u1F54gx6pD2orfVI g14WieqToWSe/7bUskYnF2O13Be1jvjncBbsPel3KKQoKXybewEst+VP9HbFKc0DsJjm RxwQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=EX1odtfBD4UedrnN227KhfFXE8Bgba6hkIYrQUe1h0c=; b=FT11niqk8fdPPmCiMCb1bigYEk+MkyEtIoFj24ck4KA7msWkjMLy3HVMahLbuvEeMt QwHesB/0bxWK4HbqQLfRstHcVpxiG7ZvLgsI/gZOU38JcmZ/TbOhHEoc5nXwPZW2EJJh WxZZHsEpUsNCgAQXQXYAYe9vqwIhT+rxLHs90HneMB2of1iPVKSIia68MnyN+angqv8U CIuvHYt5eWyb2HdnujO8iqgAUkCiqJEmuByKIyNsAeNBO02f0i+3adOOxa9jskq4sk/b WGg2L4uS4Pbcb9S3TTXJT6CoFaCiubcltrAYbP+Q4+wMfEwa2G33aP+NLQG5PXE5DDuF 0+2g== X-Gm-Message-State: AOAM532433o2K28D3EK5e9KhJf12Nwuu2teJNMKaYETr0G1xh9vbW1ey 7o4bZyss1R9z3MP38Xg+/zQ/tw== X-Google-Smtp-Source: ABdhPJzW4MoF2pfKGlg67rKihTtzC/z3fiEclnw0I+2kvgjX/tG02DgcGw/9c68+Bz7XbmrgfuECGg== X-Received: by 2002:a17:906:6a05:: with SMTP id qw5mr17223317ejc.90.1643635867155; Mon, 31 Jan 2022 05:31:07 -0800 (PST) Received: from fedora.robimarko.hr (cpezg-94-253-144-81-cbl.xnet.hr. [94.253.144.81]) by smtp.googlemail.com with ESMTPSA id c22sm13094334eds.72.2022.01.31.05.31.05 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 31 Jan 2022 05:31:06 -0800 (PST) From: Robert Marko To: linus.walleij@linaro.org, brgl@bgdev.pl, robh+dt@kernel.org, lee.jones@linaro.org, p.zabel@pengutronix.de, linux-gpio@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, robh@kernel.org, skhan@linuxfoundation.org Cc: luka.perkov@sartura.hr, Robert Marko Subject: [PATCH v10 6/6] MAINTAINERS: Add Delta Networks TN48M CPLD drivers Date: Mon, 31 Jan 2022 14:30:49 +0100 Message-Id: <20220131133049.77780-7-robert.marko@sartura.hr> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220131133049.77780-1-robert.marko@sartura.hr> References: <20220131133049.77780-1-robert.marko@sartura.hr> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-gpio@vger.kernel.org Add maintainers entry for the Delta Networks TN48M CPLD MFD drivers. Signed-off-by: Robert Marko --- Changes in v3: * Add reset driver documentation Changes in v2: * Drop no more existing files --- MAINTAINERS | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ea3e6c914384..04baac692330 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -5488,6 +5488,15 @@ S: Maintained F: Documentation/hwmon/dps920ab.rst F: drivers/hwmon/pmbus/dps920ab.c +DELTA NETWORKS TN48M CPLD DRIVERS +M: Robert Marko +S: Maintained +F: Documentation/devicetree/bindings/gpio/delta,tn48m-gpio.yaml +F: Documentation/devicetree/bindings/mfd/delta,tn48m-cpld.yaml +F: Documentation/devicetree/bindings/reset/delta,tn48m-reset.yaml +F: drivers/gpio/gpio-tn48m.c +F: include/dt-bindings/reset/delta,tn48m-reset.h + DENALI NAND DRIVER L: linux-mtd@lists.infradead.org S: Orphan