From patchwork Wed Nov 28 19:16:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 152342 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1481266ljp; Wed, 28 Nov 2018 11:17:01 -0800 (PST) X-Google-Smtp-Source: AJdET5enI1qMuKAVrHzB0kgPohSeU8brMdte181k/abqbu8Es3l+7MC7edQbtPFEvoXzjaAgwPuK X-Received: by 2002:a62:b2c3:: with SMTP id z64mr38330396pfl.120.1543432621438; Wed, 28 Nov 2018 11:17:01 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543432621; cv=none; d=google.com; s=arc-20160816; b=r+2jSXMslCshUeLa7Ghfv28m01ZRPIaYsLqZ6XwTBuWFJC92W/UE6Zc2BRZmlCkcUy Tqao3orc+KNW1abE16QhwHXoH3cFSfJxciLmW8FC8x3xUCJYsmJbhTc02VDXBlGcszWy RGgmyvucz7F6hq3kfEOcGH70UsM85+IICNFOAJityg5RH6l8wXf48jZGRskZr6gHfYs2 Y6djL4FO2DKbZ9smzcny/R/gQeCk/beF9qLiBOShAj0Jr2B1GRz0DV+8lNTmseoUkQKA MhrGBofP2IvNDgFIpwV2Wif5Bh6LZa6mZsKyIQE6NOUfCbef37HuEGM2AJSTcW9ZOZqS WPcw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:dkim-signature:delivered-to; bh=sj+gtULgX2A+E9dC3wPO8OqCSFA9fE7YxeE4FyBVvQ8=; b=k0dYqAguR2U6dMg5yGouSENBUj1s03B+0W1+q88/3rodyKKnibC30bWZGaoW9RyBhi YXG8weuSfnmSFWneQJDQHcAiSlJN/QjpgjpyRaM2aaeEbWlkBeXX2e5r4a4m6XIjMWOP 8VfMJVpVxk12OKCCLgEMQxZUtcUZShLndU7BlhQOJphK8pVv1iOCGQPLYTnuKPLaL0tF 4sXPCwgZTbCaCuuhrQx0WMtdzaJBE8w8k6dIQz1LgyMFXLM6F68EjEhUaZ13I7Qpd1XC hU3F1AOpvIwuBxYLTg5Mfjvcl02D6pXqjALfzkUMzHC43vtxYmsPm7uPxbJZBv6EDUXq ZXZg== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=eglo64md; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. [198.145.21.10]) by mx.google.com with ESMTPS id p64si9195147pfg.79.2018.11.28.11.17.01 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 11:17:01 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) client-ip=198.145.21.10; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=eglo64md; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 198.145.21.10 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 6C90921196220; Wed, 28 Nov 2018 11:17:00 -0800 (PST) X-Original-To: edk2-devel@lists.01.org Delivered-To: edk2-devel@lists.01.org Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=2a00:1450:4864:20::444; helo=mail-wr1-x444.google.com; envelope-from=ard.biesheuvel@linaro.org; receiver=edk2-devel@lists.01.org Received: from mail-wr1-x444.google.com (mail-wr1-x444.google.com [IPv6:2a00:1450:4864:20::444]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 9086321A02937 for ; Wed, 28 Nov 2018 11:16:58 -0800 (PST) Received: by mail-wr1-x444.google.com with SMTP id j10so27462703wru.4 for ; Wed, 28 Nov 2018 11:16:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=3LcTY6BHxmwlSdVt5d+w6c8AXsD4V4klKyBvu/ZB/3I=; b=eglo64mdpK1R2gQ+YybGWphhjT6vxXM7LbXqJpKEch7JlWii5TvdFKMEuE1SDs4p8k di0s77ttC4mn8pgTQ4qeJ378BJV4Vn/xj6R/p75NODycp9bAvzFzJjQbVrnERXMUmTOC WBIvYMaiU3+0fl2QQuMobPXpvh7BGYPB2JwAY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=3LcTY6BHxmwlSdVt5d+w6c8AXsD4V4klKyBvu/ZB/3I=; b=ReA3r0nRb7OBZkR+bJ8a/QkM29qW0bchIyroBQNRJSusQaNnQ77rp6K0zCLYH9C+Fc rUdxdjEirR1qZJ0W3+UtSoIM059k+RWun4Oe45/0q3qHnbE/6lFfwC14GDGXqUZ1z1YW pecKYWMysXnQjvHlwjIbxtrtCeFQ1MLj4jYpBpu2KE/sWRWsfiROdshhGAfErdI4juwf mTv8lg9aAZvPc7o2ak1BjEnAMKE3NgNoYyw2Pti70h0k7UupF7vqkFsFvjkbtGtfJGXz 6mnAAEiAihjpEiRYCE/oDet7jiukGOCZ6v0rP+uEgg6qltCGFEXTgjKxiiDuAH3M4LCR eYdw== X-Gm-Message-State: AA+aEWbeasT6744I2aqwf5vhHe8DoN/cRnq4iO1trvLCfw6pYceTD+Ly mmjeM9HgBGLMM0b9T0DURKBKcI01RqI= X-Received: by 2002:a5d:4303:: with SMTP id h3mr28581512wrq.273.1543432616768; Wed, 28 Nov 2018 11:16:56 -0800 (PST) Received: from harold.home ([2a01:cb1d:112:6f00:296f:238b:c20d:3626]) by smtp.gmail.com with ESMTPSA id b18sm6273104wrr.43.2018.11.28.11.16.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Nov 2018 11:16:55 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 28 Nov 2018 20:16:45 +0100 Message-Id: <20181128191646.31526-2-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181128191646.31526-1-ard.biesheuvel@linaro.org> References: <20181128191646.31526-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [edk2] [RFC PATCH 1/2] ArmVirtPkg/NorFlashQemuLib: disregard our primary FV X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" The primary FV contains the firmware boot image, which is not runtime updatable in our case. So exposing it to the NOR flash driver is undesirable, since it may attempt to modify the NOR flash contents. It is also rather pointless, since we don't keep anything there that we don't already expose via the FVB protocol instances that DXE core creates for us based on the FV HOBs (and so there is nothing the partition or file system drivers could potentially attach to via the block I/O and disk I/O protocol instances that the NOR flash driver creates) So let's disregard the NOR flash block that covers the primary FV. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf | 5 +++++ ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c | 13 +++++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) -- 2.19.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf b/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf index d86ff36dbd58..c5752a243e6b 100644 --- a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf +++ b/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.inf @@ -28,6 +28,7 @@ [Sources.common] [Packages] MdePkg/MdePkg.dec ArmPlatformPkg/ArmPlatformPkg.dec + ArmPkg/ArmPkg.dec ArmVirtPkg/ArmVirtPkg.dec [LibraryClasses] @@ -40,3 +41,7 @@ [Protocols] [Depex] gFdtClientProtocolGuid + +[Pcd] + gArmTokenSpaceGuid.PcdFvBaseAddress + gArmTokenSpaceGuid.PcdFvSize diff --git a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c b/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c index 2678f57eaaad..72b47bdb5a78 100644 --- a/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c +++ b/ArmVirtPkg/Library/NorFlashQemuLib/NorFlashQemuLib.c @@ -75,13 +75,22 @@ NorFlashPlatformGetDevices ( Size = SwapBytes64 (ReadUnaligned64 ((VOID *)&Reg[2])); Reg += 4; + PropSize -= 4 * sizeof (UINT32); + + // + // Disregard any flash devices that overlap with the primary FV. + // The firmware is not updatable from inside the guest anyway. + // + if ((PcdGet64 (PcdFvBaseAddress) + PcdGet32 (PcdFvSize) >= Base) && + (Base + Size) >= PcdGet64 (PcdFvBaseAddress)) { + continue; + } + mNorFlashDevices[Num].DeviceBaseAddress = (UINTN)Base; mNorFlashDevices[Num].RegionBaseAddress = (UINTN)Base; mNorFlashDevices[Num].Size = (UINTN)Size; mNorFlashDevices[Num].BlockSize = QEMU_NOR_BLOCK_SIZE; Num++; - - PropSize -= 4 * sizeof (UINT32); } } From patchwork Wed Nov 28 19:16:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 152343 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp1481301ljp; Wed, 28 Nov 2018 11:17:04 -0800 (PST) X-Google-Smtp-Source: AFSGD/UZSNLrzwX5YqL+VS9niU2A9vVP2lCN5laYT38dNjpk21J0RzQbhhw4u994HuiyRv3Qxo6j X-Received: by 2002:a63:4a0a:: with SMTP id x10mr34107798pga.237.1543432624263; Wed, 28 Nov 2018 11:17:04 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543432624; cv=none; d=google.com; s=arc-20160816; b=xPWwHdysYFJG/V3RVReW6SNnDZCa9tY6q9PNFqh+SfBmOqKGouqFWN5mQTTEoyMfxp UsdDFATyxtRkcJWV9hRebi3WeD4PylOSHqORu+qaYzpY6Arfo6k3HfvlG/IWfTOQZ6SW jGNZ0rkIE7Q3EqzKKbFYf5OsM7kn/5Hw7xV1BX2AKrgJHhmK3WdZWzccHqBHwYY9MbjA Bk8YYzxW0CK8s0YtqmfjmRagusyaCHUONWEtCY+NZackGjdRdP4ObTcjE1orcQ8EKajt 7RVs11WCGQOOi1IreDjMA24g1d/j7rOaOQZNOdhiFbVVuSU75j+Tr+TseKD+tWl58sYd aKhg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:cc:list-subscribe :list-help:list-post:list-archive:list-unsubscribe:list-id :precedence:subject:mime-version:references:in-reply-to:message-id :date:to:from:dkim-signature:delivered-to; bh=NKXPAoQA68u99/SJkKCY1ihQWT2+yRs562OjGmpgvhM=; b=kXqKy4OIJYh9uMGDhJskdcIAvH8Z+6YLDBKhQmLqZ4yNi8FTHoY+h71lvJxADcnBbu vLu/jWMSk8zHf3M9rGZdtiShwzrxb4CtZ+YULwd8gG5KrvUhmlJMHU+SlbyuVYLyeV8g nJ+JHZJ/vWBYn3hZZU7s2gwUs+tdV9gB9QW/DzKK9OMziZlM2a+kycWOXpZsXu5N7Z0U 5FBImAfkhlFlkdZ3mAeaFBPUTyEqIQaKWRz4LVL+JZDUPReCUJFWeov98PnTcNwD6KHq XsBdzaKJCixa9KxNCnvgi1ImeNuYsJaw8YgVnU7GEcmPcBwbGwKBaqGNwcajXyMwWcyk Q/gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org header.s=google header.b=MGPlsPQk; spf=pass (google.com: best guess record for domain of edk2-devel-bounces@lists.01.org designates 2001:19d0:306:5::1 as permitted sender) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from ml01.01.org (ml01.01.org. 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Wed, 28 Nov 2018 11:16:57 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 28 Nov 2018 20:16:46 +0100 Message-Id: <20181128191646.31526-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.1 In-Reply-To: <20181128191646.31526-1-ard.biesheuvel@linaro.org> References: <20181128191646.31526-1-ard.biesheuvel@linaro.org> MIME-Version: 1.0 Subject: [edk2] [RFC PATCH 2/2] ArmVirtPkg/QemuVirtMemInfoLib: trim the MMIO region mapping X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jones , Laszlo Ersek Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" QEMU/mach-virt is rather unhelpful when it comes to tracking down NULL pointer dereferences that occur while running in UEFI: since we have NOR flash mapped at address 0x0, inadvertent reads go unnoticed, and even most writes are silently dropped, unless you're unlucky and the instruction in question is one that KVM cannot emulate, in which case you end up with a QEMU crash like this: error: kvm run failed Function not implemented PC=000000013f7ff804 X00=000000013f7ab108 X01=0000000000000064 X02=000000013f801988 X03=00000000800003c4 X04=0000000000000000 X05=0000000096000044 X06=fffffffffffd8270 X07=000000013f7ab4a0 X08=0000000000000001 X09=000000013f803b88 X10=000000013f7e88d0 X11=0000000000000009 X12=000000013f7ab554 X13=0000000000000008 X14=0000000000000002 X15=0000000000000000 X16=0000000000000000 X17=0000000000000000 X18=0000000000000000 X19=0000000000000000 X20=000000013f81c000 X21=000000013f7ab170 X22=000000013f81c000 X23=0000000009000018 X24=000000013f407020 X25=000000013f81c000 X26=000000013f803530 X27=000000013f802000 X28=000000013f7ab270 X29=000000013f7ab0d0 X30=000000013f7fee10 SP=000000013f7a6f30 PSTATE=800003c5 N--- EL1h and a warning in the host kernel log that load/store instruction decoding is not supported by KVM. Given that the first page of the flash device is not actually used anyway, let's reduce the mappings of the peripheral space and the flash device (both of which cover page #0) to only cover what is actually required. After this change, any inadvertent read or write from/to the first physical page will trigger a translation fault inside the guest, regardless of the nature of the instruction, without crashing QEMU. Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Ard Biesheuvel --- ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf | 4 ++-- ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf | 2 ++ ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c | 18 +++++++++++------- 3 files changed, 15 insertions(+), 9 deletions(-) -- 2.19.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf index 5c5b841051ad..b6abc52531a8 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.inf @@ -39,9 +39,9 @@ [LibraryClasses] PcdLib [Pcd] - gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdFvBaseAddress gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize [FixedPcd] - gArmTokenSpaceGuid.PcdFdSize + gArmTokenSpaceGuid.PcdFvSize diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf index d12089760b22..16802c5c414b 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoPeiLib.inf @@ -43,9 +43,11 @@ [LibraryClasses] [Pcd] gArmTokenSpaceGuid.PcdFdBaseAddress + gArmTokenSpaceGuid.PcdFvBaseAddress gArmTokenSpaceGuid.PcdSystemMemoryBase gArmTokenSpaceGuid.PcdSystemMemorySize [FixedPcd] gArmTokenSpaceGuid.PcdFdSize + gArmTokenSpaceGuid.PcdFvSize gArmVirtTokenSpaceGuid.PcdDeviceTreeInitialBaseAddress diff --git a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c index 0285a11b1d77..0818d0b42d6c 100644 --- a/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c +++ b/ArmVirtPkg/Library/QemuVirtMemInfoLib/QemuVirtMemInfoLib.c @@ -21,6 +21,10 @@ // Number of Virtual Memory Map Descriptors #define MAX_VIRTUAL_MEMORY_MAP_DESCRIPTORS 5 +// mach-virt's 'miscellaneous device I/O' region +#define MACH_VIRT_PERIPH_BASE 0x08000000 +#define MACH_VIRT_PERIPH_SIZE SIZE_128MB + /** Return the Virtual Memory Map of your platform @@ -66,16 +70,16 @@ ArmVirtGetMemoryMap ( VirtualMemoryTable[0].VirtualBase, VirtualMemoryTable[0].Length)); - // Peripheral space before DRAM - VirtualMemoryTable[1].PhysicalBase = 0x0; - VirtualMemoryTable[1].VirtualBase = 0x0; - VirtualMemoryTable[1].Length = VirtualMemoryTable[0].PhysicalBase; + // Memory mapped peripherals (UART, RTC, GIC, virtio-mmio, etc) + VirtualMemoryTable[1].PhysicalBase = MACH_VIRT_PERIPH_BASE; + VirtualMemoryTable[1].VirtualBase = MACH_VIRT_PERIPH_BASE; + VirtualMemoryTable[1].Length = MACH_VIRT_PERIPH_SIZE; VirtualMemoryTable[1].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_DEVICE; - // Remap the FD region as normal executable memory - VirtualMemoryTable[2].PhysicalBase = PcdGet64 (PcdFdBaseAddress); + // Map the FV region as normal executable memory + VirtualMemoryTable[2].PhysicalBase = PcdGet64 (PcdFvBaseAddress); VirtualMemoryTable[2].VirtualBase = VirtualMemoryTable[2].PhysicalBase; - VirtualMemoryTable[2].Length = FixedPcdGet32 (PcdFdSize); + VirtualMemoryTable[2].Length = FixedPcdGet32 (PcdFvSize); VirtualMemoryTable[2].Attributes = ARM_MEMORY_REGION_ATTRIBUTE_WRITE_BACK; // End of Table