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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.08 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:09 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 01/27] PM / Domains: Add generic data pointer to genpd_power_state struct Date: Thu, 29 Nov 2018 18:46:34 +0100 Message-Id: <20181129174700.16585-2-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> Let's add a data pointer to the genpd_power_state struct, to allow a genpd backend driver to store per state specific data. In order to introduce the pointer, we also need to adopt how genpd frees the allocated data for the default genpd_power_state struct, that it may allocate at pm_genpd_init(). More precisely, let's use an internal genpd flag to understand when the states needs to be freed by genpd. When freeing the states data in genpd_remove(), let's also clear the corresponding genpd->states pointer and reset the genpd->state_count. In this way, a genpd backend driver becomes aware of when there is state specific data for it to free. Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v10: - Update the patch allow backend drivers to free the states specific data during genpd removal. Due to this added complexity, I decided to keep the patch separate, rather than fold it into the patch that makes use of the new void pointer, which was suggested by Rafael. - Claim authorship of the patch as lots of changes has been done since the original pick up from Lina Iyer. --- drivers/base/power/domain.c | 8 ++++++-- include/linux/pm_domain.h | 3 ++- 2 files changed, 8 insertions(+), 3 deletions(-) -- 2.17.1 diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index 7f38a92b444a..e27b91d36a2a 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c @@ -1620,7 +1620,7 @@ static int genpd_set_default_power_state(struct generic_pm_domain *genpd) genpd->states = state; genpd->state_count = 1; - genpd->free = state; + genpd->free_state = true; return 0; } @@ -1736,7 +1736,11 @@ static int genpd_remove(struct generic_pm_domain *genpd) list_del(&genpd->gpd_list_node); genpd_unlock(genpd); cancel_work_sync(&genpd->power_off_work); - kfree(genpd->free); + if (genpd->free_state) { + kfree(genpd->states); + genpd->states = NULL; + genpd->state_count = 0; + } pr_debug("%s: removed %s\n", __func__, genpd->name); return 0; diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index 3b5d7280e52e..f9e09bd4152c 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -69,6 +69,7 @@ struct genpd_power_state { s64 residency_ns; struct fwnode_handle *fwnode; ktime_t idle_time; + void *data; }; struct genpd_lock_ops; @@ -110,7 +111,7 @@ struct generic_pm_domain { struct genpd_power_state *states; unsigned int state_count; /* number of states */ unsigned int state_idx; /* state that genpd will go to when off */ - void *free; /* Free the state that was allocated for default */ + bool free_state; /* Free the state that was allocated for default */ ktime_t on_time; ktime_t accounting_time; const struct genpd_lock_ops *lock_ops; From patchwork Thu Nov 29 17:46:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152427 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2671951ljp; Thu, 29 Nov 2018 09:47:12 -0800 (PST) X-Received: by 2002:a2e:5854:: with SMTP id x20-v6mr1681072ljd.31.1543513632272; Thu, 29 Nov 2018 09:47:12 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513632; cv=none; d=google.com; s=arc-20160816; b=xtTIojQPtbdRk3vJbEgoJUJhQNdfBSxtilzTlyN1Zng/c30FxZ3ahzAjU/M9r868OR wJoNhZE1uf9wlJSxx6YR/bW0nPZ2ZYD1gVdbp9MT+T//aUQvjamx0F9WGoopAolIG7Fc qBSnl4/ESWjpEasjnXYIZx9PKgMQLDtehPeNmWz9BakK7n6ORtdu3vytmq9DYDq1waeF 6KdwS6b+6dQGvE3pKIAvlzCVNtcZbfPxF6nvQAU2iLiIidHVI3EEgLk6C11yRiAouRM0 /0Ue664iEWosirv46aOXV01MX0d4w3lgbBUf9kqhbL+N35PO71Cj99Lqvh21ts9vo6+t D+cA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ugu70vqPSlvoBLQ0yLsWszKKKu9c1+r7G0LXkXDasSo=; b=oI3UPEICVzky6/h1vqg2oJ/hHtFoLih5/xTvxDi47F90vboai03GS7FCnxwuRDtTV6 DRPnMycGWTQLjVMfDNPTCMVsMdNXLu5mFtF8PsBuMu5cUb1QDfLfSvweCr3N5wvv+41z WzjCHc3S6Q/W5QLf0r3ywMxFdjlZ39W4UfvXZ3tMGKUadBdB6WdtyYZy1L9wiQCnB2fG /hggo6dYopOI500s9jTokfcWgze9dtuJZSUQbTYOmgouuPIbKsY442s9MX2TcYTVUbE7 z7VAgkw6wCxkxbvaCJOBGcgpN/sK0H9ge4KFk+tdI1FnkjiX5k04qzH8/bbwhxOOyaiD BE3g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=J809RAX0; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:11 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 02/27] PM / Domains: Add support for CPU devices to genpd Date: Thu, 29 Nov 2018 18:46:35 +0100 Message-Id: <20181129174700.16585-3-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> To enable a device belonging to a CPU to be attached to a PM domain managed by genpd, let's do a few changes to it, as to make it convenient to manage the specifics around CPUs. To be able to quickly find out what CPUs that are attached to a genpd, which typically becomes useful from a genpd governor as following changes is about to show, let's add a cpumask to the struct generic_pm_domain. At the point when a CPU device gets attached to a genpd, let's update its cpumask. Moreover, let's also propagate changes to the cpumask upwards in the topology to the master PM domains. In this way, the cpumask for a genpd hierarchically reflects all CPUs attached to the topology below it. Finally, let's make this an opt-in feature, to avoid having to manage CPUs and the cpumask for a genpd that doesn't need it. For that reason, let's add a new genpd configuration bit, GENPD_FLAG_CPU_DOMAIN. Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v10: - Don't allocate the cpumask when not used. - Simplify the code that updates the cpumask. - Document the GENPD_FLAG_CPU_DOMAIN. --- drivers/base/power/domain.c | 66 ++++++++++++++++++++++++++++++++++++- include/linux/pm_domain.h | 13 ++++++++ 2 files changed, 78 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c index e27b91d36a2a..c3ff8e395308 100644 --- a/drivers/base/power/domain.c +++ b/drivers/base/power/domain.c @@ -20,6 +20,7 @@ #include #include #include +#include #include "power.h" @@ -126,6 +127,7 @@ static const struct genpd_lock_ops genpd_spin_ops = { #define genpd_is_irq_safe(genpd) (genpd->flags & GENPD_FLAG_IRQ_SAFE) #define genpd_is_always_on(genpd) (genpd->flags & GENPD_FLAG_ALWAYS_ON) #define genpd_is_active_wakeup(genpd) (genpd->flags & GENPD_FLAG_ACTIVE_WAKEUP) +#define genpd_is_cpu_domain(genpd) (genpd->flags & GENPD_FLAG_CPU_DOMAIN) static inline bool irq_safe_dev_in_no_sleep_domain(struct device *dev, const struct generic_pm_domain *genpd) @@ -1377,6 +1379,56 @@ static void genpd_free_dev_data(struct device *dev, dev_pm_put_subsys_data(dev); } +static void __genpd_update_cpumask(struct generic_pm_domain *genpd, + int cpu, bool set, unsigned int depth) +{ + struct gpd_link *link; + + if (!genpd_is_cpu_domain(genpd)) + return; + + list_for_each_entry(link, &genpd->slave_links, slave_node) { + struct generic_pm_domain *master = link->master; + + genpd_lock_nested(master, depth + 1); + __genpd_update_cpumask(master, cpu, set, depth + 1); + genpd_unlock(master); + } + + if (set) + cpumask_set_cpu(cpu, genpd->cpus); + else + cpumask_clear_cpu(cpu, genpd->cpus); +} + +static void genpd_update_cpumask(struct generic_pm_domain *genpd, + struct device *dev, bool set) +{ + int cpu; + + if (!genpd_is_cpu_domain(genpd)) + return; + + for_each_possible_cpu(cpu) { + if (get_cpu_device(cpu) == dev) { + __genpd_update_cpumask(genpd, cpu, set, 0); + return; + } + } +} + +static void genpd_set_cpumask(struct generic_pm_domain *genpd, + struct device *dev) +{ + genpd_update_cpumask(genpd, dev, true); +} + +static void genpd_clear_cpumask(struct generic_pm_domain *genpd, + struct device *dev) +{ + genpd_update_cpumask(genpd, dev, false); +} + static int genpd_add_device(struct generic_pm_domain *genpd, struct device *dev, struct gpd_timing_data *td) { @@ -1398,6 +1450,8 @@ static int genpd_add_device(struct generic_pm_domain *genpd, struct device *dev, if (ret) goto out; + genpd_set_cpumask(genpd, dev); + dev_pm_domain_set(dev, &genpd->domain); genpd->device_count++; @@ -1459,6 +1513,7 @@ static int genpd_remove_device(struct generic_pm_domain *genpd, if (genpd->detach_dev) genpd->detach_dev(genpd, dev); + genpd_clear_cpumask(genpd, dev); dev_pm_domain_set(dev, NULL); list_del_init(&pdd->list_node); @@ -1686,11 +1741,18 @@ int pm_genpd_init(struct generic_pm_domain *genpd, if (genpd_is_always_on(genpd) && !genpd_status_on(genpd)) return -EINVAL; + if (genpd_is_cpu_domain(genpd) && + !zalloc_cpumask_var(&genpd->cpus, GFP_KERNEL)) + return -ENOMEM; + /* Use only one "off" state if there were no states declared */ if (genpd->state_count == 0) { ret = genpd_set_default_power_state(genpd); - if (ret) + if (ret) { + if (genpd_is_cpu_domain(genpd)) + free_cpumask_var(genpd->cpus); return ret; + } } else if (!gov) { pr_warn("%s : no governor for states\n", genpd->name); } @@ -1736,6 +1798,8 @@ static int genpd_remove(struct generic_pm_domain *genpd) list_del(&genpd->gpd_list_node); genpd_unlock(genpd); cancel_work_sync(&genpd->power_off_work); + if (genpd_is_cpu_domain(genpd)) + free_cpumask_var(genpd->cpus); if (genpd->free_state) { kfree(genpd->states); genpd->states = NULL; diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index f9e09bd4152c..5a4673605d22 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -16,6 +16,7 @@ #include #include #include +#include /* * Flags to control the behaviour of a genpd. @@ -42,11 +43,22 @@ * GENPD_FLAG_ACTIVE_WAKEUP: Instructs genpd to keep the PM domain powered * on, in case any of its attached devices is used * in the wakeup path to serve system wakeups. + * + * GENPD_FLAG_CPU_DOMAIN: Instructs genpd that it should expect to get + * devices attached, which may belong to CPUs or + * possibly have subdomains with CPUs attached. + * This flag enables the genpd backend driver to + * deploy idle power management support for CPUs + * and groups of CPUs. Note that, the backend + * driver must then comply with the so called, + * last-man-standing algorithm, for the CPUs in the + * PM domain. */ #define GENPD_FLAG_PM_CLK (1U << 0) #define GENPD_FLAG_IRQ_SAFE (1U << 1) #define GENPD_FLAG_ALWAYS_ON (1U << 2) #define GENPD_FLAG_ACTIVE_WAKEUP (1U << 3) +#define GENPD_FLAG_CPU_DOMAIN (1U << 4) enum gpd_status { GPD_STATE_ACTIVE = 0, /* PM domain is active */ @@ -93,6 +105,7 @@ struct generic_pm_domain { unsigned int suspended_count; /* System suspend device counter */ unsigned int prepared_count; /* Suspend counter of prepared devices */ unsigned int performance_state; /* Aggregated max performance state */ + cpumask_var_t cpus; /* A cpumask of the attached CPUs */ int (*power_off)(struct generic_pm_domain *domain); int (*power_on)(struct generic_pm_domain *domain); unsigned int (*opp_to_performance_state)(struct generic_pm_domain *genpd, From patchwork Thu Nov 29 17:46:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152428 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2671988ljp; Thu, 29 Nov 2018 09:47:14 -0800 (PST) X-Received: by 2002:a19:c70a:: with SMTP id x10mr1627490lff.88.1543513634108; Thu, 29 Nov 2018 09:47:14 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513634; cv=none; d=google.com; s=arc-20160816; b=tGro9WjHfg+S3ueLVhqXhxRMrxRxE1n+RggT2vyuA/ag14hU0YcmIJGeWxKtR+PLcv 7ncJ+qLdt4ryqrrUMbBYl6AaHTYMXt/+xqV7uu6VzqH6KFofTQ9EuprEyJ/jHhxNyQ2i lOwMB806jfv0feeK/R5eGosiUQfmablNx4VnoM0ji53RvLDL1ab6a+UanekWxPmQ5TbB EGMo9GWnjt6GqzMXBpubFSD+sLcpJ3xHPXoSDpjDt919zkndKiCUu9fI9X7twiKAOfos E8L6IOk4GAidrrcP6EI5gSKqswKgasnutWojA2K5lJiQzHG4GXrJxb76jhESe7pNshsJ ewaQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=We8CaGvJmbhYNYzrL7xua655X98bhiXXYfxMtnIUbcg=; b=Z6zifB8O3eKB3AoOz1gezDfJGF5Lo+C5I3BAEIvFHoWWoV6cD6AvVJynUdVdjA529/ 08NiS1o5jUhLcAQAoJYy3QAbTJ5rQjJQGKtfBscwRdPB18XttlQEnV1QWhBRfs/FRPKU xgyeR/U5KOenVuXnE371YtBSCOOHgpOJm1ubY7MP1QXpS3j7NQSeRH8DgFjPVKeOe4CL yCrVaxNh4LrL1lnFMWJoyKaLeOHszyvmGG9SsX9uW33q3sCHjcR9UTkDJO362LDGdNf0 xrPTFpVLnefQLodj+KBjPe8d7FEF/HyoIZc9XVMSsOweSS/SEphKlYcLxYgTTL72NaFn 6aXw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="CxUDChM/"; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.12 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:13 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Lina Iyer , Thomas Gleixner , Frederic Weisbecker , Ingo Molnar Subject: [PATCH v10 03/27] timer: Export next wakeup time of a CPU Date: Thu, 29 Nov 2018 18:46:36 +0100 Message-Id: <20181129174700.16585-4-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> From: Lina Iyer Knowing the sleep duration of CPUs, is known to be needed while selecting the most energy efficient idle state for a CPU or a group of CPUs. However, to be able to compute the sleep duration, we need to know at what time the next expected wakeup is for the CPU. Therefore, let's export this information via a new function, tick_nohz_get_next_wakeup(). Following changes make use of it. Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Lina Iyer Cc: Frederic Weisbecker Cc: Ingo Molnar Signed-off-by: Lina Iyer Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson --- Changes in v10: - Updated function header of tick_nohz_get_next_wakeup(). --- include/linux/tick.h | 8 ++++++++ kernel/time/tick-sched.c | 13 +++++++++++++ 2 files changed, 21 insertions(+) -- 2.17.1 diff --git a/include/linux/tick.h b/include/linux/tick.h index 55388ab45fd4..e48f6b26b425 100644 --- a/include/linux/tick.h +++ b/include/linux/tick.h @@ -125,6 +125,7 @@ extern bool tick_nohz_idle_got_tick(void); extern ktime_t tick_nohz_get_sleep_length(ktime_t *delta_next); extern unsigned long tick_nohz_get_idle_calls(void); extern unsigned long tick_nohz_get_idle_calls_cpu(int cpu); +extern ktime_t tick_nohz_get_next_wakeup(int cpu); extern u64 get_cpu_idle_time_us(int cpu, u64 *last_update_time); extern u64 get_cpu_iowait_time_us(int cpu, u64 *last_update_time); @@ -151,6 +152,13 @@ static inline ktime_t tick_nohz_get_sleep_length(ktime_t *delta_next) *delta_next = TICK_NSEC; return *delta_next; } + +static inline ktime_t tick_nohz_get_next_wakeup(int cpu) +{ + /* Next wake up is the tick period, assume it starts now */ + return ktime_add(ktime_get(), TICK_NSEC); +} + static inline u64 get_cpu_idle_time_us(int cpu, u64 *unused) { return -1; } static inline u64 get_cpu_iowait_time_us(int cpu, u64 *unused) { return -1; } diff --git a/kernel/time/tick-sched.c b/kernel/time/tick-sched.c index 69e673b88474..7a9166506503 100644 --- a/kernel/time/tick-sched.c +++ b/kernel/time/tick-sched.c @@ -1089,6 +1089,19 @@ unsigned long tick_nohz_get_idle_calls(void) return ts->idle_calls; } +/** + * tick_nohz_get_next_wakeup - return the next wake up of the CPU + * @cpu: the particular CPU to get next wake up for + * + * Called for idle CPUs only. + */ +ktime_t tick_nohz_get_next_wakeup(int cpu) +{ + struct clock_event_device *dev = per_cpu(tick_cpu_device.evtdev, cpu); + + return dev->next_event; +} + static void tick_nohz_account_idle_ticks(struct tick_sched *ts) { #ifndef CONFIG_VIRT_CPU_ACCOUNTING_NATIVE From patchwork Thu Nov 29 17:46:37 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152429 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672036ljp; Thu, 29 Nov 2018 09:47:15 -0800 (PST) X-Received: by 2002:a19:2395:: with SMTP id j143mr1600834lfj.107.1543513635801; Thu, 29 Nov 2018 09:47:15 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513635; cv=none; d=google.com; s=arc-20160816; b=Hs3G3vqYpFR46y7NHoWPnY132tLSMq4xOHPTmCi3Ez644MqfAlNJccasjjJjx7D0uz +Lpf1OG7KYyiaAlyUlsc91vUDdT5eXdGbQThlXWNs83lOyysjSVwCz7WGXY43D+WuuGL lTskos1UlJKEJD71xpRs7hhChIzrn+305qyrKRUeYv13CpQne50UPBD6ISaHO4q9u321 r2JblYwFsuDslnFqWERCBNjcJO6PSjfuQBW2CH5qqCAGRteFnEnbsVJsw8GLkkcDaClx 6DQXEi1vBl1U8WRmwSKtDK1A5fZ2j8inftAeHkt8nqGsQ+M6oY0d5hAOI0e49hTfB5oR 9J2Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=LzzPQT8slGTRdAVsQgdHTCQbGTst2gOxOptahoBqO9s=; b=XgYaLeoFPffteuL5IMLA5XSJWVzPCn7fgawCRggmWiugMSaEDl/rYENMcBtENW91P7 N9AHHOrlRa81JEXZI5Ca19hX0xrtRp2RMJ+Te9f8kMPg63pfnm+ExD+99EKkovoDn48D Fck6l6uxPBoF/Vi8oGb8oHF8dOJwvsVw7Xiw25TPSPo+MGvJ3StP1Nx23yphkZCaJKDW 0u56qLevl3sDnXKOW9ah0ONoK0qinLD8d1tH/H9AUNADcsT6YdIgwthuhDaLgDmiC1Fv RTpwpOkJRKljNiEl29cfdjGv+H5vYu8+UV81HcuwolE8hY2Zud/2eaRH4LClGTJP8hmy Jncw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dILkK4RW; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:14 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Thomas Gleixner , Frederic Weisbecker , Ingo Molnar Subject: [PATCH v10 04/27] PM / Domains: Add genpd governor for CPUs Date: Thu, 29 Nov 2018 18:46:37 +0100 Message-Id: <20181129174700.16585-5-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> As it's now perfectly possible that a PM domain managed by genpd contains devices belonging to CPUs, we should start to take into account the residency values for the idle states during the state selection process. The residency value specifies the minimum duration of time, the CPU or a group of CPUs, needs to spend in an idle state to not waste energy entering it. To deal with this, let's add a new genpd governor, pm_domain_cpu_gov, that may be used for a PM domain that have CPU devices attached or if the CPUs are attached through subdomains. The new governor computes the minimum expected idle duration time for the online CPUs being attached to the PM domain and its subdomains. Then in the state selection process, trying the deepest state first, it verifies that the idle duration time satisfies the state's residency value. It should be noted that, when computing the minimum expected idle duration time, we use the information from tick_nohz_get_next_wakeup(), to find the next wakeup for the related CPUs. Future wise, this may deserve to be improved, as there are more reasons to why a CPU may be woken up from idle. Cc: Thomas Gleixner Cc: Daniel Lezcano Cc: Lina Iyer Cc: Frederic Weisbecker Cc: Ingo Molnar Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v10: - Fold in patch that extended the new genpd CPU governor to cope with QoS constraints, as to avoid confusion. - Simplified the code according to suggestions from Rafael. --- drivers/base/power/domain_governor.c | 61 +++++++++++++++++++++++++++- include/linux/pm_domain.h | 3 ++ 2 files changed, 63 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/base/power/domain_governor.c b/drivers/base/power/domain_governor.c index 99896fbf18e4..61a7c3c03c98 100644 --- a/drivers/base/power/domain_governor.c +++ b/drivers/base/power/domain_governor.c @@ -10,6 +10,9 @@ #include #include #include +#include +#include +#include static int dev_update_qos_constraint(struct device *dev, void *data) { @@ -211,8 +214,10 @@ static bool default_power_down_ok(struct dev_pm_domain *pd) struct generic_pm_domain *genpd = pd_to_genpd(pd); struct gpd_link *link; - if (!genpd->max_off_time_changed) + if (!genpd->max_off_time_changed) { + genpd->state_idx = genpd->cached_power_down_state_idx; return genpd->cached_power_down_ok; + } /* * We have to invalidate the cached results for the masters, so @@ -237,6 +242,7 @@ static bool default_power_down_ok(struct dev_pm_domain *pd) genpd->state_idx--; } + genpd->cached_power_down_state_idx = genpd->state_idx; return genpd->cached_power_down_ok; } @@ -245,6 +251,54 @@ static bool always_on_power_down_ok(struct dev_pm_domain *domain) return false; } +static bool cpu_power_down_ok(struct dev_pm_domain *pd) +{ + struct generic_pm_domain *genpd = pd_to_genpd(pd); + ktime_t domain_wakeup, cpu_wakeup; + s64 idle_duration_ns; + int cpu, i; + + /* Validate dev PM QoS constraints. */ + if (!default_power_down_ok(pd)) + return false; + + if (!(genpd->flags & GENPD_FLAG_CPU_DOMAIN)) + return true; + + /* + * Find the next wakeup for any of the online CPUs within the PM domain + * and its subdomains. Note, we only need the genpd->cpus, as it already + * contains a mask of all CPUs from subdomains. + */ + domain_wakeup = ktime_set(KTIME_SEC_MAX, 0); + for_each_cpu_and(cpu, genpd->cpus, cpu_online_mask) { + cpu_wakeup = tick_nohz_get_next_wakeup(cpu); + if (ktime_before(cpu_wakeup, domain_wakeup)) + domain_wakeup = cpu_wakeup; + } + + /* The minimum idle duration is from now - until the next wakeup. */ + idle_duration_ns = ktime_to_ns(ktime_sub(domain_wakeup, ktime_get())); + if (idle_duration_ns <= 0) + return false; + + /* + * Find the deepest idle state that has its residency value satisfied + * and by also taking into account the power off latency for the state. + * Start at the state picked by the dev PM QoS constraint validation. + */ + i = genpd->state_idx; + do { + if (idle_duration_ns >= (genpd->states[i].residency_ns + + genpd->states[i].power_off_latency_ns)) { + genpd->state_idx = i; + return true; + } + } while (--i >= 0); + + return false; +} + struct dev_power_governor simple_qos_governor = { .suspend_ok = default_suspend_ok, .power_down_ok = default_power_down_ok, @@ -257,3 +311,8 @@ struct dev_power_governor pm_domain_always_on_gov = { .power_down_ok = always_on_power_down_ok, .suspend_ok = default_suspend_ok, }; + +struct dev_power_governor pm_domain_cpu_gov = { + .suspend_ok = default_suspend_ok, + .power_down_ok = cpu_power_down_ok, +}; diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h index 5a4673605d22..969a9b36c0db 100644 --- a/include/linux/pm_domain.h +++ b/include/linux/pm_domain.h @@ -116,6 +116,7 @@ struct generic_pm_domain { s64 max_off_time_ns; /* Maximum allowed "suspended" time. */ bool max_off_time_changed; bool cached_power_down_ok; + bool cached_power_down_state_idx; int (*attach_dev)(struct generic_pm_domain *domain, struct device *dev); void (*detach_dev)(struct generic_pm_domain *domain, @@ -195,6 +196,7 @@ int dev_pm_genpd_set_performance_state(struct device *dev, unsigned int state); extern struct dev_power_governor simple_qos_governor; extern struct dev_power_governor pm_domain_always_on_gov; +extern struct dev_power_governor pm_domain_cpu_gov; #else static inline struct generic_pm_domain_data *dev_gpd_data(struct device *dev) @@ -238,6 +240,7 @@ static inline int dev_pm_genpd_set_performance_state(struct device *dev, #define simple_qos_governor (*(struct dev_power_governor *)(NULL)) #define pm_domain_always_on_gov (*(struct dev_power_governor *)(NULL)) +#define pm_domain_cpu_gov (*(struct dev_power_governor *)(NULL)) #endif #ifdef CONFIG_PM_GENERIC_DOMAINS_SLEEP From patchwork Thu Nov 29 17:46:38 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152430 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672085ljp; Thu, 29 Nov 2018 09:47:17 -0800 (PST) X-Received: by 2002:a2e:5654:: with SMTP id k81-v6mr1712522ljb.48.1543513637841; Thu, 29 Nov 2018 09:47:17 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513637; cv=none; d=google.com; s=arc-20160816; b=IGhkZsQpbJHHuMDYOx7A+suXgEzdGjltJyUQRxn++N4h+hMSHk0wbUyvsp2pdC6gPj dCeQzDtyE9I9q/PwLTipTpKrCwkq3L5Xocyxnrh9Wq5hc1Bn/TDWZv3g8647dVDQ6nfA uWUFh3hWbcEzI9tOHZMEFf4oTyVLXnalKy6Vdt7MCkGXQ7iXEW6PVximLuJll2f2XLMd biPDNi+V2K2Y/FXTjml0ujhQ34N2KNXr/WrmSVpKEBbD7cpNC8pRPTPGUOs7rA9FjsYe 5bDVIBYSsyIdq5tzy/S42aUEKTkDtvFr6KComMGToYLn4D2tTO6EHBddIU8ubVVhwqKl 4Yig== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=wHLi6pu6OM2Azv5/kwu0Ob81t5zQUxyFdokpJxjiCqo=; b=XfvcfmeCO4lHHxy33xbtrf1ZopF/EGkTXBE+Fi16FJyDXUpGP63tYb4FHfYrx6ZuRr iMnmWx9BZ5dvEc++Z3FJRHxKqgCETh10pFcBM29Uyxv4NKadFAfTfhRZkTumyQEtLYaP FBJSCPokYRxwopCPUTBiVlnmqznZb2fxvC7+Fr4IHhghYozm+cOByovTstEKJmjWEAQ+ WE2fd5ExdEsQYI6Zio59JB5iCLdxn+8rXIPdSsI3n/m+hRbnP4KhMm6Zxl5yK2unYWYL gZkTCqsSxUTscBWvImig7YVGxOCPkWuWWn8i544/xZi8zkNqtJy/2LywVYtvDNfPD3SI eKRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Vyz98YEC; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:16 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Lina Iyer Subject: [PATCH v10 05/27] dt: psci: Update DT bindings to support hierarchical PSCI states Date: Thu, 29 Nov 2018 18:46:38 +0100 Message-Id: <20181129174700.16585-6-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> From: Lina Iyer Update DT bindings to represent hierarchical CPU and CPU PM domain idle states for PSCI. Also update the PSCI examples to clearly show how flattened and hierarchical idle states can be represented in DT. Cc: Lina Iyer Signed-off-by: Lina Iyer Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson Reviewed-by: Rob Herring Reviewed-by: Sudeep Holla --- Change in V10: - Clarified that the new hierarchical representation is orthogonal to OS-initiated vs platform-coordinated PSCI CPU suspend mode. - Clarified the representation for "arm,psci-suspend-param" in regards to the flattened vs hierarchical model. - Added power-domain-names property to the CPU nodes, as to avoid future churns, if ever multiple power-domains specifiers. --- .../devicetree/bindings/arm/psci.txt | 166 ++++++++++++++++++ 1 file changed, 166 insertions(+) -- 2.17.1 diff --git a/Documentation/devicetree/bindings/arm/psci.txt b/Documentation/devicetree/bindings/arm/psci.txt index a2c4f1d52492..e6d3553c8df8 100644 --- a/Documentation/devicetree/bindings/arm/psci.txt +++ b/Documentation/devicetree/bindings/arm/psci.txt @@ -105,7 +105,173 @@ Case 3: PSCI v0.2 and PSCI v0.1. ... }; +ARM systems can have multiple cores sometimes in hierarchical arrangement. +This often, but not always, maps directly to the processor power topology of +the system. Individual nodes in a topology have their own specific power states +and can be better represented in DT hierarchically. + +For these cases, the definitions of the idle states for the CPUs and the CPU +topology, must conform to the domain idle state specification [3]. The domain +idle states themselves, must be compatible with the defined 'domain-idle-state' +binding [1], and also need to specify the arm,psci-suspend-param property for +each idle state. + +DT allows representing CPUs and CPU idle states in two different ways - + +The flattened model as given in Example 1, lists CPU's idle states followed by +the domain idle state that the CPUs may choose. Note that the idle states are +all compatible with "arm,idle-state". Additionally, for the domain idle state +the "arm,psci-suspend-param" represents a superset of the CPU's idle state. + +Example 2 represents the hierarchical model of CPUs and domain idle states. +CPUs define their domain provider in their psci DT node. The domain controls +the power to the CPU and possibly other h/w blocks that would enter an idle +state along with the CPU. The CPU's idle states may therefore be considered as +the domain's idle states and have the compatible "arm,idle-state". Such domains +may also be embedded within another domain that may represent common h/w blocks +between these CPUs. The idle states of the CPU topology shall be represented as +the domain's idle states. Note that for the domain idle state, the +"arm,psci-suspend-param" represents idle states hierarchically. + +In PSCI firmware v1.0, the OS-Initiated mode is introduced. However, the +flattened vs hierarchical DT representation is orthogonal to the OS-Initiated +vs the platform-coordinated PSCI CPU suspend modes, thus should be considered +independent of each other. + +The hierarchical representation helps and makes it easy to implement OSI mode +and OS implementations may choose to mandate it. For the default platform- +coordinated mode, both representations are viable options. + +Example 1: Flattened representation of CPU and domain idle states + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0>; + enable-method = "psci"; + cpu-idle-states = <&CPU_PWRDN>, <&CLUSTER_RET>, + <&CLUSTER_PWRDN>; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + reg = <0x100>; + enable-method = "psci"; + cpu-idle-states = <&CPU_PWRDN>, <&CLUSTER_RET>, + <&CLUSTER_PWRDN>; + }; + + idle-states { + CPU_PWRDN: cpu-power-down { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0000001>; + entry-latency-us = <10>; + exit-latency-us = <10>; + min-residency-us = <100>; + }; + + CLUSTER_RET: cluster-retention { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x1000011>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-power-down { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x1000031>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; + }; + + psci { + compatible = "arm,psci-0.2"; + method = "smc"; + }; + +Example 2: Hierarchical representation of CPU and domain idle states + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + CPU0: cpu@0 { + device_type = "cpu"; + compatible = "arm,cortex-a53", "arm,armv8"; + reg = <0x0>; + enable-method = "psci"; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; + }; + + CPU1: cpu@1 { + device_type = "cpu"; + compatible = "arm,cortex-a57", "arm,armv8"; + reg = <0x100>; + enable-method = "psci"; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; + }; + + idle-states { + CPU_PWRDN: cpu-power-down { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0000001>; + entry-latency-us = <10>; + exit-latency-us = <10>; + min-residency-us = <100>; + }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000010>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-power-down { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000030>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; + }; + }; + + psci { + compatible = "arm,psci-1.0"; + method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&CLUSTER_PD>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + domain-idle-states = <&CPU_PWRDN>; + power-domains = <&CLUSTER_PD>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; + }; + [1] Kernel documentation - ARM idle states bindings Documentation/devicetree/bindings/arm/idle-states.txt [2] Power State Coordination Interface (PSCI) specification http://infocenter.arm.com/help/topic/com.arm.doc.den0022c/DEN0022C_Power_State_Coordination_Interface.pdf +[3]. PM Domains description + Documentation/devicetree/bindings/power/power_domain.txt From patchwork Thu Nov 29 17:46:39 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152431 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672128ljp; Thu, 29 Nov 2018 09:47:19 -0800 (PST) X-Received: by 2002:a2e:9dcb:: with SMTP id x11-v6mr1900880ljj.158.1543513639636; Thu, 29 Nov 2018 09:47:19 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513639; cv=none; d=google.com; s=arc-20160816; b=osnuf6eMbRm6L21ey58fz+iuwEBeXqcU9wHW41150jFbQxHJ3Y9PuDeVaCgtCHmGd3 rJrJGpv4NcotkF9LUgjyxROOMC+zZPoCU9uThfFKsmViLNdJIeX3aZu5Y5KJ5g1ecT1m Y5h5zw48GC6G6wKAGqM8VwF1u7LTDL0hmvtDE1PoOL/TcQ8eKrrijQoIWEve9gfbWRD6 4GDTWbz9ssyZCXeTxrG/Kzj5zOOcX+nYJih9bsAUx6fVNHws4jRpQP41auknqdYIhDIL fKVKUBOTsUKAKmI8Sxuf5d1v4f16VF1sIlVhqJkEBYAQhWaHMLVjuK/3bX6FICKSTaKq 8Y6g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Ypw3E2cISa9isgMf/o7XITSEw9/wZqS4XM12LoMTkow=; b=K9CHZ9r+aYFK1Wcc1q8YAVRAtbLfwOsBVImPJbHGYCJplrLQq2zQopf6KkftsdSB1j 5RQ7SAGbuFtBNk4zH4GSpkjBHjlJ7KkdhkjtooGaQR2j1Yw96MOpRiOGHy3Tyec8HIFb C10IgTiBlcaa9Z1aVql6BVUWSuy9LJLh1qkiSebtmLE/IQB/xFa1R8VRo9vKbfJlI9wt v9xwzCu6edvOW7/UCYhFI5OOLSw7jb1HWFeai8Fc/HoUDXT952AQ1xbECVFUTZOa/UbL D/ma4oe22YI1PwUGgzbfS3lAaq1HzrpreIIxXWpbvbbFWvwdGu3OzWblzrq9dkEkNb/P ku2g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kQ6AMKNV; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.17 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:18 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , devicetree@vger.kernel.org Subject: [PATCH v10 06/27] of: base: Add of_get_cpu_state_node() to get idle states for a CPU node Date: Thu, 29 Nov 2018 18:46:39 +0100 Message-Id: <20181129174700.16585-7-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> The CPU's idle state nodes are currently parsed at the common cpuidle DT library, but also when initializing back-end data for the arch specific CPU operations, as in the PSCI driver case. To avoid open-coding, let's introduce of_get_cpu_state_node(), which takes the device node for the CPU and the index to the requested idle state node, as in-parameters. In case a corresponding idle state node is found, it returns the node with the refcount incremented for it, else it returns NULL. Moreover, for ARM, there are two generic methods, to describe the CPU's idle states, either via the flattened description through the "cpu-idle-states" binding [1] or via the hierarchical layout, using the "power-domains" and the "domain-idle-states" bindings [2]. Hence, let's take both options into account. [1] Documentation/devicetree/bindings/arm/idle-states.txt [2] Documentation/devicetree/bindings/arm/psci.txt Cc: Rob Herring Cc: devicetree@vger.kernel.org Cc: Lina Iyer Suggested-by: Sudeep Holla Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson Reviewed-by: Rob Herring --- Changes in v10: - None. --- drivers/of/base.c | 35 +++++++++++++++++++++++++++++++++++ include/linux/of.h | 8 ++++++++ 2 files changed, 43 insertions(+) -- 2.17.1 diff --git a/drivers/of/base.c b/drivers/of/base.c index 09692c9b32a7..8f6974a22006 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -429,6 +429,41 @@ int of_cpu_node_to_id(struct device_node *cpu_node) } EXPORT_SYMBOL(of_cpu_node_to_id); +/** + * of_get_cpu_state_node - Get CPU's idle state node at the given index + * + * @cpu_node: The device node for the CPU + * @index: The index in the list of the idle states + * + * Two generic methods can be used to describe a CPU's idle states, either via + * a flattened description through the "cpu-idle-states" binding or via the + * hierarchical layout, using the "power-domains" and the "domain-idle-states" + * bindings. This function check for both and returns the idle state node for + * the requested index. + * + * In case and idle state node is found at index, the refcount incremented for + * it, so call of_node_put() on it when done. Returns NULL if not found. + */ +struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + struct of_phandle_args args; + int err; + + err = of_parse_phandle_with_args(cpu_node, "power-domains", + "#power-domain-cells", 0, &args); + if (!err) { + struct device_node *state_node = + of_parse_phandle(args.np, "domain-idle-states", index); + + of_node_put(args.np); + return state_node; + } + + return of_parse_phandle(cpu_node, "cpu-idle-states", index); +} +EXPORT_SYMBOL(of_get_cpu_state_node); + /** * __of_device_is_compatible() - Check if the node matches given constraints * @device: pointer to node diff --git a/include/linux/of.h b/include/linux/of.h index a5aee3c438ad..f9f0c65c095c 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -348,6 +348,8 @@ extern const void *of_get_property(const struct device_node *node, int *lenp); extern struct device_node *of_get_cpu_node(int cpu, unsigned int *thread); extern struct device_node *of_get_next_cpu_node(struct device_node *prev); +extern struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index); #define for_each_property_of_node(dn, pp) \ for (pp = dn->properties; pp != NULL; pp = pp->next) @@ -762,6 +764,12 @@ static inline struct device_node *of_get_next_cpu_node(struct device_node *prev) return NULL; } +static inline struct device_node *of_get_cpu_state_node(struct device_node *cpu_node, + int index) +{ + return NULL; +} + static inline int of_n_addr_cells(struct device_node *np) { return 0; From patchwork Thu Nov 29 17:46:40 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152432 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672148ljp; Thu, 29 Nov 2018 09:47:21 -0800 (PST) X-Received: by 2002:a19:4f0c:: with SMTP id d12mr1580633lfb.121.1543513641327; Thu, 29 Nov 2018 09:47:21 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513641; cv=none; d=google.com; s=arc-20160816; b=z3I+wWMSXXpIZg4y3QLy45esWekKlxL1l2GbX7w23UhnQnMnI8bgSzWqLZTG9icC/E Jdo40NuzA0peWru3scAm3layhl4SHcVwwvMkwiFARLIPLlzNgpqiMIaLSXV63HkmOtII cjlBHAuzHHd/JNE5pnxpRx2PbB3QOFRXYmtt0Ojup9qUaS+lL9pbgW/5623NgZDSJ6he nw2Dc1vOeQRqI5eqFlCqHRHHb1F3zlC3S9AIe8RYot6FX5nevrWJIa5ppTfSRCm6yfp7 /2xrfoCHZ8zmy729TCCyVjYDIQJuK26Mr9ggIzOzm+3Oyb1EJNNlbecB/EdUoZhScB6F FTCQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=GHVkWH3PSWyA/cWKlkRJqeV/OFZetQXn2GZtzBG/OUI=; b=i3XxZOLBWP3pp5IU4tkwB731PUaymdGqZ/48YrS2lgZoyrB+RXVI2gprdEDdPopLzs kMPe4Y9yrGJ38XeI3Epd1bnpqBFxuy29NwW3QS0KPKkw2GCwCv6Gv+w1Zht8ufOqIVyM /PJn6CzyHj90A5WFRpm3s0II6dAagmxNoQHH7B6hKzbJghJ5ZjPr/EnCyeY/KljaNG8q J5CXSi9bXf7KSqzJmp+bsmTW6QefZbWCKLgBBilni9zmlKZ81Ds4c+RrqbVOgy/osoaZ +U7TlGVJGeza3dEY5/JNjjJGTYCpczg9UtLb/qp8c2Pl6DCfqDpXmdVf6tS9Vl9pBXvA d9Sw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Bd0qIXUo; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.19 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:20 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Lina Iyer Subject: [PATCH v10 07/27] cpuidle: dt: Support hierarchical CPU idle states Date: Thu, 29 Nov 2018 18:46:40 +0100 Message-Id: <20181129174700.16585-8-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> From: Lina Iyer Currently CPU's idle states are represented in a flattened model, via the "cpu-idle-states" binding from within the CPU's device nodes. Support the hierarchical layout during parsing and validating of the CPU's idle states. This is simply done by calling the new OF helper, of_get_cpu_state_node(). Cc: Lina Iyer Suggested-by: Sudeep Holla Signed-off-by: Lina Iyer Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson --- Changes in v10: - None. --- drivers/cpuidle/dt_idle_states.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) -- 2.17.1 Reviewed-by: Daniel Lezcano diff --git a/drivers/cpuidle/dt_idle_states.c b/drivers/cpuidle/dt_idle_states.c index 53342b7f1010..13f9b7cd32d1 100644 --- a/drivers/cpuidle/dt_idle_states.c +++ b/drivers/cpuidle/dt_idle_states.c @@ -118,8 +118,7 @@ static bool idle_state_valid(struct device_node *state_node, unsigned int idx, for (cpu = cpumask_next(cpumask_first(cpumask), cpumask); cpu < nr_cpu_ids; cpu = cpumask_next(cpu, cpumask)) { cpu_node = of_cpu_device_node_get(cpu); - curr_state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - idx); + curr_state_node = of_get_cpu_state_node(cpu_node, idx); if (state_node != curr_state_node) valid = false; @@ -176,7 +175,7 @@ int dt_init_idle_driver(struct cpuidle_driver *drv, cpu_node = of_cpu_device_node_get(cpumask_first(cpumask)); for (i = 0; ; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + state_node = of_get_cpu_state_node(cpu_node, i); if (!state_node) break; From patchwork Thu Nov 29 17:46:41 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152433 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672183ljp; Thu, 29 Nov 2018 09:47:23 -0800 (PST) X-Received: by 2002:a19:df41:: with SMTP id q1mr1721080lfj.25.1543513643175; Thu, 29 Nov 2018 09:47:23 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513643; cv=none; d=google.com; s=arc-20160816; b=N6PsirmdVYm9BfhV6hNQpSL7ulMJ6C+egyBMRStg79V8pmG7s3okunre0uiQEkS+XT b3lPWdc7x3x65TOnIPsMmPRCebUhg3DgGgW9/VsJ5mw4xv0MXJUBzHb8txFD5ztQRAXn QQZdarx5vCQb8Iu9LmnpenEv2Smo6NMfcUPvVA4Rn0Dtdim5Ta/c3vitTTE7BkW6pqYD nd1+oxDq78nd+sSfVNkAOJEVwwohtNQutAvga4ZAIPWN36OowWhlICn8wMxpVTpCLxqf UlEVzGseOf1ow3ErAo/G5ePqYyBSlrQGNfhw+uUA0ONvDhxsILv4pd+eJifJAABT60ub O4WA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=2+/Zg5CnveDZt6Y9DJWaO1vjEPhkATmRTkbujkSrrhk=; b=xIs4dPBGlA8/exWV6LhfEqSr9/Qn67f9T8gWtLOn9BBjW/fbas4UeSt/AYQMekco7I Nj0Jk8IcXmSKcUtXN2bWFxOS3hdlu3yLtjwohqQORNXVwcCvsRut+IlECfBKTeZ7v6lu H1JaEhFrcZx9jKcrPn6B2vSY2+HkmzkQaByONmBrRiC7ZLChFbP6bAfsP5XHstjvhXqx dsRe5FZlLgXJYb344gqWxLJjNTu6rJDuet56bcHmhv9OabPCGlSvntxUZdHmc9s8wG83 a85jsGg0jJvQCCcWpgZ4R9/Xks59EGv/DpbqutBhwuoI5xv2anXW6+WvgJfDJfmpJaHJ OL7Q== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=iEOSQK3L; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.21 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:22 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Russell King , Catalin Marinas , Will Deacon , Andy Gross , David Brown Subject: [PATCH v10 08/27] ARM/ARM64: cpuidle: Let back-end init ops take the driver as input Date: Thu, 29 Nov 2018 18:46:41 +0100 Message-Id: <20181129174700.16585-9-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> To allow arch back-end init ops to operate on the cpuidle driver for the corresponding CPU, let's pass along a pointer to the struct cpuidle_driver* and forward it the relevant layers of callbacks for ARM/ARM64. Following changes for the PSCI firmware driver starts making use of this. Cc: Lina Iyer Cc: Daniel Lezcano Cc: Russell King Cc: Catalin Marinas Cc: Will Deacon Cc: Andy Gross Cc: David Brown Signed-off-by: Ulf Hansson --- Changes in v10: - New patch! I am seeking an ack from relevant maintainers. Please ping me if you need further information about the hole series. Thanks! Ulf Hanssson --- arch/arm/include/asm/cpuidle.h | 4 ++-- arch/arm/kernel/cpuidle.c | 5 +++-- arch/arm64/include/asm/cpu_ops.h | 4 +++- arch/arm64/include/asm/cpuidle.h | 6 ++++-- arch/arm64/kernel/cpuidle.c | 6 +++--- drivers/cpuidle/cpuidle-arm.c | 2 +- drivers/firmware/psci.c | 7 ++++--- drivers/soc/qcom/spm.c | 3 ++- include/linux/psci.h | 4 +++- 9 files changed, 25 insertions(+), 16 deletions(-) -- 2.17.1 diff --git a/arch/arm/include/asm/cpuidle.h b/arch/arm/include/asm/cpuidle.h index 6b2ff7243b4b..bee0a7847733 100644 --- a/arch/arm/include/asm/cpuidle.h +++ b/arch/arm/include/asm/cpuidle.h @@ -32,7 +32,7 @@ struct device_node; struct cpuidle_ops { int (*suspend)(unsigned long arg); - int (*init)(struct device_node *, int cpu); + int (*init)(struct cpuidle_driver *, struct device_node *, int cpu); }; struct of_cpuidle_method { @@ -47,6 +47,6 @@ struct of_cpuidle_method { extern int arm_cpuidle_suspend(int index); -extern int arm_cpuidle_init(int cpu); +extern int arm_cpuidle_init(struct cpuidle_driver *drv, int cpu); #endif diff --git a/arch/arm/kernel/cpuidle.c b/arch/arm/kernel/cpuidle.c index fda5579123a8..43778c9b373d 100644 --- a/arch/arm/kernel/cpuidle.c +++ b/arch/arm/kernel/cpuidle.c @@ -122,6 +122,7 @@ static int __init arm_cpuidle_read_ops(struct device_node *dn, int cpu) /** * arm_cpuidle_init() - Initialize cpuidle_ops for a specific cpu + * @drv: the drv to be initialized * @cpu: the cpu to be initialized * * Initialize the cpuidle ops with the device for the cpu and then call @@ -137,7 +138,7 @@ static int __init arm_cpuidle_read_ops(struct device_node *dn, int cpu) * -ENXIO if the HW reports a failure or a misconfiguration, * -ENOMEM if the HW report an memory allocation failure */ -int __init arm_cpuidle_init(int cpu) +int __init arm_cpuidle_init(struct cpuidle_driver *drv, int cpu) { struct device_node *cpu_node = of_cpu_device_node_get(cpu); int ret; @@ -147,7 +148,7 @@ int __init arm_cpuidle_init(int cpu) ret = arm_cpuidle_read_ops(cpu_node, cpu); if (!ret) - ret = cpuidle_ops[cpu].init(cpu_node, cpu); + ret = cpuidle_ops[cpu].init(drv, cpu_node, cpu); of_node_put(cpu_node); diff --git a/arch/arm64/include/asm/cpu_ops.h b/arch/arm64/include/asm/cpu_ops.h index 8f03446cf89f..8db870c29f1b 100644 --- a/arch/arm64/include/asm/cpu_ops.h +++ b/arch/arm64/include/asm/cpu_ops.h @@ -19,6 +19,8 @@ #include #include +struct cpuidle_driver; + /** * struct cpu_operations - Callback operations for hotplugging CPUs. * @@ -58,7 +60,7 @@ struct cpu_operations { int (*cpu_kill)(unsigned int cpu); #endif #ifdef CONFIG_CPU_IDLE - int (*cpu_init_idle)(unsigned int); + int (*cpu_init_idle)(struct cpuidle_driver *, unsigned int); int (*cpu_suspend)(unsigned long); #endif }; diff --git a/arch/arm64/include/asm/cpuidle.h b/arch/arm64/include/asm/cpuidle.h index 3c5ddb429ea2..3fd3efb61649 100644 --- a/arch/arm64/include/asm/cpuidle.h +++ b/arch/arm64/include/asm/cpuidle.h @@ -4,11 +4,13 @@ #include +struct cpuidle_driver; + #ifdef CONFIG_CPU_IDLE -extern int arm_cpuidle_init(unsigned int cpu); +extern int arm_cpuidle_init(struct cpuidle_driver *drv, unsigned int cpu); extern int arm_cpuidle_suspend(int index); #else -static inline int arm_cpuidle_init(unsigned int cpu) +static inline int arm_cpuidle_init(struct cpuidle_driver *drv, unsigned int cpu) { return -EOPNOTSUPP; } diff --git a/arch/arm64/kernel/cpuidle.c b/arch/arm64/kernel/cpuidle.c index f2d13810daa8..aaf9dc5cb87a 100644 --- a/arch/arm64/kernel/cpuidle.c +++ b/arch/arm64/kernel/cpuidle.c @@ -18,13 +18,13 @@ #include #include -int arm_cpuidle_init(unsigned int cpu) +int arm_cpuidle_init(struct cpuidle_driver *drv, unsigned int cpu) { int ret = -EOPNOTSUPP; if (cpu_ops[cpu] && cpu_ops[cpu]->cpu_suspend && cpu_ops[cpu]->cpu_init_idle) - ret = cpu_ops[cpu]->cpu_init_idle(cpu); + ret = cpu_ops[cpu]->cpu_init_idle(drv, cpu); return ret; } @@ -51,7 +51,7 @@ int arm_cpuidle_suspend(int index) int acpi_processor_ffh_lpi_probe(unsigned int cpu) { - return arm_cpuidle_init(cpu); + return arm_cpuidle_init(NULL, cpu); } int acpi_processor_ffh_lpi_enter(struct acpi_lpi_state *lpi) diff --git a/drivers/cpuidle/cpuidle-arm.c b/drivers/cpuidle/cpuidle-arm.c index 3a407a3ef22b..39413973b21d 100644 --- a/drivers/cpuidle/cpuidle-arm.c +++ b/drivers/cpuidle/cpuidle-arm.c @@ -106,7 +106,7 @@ static int __init arm_idle_init_cpu(int cpu) * Call arch CPU operations in order to initialize * idle states suspend back-end specific data */ - ret = arm_cpuidle_init(cpu); + ret = arm_cpuidle_init(drv, cpu); /* * Allow the initialization to continue for other CPUs, if the reported diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci.c index c80ec1d03274..878c4dcf0118 100644 --- a/drivers/firmware/psci.c +++ b/drivers/firmware/psci.c @@ -270,7 +270,8 @@ static int __init psci_features(u32 psci_func_id) #ifdef CONFIG_CPU_IDLE static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); -static int psci_dt_cpu_init_idle(struct device_node *cpu_node, int cpu) +static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, + struct device_node *cpu_node, int cpu) { int i, ret, count = 0; u32 *psci_states; @@ -371,7 +372,7 @@ static int __maybe_unused psci_acpi_cpu_init_idle(unsigned int cpu) } #endif -int psci_cpu_init_idle(unsigned int cpu) +int psci_cpu_init_idle(struct cpuidle_driver *drv, unsigned int cpu) { struct device_node *cpu_node; int ret; @@ -390,7 +391,7 @@ int psci_cpu_init_idle(unsigned int cpu) if (!cpu_node) return -ENODEV; - ret = psci_dt_cpu_init_idle(cpu_node, cpu); + ret = psci_dt_cpu_init_idle(drv, cpu_node, cpu); of_node_put(cpu_node); diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c index 53807e839664..6e967f0a8608 100644 --- a/drivers/soc/qcom/spm.c +++ b/drivers/soc/qcom/spm.c @@ -208,7 +208,8 @@ static const struct of_device_id qcom_idle_state_match[] __initconst = { { }, }; -static int __init qcom_cpuidle_init(struct device_node *cpu_node, int cpu) +static int __init qcom_cpuidle_init(struct cpuidle_driver *drv, + struct device_node *cpu_node, int cpu) { const struct of_device_id *match_id; struct device_node *state_node; diff --git a/include/linux/psci.h b/include/linux/psci.h index 8b1b3b5935ab..4f29a3bff379 100644 --- a/include/linux/psci.h +++ b/include/linux/psci.h @@ -20,9 +20,11 @@ #define PSCI_POWER_STATE_TYPE_STANDBY 0 #define PSCI_POWER_STATE_TYPE_POWER_DOWN 1 +struct cpuidle_driver; + bool psci_tos_resident_on(int cpu); -int psci_cpu_init_idle(unsigned int cpu); +int psci_cpu_init_idle(struct cpuidle_driver *drv, unsigned int cpu); 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:23 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 09/27] drivers: firmware: psci: Move psci to separate directory Date: Thu, 29 Nov 2018 18:46:42 +0100 Message-Id: <20181129174700.16585-10-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> Some following changes extends the PSCI driver with some additional new files. Let's avoid to continue cluttering the toplevel firmware directory and first move the PSCI files into a PSCI sub-directory. Suggested-by: Mark Rutland Signed-off-by: Ulf Hansson --- Changes in v10: - None. --- drivers/firmware/Kconfig | 15 +-------------- drivers/firmware/Makefile | 3 +-- drivers/firmware/psci/Kconfig | 13 +++++++++++++ drivers/firmware/psci/Makefile | 4 ++++ drivers/firmware/{ => psci}/psci.c | 0 drivers/firmware/{ => psci}/psci_checker.c | 0 6 files changed, 19 insertions(+), 16 deletions(-) create mode 100644 drivers/firmware/psci/Kconfig create mode 100644 drivers/firmware/psci/Makefile rename drivers/firmware/{ => psci}/psci.c (100%) rename drivers/firmware/{ => psci}/psci_checker.c (100%) -- 2.17.1 diff --git a/drivers/firmware/Kconfig b/drivers/firmware/Kconfig index 7273e5082b41..0400afb2fec7 100644 --- a/drivers/firmware/Kconfig +++ b/drivers/firmware/Kconfig @@ -5,20 +5,6 @@ menu "Firmware Drivers" -config ARM_PSCI_FW - bool - -config ARM_PSCI_CHECKER - bool "ARM PSCI checker" - depends on ARM_PSCI_FW && HOTPLUG_CPU && CPU_IDLE && !TORTURE_TEST - help - Run the PSCI checker during startup. This checks that hotplug and - suspend operations work correctly when using PSCI. - - The torture tests may interfere with the PSCI checker by turning CPUs - on and off through hotplug, so for now torture tests and PSCI checker - are mutually exclusive. - config ARM_SCMI_PROTOCOL bool "ARM System Control and Management Interface (SCMI) Message Protocol" depends on ARM || ARM64 || COMPILE_TEST @@ -258,6 +244,7 @@ config TI_SCI_PROTOCOL config HAVE_ARM_SMCCC bool +source "drivers/firmware/psci/Kconfig" source "drivers/firmware/broadcom/Kconfig" source "drivers/firmware/google/Kconfig" source "drivers/firmware/efi/Kconfig" diff --git a/drivers/firmware/Makefile b/drivers/firmware/Makefile index 3158dffd9914..6670ebe21463 100644 --- a/drivers/firmware/Makefile +++ b/drivers/firmware/Makefile @@ -2,8 +2,6 @@ # # Makefile for the linux kernel. # -obj-$(CONFIG_ARM_PSCI_FW) += psci.o -obj-$(CONFIG_ARM_PSCI_CHECKER) += psci_checker.o obj-$(CONFIG_ARM_SCPI_PROTOCOL) += arm_scpi.o obj-$(CONFIG_ARM_SCPI_POWER_DOMAIN) += scpi_pm_domain.o obj-$(CONFIG_ARM_SDE_INTERFACE) += arm_sdei.o @@ -24,6 +22,7 @@ CFLAGS_qcom_scm-32.o :=$(call as-instr,.arch armv7-a\n.arch_extension sec,-DREQU obj-$(CONFIG_TI_SCI_PROTOCOL) += ti_sci.o obj-$(CONFIG_ARM_SCMI_PROTOCOL) += arm_scmi/ +obj-y += psci/ obj-y += broadcom/ obj-y += meson/ obj-$(CONFIG_GOOGLE_FIRMWARE) += google/ diff --git a/drivers/firmware/psci/Kconfig b/drivers/firmware/psci/Kconfig new file mode 100644 index 000000000000..26a3b32bf7ab --- /dev/null +++ b/drivers/firmware/psci/Kconfig @@ -0,0 +1,13 @@ +config ARM_PSCI_FW + bool + +config ARM_PSCI_CHECKER + bool "ARM PSCI checker" + depends on ARM_PSCI_FW && HOTPLUG_CPU && CPU_IDLE && !TORTURE_TEST + help + Run the PSCI checker during startup. This checks that hotplug and + suspend operations work correctly when using PSCI. + + The torture tests may interfere with the PSCI checker by turning CPUs + on and off through hotplug, so for now torture tests and PSCI checker + are mutually exclusive. diff --git a/drivers/firmware/psci/Makefile b/drivers/firmware/psci/Makefile new file mode 100644 index 000000000000..1956b882470f --- /dev/null +++ b/drivers/firmware/psci/Makefile @@ -0,0 +1,4 @@ +# SPDX-License-Identifier: GPL-2.0 +# +obj-$(CONFIG_ARM_PSCI_FW) += psci.o +obj-$(CONFIG_ARM_PSCI_CHECKER) += psci_checker.o diff --git a/drivers/firmware/psci.c b/drivers/firmware/psci/psci.c similarity index 100% rename from drivers/firmware/psci.c rename to drivers/firmware/psci/psci.c diff --git a/drivers/firmware/psci_checker.c b/drivers/firmware/psci/psci_checker.c similarity index 100% rename from drivers/firmware/psci_checker.c rename to drivers/firmware/psci/psci_checker.c From patchwork Thu Nov 29 17:46:43 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152435 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672234ljp; Thu, 29 Nov 2018 09:47:26 -0800 (PST) X-Received: by 2002:a19:6806:: with SMTP id d6mr1608377lfc.48.1543513646202; Thu, 29 Nov 2018 09:47:26 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513646; cv=none; d=google.com; s=arc-20160816; b=eHIiKpVZ/wWSSzBZsGJ9Su0qBmCQwW4SWgdHC+0ZCKbotg1L7kMxYqge1YN+XycwA3 ZuQlYPiFjOCuDshQZalG5px77xdC37wSQTPlgJbVE24v9ZNdXV5sFGuRFRJfZK1iZ0os mHaBi1SYd+MqSk3uIYlVqIJUEMGYjzfLzH67bIg47+DKjKbv5jjKIv8Qdt35EZHbG6DV wTU3pCMNXoAindwzYR3RiPrbf2wyFF6oF4SW7uIQKNKFaVc/vrEqNWTQC4PVqu5MXZCi mqGN3pbmwl5Jo7r/VF+/SR0VI/J/jJZoJ2rJ4El4oNP/vOib2tR1qkZ4hfyUhVdL9X1Z 2a2A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=BlcCn6JUkPvrmaJts0baXJ0tND3p8k02JN8jSxGv1B4=; b=d3CyJLQF92PnyJhD3XoEE51WuWGUts3Smbv92HqH0YMp1ESqipd6fXnOo1fvPKLRF/ EwCESNZQOB2MXh4v1wtfpIUi2tLfhKyNVTbum34ahZNC8jQwILfh/7QporoeMv/Km4KD RuLviyBGxn01tRzLf77EmoSKnPI/7W6O9wuI+oG5C8S98B8XaOlVCcBDyM6an4EPf0vU Aheg/lgLTpWk6U/s0i+Q5asgVuSZlFKMobzwyg4QQkNXeQfdFPpT7JuBNBO/wl9ouaGS hliEWIi7cqG0zmQCM3laYnmPCOCo4k5s6GjK75cMQZSgvohFms0KC5J6vcsdCwUAXu6y sAGw== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=LbDpQVTs; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.24 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:25 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 10/27] MAINTAINERS: Update files for PSCI Date: Thu, 29 Nov 2018 18:46:43 +0100 Message-Id: <20181129174700.16585-11-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> The files for the PSCI firmware driver were moved to a sub-directory, let's update MAINTAINERS to reflect that. Suggested-by: Mark Rutland Signed-off-by: Ulf Hansson --- Changes in v10: - None. --- MAINTAINERS | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/MAINTAINERS b/MAINTAINERS index 380e43f585d3..9805444711ab 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -11919,7 +11919,7 @@ M: Mark Rutland M: Lorenzo Pieralisi L: linux-arm-kernel@lists.infradead.org S: Maintained -F: drivers/firmware/psci*.c +F: drivers/firmware/psci/ F: include/linux/psci.h F: include/uapi/linux/psci.h From patchwork Thu Nov 29 17:46:44 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152436 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672279ljp; Thu, 29 Nov 2018 09:47:27 -0800 (PST) X-Received: by 2002:a19:6719:: with SMTP id b25mr1539870lfc.38.1543513647866; Thu, 29 Nov 2018 09:47:27 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513647; cv=none; d=google.com; s=arc-20160816; b=TmolVBE0/oYa4mTxRV6kA41Q+e85j5guRnZHjVZm8rXyaeInWDW1OYWKrjiK/mEChb iYelZEpwPiB/czbMSVtjCcPj5iunW5geYrG29NwcfuBBl+6a6llngABWhaY4+omD5b0C 6vUo/N97SBOsm5i4AtIRlEb34Cxya5jFsnKIkd2YBPWM0nIgB0+LhwChKS6TJfnnVIq4 bZ1BMyiwkjP6zEkctgF7FAudahEnfuZsOyqueYbgHaNiAFJyk+Rgovs/ajRs4EX2ofyn e2EvutqBmTglwUqZRu/3jG5TpYGQQyUlav4X1s1ujLRWtMkycR4FZGRtCm5eaofzHFXK G9kg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=C0VjsI0UfpBTK8w+W8XunAgB9zCJk33hNRRNGzP35VQ=; b=eU7eLUQKbU+M4GUc8/SIm7z91o3mBcGMY3sW3fi6jsiOs4LexNmBOzaYq/xJJcj7us VaqH2b4Iqcu1agQRpS/W/qetjhF72IXR3dgKjR0+4lUMoUndyq3miEn6zlCAsvAZNig9 vnw/9zy8O04v671WdiWFFu/akc/pOY0pN4eMPgyG6YlU56LpBBeXen4lh6ur9Eq9YGXx JrM51cVYRQCYTHPFSyJx8lr4GpoFdqweA+rkDOBK1Q7bIIfJYwwVQuDAHpmdNZN+dOMO 6YjZfwIRVFpMRodksawMPF5b43/7B0VkR1bJqIKjyWF/nQwAoDTlKpBWKFLkiGMQEWPV PCUA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=kQS7vsEO; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:26 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 11/27] drivers: firmware: psci: Split psci_dt_cpu_init_idle() Date: Thu, 29 Nov 2018 18:46:44 +0100 Message-Id: <20181129174700.16585-12-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> Let's split the psci_dt_cpu_init_idle() function into two functions, as to allow following changes to re-use some of the code. Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v10: - None. --- drivers/firmware/psci/psci.c | 42 ++++++++++++++++++++---------------- 1 file changed, 23 insertions(+), 19 deletions(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 878c4dcf0118..d50b46a0528f 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -270,10 +270,27 @@ static int __init psci_features(u32 psci_func_id) #ifdef CONFIG_CPU_IDLE static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); +static int psci_dt_parse_state_node(struct device_node *np, u32 *state) +{ + int err = of_property_read_u32(np, "arm,psci-suspend-param", state); + + if (err) { + pr_warn("%pOF missing arm,psci-suspend-param property\n", np); + return err; + } + + if (!psci_power_state_is_valid(*state)) { + pr_warn("Invalid PSCI power state %#x\n", *state); + return -EINVAL; + } + + return 0; +} + static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, struct device_node *cpu_node, int cpu) { - int i, ret, count = 0; + int i, ret = 0, count = 0; u32 *psci_states; struct device_node *state_node; @@ -292,29 +309,16 @@ static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, return -ENOMEM; for (i = 0; i < count; i++) { - u32 state; - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + ret = psci_dt_parse_state_node(state_node, &psci_states[i]); + of_node_put(state_node); - ret = of_property_read_u32(state_node, - "arm,psci-suspend-param", - &state); - if (ret) { - pr_warn(" * %pOF missing arm,psci-suspend-param property\n", - state_node); - of_node_put(state_node); + if (ret) goto free_mem; - } - of_node_put(state_node); - pr_debug("psci-power-state %#x index %d\n", state, i); - if (!psci_power_state_is_valid(state)) { - pr_warn("Invalid PSCI power state %#x\n", state); - ret = -EINVAL; - goto free_mem; - } - psci_states[i] = state; + pr_debug("psci-power-state %#x index %d\n", psci_states[i], i); } + /* Idle states parsed correctly, initialize per-cpu pointer */ per_cpu(psci_power_state, cpu) = psci_states; return 0; From patchwork Thu Nov 29 17:46:45 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152437 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672312ljp; Thu, 29 Nov 2018 09:47:29 -0800 (PST) X-Received: by 2002:a19:2b54:: with SMTP id r81mr1727361lfr.34.1543513649907; Thu, 29 Nov 2018 09:47:29 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513649; cv=none; d=google.com; s=arc-20160816; b=lj5x7xfHgAdkMdFSjueHavXTYeEodoHONHpCmYjSfcpylJtm6lDqBVLtbWj7vHWK54 T7FVRcPGXMihDnw9DD1PAHRu59n2Fg02CfRB8499oD5dwpFZOrF4M18jicYOJ0Cw1uXo ZqZ3oS6GUwaBXUzNS583gStt2XHfq1S7v2PzQJcM1tmQSYVcW5DyEhT+UQhQEVj4okVK 6FMxB1S+O3jOZZCVdve13kT06zT6SIouJld+SYa2sGO9k4sIx2DLJf/3O7vkV3u2HPLX vFQj9se7cetnUXh7ld5xz8VZTBbkvUIS3eg+GeKEeUHQWHU263hi+EzlRjTzeeoNv7rM Vvyg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=ZnU2zg5+wIbWo5O0mmqI6742JstHQYNw0KGOcLMkauw=; b=ya0p+wghaca003mnx3csol6CF4kZPILiAKaaelpcKzdrQdY20RUifVisFsJc6cw9QZ d1Glfu1Y6ZH1J+PuJcsEWmzUY9BBpZVzEp4No9cDJUTRjV+FxFao3Wv/RMM6d9EeUnWG avI+DVG6XZ1ywWxaEkoL0HpZMCt6LaedhCS5SToydllDCqou0mwu+BoBVSBa8ogGCMoY UlgtQNemRhDWSC2G+3ZVmYwBXgXSfbHY0Y5jvOGUImE1ZYd8cgRHQB7txMPAl9vC9aM2 AarEOZKrMoMfos6VqxjVRqwtFpUU6LfcgQRufQmvfhb+oea8HyM69NxITTMaW2CqsUJP fAIQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="gc/mEof6"; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.27 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:29 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 12/27] drivers: firmware: psci: Simplify state node parsing Date: Thu, 29 Nov 2018 18:46:45 +0100 Message-Id: <20181129174700.16585-13-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> Instead of iterating through all the state nodes in DT, to find out how many states that needs to be allocated, let's use the number already known by the cpuidle driver. In this way we can drop the iteration altogether. Signed-off-by: Ulf Hansson --- Changes in v10: - New patch. --- drivers/firmware/psci/psci.c | 25 ++++++++++++------------- 1 file changed, 12 insertions(+), 13 deletions(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index d50b46a0528f..cbfc936d251c 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -290,26 +290,20 @@ static int psci_dt_parse_state_node(struct device_node *np, u32 *state) static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, struct device_node *cpu_node, int cpu) { - int i, ret = 0, count = 0; + int i, ret = 0, num_state_nodes = drv->state_count - 1; u32 *psci_states; struct device_node *state_node; - /* Count idle states */ - while ((state_node = of_parse_phandle(cpu_node, "cpu-idle-states", - count))) { - count++; - of_node_put(state_node); - } - - if (!count) - return -ENODEV; - - psci_states = kcalloc(count, sizeof(*psci_states), GFP_KERNEL); + psci_states = kcalloc(num_state_nodes, sizeof(*psci_states), + GFP_KERNEL); if (!psci_states) return -ENOMEM; - for (i = 0; i < count; i++) { + for (i = 0; i < num_state_nodes; i++) { state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + if (!state_node) + break; + ret = psci_dt_parse_state_node(state_node, &psci_states[i]); of_node_put(state_node); @@ -319,6 +313,11 @@ static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, pr_debug("psci-power-state %#x index %d\n", psci_states[i], i); } + if (i != num_state_nodes) { + ret = -ENODEV; + goto free_mem; + } + /* Idle states parsed correctly, initialize per-cpu pointer */ per_cpu(psci_power_state, cpu) = psci_states; return 0; From patchwork Thu Nov 29 17:46:46 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152438 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672335ljp; Thu, 29 Nov 2018 09:47:31 -0800 (PST) X-Received: by 2002:a19:f204:: with SMTP id q4mr1713678lfh.133.1543513651442; Thu, 29 Nov 2018 09:47:31 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513651; cv=none; d=google.com; s=arc-20160816; b=D5MKssHLmHCJ15QumjUL7XUHjvpE+CHz4bu6NLy8nZE6XjgMUDGb23ZqMYl1Y2TOCv lTZ+8Fxf/FlYZBc0frhLwATzYm1CVayexfh1qpP2NKghe9vU9l1YcEP7nfud4QCeJFbU AIXaK0v+6cCNHiFkMpYqryCQJ+o/aBEuy/eTcoYOT4dDFr/XZJnKxRPHcNMI1XUUedAD 0OSVYOp9H0zWq4nzmiqLwYGhS2cyRPzm7nSYpB3C2xMgXPm7SmPNuAOnYvW0mptBO7sl cp/4P1TkudVtMnpjRofVhVLoXaGc6M/CDeMlb/9O+PTtmovqsEBXselrVJyvLW5K0Aaq zLow== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=jX+qyQO49fWmt2xQpGUjw4NJQ/8bkzUinDH9qdTMnUA=; b=ljLsN2yoP8LnyE52XoRihLdFfoCQgEVD21qt3X3FJBYTwkvVQ7FGcBthKoQW+ma3D7 Pjp5Z/bIvNWURrEJ3VgZu7aDOPOaATroeTEpksAXdYmxGIa7ZXou97h50yDHzRQ9D09U 9cT/3Z0P54qCHWjlraHXz+xLYrDUhIZtFmn4VcBS4oZgX56T9Fp9/1fNb8oROr5TCXOt iCxg51o9uY5BgQmFSzBfipO5/An78bZ9Mcq/eegbZHz5X1xm+zPu8fHfEZxcUB4IeD/N W7frhxO0PYELzkV6iH50maYy4sCazsngss43Rtgzb7UAXuEPD1p00m1aBYFxDaZG0PIZ niKQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=AlPyEsAy; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:30 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Lina Iyer Subject: [PATCH v10 13/27] drivers: firmware: psci: Support hierarchical CPU idle states Date: Thu, 29 Nov 2018 18:46:46 +0100 Message-Id: <20181129174700.16585-14-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> From: Lina Iyer Currently CPU's idle states are represented in a flattened model, via the "cpu-idle-states" binding from within the CPU's device nodes. Support the hierarchical layout, simply by converting to calling the new OF helper, of_get_cpu_state_node(). Cc: Lina Iyer Suggested-by: Sudeep Holla Signed-off-by: Lina Iyer Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson --- Changes in v10: - None. --- drivers/firmware/psci/psci.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index cbfc936d251c..631e20720a22 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -300,7 +300,7 @@ static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, return -ENOMEM; for (i = 0; i < num_state_nodes; i++) { - state_node = of_parse_phandle(cpu_node, "cpu-idle-states", i); + state_node = of_get_cpu_state_node(cpu_node, i); if (!state_node) break; From patchwork Thu Nov 29 17:46:47 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152441 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672423ljp; Thu, 29 Nov 2018 09:47:36 -0800 (PST) X-Google-Smtp-Source: AFSGD/WaGcRydsI5uCNb2T7/0BXVRdHUZEL85sNjVdYEpb71DICiiCTlx38DRRYeRgelSYzHTnSy X-Received: by 2002:a17:902:227:: with SMTP id 36mr2414963plc.140.1543513656793; Thu, 29 Nov 2018 09:47:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513656; cv=none; d=google.com; s=arc-20160816; b=Jqvk03b1OTjJW+v224qRiMf6TqgoB2wKQT14ReyEWJ9ZVdmhX4NkOf0DFO05H56nve MlsFRxnn/jj8avrmzvCO+xdOr5OSJO11FZsdzA4at906zBu8Qq0icfaB8ELoYxY0hS16 1PVrvTLQDP2UiQ9aiKLTmuJ8NYYdgT9CMRgyvGDFiHuzrtkuDaCZa6dBvIIO7Uo08C7N 7bHp1bVke2GY3jNNbVSnIj7FrBGjssogQFGW+RDQfUERhWLGwZPj8RrGKX4+ZCRGoiTW HHOi3+lao+kkm+OiNrmVDSOsUl9+cDI6/HfYb5ipWBiykZ4rqNCWKIlIt0TmL5TwiApK /DTw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=Rtb7ncC0WwEMpjQCLG7tBribMPasaZ8gXOaK80cYa2Y=; b=sV8nLgxDVc29smTvUxWy12lWmc7kMo8unknVcoGTdwsxPkXhpBpAAOJMhSsVI66Hs9 gWsi4FpfjKjOjpAxYoSfHzTawBLnZu+lVPwHRUdvNV105BFU6ZKgmsnA4/Qms/1e5C1i UADBEy4m1H7lBCRzLC5GeXRDzM4VlrJ6PmM0obKlMSMzyxbuH7xE0PFRydRR0Ubg1a+q bHCwhJxUZKd7qMcNwWc0cp8Q2ffuH+HJr4ZVdPWc3kibNy8eMFpH1mymH24FZDZZTtOu zwvXMoDtf8Z3tK209CP3IITjAkB5Hua2REWZWY1QM/i2lS2B8RaKbgq0DTUSZYjPSUHV fISA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YO5P3hwG; spf=pass (google.com: best guess record for domain of linux-pm-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-pm-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:32 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 14/27] drivers: firmware: psci: Simplify error path of psci_dt_init() Date: Thu, 29 Nov 2018 18:46:47 +0100 Message-Id: <20181129174700.16585-15-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> Sender: linux-pm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-pm@vger.kernel.org Instead of having each psci init function taking care of the of_node_put(), let's deal with that from psci_dt_init(), as this enables a bit simpler error path for each psci init function. Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson Acked-by: Mark Rutland --- Changes in v10: - None. --- drivers/firmware/psci/psci.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 631e20720a22..6bfa47cbd174 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -609,9 +609,9 @@ static int __init psci_0_2_init(struct device_node *np) int err; err = get_set_conduit_method(np); - if (err) - goto out_put_node; + return err; + /* * Starting with v0.2, the PSCI specification introduced a call * (PSCI_VERSION) that allows probing the firmware version, so @@ -619,11 +619,7 @@ static int __init psci_0_2_init(struct device_node *np) * can be carried out according to the specific version reported * by firmware */ - err = psci_probe(); - -out_put_node: - of_node_put(np); - return err; + return psci_probe(); } /* @@ -635,9 +631,8 @@ static int __init psci_0_1_init(struct device_node *np) int err; err = get_set_conduit_method(np); - if (err) - goto out_put_node; + return err; pr_info("Using PSCI v0.1 Function IDs from DT\n"); @@ -661,9 +656,7 @@ static int __init psci_0_1_init(struct device_node *np) psci_ops.migrate = psci_migrate; } -out_put_node: - of_node_put(np); - return err; + return 0; } static const struct of_device_id psci_of_match[] __initconst = { @@ -678,6 +671,7 @@ int __init psci_dt_init(void) struct device_node *np; const struct of_device_id *matched_np; psci_initcall_t init_fn; + int ret; np = of_find_matching_node_and_match(NULL, psci_of_match, &matched_np); @@ -685,7 +679,10 @@ int __init psci_dt_init(void) return -ENODEV; init_fn = (psci_initcall_t)matched_np->data; - return init_fn(np); + ret = init_fn(np); + + of_node_put(np); + return ret; } #ifdef CONFIG_ACPI From patchwork Thu Nov 29 17:46:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152439 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672395ljp; Thu, 29 Nov 2018 09:47:34 -0800 (PST) X-Received: by 2002:a2e:1f01:: with SMTP id f1-v6mr1706033ljf.129.1543513654866; Thu, 29 Nov 2018 09:47:34 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513654; cv=none; d=google.com; s=arc-20160816; b=n4ZIQrnpNKi4h74Yv9TUUy6N2bf866+iOlhbrcx7IgIPZGloCWwXcBbj2KVcz7ShwK Yy6nGLg7UdKORc0VeuQabk0xS11rH4xYa3UbrqjSjj1wd7hZOkWHNr6e0ZvA039YRXim qTdorlqnPWV7Ue5EyI4GURvxc44og9n4JygQJ2amGpBS5XnB7KRTblPExkxbpkmjCjlS dMIUX85dnTc5OV488zWH1pCZuIfe0fO6VoLJr3eOc9xscfwowcjwZZPenwU5ybgiMi/p 3zBnRoPbF9e1KEPHCvOPq6U7jLl1blP8PKZSYW+uEaDVE7VWKGJHotEWCdU5+pNrqCnO 7fWQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RtdXqoS3gVAQPCLor+MB+aJuhRHlqOlmuJfNLhUnBd0=; b=RULuGDufBJeYpoVL0NrueTqZm8koU3ZPNuOrfKJ9TqSMKtbuSCNNJLAS6xVvCfDw6E 5IycDsQ6nqfVdCDaHy0hu6kmaftTDOkmaaOcN6zgXeg6NH1NieSHUXlbqjBUKF1wmzCc QFT4C2bZYjzlK+ausW7p0P51ijuuq4tufLSqUjkv/n+jxMiLk75hPLCJAoxcRnnuqmn/ 1TbdmspMNfq/p23e3Lvrg089ovvAF3V+iIrlM+BkN646lzGAnOi2Y2IEq0ARc3P4EHHt gqQxdjR5hfmHPkZR6Tgc8miDQQ+XeK50a0laGL2G4oLCioQVE+cjlA6tD8dgbQNYb3M+ z5gA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HC6R7vkB; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id y86-v6sor1832612lje.18.2018.11.29.09.47.34 for (Google Transport Security); Thu, 29 Nov 2018 09:47:34 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=HC6R7vkB; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=RtdXqoS3gVAQPCLor+MB+aJuhRHlqOlmuJfNLhUnBd0=; b=HC6R7vkBxIVeReHiAW/l7VN+GiG5KttIpTe0k0AqV1hXefU42ypirVgAKNl6NVij5H txPNau3G5O/NCT/MuPS2rUKWtErXXmXXxcxlO5t0f/UEPJlhLfvbS7G+VZYr4xUJL7tJ ay4ymuPR6i7iB28pio0Hym1SmYgxxpasGofW8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=RtdXqoS3gVAQPCLor+MB+aJuhRHlqOlmuJfNLhUnBd0=; b=Hv2VRjviDhyRR/omJhzm3w/BLF1HCJugLtH9TMK1ETn4nBJLJQ1tXA5+A7It4jfLRI tR16mbMSo7fzq+IAsxO0S1v4/LALwQ1QwOZreUBHCVJmiJIdQfyXPIwWGlKs4Qmo4h3W 0vc4udsT9e7yDwQDKnvHrheZpw43fhMIIP+rkgXd5PDkvcQMclWoVpv3UP1VSIgRyPMB 9lttprg0PpeogGrJScJ3zjAgAaTNL+nkkpvT1EWMEEpOlf6V6HdxOmgbu+BE7ubqe+lj ite771LHf5fciB6VvyY6EXimQupNQ8o8GHcNqEuV8w5XJ+XVssfQhmS4vqATGMeE0W/3 F8Ow== X-Gm-Message-State: AA+aEWYt5Aly3pdipcKMwxiZOflzqfnET5BkZlWITEoxcRgI3qLKTS+3 dVIGwC3kkOcvcoC9GubzCtLK8XoR X-Google-Smtp-Source: AFSGD/UoOMLd8KL9ke7+41ey3VhAhq3w0txzumISXYpr0GGW8iXSuRUe08J7o+7bUUEIF8A7rc1LPA== X-Received: by 2002:a2e:1241:: with SMTP id t62-v6mr1548248lje.171.1543513654558; Thu, 29 Nov 2018 09:47:34 -0800 (PST) Return-Path: Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:33 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 15/27] drivers: firmware: psci: Announce support for OS initiated suspend mode Date: Thu, 29 Nov 2018 18:46:48 +0100 Message-Id: <20181129174700.16585-16-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> PSCI firmware v1.0+, supports two different modes for CPU_SUSPEND. The Platform Coordinated mode, which is the default and mandatory mode, while support for the OS initiated mode is optional. This change introduces initial support for the OS initiated mode, in way that it adds the related PSCI bits from the spec and prints a message in the log to inform whether the mode is supported by the PSCI FW. Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v10: - None. --- drivers/firmware/psci/psci.c | 21 ++++++++++++++++++++- include/uapi/linux/psci.h | 5 +++++ 2 files changed, 25 insertions(+), 1 deletion(-) -- 2.17.1 Reviewed-by: Daniel Lezcano diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 6bfa47cbd174..4f0cbc95e41b 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -95,6 +95,11 @@ static inline bool psci_has_ext_power_state(void) PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK; } +static inline bool psci_has_osi_support(void) +{ + return psci_cpu_suspend_feature & PSCI_1_0_OS_INITIATED; +} + static inline bool psci_power_state_loses_context(u32 state) { const u32 mask = psci_has_ext_power_state() ? @@ -659,10 +664,24 @@ static int __init psci_0_1_init(struct device_node *np) return 0; } +static int __init psci_1_0_init(struct device_node *np) +{ + int err; + + err = psci_0_2_init(np); + if (err) + return err; + + if (psci_has_osi_support()) + pr_info("OSI mode supported.\n"); + + return 0; +} + static const struct of_device_id psci_of_match[] __initconst = { { .compatible = "arm,psci", .data = psci_0_1_init}, { .compatible = "arm,psci-0.2", .data = psci_0_2_init}, - { .compatible = "arm,psci-1.0", .data = psci_0_2_init}, + { .compatible = "arm,psci-1.0", .data = psci_1_0_init}, {}, }; diff --git a/include/uapi/linux/psci.h b/include/uapi/linux/psci.h index b3bcabe380da..581f72085c33 100644 --- a/include/uapi/linux/psci.h +++ b/include/uapi/linux/psci.h @@ -49,6 +49,7 @@ #define PSCI_1_0_FN_PSCI_FEATURES PSCI_0_2_FN(10) #define PSCI_1_0_FN_SYSTEM_SUSPEND PSCI_0_2_FN(14) +#define PSCI_1_0_FN_SET_SUSPEND_MODE PSCI_0_2_FN(15) #define PSCI_1_0_FN64_SYSTEM_SUSPEND PSCI_0_2_FN64(14) @@ -97,6 +98,10 @@ #define PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK \ (0x1 << PSCI_1_0_FEATURES_CPU_SUSPEND_PF_SHIFT) +#define PSCI_1_0_OS_INITIATED BIT(0) +#define PSCI_1_0_SUSPEND_MODE_PC 0 +#define PSCI_1_0_SUSPEND_MODE_OSI 1 + /* PSCI return values (inclusive of all PSCI versions) */ #define PSCI_RET_SUCCESS 0 #define PSCI_RET_NOT_SUPPORTED -1 From patchwork Thu Nov 29 17:46:49 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152440 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672422ljp; Thu, 29 Nov 2018 09:47:36 -0800 (PST) X-Received: by 2002:a19:c7c2:: with SMTP id x185mr1695873lff.123.1543513656702; Thu, 29 Nov 2018 09:47:36 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513656; cv=none; d=google.com; s=arc-20160816; b=ZFcT8hLrFTs/7p6uV2X/PaFQcRSYyicG1guIg213XfUR0wYOCS5GzAJOsj186JUHDQ gxrnOV7EmAmZBcAOqi/fUJjR35scpTRwDOmgQFz2mfTPEOUx0/tOpZ01kQU0l8psWRtw SWAikILqK07uztg1GGBH0AjnTTR6gQXU5jDbJ19+69ZE4PqReahej41rzmyorOGmFZvC qXwHhzgTLDNtcWPA+DIWZah+d3eShWP4yDL3edaoHUVMSGCnW66k45g/2JXOJAjdypXS gpLHSXHQ2Xkm1ob60ZdjVzCyIVT380/cgykkM1YMblgnLgOVR6gp82ClIVSjsVdAg5+s FI3Q== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=PgU1c1CxxtqSBW5JefCvIK+xCW7iLG8npYRcb1HuKE4=; b=Xyz46WEY8k/Gj4dzPIvoEd9NO2lulSyGiowce95/NEe51st5xUQr+BO8hZhuDruJhy MqSLjg+tBW+eVYNU2y3q6HazaELdm9i5Oyzrw6ynQCQu02k490Pb3WxuQPikfiE9kb4p 1od8E+dcRDy5KdTiCcBmjc6VcuG8QRv2nsQV6OE08Rrz25SGRBwbk6/4qwElMCMmk+Y0 Aj2Su4H2gOqyV71243r6WDtrIWsDbq9mJLbjgxBoEpQmxFV40Rwfoox4vVP0yqfyMuqW fnLUOsj7NrbyeL4iopKWEl1Sfnkdo7E5X/BVI5HaRttcgyZoTtkPU99Ym3XKRLzaFBm8 hlIA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="B/5EWbX/"; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. [209.85.220.65]) by mx.google.com with SMTPS id r65-v6sor1793358ljb.13.2018.11.29.09.47.36 for (Google Transport Security); Thu, 29 Nov 2018 09:47:36 -0800 (PST) Received-SPF: pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) client-ip=209.85.220.65; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="B/5EWbX/"; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=PgU1c1CxxtqSBW5JefCvIK+xCW7iLG8npYRcb1HuKE4=; b=B/5EWbX/4pIf3Oc3G2zdHEoTEbgIGKaLe3sWcikr1JnH0hv2gk3BnxwQr4TUdob0pS GBHcOVwcErj08YkbJF+3nI8Qeiz3paCDoblCXvk3zQCosYDQzVJJ3Zu2ag+TMhbtAuwy JVyxj/mbnkShjM0JtEpEnU0awLd8+vHoqWDi4= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=PgU1c1CxxtqSBW5JefCvIK+xCW7iLG8npYRcb1HuKE4=; b=GysI5XqpPZY7ly8wUAYBmdBKgJR8REOpOfXoveRJ2cOUf+EXjF9ms2nVaGbwGfO1xJ VPb7GOmUWE/05xQ5tOKihLjslhOdlGzvn7mnJjvh1quuwwbNNKgzlRhDehyKPJS9GdgM i0+HsBfnc/bXCK7t2ubXb2f5Vmn9UOJ334WU2K5OQ9OcKPTj8CHpdoL8hH7n0D9oNAue gDvE1wXcYVJnVivmkv2DbiHH8Yhi/RqZPeYPKGYYKjTIMvRdFy+5SprwtIVvEezC/q1T Gf4bNyBuMf4/s5nRFFf/eOoeZ0aU8/RinQUMWeUvfeDtyh0XBOuPXJ6bjGucCbDKnS5V B9zA== X-Gm-Message-State: AA+aEWazuxJhdKZy3pPDQljDEHhCMU2B3M7dXfAur9yBDqdXzdoG9rGX jvkBhu6NCgBYZhKepWqRyoK6i9Wm X-Google-Smtp-Source: AFSGD/WczsUHri23WmBiaft8WE6DWc6NG5zksmRIXHH/fM1XFB8rrAvVA/6TldZECosGbxyL5A6+UQ== X-Received: by 2002:a2e:85d3:: with SMTP id h19-v6mr1678736ljj.82.1543513656433; Thu, 29 Nov 2018 09:47:36 -0800 (PST) Return-Path: Received: from localhost.localdomain (h-158-174-22-210.NA.cust.bahnhof.se. [158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:35 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 16/27] drivers: firmware: psci: Prepare to use OS initiated suspend mode Date: Thu, 29 Nov 2018 18:46:49 +0100 Message-Id: <20181129174700.16585-17-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> To enable the OS initiated mode, the CPU topology needs to be described using the hierarchical model in DT. When used, the idle state bits for the CPU are created by ORing the bits for PM domain's idle state. Let's prepare the PSCI driver to deal with this, via introducing a per CPU variable called domain_state and by adding internal helpers to read/write the value of the variable. Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v10: - Use __this_cpu_read|write() rather than this_cpu_read|write(). --- drivers/firmware/psci/psci.c | 26 ++++++++++++++++++++++---- 1 file changed, 22 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 4f0cbc95e41b..8dbcdecc2ae4 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -87,8 +87,19 @@ static u32 psci_function_id[PSCI_FN_MAX]; (PSCI_1_0_EXT_POWER_STATE_ID_MASK | \ PSCI_1_0_EXT_POWER_STATE_TYPE_MASK) +static DEFINE_PER_CPU(u32, domain_state); static u32 psci_cpu_suspend_feature; +static inline u32 psci_get_domain_state(void) +{ + return __this_cpu_read(domain_state); +} + +static inline void psci_set_domain_state(u32 state) +{ + __this_cpu_write(domain_state, state); +} + static inline bool psci_has_ext_power_state(void) { return psci_cpu_suspend_feature & @@ -187,6 +198,8 @@ static int psci_cpu_on(unsigned long cpuid, unsigned long entry_point) fn = psci_function_id[PSCI_FN_CPU_ON]; err = invoke_psci_fn(fn, cpuid, entry_point, 0); + /* Clear the domain state to start fresh. */ + psci_set_domain_state(0); return psci_to_linux_errno(err); } @@ -409,15 +422,17 @@ int psci_cpu_init_idle(struct cpuidle_driver *drv, unsigned int cpu) static int psci_suspend_finisher(unsigned long index) { u32 *state = __this_cpu_read(psci_power_state); + u32 composite_state = state[index - 1] | psci_get_domain_state(); - return psci_ops.cpu_suspend(state[index - 1], - __pa_symbol(cpu_resume)); + return psci_ops.cpu_suspend(composite_state, __pa_symbol(cpu_resume)); } int psci_cpu_suspend_enter(unsigned long index) { int ret; u32 *state = __this_cpu_read(psci_power_state); + u32 composite_state = state[index - 1] | psci_get_domain_state(); + /* * idle state index 0 corresponds to wfi, should never be called * from the cpu_suspend operations @@ -425,11 +440,14 @@ int psci_cpu_suspend_enter(unsigned long index) if (WARN_ON_ONCE(!index)) return -EINVAL; - if (!psci_power_state_loses_context(state[index - 1])) - ret = psci_ops.cpu_suspend(state[index - 1], 0); + if (!psci_power_state_loses_context(composite_state)) + ret = psci_ops.cpu_suspend(composite_state, 0); else ret = cpu_suspend(index, psci_suspend_finisher); + /* Clear the domain state to start fresh when back from idle. */ + psci_set_domain_state(0); + return ret; } From patchwork Thu Nov 29 17:46:50 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152442 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672453ljp; Thu, 29 Nov 2018 09:47:38 -0800 (PST) X-Received: by 2002:a19:be16:: with SMTP id o22mr1626148lff.22.1543513658542; Thu, 29 Nov 2018 09:47:38 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513658; cv=none; d=google.com; s=arc-20160816; b=VxfpG994mEvQHBVowDyzS9yrkTi8NGU7RUgafqAHJKT+sSk3CJB4hdIqkY3NkG7TU4 5EldBwhTjCJLRTWmDG3qqfMGcQChnWwuf+MvRH5lHqGCnFX2Q8Uuou5G2MDtjhNQODTE ZBhdt/DlEnoZk+vp6WxhxgZmBo1XWqZQnr504UxEbCjr2XAbZKBX75cvGE8YMA90JrE5 g0tDlMUU5kGg4QY3kASfvHsXjDs27iaA2nuS4lHcmAqLFwFmqNR3+amzjRsixDJ5z6wr oa8Do0rIMpvqHvEsnhnTqlcWq6i7RxuyTmgPxJoCCYNOFYGwIIdWsgk32xEkCbb09rVo AFeA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=0f5FNvFNr+ywaXHgyrdJbA+WYJaJrfnYBdOhsBxudf4=; b=A1inufenRGx6fE6K6mlwZNXXpLkK58pD+SzVT6Er5KasBe98CZX4bvh/3k+Xs5jFBt MnDKD4CvzooIvuyjX+FDe/68c2bcIfCFf02XxWs1fZtzOf7dvNj/ewejL2B6E4irUfG6 AL15cRNkhRr3knhuVkPgefkD+h5Xt4jjSnjt0di+3D7gIXNBjEpLwWopcBjr4C7A1Is6 I+LHBIUBCPPSmXJ9xaJcgCjvd6DqvcUUd1z2FVzBUks9y0OEgboJJFy6P6ISox7xvJyU EpEYmB3qrOXGechMctPvPOy8cLPbsWTHkpr4M39cSl+RYRf9jXQTbmYkg6057LT1EJNX TPPA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XmLH+XoA; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:37 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 17/27] drivers: firmware: psci: Prepare to support PM domains Date: Thu, 29 Nov 2018 18:46:50 +0100 Message-Id: <20181129174700.16585-18-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> Following changes are about to implement support for PM domains to PSCI. Those changes are mainly going to be implemented in a new separate file, hence a couple of the internal PSCI functions needs to be shared to be accessible. So, let's do that via adding new PSCI header file. Moreover, the changes deploying support for PM domains, needs to be able to switch the PSCI FW into the OS initiated mode. For that reason, let's add a new function that deals with this and share it via the new PSCI header file. Signed-off-by: Ulf Hansson --- Changes in v10: - New patch. Re-places the earlier patch: "drivers: firmware: psci: Share a few internal PSCI functions". --- drivers/firmware/psci/psci.c | 28 +++++++++++++++++++++------- drivers/firmware/psci/psci.h | 14 ++++++++++++++ 2 files changed, 35 insertions(+), 7 deletions(-) create mode 100644 drivers/firmware/psci/psci.h -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 8dbcdecc2ae4..623591b541a4 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -34,6 +34,8 @@ #include #include +#include "psci.h" + /* * While a 64-bit OS can make calls with SMC32 calling conventions, for some * calls it is necessary to use SMC64 to pass or return 64-bit values. @@ -90,23 +92,35 @@ static u32 psci_function_id[PSCI_FN_MAX]; static DEFINE_PER_CPU(u32, domain_state); static u32 psci_cpu_suspend_feature; -static inline u32 psci_get_domain_state(void) +u32 psci_get_domain_state(void) { return __this_cpu_read(domain_state); } -static inline void psci_set_domain_state(u32 state) +void psci_set_domain_state(u32 state) { __this_cpu_write(domain_state, state); } +bool psci_set_osi_mode(void) +{ + int ret; + + ret = invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_OSI, 0, 0); + if (ret) + pr_warn("failed to enable OSI mode: %d\n", ret); + + return !ret; +} + static inline bool psci_has_ext_power_state(void) { return psci_cpu_suspend_feature & PSCI_1_0_FEATURES_CPU_SUSPEND_PF_MASK; } -static inline bool psci_has_osi_support(void) +bool psci_has_osi_support(void) { return psci_cpu_suspend_feature & PSCI_1_0_OS_INITIATED; } @@ -285,10 +299,7 @@ static int __init psci_features(u32 psci_func_id) psci_func_id, 0, 0); } -#ifdef CONFIG_CPU_IDLE -static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); - -static int psci_dt_parse_state_node(struct device_node *np, u32 *state) +int psci_dt_parse_state_node(struct device_node *np, u32 *state) { int err = of_property_read_u32(np, "arm,psci-suspend-param", state); @@ -305,6 +316,9 @@ static int psci_dt_parse_state_node(struct device_node *np, u32 *state) return 0; } +#ifdef CONFIG_CPU_IDLE +static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); + static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, struct device_node *cpu_node, int cpu) { diff --git a/drivers/firmware/psci/psci.h b/drivers/firmware/psci/psci.h new file mode 100644 index 000000000000..7d9d38fd57e1 --- /dev/null +++ b/drivers/firmware/psci/psci.h @@ -0,0 +1,14 @@ +/* SPDX-License-Identifier: GPL-2.0 */ + +#ifndef __PSCI_H +#define __PSCI_H + +struct device_node; + +bool psci_set_osi_mode(void); +u32 psci_get_domain_state(void); +void psci_set_domain_state(u32 state); +bool psci_has_osi_support(void); +int psci_dt_parse_state_node(struct device_node *np, u32 *state); + +#endif /* __PSCI_H */ From patchwork Thu Nov 29 17:46:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152443 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672487ljp; Thu, 29 Nov 2018 09:47:40 -0800 (PST) X-Received: by 2002:a2e:9715:: with SMTP id r21-v6mr1744072lji.30.1543513660403; Thu, 29 Nov 2018 09:47:40 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513660; cv=none; d=google.com; s=arc-20160816; b=YO4rZA3uaFaPyFeumecTwfequcuVhHq0SodG2aulECPPSOBy3PtFrt+NTsd72/lXcv gjB87RovdNJX1oCbqnVNjhTKdhELP2hGJ2IOwAYbCDgiRTmW4//CuLfmVDOtktJqTEb7 lll458PxdbB+mUBjUcA3vCzztBFXrXmEGk4wWv67X/dUXEoSP62WAA8a2Eo3ohO8Ew/B KBn7OFhezIirtPWc30WW4Pnsy4H6Z9mpBi8wDLEBA6nwhHkzUdDcmWiCw3jS7i/+GH9D tSZafvGYAc72ypvUHiBaUeLj7FnJKBm9bHkwy1d1myFYvOWORTbHck+Owo81hDI2mSgV Kmmg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=e32vtX78zxUwZdARdRnc8l3DtzZQ8eqcggPXtqP0zBQ=; b=k8KpZ0HJauEQliExDODMdx/cRbk+HrdaZXv88bl7Bm6cN0QOxUlQKaqtddQ/i7QL7A Xr64BaUrP3WKWfO9dNVLLpWT6Vm6GOzMPw9zQ4aHGJf++9D+obQOI+n8BrwBevZtkSsz rZ8suU/9stxfHXPeV0FumlZ/X4sJvYDqCAm8Q7fLTmRqI43DfT+k7LUZOt1QFmnUu8A8 DKvtwZaV+o2/gjTLXXQOokdlzlt7S020bQ+ebntQHoirfczjGon5r48AWRDtgsGeT3to 1VSGSNdrDRNSrnkrnk4TDqTi343+1vZy+oqaskeGYmiJuxGwMA06XD6s39zjwhoSUp+B MAUg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=KEysZzFG; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:39 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 18/27] drivers: firmware: psci: Add support for PM domains using genpd Date: Thu, 29 Nov 2018 18:46:51 +0100 Message-Id: <20181129174700.16585-19-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> When the hierarchical CPU topology layout is used in DT, we need to setup the corresponding PM domain data structures, as to allow a CPU and a group of CPUs to be power managed accordingly. Let's enable this by deploying support through the genpd interface. Additionally, when the OS initiated mode is supported by the PSCI FW, let's also parse the domain idle states DT bindings as to make genpd responsible for the state selection, when the states are compatible with "domain-idle-state". Otherwise, when only Platform Coordinated mode is supported, we rely solely on the state selection to be managed through the regular cpuidle framework. If the initialization of the PM domain data structures succeeds and the OS initiated mode is supported, we try to switch to it. In case it fails, let's fall back into a degraded mode, rather than bailing out and returning an error code. Due to that the OS initiated mode may become enabled, we need to adjust to maintain backwards compatibility for a kernel started through a kexec call. Do this by explicitly switch to Platform Coordinated mode during boot. To try to initiate the PM domain data structures, the PSCI driver shall call the new function, psci_dt_init_pm_domains(). However, this is done from following changes. Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in V10: - Enable the PM domains to be used for both PC and OSI mode. - Fixup error paths. - Move the management of kexec started kernels into this patch. - Rewrite changelog. --- drivers/firmware/psci/Makefile | 2 +- drivers/firmware/psci/psci.c | 7 +- drivers/firmware/psci/psci.h | 6 + drivers/firmware/psci/psci_pm_domain.c | 262 +++++++++++++++++++++++++ 4 files changed, 275 insertions(+), 2 deletions(-) create mode 100644 drivers/firmware/psci/psci_pm_domain.c -- 2.17.1 diff --git a/drivers/firmware/psci/Makefile b/drivers/firmware/psci/Makefile index 1956b882470f..ff300f1fec86 100644 --- a/drivers/firmware/psci/Makefile +++ b/drivers/firmware/psci/Makefile @@ -1,4 +1,4 @@ # SPDX-License-Identifier: GPL-2.0 # -obj-$(CONFIG_ARM_PSCI_FW) += psci.o +obj-$(CONFIG_ARM_PSCI_FW) += psci.o psci_pm_domain.o obj-$(CONFIG_ARM_PSCI_CHECKER) += psci_checker.o diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 623591b541a4..19af2093151b 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -704,9 +704,14 @@ static int __init psci_1_0_init(struct device_node *np) if (err) return err; - if (psci_has_osi_support()) + if (psci_has_osi_support()) { pr_info("OSI mode supported.\n"); + /* Make sure we default to PC mode. */ + invoke_psci_fn(PSCI_1_0_FN_SET_SUSPEND_MODE, + PSCI_1_0_SUSPEND_MODE_PC, 0, 0); + } + return 0; } diff --git a/drivers/firmware/psci/psci.h b/drivers/firmware/psci/psci.h index 7d9d38fd57e1..8cf6d7206fab 100644 --- a/drivers/firmware/psci/psci.h +++ b/drivers/firmware/psci/psci.h @@ -11,4 +11,10 @@ void psci_set_domain_state(u32 state); bool psci_has_osi_support(void); int psci_dt_parse_state_node(struct device_node *np, u32 *state); +#ifdef CONFIG_CPU_IDLE +int psci_dt_init_pm_domains(struct device_node *np); +#else +static inline int psci_dt_init_pm_domains(struct device_node *np) { return 0; } +#endif + #endif /* __PSCI_H */ diff --git a/drivers/firmware/psci/psci_pm_domain.c b/drivers/firmware/psci/psci_pm_domain.c new file mode 100644 index 000000000000..d0dc38e96f85 --- /dev/null +++ b/drivers/firmware/psci/psci_pm_domain.c @@ -0,0 +1,262 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * PM domains for CPUs via genpd - managed by PSCI. + * + * Copyright (C) 2018 Linaro Ltd. + * Author: Ulf Hansson + * + */ + +#define pr_fmt(fmt) "psci: " fmt + +#include +#include +#include +#include +#include + +#include "psci.h" + +#ifdef CONFIG_CPU_IDLE + +struct psci_pd_provider { + struct list_head link; + struct device_node *node; +}; + +static LIST_HEAD(psci_pd_providers); +static bool osi_mode_enabled; + +static int psci_pd_power_off(struct generic_pm_domain *pd) +{ + struct genpd_power_state *state = &pd->states[pd->state_idx]; + u32 *pd_state; + u32 composite_pd_state; + + /* If we have failed to enable OSI mode, then abort power off. */ + if (psci_has_osi_support() && !osi_mode_enabled) + return -EBUSY; + + if (!state->data) + return 0; + + /* When OSI mode is enabled, set the corresponding domain state. */ + pd_state = state->data; + composite_pd_state = *pd_state | psci_get_domain_state(); + psci_set_domain_state(composite_pd_state); + + return 0; +} + +static int psci_pd_parse_state_nodes(struct genpd_power_state *states, + int state_count) +{ + int i, ret; + u32 psci_state, *psci_state_buf; + + for (i = 0; i < state_count; i++) { + ret = psci_dt_parse_state_node(to_of_node(states[i].fwnode), + &psci_state); + if (ret) + goto free_state; + + psci_state_buf = kmalloc(sizeof(u32), GFP_KERNEL); + if (!psci_state_buf) { + ret = -ENOMEM; + goto free_state; + } + *psci_state_buf = psci_state; + states[i].data = psci_state_buf; + } + + return 0; + +free_state: + while (i >= 0) { + kfree(states[i].data); + i--; + } + return ret; +} + +static int psci_pd_parse_states(struct device_node *np, + struct genpd_power_state **states, int *state_count) +{ + int ret; + + /* Parse the domain idle states. */ + ret = of_genpd_parse_idle_states(np, states, state_count); + if (ret) + return ret; + + /* Fill out the PSCI specifics for each found state. */ + ret = psci_pd_parse_state_nodes(*states, *state_count); + if (ret) + kfree(*states); + + return ret; +} + +static int psci_pd_init(struct device_node *np) +{ + struct generic_pm_domain *pd; + struct psci_pd_provider *pd_provider; + struct dev_power_governor *pd_gov; + struct genpd_power_state *states = NULL; + int i, ret = -ENOMEM, state_count = 0; + + pd = kzalloc(sizeof(*pd), GFP_KERNEL); + if (!pd) + goto out; + + pd_provider = kzalloc(sizeof(*pd_provider), GFP_KERNEL); + if (!pd_provider) + goto free_pd; + + pd->name = kasprintf(GFP_KERNEL, "%pOF", np); + if (!pd->name) + goto free_pd_prov; + + /* + * For OSI mode, parse the domain idle states and let genpd manage the + * state selection for those being compatible with "domain-idle-state". + */ + if (psci_has_osi_support()) { + ret = psci_pd_parse_states(np, &states, &state_count); + if (ret) + goto free_name; + } + + pd->name = kbasename(pd->name); + pd->power_off = psci_pd_power_off; + pd->states = states; + pd->state_count = state_count; + pd->flags |= GENPD_FLAG_IRQ_SAFE | GENPD_FLAG_CPU_DOMAIN; + + /* Use governor for CPU PM domains if it has some states to manage. */ + pd_gov = state_count > 0 ? &pm_domain_cpu_gov : NULL; + + ret = pm_genpd_init(pd, pd_gov, false); + if (ret) + goto free_state; + + ret = of_genpd_add_provider_simple(np, pd); + if (ret) + goto remove_pd; + + pd_provider->node = of_node_get(np); + list_add(&pd_provider->link, &psci_pd_providers); + + pr_debug("init PM domain %s\n", pd->name); + return 0; + +remove_pd: + pm_genpd_remove(pd); +free_state: + for (i = 0; i < state_count; i++) + kfree(states[i].data); + kfree(states); +free_name: + kfree(pd->name); +free_pd_prov: + kfree(pd_provider); +free_pd: + kfree(pd); +out: + pr_err("failed to init PM domain ret=%d %pOF\n", ret, np); + return ret; +} + +static void psci_pd_remove(void) +{ + struct psci_pd_provider *pd_provider, *it; + struct generic_pm_domain *genpd; + int i; + + list_for_each_entry_safe(pd_provider, it, &psci_pd_providers, link) { + of_genpd_del_provider(pd_provider->node); + + genpd = of_genpd_remove_last(pd_provider->node); + if (!IS_ERR(genpd)) { + for (i = 0; i < genpd->state_count; i++) + kfree(genpd->states[i].data); + kfree(genpd->states); + kfree(genpd); + } + + of_node_put(pd_provider->node); + list_del(&pd_provider->link); + kfree(pd_provider); + } +} + +static int psci_pd_init_topology(struct device_node *np) +{ + struct device_node *node; + struct of_phandle_args child, parent; + int ret; + + for_each_child_of_node(np, node) { + if (of_parse_phandle_with_args(node, "power-domains", + "#power-domain-cells", 0, &parent)) + continue; + + child.np = node; + child.args_count = 0; + + ret = of_genpd_add_subdomain(&parent, &child); + of_node_put(parent.np); + if (ret) { + of_node_put(node); + return ret; + } + } + + return 0; +} + +int psci_dt_init_pm_domains(struct device_node *np) +{ + struct device_node *node; + int ret, pd_count = 0; + + /* + * Parse child nodes for the "#power-domain-cells" property and + * initialize a genpd/genpd-of-provider pair when it's found. + */ + for_each_child_of_node(np, node) { + if (!of_find_property(node, "#power-domain-cells", NULL)) + continue; + + ret = psci_pd_init(node); + if (ret) + goto put_node; + + pd_count++; + } + + /* Bail out if not using the hierarchical CPU topology. */ + if (!pd_count) + return 0; + + /* Link genpd masters/subdomains to model the CPU topology. */ + ret = psci_pd_init_topology(np); + if (ret) + goto remove_pd; + + /* Try to enable OSI mode if supported. */ + if (psci_has_osi_support()) + osi_mode_enabled = psci_set_osi_mode(); + + pr_info("Initialized CPU PM domain topology\n"); + return pd_count; + +put_node: + of_node_put(node); +remove_pd: + if (pd_count) + psci_pd_remove(); + pr_err("failed to create CPU PM domains ret=%d\n", ret); + return ret; +} +#endif From patchwork Thu Nov 29 17:46:52 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152444 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672516ljp; Thu, 29 Nov 2018 09:47:41 -0800 (PST) X-Received: by 2002:a2e:5654:: with SMTP id k81-v6mr1713283ljb.48.1543513661928; Thu, 29 Nov 2018 09:47:41 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513661; cv=none; d=google.com; s=arc-20160816; b=EBawtqCWf9w9Gn9Wrh547OfRvHAFAZ5qGxd2mEZLM1/jHr3H4W6cyNJb7yCmz2wd6p Va/VbvnDVFNJvv6POw/var6UsHcA74B8Xu/pRpu24e6Zf6bHSjbUr31fNv1TOv3dVTFy 3qXBzBhwqK2qTTFDWesrQP3vQJNjI967PmZsr4hXRHQdKMGx57PCcPchAVI8YkcITL9M cbU2d2eoNjR3wDp/zdCptX5Vr05wdO02OSMzffmssJM3Ltc3uVnlEmkr2sBkvJuisUyu dDzwjbpM67Zv+8Cz34IggngSvWfqhW9wVEC3PK8TIiLXaaoKaHDtSWVG1sLBLLuAZP+O fkoQ== ARC-Message-Signature: i=1; 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:41 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 19/27] drivers: firmware: psci: Add hierarchical domain idle states converter Date: Thu, 29 Nov 2018 18:46:52 +0100 Message-Id: <20181129174700.16585-20-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> If the hierarchical CPU topology is used, but the OS initiated mode isn't supported, we rely solely on the regular cpuidle framework to manage the idle state selection. For this reason, introduce a new PSCI DT helper function, psci_dt_pm_domains_parse_states(), which converts the hierarchically described domain idle states, into regular flattened cpuidle states. During the conversion, let's also insert the converted states into the cpuidle driver's array of idle states, as to enables the cpuidle framework to manage them. Signed-off-by: Ulf Hansson --- Changes in v10: - New patch. --- drivers/firmware/psci/psci.h | 2 + drivers/firmware/psci/psci_pm_domain.c | 108 +++++++++++++++++++++++++ 2 files changed, 110 insertions(+) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.h b/drivers/firmware/psci/psci.h index 8cf6d7206fab..05af462cc96e 100644 --- a/drivers/firmware/psci/psci.h +++ b/drivers/firmware/psci/psci.h @@ -13,6 +13,8 @@ int psci_dt_parse_state_node(struct device_node *np, u32 *state); #ifdef CONFIG_CPU_IDLE int psci_dt_init_pm_domains(struct device_node *np); +int psci_dt_pm_domains_parse_states(struct cpuidle_driver *drv, + struct device_node *cpu_node, u32 *psci_states); #else static inline int psci_dt_init_pm_domains(struct device_node *np) { return 0; } #endif diff --git a/drivers/firmware/psci/psci_pm_domain.c b/drivers/firmware/psci/psci_pm_domain.c index d0dc38e96f85..6c9d6a644c7f 100644 --- a/drivers/firmware/psci/psci_pm_domain.c +++ b/drivers/firmware/psci/psci_pm_domain.c @@ -14,6 +14,10 @@ #include #include #include +#include +#include + +#include #include "psci.h" @@ -97,6 +101,53 @@ static int psci_pd_parse_states(struct device_node *np, return ret; } +static int psci_pd_enter_pc(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx) +{ + return CPU_PM_CPU_IDLE_ENTER(arm_cpuidle_suspend, idx); +} + +static void psci_pd_enter_s2idle_pc(struct cpuidle_device *dev, + struct cpuidle_driver *drv, int idx) +{ + psci_pd_enter_pc(dev, drv, idx); +} + +static void psci_pd_convert_states(struct cpuidle_state *idle_state, + u32 *psci_state, struct genpd_power_state *state) +{ + u32 *state_data = state->data; + u64 target_residency_us = state->residency_ns; + u64 exit_latency_us = state->power_on_latency_ns + + state->power_off_latency_ns; + + *psci_state = *state_data; + do_div(target_residency_us, 1000); + idle_state->target_residency = target_residency_us; + do_div(exit_latency_us, 1000); + idle_state->exit_latency = exit_latency_us; + idle_state->enter = &psci_pd_enter_pc; + idle_state->enter_s2idle = &psci_pd_enter_s2idle_pc; + idle_state->flags |= CPUIDLE_FLAG_TIMER_STOP; + + strncpy(idle_state->name, to_of_node(state->fwnode)->name, + CPUIDLE_NAME_LEN - 1); + strncpy(idle_state->desc, to_of_node(state->fwnode)->name, + CPUIDLE_NAME_LEN - 1); +} + +static bool psci_pd_is_provider(struct device_node *np) +{ + struct psci_pd_provider *pd_prov, *it; + + list_for_each_entry_safe(pd_prov, it, &psci_pd_providers, link) { + if (pd_prov->node == np) + return true; + } + + return false; +} + static int psci_pd_init(struct device_node *np) { struct generic_pm_domain *pd; @@ -259,4 +310,61 @@ int psci_dt_init_pm_domains(struct device_node *np) pr_err("failed to create CPU PM domains ret=%d\n", ret); return ret; } + +int psci_dt_pm_domains_parse_states(struct cpuidle_driver *drv, + struct device_node *cpu_node, u32 *psci_states) +{ + struct genpd_power_state *pd_states; + struct of_phandle_args args; + int ret, pd_state_count, i, idx, psci_idx = drv->state_count - 2; + struct device_node *np = of_node_get(cpu_node); + + /* Walk the CPU topology to find compatible domain idle states. */ + while (np) { + ret = of_parse_phandle_with_args(np, "power-domains", + "#power-domain-cells", 0, &args); + of_node_put(np); + if (ret) + return 0; + + np = args.np; + + /* Verify that the node represents a psci pd provider. */ + if (!psci_pd_is_provider(np)) { + of_node_put(np); + return 0; + } + + /* Parse for compatible domain idle states. */ + ret = psci_pd_parse_states(np, &pd_states, &pd_state_count); + if (ret) { + of_node_put(np); + return ret; + } + + i = 0; + idx = drv->state_count; + while (i < pd_state_count && idx < CPUIDLE_STATE_MAX) { + psci_pd_convert_states(&drv->states[idx + i], + &psci_states[idx - 1 + i], &pd_states[i]); + + /* + * In the hierarchical CPU topology the master PM domain + * idle state's DT property, "arm,psci-suspend-param", + * don't contain the bits for the idle state of the CPU. + * Take that into account here. + */ + psci_states[idx - 1 + i] |= psci_states[psci_idx]; + pr_debug("psci-power-state %#x index %d\n", + psci_states[idx - 1 + i], idx - 1 + i); + + kfree(pd_states[i].data); + i++; + } + drv->state_count += i; + kfree(pd_states); + } + + return 0; +} #endif From patchwork Thu Nov 29 17:46:54 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152445 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672582ljp; Thu, 29 Nov 2018 09:47:45 -0800 (PST) X-Received: by 2002:a19:26ce:: with SMTP id m197mr1599709lfm.23.1543513665442; Thu, 29 Nov 2018 09:47:45 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513665; cv=none; d=google.com; s=arc-20160816; b=DMqhcHyAtmVnkXS3lJwxtCODEeujvSaf8RWZB1JAven+uwT+bBdae33QoP2GsEhYXr W11y4CxPbi29TR0Se4y+Krf5d2Iq2RFmpxntwPxlS6Bjc9bUy1wU+GwLlpCVuKb8ZAlk F2k/5yqjbbYTAiG9lElvhe3TeUOtDSdJiau/xp4lUYRCMEiImsMGaTXMMAakXzwHm1G2 i4ASqoPL1KkT6CT52F6gf5FFpztGNBPDGSKl8SCReCQRQBE0NT6LrjvnvGAga6iDUvPX OopXb+KAv0toWNRcK2Gw7pVSmGf7xvmhWng259XtQtr6Z0iMRrx00TzODGatHHrpA/SC oKUg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:44 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 21/27] drivers: firmware: psci: Add a helper to attach a CPU to its PM domain Date: Thu, 29 Nov 2018 18:46:54 +0100 Message-Id: <20181129174700.16585-22-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> Introduce a new PSCI DT helper function, psci_dt_attach_cpu(), which takes a CPU number as an in-parameter and attaches the CPU's struct device to its corresponding PM domain. Additionally, the helper prepares the CPU to be power managed via runtime PM, which is the last step needed to enable the interaction with the PM domain through the runtime PM callbacks. Signed-off-by: Ulf Hansson --- Changes in v10: - New patch: Replaces "PM / Domains: Add helper functions to attach/detach CPUs to/from genpd". --- drivers/firmware/psci/psci.h | 1 + drivers/firmware/psci/psci_pm_domain.c | 19 +++++++++++++++++++ 2 files changed, 20 insertions(+) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.h b/drivers/firmware/psci/psci.h index 05af462cc96e..fbc9980dee69 100644 --- a/drivers/firmware/psci/psci.h +++ b/drivers/firmware/psci/psci.h @@ -15,6 +15,7 @@ int psci_dt_parse_state_node(struct device_node *np, u32 *state); int psci_dt_init_pm_domains(struct device_node *np); int psci_dt_pm_domains_parse_states(struct cpuidle_driver *drv, struct device_node *cpu_node, u32 *psci_states); +int psci_dt_attach_cpu(int cpu); #else static inline int psci_dt_init_pm_domains(struct device_node *np) { return 0; } #endif diff --git a/drivers/firmware/psci/psci_pm_domain.c b/drivers/firmware/psci/psci_pm_domain.c index 6c9d6a644c7f..b0fa7da8a0ce 100644 --- a/drivers/firmware/psci/psci_pm_domain.c +++ b/drivers/firmware/psci/psci_pm_domain.c @@ -12,8 +12,10 @@ #include #include #include +#include #include #include +#include #include #include @@ -367,4 +369,21 @@ int psci_dt_pm_domains_parse_states(struct cpuidle_driver *drv, return 0; } + +int psci_dt_attach_cpu(int cpu) +{ + struct device *dev = get_cpu_device(cpu); + int ret; + + ret = dev_pm_domain_attach(dev, true); + if (ret) + return ret; + + pm_runtime_irq_safe(dev); + pm_runtime_get_noresume(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + return 0; +} #endif From patchwork Thu Nov 29 17:46:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152446 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672620ljp; Thu, 29 Nov 2018 09:47:48 -0800 (PST) X-Received: by 2002:a19:4345:: with SMTP id m5mr1608059lfj.142.1543513668168; Thu, 29 Nov 2018 09:47:48 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513668; cv=none; d=google.com; s=arc-20160816; b=ZS6hV/AgUO/OXMVDtKTAVmzUeTWHbqXq4nn9S4KhFkixQH/hrgKmI0qqPoADfa27Kt W5GWQHx16c8pJ5tBnH2CH/jOdUJ/DN4cloY/pC1mv3JbSZClyqzgV7giVqzmWLrbygjl x3jF2VWIJHmO81ghppdoBKtuq2mpkbT8/9RPgwDFwI6xn6NcLcQgGZKrn3+FXdpmrg1D oBLdcUUVl0UbVn10Y+JNM/sIdgGCcn7DZ9IVlvDN47ptvv0vBDBmarTJaHB4BVfuzHTe 11BYxaqFI6ySSE2AASLhcsH0pkAlsR0ehV0hKUHiAmN2FsnhqrwbKFZR7hp8dvCzHwLN b/5A== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=RFaG8cXFhArmCpS6rP1BJYuJ7tPHpHBulh3EEudBMoM=; b=wGC0WWVssqSCf0UDllboq2K2VYFu039O+JgDdbDrB03BX/mjxlzYtCOzOFdMonG4hu Vl73ZSR55MTDWmC1b3HYet9kIxI4HtvtZZqLyWQccziAewah0oNv4UXk3O0PvErxjIMA fEVDJYXNdxlaZiNSklhK0b1dUGWKtiXAOAZIO7ye3l0V6i03ElekXir1ZB8o3QLyjbqf 7aFft98IQ+PLhd6xqZW5d0S0DtR5sIT6jwQjSRe1BYhgjm/wsRVNaLGK+BnitzjVFFJ2 m0j5Ob8oj/PJn741SHI03rrx0co4cE5LeYnH5VqY1iTVQbEGFiTwrReGNQTp0yUCAv9h /HoQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=YsyItLbV; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.45 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:46 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 22/27] drivers: firmware: psci: Attach the CPU's device to its PM domain Date: Thu, 29 Nov 2018 18:46:55 +0100 Message-Id: <20181129174700.16585-23-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> In order to allow the CPU to be power managed through a potential PM domain and the corresponding topology, it needs to be attached to it. For that reason, check if the PM domain data structures have been initiated for PSCI and if so, let's try to attach the CPU device to its PM domain. However, before attaching the CPU to its PM domain, we need to check whether the PSCI firmware supports OS initiated mode or not. If that isn't the case, we rely solely on the cpuidle framework to deal with the idle state selection, which means we need to parse DT and convert the hierarchical described domain idle states into regular cpuidle states, hence let's do that. Signed-off-by: Ulf Hansson --- Changes in v10: - Attach CPU devices to their PM domains, regardless of OSI mode or PC mode. - For PC mode, convert domain idle states to generic cpuidle states to let the cpuidle driver manage them. --- drivers/firmware/psci/psci.c | 22 +++++++++++++++++++++- 1 file changed, 21 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 5b481e91ccab..94cd0431b004 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -327,7 +327,7 @@ static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, u32 *psci_states; struct device_node *state_node; - psci_states = kcalloc(num_state_nodes, sizeof(*psci_states), + psci_states = kcalloc(CPUIDLE_STATE_MAX, sizeof(*psci_states), GFP_KERNEL); if (!psci_states) return -ENOMEM; @@ -351,6 +351,26 @@ static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, goto free_mem; } + /* + * If the hierarchical CPU topology is used, let's attach the CPU device + * to its corresponding PM domain. If OSI mode isn't supported, pick up + * the additional cpuidle states, from the domain idle states described + * in the hierarchical DT layout, as to enable the cpuidle driver to + * manage them. + */ + if (psci_dt_topology) { + if (!psci_has_osi_support()) { + ret = psci_dt_pm_domains_parse_states(drv, cpu_node, + psci_states); + if (ret) + goto free_mem; + } + + ret = psci_dt_attach_cpu(cpu); + if (ret) + goto free_mem; + } + /* Idle states parsed correctly, initialize per-cpu pointer */ per_cpu(psci_power_state, cpu) = psci_states; return 0; From patchwork Thu Nov 29 17:46:56 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152447 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672643ljp; Thu, 29 Nov 2018 09:47:49 -0800 (PST) X-Received: by 2002:a19:cd50:: with SMTP id d77mr1610444lfg.125.1543513669367; Thu, 29 Nov 2018 09:47:49 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513669; cv=none; d=google.com; s=arc-20160816; b=wDNvWhJ23gyK2YOC3xVq8GACZtW91MDrxqyDjalKxOKQZmyAIhqcqacaFBteHAnlgf Rueq9BbLs5gry6Nz86dSgCegZfetapCJRwNxhWCXaxYlTV3xS06e37K08qGCSeMvrnYj 63/bzI0GD1rUGDLtE2fIA9d4deqzoUC4ILleaf8oNc93fWVbycX2eNkJs3JXTrYAA0fN 9Qw+IaAz4DdusaElVHHhmgXFIXklHeWe/I1ZR5hz2Ofau2hxQcLSYFIRlXRf/Gb260L7 TNWS3dLm3atzHPI2OWvutxmPLElFFivhOsc45NzeDyDTHUQ+Sn97x0bBrpPdD6nb1mFS MkgA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=00sBAXywF3WZULK8cp3GDi0TaSy7ngQJNGllHojB6lk=; b=TiNTIOe/3SgKq8pK1MWd02s02zpyaDQrYrLLMiHtDmvxdxv1nSHvHkfZb9sGziqkCC /WVPgKKDltytv9TQyqj6Oh3hIEogFkf2veHO54m3f0DngxtKJ3TcW9AMxfmglaA+ukbL FLjb+wH7SUObHNrj0yzEDOtoxZc2GxZyJ7d3JbG0dZBet+pR4nx9Botn0IpNCEUBsmlR QiGF3ilyoCg+UZiUy5FJhBdifZUNmNlOslU5Vl+UmG5nMpfXAqqtqi8+1nx221wTxdxe xbMkp9KpVVPTMo8/glNDeYoRLy2CBukaV7e21o1peGYAQH8Hxbc7mec2n4npt5qq3CS8 PPQA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=dKE3qxiT; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:48 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 23/27] drivers: firmware: psci: Manage runtime PM in the idle path for CPUs Date: Thu, 29 Nov 2018 18:46:56 +0100 Message-Id: <20181129174700.16585-24-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> When the hierarchical CPU topology layout is used in DT, let's allow the CPU to be power managed through its PM domain and via runtime PM. In other words, let's deploy runtime PM support to the PSCI driver during idle management of the CPU. Signed-off-by: Ulf Hansson --- Changes in v10: - New patch: Replaces the earlier patch "kernel/cpu_pm: Manage runtime PM in the idle path for CPUs". In the end it seemed like a better idea to start with something specific to PSCI, rather than (ab?)using the generic functions cpu_pm_enter|exit(). - Do runtime PM get/put for the deepest idle state for the CPU. --- drivers/firmware/psci/psci.c | 27 ++++++++++++++++++++++++++- 1 file changed, 26 insertions(+), 1 deletion(-) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index 94cd0431b004..b03bccce0a5d 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -20,6 +20,7 @@ #include #include #include +#include #include #include #include @@ -319,6 +320,7 @@ int psci_dt_parse_state_node(struct device_node *np, u32 *state) #ifdef CONFIG_CPU_IDLE static DEFINE_PER_CPU_READ_MOSTLY(u32 *, psci_power_state); +static DEFINE_PER_CPU_READ_MOSTLY(u32, psci_rpm_state_id); static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, struct device_node *cpu_node, int cpu) @@ -369,6 +371,9 @@ static int psci_dt_cpu_init_idle(struct cpuidle_driver *drv, ret = psci_dt_attach_cpu(cpu); if (ret) goto free_mem; + + /* Store index of deepest state to later for runtime PM. */ + per_cpu(psci_rpm_state_id, cpu) = drv->state_count - 1; } /* Idle states parsed correctly, initialize per-cpu pointer */ @@ -466,7 +471,9 @@ int psci_cpu_suspend_enter(unsigned long index) { int ret; u32 *state = __this_cpu_read(psci_power_state); - u32 composite_state = state[index - 1] | psci_get_domain_state(); + u32 composite_state, rpm_state_id; + bool runtime_pm = false; + struct device *dev = NULL; /* * idle state index 0 corresponds to wfi, should never be called @@ -475,11 +482,29 @@ int psci_cpu_suspend_enter(unsigned long index) if (WARN_ON_ONCE(!index)) return -EINVAL; + /* + * Do runtime PM if we are using the hierarchical CPU toplogy, but only + * when cpuidle have selected the deepest idle state for the CPU. + */ + if (psci_dt_topology) { + rpm_state_id = __this_cpu_read(psci_rpm_state_id); + runtime_pm = rpm_state_id == index; + if (runtime_pm) { + dev = get_cpu_device(smp_processor_id()); + pm_runtime_put_sync_suspend(dev); + } + } + + composite_state = state[index - 1] | psci_get_domain_state(); + if (!psci_power_state_loses_context(composite_state)) ret = psci_ops.cpu_suspend(composite_state, 0); else ret = cpu_suspend(index, psci_suspend_finisher); + if (runtime_pm) + pm_runtime_get_sync(dev); + /* Clear the domain state to start fresh when back from idle. */ psci_set_domain_state(0); From patchwork Thu Nov 29 17:46:57 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152448 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672684ljp; Thu, 29 Nov 2018 09:47:52 -0800 (PST) X-Received: by 2002:a19:f813:: with SMTP id a19mr1594176lff.67.1543513672293; Thu, 29 Nov 2018 09:47:52 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513672; cv=none; d=google.com; s=arc-20160816; b=xf8OJim7GBr2bD2twEgG46cDBWhsg/SbrDeLBMqpxFdoUdwdQCFEVPFmHD6fitOo+J PHC0E/nJCSPHgkeH0VY9aBLPOKg0gP20C1J9WBaCUGXC3L1f5W/iH/G4qtyw+W5C7MrO 9vhTnLh1xInAnrnHpgUst+n92Pfrdk1a6Dnk9MtBZZ2U00SHe7xEIawkxw5H7M9OKy50 Dk8lvoVachFIkGzFH9rDKvnYQxh7joYkTuDck5nl7XZ2f2TBAUkapO/xZZix2IGvG2FG 59paTc0np2NGVnANVS7NHq45eeod6C+b8cJskeOgz6a2p08spTdldwq4Jg4ZwUgTZi0i EaEw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=8XcXgSMicdNFExYNvXv93BQqc4PUMWszq8Q+N0PwQJQ=; b=CYWzOkrA9wtuzn6+H+K/de9VZEFw8zxZmG1fnAxrImBxm/2fq0br0EutBaci2NZ1bD WaaMzbjvYLZlc9FP8Tu1fnxCkNh+v4TRD0XaA9Ga1taLFYLikcOYW9XkkQvPwGIO6pRA h6yy8gXPT9TdsO3U5Wgr8Yft6hE+M2rqc2oOcj9aCOKaDb0nO5jvq4Ewj4KL4btS24wg 9EafD/i6FMMcsWKkUJisqpj00ZoscFf/spCmbzYXqXm3Ib6/q1WutY0f0ZBfXU9WztBM edtQbdWo9HSFAXqgmwhm4gJ9byA8JTEuY3hv2COztkhvfT/aR0tmpaq4tXQmpr6lbZrY SSVg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=UPPBOHan; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:50 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 24/27] drivers: firmware: psci: Support CPU hotplug for the hierarchical model Date: Thu, 29 Nov 2018 18:46:57 +0100 Message-Id: <20181129174700.16585-25-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> When the hierarchical CPU topology is used and when a CPU has been put offline (hotplug), that same CPU prevents its PM domain and thus also potential master PM domains, from being powered off. This is because genpd observes the CPU's struct device to remain being active from a runtime PM point of view. To deal with this, let's decrease the runtime PM usage count by calling pm_runtime_put_sync_suspend() of the CPU's struct device when putting it offline. Consequentially, we must then increase the runtime PM usage for the CPU, while putting it online again. Signed-off-by: Ulf Hansson --- Changes in v10: - Make it work when the hierarchical CPU topology is used, which may be used both for OSI and PC mode. - Rework the code to prevent "BUG: sleeping function called from invalid context". --- drivers/firmware/psci/psci.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) -- 2.17.1 diff --git a/drivers/firmware/psci/psci.c b/drivers/firmware/psci/psci.c index b03bccce0a5d..f62c4963eb62 100644 --- a/drivers/firmware/psci/psci.c +++ b/drivers/firmware/psci/psci.c @@ -15,6 +15,7 @@ #include #include +#include #include #include #include @@ -199,9 +200,20 @@ static int psci_cpu_suspend(u32 state, unsigned long entry_point) static int psci_cpu_off(u32 state) { + struct device *dev; int err; u32 fn; + /* + * When the hierarchical CPU topology is used, decrease the runtime PM + * usage count for the current CPU, as to allow other parts in the + * topology to enter low power states. + */ + if (psci_dt_topology) { + dev = get_cpu_device(smp_processor_id()); + pm_runtime_put_sync_suspend(dev); + } + fn = psci_function_id[PSCI_FN_CPU_OFF]; err = invoke_psci_fn(fn, state, 0, 0); return psci_to_linux_errno(err); @@ -209,6 +221,7 @@ static int psci_cpu_off(u32 state) static int psci_cpu_on(unsigned long cpuid, unsigned long entry_point) { + struct device *dev; int err; u32 fn; @@ -216,6 +229,13 @@ static int psci_cpu_on(unsigned long cpuid, unsigned long entry_point) err = invoke_psci_fn(fn, cpuid, entry_point, 0); /* Clear the domain state to start fresh. */ psci_set_domain_state(0); + + /* Increase runtime PM usage count if the hierarchical CPU toplogy. */ + if (!err && psci_dt_topology) { + dev = get_cpu_device(cpuid); + pm_runtime_get_sync(dev); + } + return psci_to_linux_errno(err); } From patchwork Thu Nov 29 17:46:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152449 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672716ljp; Thu, 29 Nov 2018 09:47:53 -0800 (PST) X-Received: by 2002:a2e:9f0b:: with SMTP id u11-v6mr1533569ljk.99.1543513673785; Thu, 29 Nov 2018 09:47:53 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513673; cv=none; d=google.com; s=arc-20160816; b=d8TJDbW4e7B/23ou7ixID/ljVedOibYZWXbod5mIsdXfA0o8lwx8os/DdskrwvMvWr vbpx1cwGePPpaTn9KEtwQuQlFiUOAEvdjn8gEXGMdUr5mONEXzD5zsl4f00NZrMboa6+ reFu5NYEMK0I2BX+8FMIffnf9le7vbjrnrEF4hiEsC5c4rPXiErLBo1YdHJeaKR3vNr4 zaMr6cFECcUPaPDIbsKYLm/YTpwA/Ey9IoCH2r87UBjPPbw7raHMQPkVBsG7Ic8AaJHS aZBriQfTqXa+gDxH7074e5CXd61WnubgI2xsTuCCThfsVzgjKHMkSDxXr/H01clRFMBb OmLg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=creKAO5CsDdP5/fdWi07H8cJaJAAKbloLoHhussbOK8=; b=iGC0co2dSKN8/ZzWbmTV0VZqLv6E4K8AuFw+amSpiNc7UazQXFj/1ZjAmr8+iAV+LV llDYYuBSAVstHwSGsYZ9UXDrI2Oas5YzEVH5+BlSKEYB7Mbx1doxvd8ZVKqFvBC7cBws ntDgfPr+cdEFKK5t9pXdweXOo8S3SX0a7HL4Ztl6OGDvf1snSkRUCheimqPzWPnOK0IC h2VZcEPYxRNFzi1CRAcrcGcCRjdTYHKdoT88h7HZC6fG46gfr3BSyh2t6SCRoj+sEANS EKNgMY3VKf2pCjt5BZPiP5523tXoGCdx1LawZF06Q66IE77vHlw/w/jzEbAMba1UvW6J 7XlQ== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=Oq4RLwG9; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.51 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:52 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Catalin Marinas , Will Deacon Subject: [PATCH v10 25/27] arm64: kernel: Respect the hierarchical CPU topology in DT for PSCI Date: Thu, 29 Nov 2018 18:46:58 +0100 Message-Id: <20181129174700.16585-26-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> To let the PSCI driver parse for the hierarchical CPU topology in DT and thus potentially initiate the corresponding PM domain data structures, let's call psci_dt_topology_init() from the existing topology_init() subsys_initcall. Cc: Catalin Marinas Cc: Will Deacon Cc: Lina Iyer Co-developed-by: Lina Iyer Signed-off-by: Ulf Hansson --- Changes in v10: - None. --- arch/arm64/kernel/setup.c | 3 +++ 1 file changed, 3 insertions(+) -- 2.17.1 diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c index f4fc1e0544b7..4d59a72f8b0b 100644 --- a/arch/arm64/kernel/setup.c +++ b/arch/arm64/kernel/setup.c @@ -364,6 +364,9 @@ static int __init topology_init(void) { int i; + if (acpi_disabled) + psci_dt_topology_init(); + for_each_online_node(i) register_one_node(i); From patchwork Thu Nov 29 17:46:59 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152450 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672750ljp; Thu, 29 Nov 2018 09:47:55 -0800 (PST) X-Received: by 2002:a19:200b:: with SMTP id g11mr1629857lfg.58.1543513675556; Thu, 29 Nov 2018 09:47:55 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513675; cv=none; d=google.com; s=arc-20160816; b=QNCwTNcs4PQLS4ikvn5WlurBykoEesCoCog+6rBaKJkTpGYkUdIx5aHSKwukZ0aOe0 8vC2tX26/lJj0m9UsGZU4eTmAq198iSAQ/Z8WavPgH8apHTYGOqW251PC/CpsNqQWB2s FkiEsnT4xzJ5rB0aaoPHMC0Nec6FB8kVzrJnMLC0TiNjD5u3/8BVgeUN+mEnIa511WXr nk9dMJhjVqo+3fZ6DV3WC2v3pFa2znC8l77FLTlaTc9G/NgSXEk93hCNeiBe/oNz06aB W/9qpO20oANiixUaANXWuVzhPeMWT2wxiI+ZPsxYtqDhGxToUM9QS9KSUZeNpknHXzfx wKEQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=Qhm2IiUZApJ/TAq2ykdaaOR5m9yofOsDK7mxY+y8g9A=; b=s/CYrauXZ1cDunHEbyeIdXaHjcfZemcAwhI5kbxvCReU2czu7cf7SGcMVeZnu2T5t9 LJgQcrSr6LHtq4/XtIe5xQqtUJ3ihxr8R/oqKuNaDjEeaBGS2c9M4uMow4eBfRSrHdoU xHN6lLey5qNgLxPLN5YzUJ3KOyZVqJ5LUUoYgyeT8+qxGR7nUsPAZjCrMFF+8zXiD0e3 Uri7TmM5YDbUSsh70pVLsDD/Qk+BxiYV4hyEFq2hebzvAThYC3DLeA0fZZt2eDLDetOn J0sfg44DVCH8B3DiPDdohz/JWSyK1XwXf0Vu68eNpjvvMD4xH7z29PJdrgzLO7yC3qeN VNRA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=f1AF3JDL; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:54 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org, Lina Iyer , Andy Gross , David Brown Subject: [PATCH v10 26/27] arm64: dts: Convert to the hierarchical CPU topology layout for MSM8916 Date: Thu, 29 Nov 2018 18:46:59 +0100 Message-Id: <20181129174700.16585-27-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> From: Lina Iyer In the hierarchical layout, we are creating power domains around each CPU and describes the idle states for them inside the power domain provider node. Note that, the CPU's idle states still needs to be compatible with "arm,idle-state". Furthermore, represent the CPU cluster as a separate master power domain, powering the CPU's power domains. The cluster node, contains the idle states for the cluster and each idle state needs to be compatible with the "domain-idle-state". If the running platform is using a PSCI FW that supports the OS initiated CPU suspend mode, which likely should be the case unless the PSCI FW is very old, this change triggers the PSCI driver to enable it. Cc: Andy Gross Cc: David Brown Cc: Lina Iyer Signed-off-by: Lina Iyer Co-developed-by: Ulf Hansson Signed-off-by: Ulf Hansson --- Changes in v10: - Added power-domain-names property to the CPU nodes, as to avoid possible future churns, if ever multiple power-domains specifiers. --- arch/arm64/boot/dts/qcom/msm8916.dtsi | 57 +++++++++++++++++++++++++-- 1 file changed, 53 insertions(+), 4 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi index d302d8d639a1..cfafce4bfdf0 100644 --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi @@ -110,10 +110,11 @@ reg = <0x0>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; CPU1: cpu@1 { @@ -122,10 +123,11 @@ reg = <0x1>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; CPU2: cpu@2 { @@ -134,10 +136,11 @@ reg = <0x2>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; CPU3: cpu@3 { @@ -146,10 +149,11 @@ reg = <0x3>; next-level-cache = <&L2_0>; enable-method = "psci"; - cpu-idle-states = <&CPU_SPC>; clocks = <&apcs 0>; operating-points-v2 = <&cpu_opp_table>; #cooling-cells = <2>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; L2_0: l2-cache { @@ -166,12 +170,57 @@ min-residency-us = <2000>; local-timer-stop; }; + + CLUSTER_RET: cluster-retention { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000010>; + entry-latency-us = <500>; + exit-latency-us = <500>; + min-residency-us = <2000>; + }; + + CLUSTER_PWRDN: cluster-gdhs { + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000030>; + entry-latency-us = <2000>; + exit-latency-us = <2000>; + min-residency-us = <6000>; + }; }; }; psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&CPU_SPC>; + }; + + CLUSTER_PD: cluster-pd { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_RET>, <&CLUSTER_PWRDN>; + }; }; pmu { From patchwork Thu Nov 29 17:47:00 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ulf Hansson X-Patchwork-Id: 152451 Delivered-To: patches@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp2672788ljp; Thu, 29 Nov 2018 09:47:58 -0800 (PST) X-Received: by 2002:a19:c954:: with SMTP id z81mr1602667lff.150.1543513678100; Thu, 29 Nov 2018 09:47:58 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543513678; cv=none; d=google.com; s=arc-20160816; b=djKqGE2rQ7Ls5CO7hh03JI6eLYVY74vCXktqx2OjP8b1IwnEZr81uQUuMxT+dFAF9U cSrCbDuhDnNHfQlwwbsvL3h7wPau5yAAsoTRdB37gFy/dYIVmMXOgUcFh2JhGRx2z3H2 3j1QyjdZPZKfGs5i5zpveq9ZRqttO7g5r7QKsemC+Wg9XDoFHKVsHD6U+DNsY0aedOTs T/xQA4iCARjp35rvRbcJv1Bak5dbATR0Q9JdOFR6Zy6YMheXaFJG1OmILB7sj8ml3GBx 1I4oK3pXYDegzNlW9BnL99SKXWDLo/gjmLIGJk/CpI6MJQzy7acbdw1OKnC5FphgMaZZ CEFw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=references:in-reply-to:message-id:date:subject:cc:to:from :dkim-signature; bh=edUuds9oK7rq3a7y1o1twsgnSy+L5oYmA4xb9WHJ9+k=; b=VLlfXytcVC+L5Epf4rezsDW7cijJxxgV6pLrDg/ZltSdZ0iLkBNar/nN1tOiMoEoHh VLtE3jr/b90OzjXrxq0jvtqOa9ckKavuz7Pi6EeHhuIuh80a86ESIFdZTC7TZ4nHVN4X i7dGFAXck7WhBQtza2L/TIklV3e8MPrm6vXR4KDrWmsxK/uxE3xZSX4JukkDumffXRlI sWbe83O3wANjvjCHCpjksqmenZkXOpuy57Qm1UGTFih4wwDbJl3gAzRDYK7AZIp1m2H9 14GAv1SlmeLtlx5fjBfn/hnYRp+UtZ3vB5NHRt6M+S9jgSszQtQzUbAMHigwJrIZfghM 1D/g== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="A6wx/B1l"; spf=pass (google.com: domain of ulf.hansson@linaro.org designates 209.85.220.65 as permitted sender) smtp.mailfrom=ulf.hansson@linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from mail-sor-f65.google.com (mail-sor-f65.google.com. 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[158.174.22.210]) by smtp.gmail.com with ESMTPSA id j76-v6sm393983ljb.12.2018.11.29.09.47.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 29 Nov 2018 09:47:56 -0800 (PST) From: Ulf Hansson To: "Rafael J . Wysocki" , Sudeep Holla , Lorenzo Pieralisi , Mark Rutland , Daniel Lezcano , linux-pm@vger.kernel.org Cc: "Raju P . L . S . S . S . N" , Stephen Boyd , Tony Lindgren , Kevin Hilman , Lina Iyer , Ulf Hansson , Viresh Kumar , Vincent Guittot , Geert Uytterhoeven , linux-arm-kernel@lists.infradead.org, linux-arm-msm@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v10 27/27] arm64: dts: hikey: Convert to the hierarchical CPU topology layout Date: Thu, 29 Nov 2018 18:47:00 +0100 Message-Id: <20181129174700.16585-28-ulf.hansson@linaro.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181129174700.16585-1-ulf.hansson@linaro.org> References: <20181129174700.16585-1-ulf.hansson@linaro.org> To enable the OS to manage last-man standing activities for a CPU, while an idle state for a group of CPUs is selected, let's convert the Hikey platform into using the hierarchical CPU topology layout. Signed-off-by: Ulf Hansson --- Changes in v10: - New patch. --- arch/arm64/boot/dts/hisilicon/hi6220.dtsi | 87 ++++++++++++++++++++--- 1 file changed, 76 insertions(+), 11 deletions(-) -- 2.17.1 diff --git a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi index 97d5bf2c6ec5..fa5b385cfbc4 100644 --- a/arch/arm64/boot/dts/hisilicon/hi6220.dtsi +++ b/arch/arm64/boot/dts/hisilicon/hi6220.dtsi @@ -20,6 +20,64 @@ psci { compatible = "arm,psci-0.2"; method = "smc"; + + CPU_PD0: cpu-pd0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD1: cpu-pd1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD2: cpu-pd2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD3: cpu-pd3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD0>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD4: cpu-pd4 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD5: cpu-pd5 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD6: cpu-pd6 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CPU_PD7: cpu-pd7 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD1>; + domain-idle-states = <&CPU_SLEEP>; + }; + + CLUSTER_PD0: cluster-pd0 { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; + + CLUSTER_PD1: cluster-pd1 { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_SLEEP>; + }; }; cpus { @@ -70,9 +128,8 @@ }; CLUSTER_SLEEP: cluster-sleep { - compatible = "arm,idle-state"; - local-timer-stop; - arm,psci-suspend-param = <0x1010000>; + compatible = "domain-idle-state"; + arm,psci-suspend-param = <0x1000000>; entry-latency-us = <1000>; exit-latency-us = <700>; min-residency-us = <2700>; @@ -88,9 +145,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; }; cpu1: cpu@1 { @@ -101,9 +159,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; }; cpu2: cpu@2 { @@ -114,9 +173,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; }; cpu3: cpu@3 { @@ -127,9 +187,10 @@ next-level-cache = <&CLUSTER0_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; }; cpu4: cpu@100 { @@ -140,9 +201,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD4>; + power-domain-names = "psci"; }; cpu5: cpu@101 { @@ -153,9 +215,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD5>; + power-domain-names = "psci"; }; cpu6: cpu@102 { @@ -166,9 +229,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD6>; + power-domain-names = "psci"; }; cpu7: cpu@103 { @@ -179,9 +243,10 @@ next-level-cache = <&CLUSTER1_L2>; clocks = <&stub_clock 0>; operating-points-v2 = <&cpu_opp_table>; - cpu-idle-states = <&CPU_SLEEP &CLUSTER_SLEEP>; #cooling-cells = <2>; /* min followed by max */ dynamic-power-coefficient = <311>; + power-domains = <&CPU_PD7>; + power-domain-names = "psci"; }; CLUSTER0_L2: l2-cache0 {