From patchwork Sat Feb 19 15:28:13 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 544379 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CFA36C433F5 for ; Sat, 19 Feb 2022 15:28:30 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242519AbiBSP2q (ORCPT ); Sat, 19 Feb 2022 10:28:46 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:42156 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242517AbiBSP2p (ORCPT ); Sat, 19 Feb 2022 10:28:45 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [IPv6:2604:1380:4641:c500::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DBA455D1B4; Sat, 19 Feb 2022 07:28:26 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 78B1160B47; Sat, 19 Feb 2022 15:28:26 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 04E29C340F1; Sat, 19 Feb 2022 15:28:23 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645284505; bh=vUH/5R6TeSCnTi3AJJW3p5EjrFJ4SqZT0J7ODzHJu9g=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QXoTRyhqCw7q2oNqk0AzPctSLoPBI730vd0lzrpHqtkMMTxAdjHX+zvwhalzf01w9 4+A73snev4Z2tFNsA/M3bjPakA3t5ghH1zryud+HltQyba3u4mCku0Lz3nV3COQCmL M/C96vNw/4MtJFC2/967XfHoUitqRMrou/A26CocD5jsYNfVAosywnqImpGW7A2klE heYbGLZmma+OPyMZCjlnQmdJeX/5WyOSHIsDAbjoX9ccI7cesSXWkbJ3li/zjfy2Ty ZEe1wjLRIGQV/YbMAel/zWmJTHfMFu0HRYWS9q+lZTgCIsvZSvnQlx3W6mJ1WoSCRB ZroNOENQwBEug== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Stephen Boyd Cc: Gregory Clement , =?utf-8?q?Pali_Roh=C3=A1r?= , linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v9 1/6] math64: New DIV_U64_ROUND_CLOSEST helper Date: Sat, 19 Feb 2022 16:28:13 +0100 Message-Id: <20220219152818.4319-2-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220219152818.4319-1-kabel@kernel.org> References: <20220219152818.4319-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Pali Rohár Provide DIV_U64_ROUND_CLOSEST helper which uses div_u64 to perform division rounded to the closest integer using unsigned 64bit dividend and unsigned 32bit divisor. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Signed-off-by: Marek Behún --- include/linux/math64.h | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/include/linux/math64.h b/include/linux/math64.h index 2928f03d6d46..a14f40de1dca 100644 --- a/include/linux/math64.h +++ b/include/linux/math64.h @@ -300,6 +300,19 @@ u64 mul_u64_u64_div_u64(u64 a, u64 mul, u64 div); #define DIV64_U64_ROUND_CLOSEST(dividend, divisor) \ ({ u64 _tmp = (divisor); div64_u64((dividend) + _tmp / 2, _tmp); }) +/* + * DIV_U64_ROUND_CLOSEST - unsigned 64bit divide with 32bit divisor rounded to nearest integer + * @dividend: unsigned 64bit dividend + * @divisor: unsigned 32bit divisor + * + * Divide unsigned 64bit dividend by unsigned 32bit divisor + * and round to closest integer. + * + * Return: dividend / divisor rounded to nearest integer + */ +#define DIV_U64_ROUND_CLOSEST(dividend, divisor) \ + ({ u32 _tmp = (divisor); div_u64((u64)(dividend) + _tmp / 2, _tmp); }) + /* * DIV_S64_ROUND_CLOSEST - signed 64bit divide with 32bit divisor rounded to nearest integer * @dividend: signed 64bit dividend From patchwork Sat Feb 19 15:28:14 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 544255 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3689EC433FE for ; Sat, 19 Feb 2022 15:28:37 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242523AbiBSP2y (ORCPT ); Sat, 19 Feb 2022 10:28:54 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:42404 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242528AbiBSP2t (ORCPT ); Sat, 19 Feb 2022 10:28:49 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ED38A5D1B7; Sat, 19 Feb 2022 07:28:30 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id AD5E2B80B37; Sat, 19 Feb 2022 15:28:29 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 58EE5C340ED; Sat, 19 Feb 2022 15:28:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645284508; bh=HGDmoqf6QAg9tN/vdrXOfeQvC01SwZv+Smf86tASPxI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZvBnYhSIlllz6RNazGt9CUMcEuI13uOn3Jn8/vtTlvmMTQMc0UDDjC57NF9MhFsNE th4D3TB4/dePZ2ArW+dwajqtIunp61kOAWPHJWVfCSjvagxlu3zD2ZpRyr6KVh8Ag6 /LvIxLfT6ReT4OUVttqMp8Ql14CxnLT+d9Bys3fbRnWkXOTrVlIPvinlvpuz2epwRN Xg7K1SQk57K033VP4DzU5iqMZV93VviGSUpcmoSLYdlRdAaU3v46tKyNlXxIBThiLZ 83boEdiyglizeBiGdP7iDzLOtu5CuyLMsRqOLstzXov0XJ9szZguvc4bgLOwvvUwxp Y/XrWJry+ZHCA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Stephen Boyd Cc: Gregory Clement , =?utf-8?q?Pali_Roh=C3=A1r?= , linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v9 2/6] dt-bindings: mvebu-uart: document DT bindings for marvell,armada-3700-uart-clock Date: Sat, 19 Feb 2022 16:28:14 +0100 Message-Id: <20220219152818.4319-3-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220219152818.4319-1-kabel@kernel.org> References: <20220219152818.4319-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Pali Rohár Add DT bindings documentation for device nodes with compatible string "marvell,armada-3700-uart-clock". Signed-off-by: Pali Rohár Reviewed-by: Rob Herring Reviewed-by: Marek Behún Signed-off-by: Marek Behún Reviewed-by: Stephen Boyd --- .../clock/marvell,armada-3700-uart-clock.yaml | 59 +++++++++++++++++++ 1 file changed, 59 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml diff --git a/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml b/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml new file mode 100644 index 000000000000..175f5c8f2bc5 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/marvell,armada-3700-uart-clock.yaml @@ -0,0 +1,59 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/clock/marvell,armada-3700-uart-clock.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# +title: Marvell Armada 3720 UART clocks + +maintainers: + - Pali Rohár + +properties: + compatible: + const: marvell,armada-3700-uart-clock + + reg: + items: + - description: UART Clock Control Register + - description: UART 2 Baud Rate Divisor Register + + clocks: + description: | + List of parent clocks suitable for UART from following set: + "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal" + UART clock can use one from this set and when more are provided + then kernel would choose and configure the most suitable one. + It is suggest to specify at least one TBG clock to achieve + baudrates above 230400 and also to specify clock which bootloader + used for UART (most probably xtal) for smooth boot log on UART. + + clock-names: + items: + - const: TBG-A-P + - const: TBG-B-P + - const: TBG-A-S + - const: TBG-B-S + - const: xtal + minItems: 1 + + '#clock-cells': + const: 1 + +required: + - compatible + - reg + - clocks + - clock-names + - '#clock-cells' + +additionalProperties: false + +examples: + - | + uartclk: clock-controller@12010 { + compatible = "marvell,armada-3700-uart-clock"; + reg = <0x12010 0x4>, <0x12210 0x4>; + clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, <&tbg 3>, <&xtalclk>; + clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", "TBG-B-S", "xtal"; + #clock-cells = <1>; + }; From patchwork Sat Feb 19 15:28:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 544378 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 3ABDDC4332F for ; Sat, 19 Feb 2022 15:28:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242533AbiBSP2y (ORCPT ); Sat, 19 Feb 2022 10:28:54 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:42622 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242517AbiBSP2w (ORCPT ); Sat, 19 Feb 2022 10:28:52 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 13B225D1B4; Sat, 19 Feb 2022 07:28:34 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id AC63C60B35; Sat, 19 Feb 2022 15:28:33 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 38D08C340ED; Sat, 19 Feb 2022 15:28:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645284513; bh=joFOb9ssEeD6FFIt9cZVzlnJqB/wn955qUvBLR31Y0I=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=eleGP5L46u1/dZ4CgjxIbipK68kQU58WKKhlVC80g0LQn8Cf+3O5HWPn4k7pygAb1 xzxO7bC+XPgykB1jw43qGz7bwy2twH1rrxDowcL5Lwl8EQIXdZ5ZJ4H0uVI+GT7RJB PwGvgekE3NChYGhFDcA1xGgXwVbppETdRAX8wJl0vetr7B4KBCxmyFNvhkxzMiiR0E Mst9Cp8VyWvk34jB6ZYVmCAjBUUTdua0t34DOTw0cJYA/FoOBXn1TRO7k/iqTPo2uQ 25w3B+S/AF+3Hld8wo7ZSz4eNYApvY8KHv6PsfCIcflUfSLwu29lOxWcgkCmKHNNKl 1VLkgBY77YeEw== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Stephen Boyd Cc: Gregory Clement , =?utf-8?q?Pali_Roh=C3=A1r?= , linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v9 4/6] dt-bindings: mvebu-uart: update information about UART clock Date: Sat, 19 Feb 2022 16:28:16 +0100 Message-Id: <20220219152818.4319-5-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220219152818.4319-1-kabel@kernel.org> References: <20220219152818.4319-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Pali Rohár Device "marvell,armada-3700-uart" should use "marvell,armada-3700-uart-clock" compatible clock. Signed-off-by: Pali Rohár Reviewed-by: Rob Herring Reviewed-by: Marek Behún Signed-off-by: Marek Behún Reviewed-by: Stephen Boyd --- Documentation/devicetree/bindings/serial/mvebu-uart.txt | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/Documentation/devicetree/bindings/serial/mvebu-uart.txt b/Documentation/devicetree/bindings/serial/mvebu-uart.txt index 2d0dbdf32d1d..a062bbca532c 100644 --- a/Documentation/devicetree/bindings/serial/mvebu-uart.txt +++ b/Documentation/devicetree/bindings/serial/mvebu-uart.txt @@ -14,7 +14,10 @@ Required properties: is provided (possible only with the "marvell,armada-3700-uart" compatible string for backward compatibility), it will only work if the baudrate was initialized by the bootloader and no baudrate - change will then be possible. + change will then be possible. When provided it should be UART1-clk + for standard variant of UART and UART2-clk for extended variant + of UART. TBG clock (with UART TBG divisors d1=d2=1) or xtal clock + should not be used and are supported only for backward compatibility. - interrupts: - Must contain three elements for the standard variant of the IP (marvell,armada-3700-uart): "uart-sum", "uart-tx" and "uart-rx", @@ -34,7 +37,7 @@ Example: uart0: serial@12000 { compatible = "marvell,armada-3700-uart"; reg = <0x12000 0x18>; - clocks = <&xtalclk>; + clocks = <&uartclk 0>; interrupts = , , @@ -45,7 +48,7 @@ Example: uart1: serial@12200 { compatible = "marvell,armada-3700-uart-ext"; reg = <0x12200 0x30>; - clocks = <&xtalclk>; + clocks = <&uartclk 1>; interrupts = , ; From patchwork Sat Feb 19 15:28:17 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 544377 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id CDE91C433FE for ; Sat, 19 Feb 2022 15:28:53 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242574AbiBSP3L (ORCPT ); Sat, 19 Feb 2022 10:29:11 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43978 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242556AbiBSP3J (ORCPT ); Sat, 19 Feb 2022 10:29:09 -0500 Received: from ams.source.kernel.org (ams.source.kernel.org [IPv6:2604:1380:4601:e00::1]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 244575D641; Sat, 19 Feb 2022 07:28:38 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id C4BE8B80968; Sat, 19 Feb 2022 15:28:36 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8C8C7C340EF; Sat, 19 Feb 2022 15:28:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645284515; bh=r3iqPCoANxpwhUGnTd+JNF0yIf5d3A5itF0q+px7HIs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=cAS4vy5466az6eQ1Pqk0VeqKGk92+l2nyMfxbqgJjHRIoJScndcXCnCIySMhua7e+ nBcbZDPwTh5C2ELBQod8QIoa77a5qRx53K+6GV5Hw14hgDbJuYAqjCzELSqt/C0Vr+ ezTay4Z2icQUb+e8FfgPJPSZ1SJBQ5Pzq/haeOg4W4baApysYinOvgME0KLTLMAvl2 /d5UEGMqpm4IsqjOppJXhq6BEJ1gHV1HdZZ+wi9/E+2a/Ktuqbl5i2gbIl19KIxhAe RHmMzHCYWIvXpIqxOf/J6VjUNWYOgFgHm4mMshjTJGhN0U3LHzaOGbM/7J8LXR8wS2 NYnELHWMaHVmA== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Stephen Boyd Cc: Gregory Clement , =?utf-8?q?Pali_Roh=C3=A1r?= , linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v9 5/6] serial: mvebu-uart: implement support for baudrates higher than 230400 Bd Date: Sat, 19 Feb 2022 16:28:17 +0100 Message-Id: <20220219152818.4319-6-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220219152818.4319-1-kabel@kernel.org> References: <20220219152818.4319-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Pali Rohár Implement simple usage of fractional divisor. When main divisor D is too large to represent requested baudrate then use divisor M from the fractional divisor feature. All the M prescalers are set to the same and maximal value 63, so the fractional part of the fractional divisor is not used at all. We also determine upper limit for possible baudrates. Experiments show that UART at baudrate 1500000 Bd with this configuration is stable. So there is no need to implement complicated calculation of fractional coefficients yet. To use this feature with higher baudrates, it is required to use UART clock provided by UART clock driver. Default boot xtal clock is not capable of higher baudrates. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Signed-off-by: Marek Behún --- drivers/tty/serial/mvebu-uart.c | 83 ++++++++++++++++++++++++++------- 1 file changed, 65 insertions(+), 18 deletions(-) diff --git a/drivers/tty/serial/mvebu-uart.c b/drivers/tty/serial/mvebu-uart.c index 56278b29f5f5..2e9263888ddc 100644 --- a/drivers/tty/serial/mvebu-uart.c +++ b/drivers/tty/serial/mvebu-uart.c @@ -99,6 +99,7 @@ #define UART_OSAMP 0x14 #define OSAMP_DEFAULT_DIVISOR 16 #define OSAMP_DIVISORS_MASK 0x3F3F3F3F +#define OSAMP_MAX_DIVISOR 63 #define MVEBU_NR_UARTS 2 @@ -479,18 +480,60 @@ static int mvebu_uart_baud_rate_set(struct uart_port *port, unsigned int baud) return -EOPNOTSUPP; /* - * The baudrate is derived from the UART clock thanks to two divisors: - * > D ("baud generator"): can divide the clock from 2 to 2^10 - 1. - * > M ("fractional divisor"): allows a better accuracy for - * baudrates higher than 230400. + * The baudrate is derived from the UART clock thanks to divisors: + * > d1 * d2 ("TBG divisors"): can divide only TBG clock from 1 to 6 + * > D ("baud generator"): can divide the clock from 1 to 1023 + * > M ("fractional divisor"): allows a better accuracy (from 1 to 63) * - * As the derivation of M is rather complicated, the code sticks to its - * default value (x16) when all the prescalers are zeroed, and only - * makes use of D to configure the desired baudrate. + * Exact formulas for calculating baudrate: + * + * with default x16 scheme: + * baudrate = xtal / (d * 16) + * baudrate = tbg / (d1 * d2 * d * 16) + * + * with fractional divisor: + * baudrate = 10 * xtal / (d * (3 * (m1 + m2) + 2 * (m3 + m4))) + * baudrate = 10 * tbg / (d1*d2 * d * (3 * (m1 + m2) + 2 * (m3 + m4))) + * + * Oversampling value: + * osamp = (m1 << 0) | (m2 << 8) | (m3 << 16) | (m4 << 24); + * + * Where m1 controls number of clock cycles per bit for bits 1,2,3; + * m2 for bits 4,5,6; m3 for bits 7,8 and m4 for bits 9,10. + * + * To simplify baudrate setup set all the M prescalers to the same + * value. For baudrates 9600 Bd and higher, it is enough to use the + * default (x16) divisor or fractional divisor with M = 63, so there + * is no need to use real fractional support (where the M prescalers + * are not equal). + * + * When all the M prescalers are zeroed then default (x16) divisor is + * used. Default x16 scheme is more stable than M (fractional divisor), + * so use M only when D divisor is not enough to derive baudrate. + * + * Member port->uartclk is either xtal clock rate or TBG clock rate + * divided by (d1 * d2). So d1 and d2 are already set by the UART clock + * driver (and UART driver itself cannot change them). Moreover they are + * shared between both UARTs. */ + m_divisor = OSAMP_DEFAULT_DIVISOR; d_divisor = DIV_ROUND_CLOSEST(port->uartclk, baud * m_divisor); + if (d_divisor > BRDV_BAUD_MAX) { + /* + * Experiments show that small M divisors are unstable. + * Use maximal possible M = 63 and calculate D divisor. + */ + m_divisor = OSAMP_MAX_DIVISOR; + d_divisor = DIV_ROUND_CLOSEST(port->uartclk, baud * m_divisor); + } + + if (d_divisor < 1) + d_divisor = 1; + else if (d_divisor > BRDV_BAUD_MAX) + d_divisor = BRDV_BAUD_MAX; + spin_lock_irqsave(&mvebu_uart_lock, flags); brdv = readl(port->membase + UART_BRDV); brdv &= ~BRDV_BAUD_MASK; @@ -500,6 +543,9 @@ static int mvebu_uart_baud_rate_set(struct uart_port *port, unsigned int baud) osamp = readl(port->membase + UART_OSAMP); osamp &= ~OSAMP_DIVISORS_MASK; + if (m_divisor != OSAMP_DEFAULT_DIVISOR) + osamp |= (m_divisor << 0) | (m_divisor << 8) | + (m_divisor << 16) | (m_divisor << 24); writel(osamp, port->membase + UART_OSAMP); return 0; @@ -529,14 +575,16 @@ static void mvebu_uart_set_termios(struct uart_port *port, port->ignore_status_mask |= STAT_RX_RDY(port) | STAT_BRK_ERR; /* - * Maximal divisor is 1023 * 16 when using default (x16) scheme. - * Maximum achievable frequency with simple baudrate divisor is 230400. - * Since the error per bit frame would be of more than 15%, achieving - * higher frequencies would require to implement the fractional divisor - * feature. + * Maximal divisor is 1023 and maximal fractional divisor is 63. And + * experiments show that baudrates above 1/80 of parent clock rate are + * not stable. So disallow baudrates above 1/80 of the parent clock + * rate. If port->uartclk is not available, then + * mvebu_uart_baud_rate_set() fails, so values min_baud and max_baud + * in this case do not matter. */ - min_baud = DIV_ROUND_UP(port->uartclk, 1023 * 16); - max_baud = 230400; + min_baud = DIV_ROUND_UP(port->uartclk, BRDV_BAUD_MAX * + OSAMP_MAX_DIVISOR); + max_baud = port->uartclk / 80; baud = uart_get_baud_rate(port, termios, old, min_baud, max_baud); if (mvebu_uart_baud_rate_set(port, baud)) { @@ -1395,14 +1443,14 @@ static int mvebu_uart_clock_probe(struct platform_device *pdev) * Calculate the smallest TBG d1 and d2 divisors that * still can provide 9600 baudrate. */ - d1 = DIV_ROUND_UP(rate, 9600 * OSAMP_DEFAULT_DIVISOR * + d1 = DIV_ROUND_UP(rate, 9600 * OSAMP_MAX_DIVISOR * BRDV_BAUD_MAX); if (d1 < 1) d1 = 1; else if (d1 > CLK_TBG_DIV1_MAX) d1 = CLK_TBG_DIV1_MAX; - d2 = DIV_ROUND_UP(rate, 9600 * OSAMP_DEFAULT_DIVISOR * + d2 = DIV_ROUND_UP(rate, 9600 * OSAMP_MAX_DIVISOR * BRDV_BAUD_MAX * d1); if (d2 < 1) d2 = 1; @@ -1417,8 +1465,7 @@ static int mvebu_uart_clock_probe(struct platform_device *pdev) } /* Skip clock source which cannot provide 9600 baudrate */ - if (rate > 9600 * OSAMP_DEFAULT_DIVISOR * BRDV_BAUD_MAX * d1 * - d2) + if (rate > 9600 * OSAMP_MAX_DIVISOR * BRDV_BAUD_MAX * d1 * d2) continue; /* From patchwork Sat Feb 19 15:28:18 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 544254 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2B24BC4332F for ; Sat, 19 Feb 2022 15:28:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S242532AbiBSP3L (ORCPT ); Sat, 19 Feb 2022 10:29:11 -0500 Received: from mxb-00190b01.gslb.pphosted.com ([23.128.96.19]:43940 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S242557AbiBSP3J (ORCPT ); Sat, 19 Feb 2022 10:29:09 -0500 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id C594C5D647; Sat, 19 Feb 2022 07:28:38 -0800 (PST) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 60C4E60B20; Sat, 19 Feb 2022 15:28:38 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E0A50C004E1; Sat, 19 Feb 2022 15:28:35 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1645284517; bh=F6pcZPFpnI6hLMIYVmpuXloWiEvqSEfMam/xjyvdLDs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=dMOKL2ugYw+WQBj3ZZQVOq9CBHushdo1zYvAtdjLBBulSXfJCxtB2RB70mxRdh3Uh ZYRcyq4pgoZE0hi21EZUgZLGUBEdHYbpQ7+AqPMYjT8aeaE7RLgMOO/smC1jXlvwjm Q/sdx9DDPtm5A9x8tDuFkGuh39ujbcS2YQQRGELvoICo8W3of08RrEAW+MtNrqSFD3 8GbHqHZbW4letP1dhAsqbX0W5Qffp8DgxfIFidm5jpNEosdiO2Gb4jjxV7PB1KCauD 9owowxo0EQU1Br+wL0r+wc1ipLOZrV/Wp9QP+XmQyyg5mhhEMyi5yteqShfU6+mVXA +rJYplsFU8AQg== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Greg Kroah-Hartman , Stephen Boyd Cc: Gregory Clement , =?utf-8?q?Pali_Roh=C3=A1r?= , linux-clk@vger.kernel.org, linux-serial@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH v9 6/6] arm64: dts: marvell: armada-37xx: add device node for UART clock and use it Date: Sat, 19 Feb 2022 16:28:18 +0100 Message-Id: <20220219152818.4319-7-kabel@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220219152818.4319-1-kabel@kernel.org> References: <20220219152818.4319-1-kabel@kernel.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org From: Pali Rohár Define DT node for UART clock "marvell,armada-3700-uart-clock" and use this UART clock as a base clock for all UART devices. Signed-off-by: Pali Rohár Reviewed-by: Marek Behún Acked-by: Gregory CLEMENT Signed-off-by: Marek Behún --- arch/arm64/boot/dts/marvell/armada-37xx.dtsi | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi index 673f4906eef9..da2f6b5c4b20 100644 --- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi +++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi @@ -132,10 +132,20 @@ avs: avs@11500 { reg = <0x11500 0x40>; }; + uartclk: clock-controller@12010 { + compatible = "marvell,armada-3700-uart-clock"; + reg = <0x12010 0x4>, <0x12210 0x4>; + clocks = <&tbg 0>, <&tbg 1>, <&tbg 2>, + <&tbg 3>, <&xtalclk>; + clock-names = "TBG-A-P", "TBG-B-P", "TBG-A-S", + "TBG-B-S", "xtal"; + #clock-cells = <1>; + }; + uart0: serial@12000 { compatible = "marvell,armada-3700-uart"; reg = <0x12000 0x18>; - clocks = <&xtalclk>; + clocks = <&uartclk 0>; interrupts = , , @@ -147,7 +157,7 @@ uart0: serial@12000 { uart1: serial@12200 { compatible = "marvell,armada-3700-uart-ext"; reg = <0x12200 0x30>; - clocks = <&xtalclk>; + clocks = <&uartclk 1>; interrupts = , ;