From patchwork Wed Mar 2 01:29:30 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bjorn Andersson X-Patchwork-Id: 548237 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 04251C433F5 for ; Wed, 2 Mar 2022 01:27:45 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237840AbiCBB2Y (ORCPT ); Tue, 1 Mar 2022 20:28:24 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:51726 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S233682AbiCBB2W (ORCPT ); Tue, 1 Mar 2022 20:28:22 -0500 Received: from mail-oo1-xc29.google.com (mail-oo1-xc29.google.com [IPv6:2607:f8b0:4864:20::c29]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id ADCCD39B86 for ; Tue, 1 Mar 2022 17:27:39 -0800 (PST) Received: by mail-oo1-xc29.google.com with SMTP id s203-20020a4a3bd4000000b003191c2dcbe8so276850oos.9 for ; Tue, 01 Mar 2022 17:27:39 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=knKff9m1SSa1i2Jf9YTF9j12Lvs6C0dJTe/yY9EehIE=; b=JKVAG8VNOqbdpBasGXOclZzoF4HHztXmyufblKs9S+8MzQg09t2La3l2aemOnatttM ruvsh9OD9Bwj47/d4GLD9VfqIsP0KKYBXYxHratz3WFOQvAykgAmjJ6n3LbzCe2l/Vi8 LOVoXWBi7WWLZ9aijWHyAFr4j4WMbW9wn1AfT47EE+F1VKLmZSgx9+XT1nwx/Jec6JHv TNq+SebN8j6GNN9ySAHPQaz49P1d7sasEmZ/Jui5lKR/TummVcZioNFU92cL4j3hZCdI uBQAYZ9tEw76VPgUW6/UD1O7SWwy2BZfJOFS90YcMu03FR1XBhZHysMAqLcBnbzP9mSW 98dw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=knKff9m1SSa1i2Jf9YTF9j12Lvs6C0dJTe/yY9EehIE=; b=t84uQQd5AweEvNr4Wzm71rsRr9syPQjcnONJJbkOlAnhbA2l113tJlrrIWEEl+El9l H7kxGBUoiWAIRXRAvBlHSZXBa9REDr368kGeK85Q1ez0jiTJMDzxdvSyJNNA4kKWYozV 39CtU5mXWXmQlsT2suFm12dxpdgh/tck9/RzKG5UPQlqZoYwtl0mIWlAowegV5U/ZpVb LCmPuVaXDuo+nS97DnOSeF6mtkjynOej+nBVjHWcJgkAS2GUidCMEIWgTtoqpW83Lu3V F3Fmj0BZRfbaL23YJ/NLqX9YfbPf170OUsSrwKZeVJ8EXUFK6E+vjkJxYn2oHRXqUG9O f7kg== X-Gm-Message-State: AOAM533bXSQRhXsXNNHBhLvdJ4jGjDj6KuKYzdE6T2l0eCUNagvCO3Xv LNc1q80Bln+Z6AlfEURZqJw6eJvpOUB97A== X-Google-Smtp-Source: ABdhPJxixOFh3lm/h04oBLu7zQ0+6NPTfLFIsCxfmBOqi2YYi85+e8re5ihk2kbh5qJLy2J+D+JM8Q== X-Received: by 2002:a05:6870:9a29:b0:d6:bba7:970f with SMTP id fo41-20020a0568709a2900b000d6bba7970fmr13678368oab.166.1646184459005; Tue, 01 Mar 2022 17:27:39 -0800 (PST) Received: from ripper.. ([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id t9-20020a056871054900b000c53354f98esm6728948oal.13.2022.03.01.17.27.38 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 17:27:38 -0800 (PST) From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Rob Herring , Krzysztof Kozlowski , Philipp Zabel , Dmitry Baryshkov , Loic Poulain Cc: linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 1/2] dt-bindings: display: msm: Add optional resets Date: Tue, 1 Mar 2022 17:29:30 -0800 Message-Id: <20220302012931.4107196-1-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.33.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org Add an optional reference to the MDSS_CORE reset, which when specified can be used by the implementation to reset the hardware blocks. Signed-off-by: Bjorn Andersson --- Changes since v1: - New approach/patch .../devicetree/bindings/display/msm/dpu-qcm2290.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml | 4 ++++ Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml | 4 ++++ 4 files changed, 16 insertions(+) diff --git a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml index 8766b13f0c46..965027fe205c 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-qcm2290.yaml @@ -66,6 +66,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml index 12a86b1ec1bc..b41991eaa454 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7180.yaml @@ -65,6 +65,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml index fbeb931a026e..6e417d06fc79 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sc7280.yaml @@ -64,6 +64,10 @@ properties: interconnect-names: const: mdp0-mem + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object diff --git a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml index 0dca4b3d66e4..1a42491efdbc 100644 --- a/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml +++ b/Documentation/devicetree/bindings/display/msm/dpu-sdm845.yaml @@ -57,6 +57,10 @@ properties: ranges: true + resets: + items: + - description: MDSS_CORE reset + patternProperties: "^display-controller@[0-9a-f]+$": type: object From patchwork Wed Mar 2 01:29:31 2022 Content-Type: text/plain; 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([2600:1700:a0:3dc8:205:1bff:fec0:b9b3]) by smtp.gmail.com with ESMTPSA id t9-20020a056871054900b000c53354f98esm6728948oal.13.2022.03.01.17.27.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 01 Mar 2022 17:27:39 -0800 (PST) From: Bjorn Andersson To: Rob Clark , Abhinav Kumar , Philipp Zabel , Dmitry Baryshkov , Loic Poulain Cc: Rob Herring , Krzysztof Kozlowski , linux-arm-msm@vger.kernel.org, dri-devel@lists.freedesktop.org, freedreno@lists.freedesktop.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH v2 2/2] drm/msm/dpu: Issue MDSS reset during initialization Date: Tue, 1 Mar 2022 17:29:31 -0800 Message-Id: <20220302012931.4107196-2-bjorn.andersson@linaro.org> X-Mailer: git-send-email 2.33.1 In-Reply-To: <20220302012931.4107196-1-bjorn.andersson@linaro.org> References: <20220302012931.4107196-1-bjorn.andersson@linaro.org> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: linux-arm-msm@vger.kernel.org It's typical for the bootloader to bring up the display for showing a boot splash or efi framebuffer. But in some cases the kernel driver ends up only partially configuring (in particular) the DPU, which might result in e.g. that two different data paths attempts to push data to the interface - with resulting graphical artifacts. Naturally the end goal would be to inherit the bootloader's configuration and provide the user with a glitch free handover from the boot configuration to a running DPU. But as implementing seamless transition from the bootloader configuration to the running OS will be a considerable effort, start by simply resetting the entire MDSS to its power-on state, to avoid the partial configuration. Signed-off-by: Bjorn Andersson --- Changes since v1: - Rather than trying to deconfigure individual pieces of the DPU, reset the entire block. drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 18 ++++++++++++++++++ drivers/gpu/drm/msm/msm_drv.c | 4 ++++ drivers/gpu/drm/msm/msm_kms.h | 1 + 3 files changed, 23 insertions(+) diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c index b10ca505f9ac..419eaaefe606 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c @@ -7,6 +7,7 @@ #include #include #include +#include #include "dpu_kms.h" #define to_dpu_mdss(x) container_of(x, struct dpu_mdss, base) @@ -31,6 +32,7 @@ struct dpu_mdss { void __iomem *mmio; struct clk_bulk_data *clocks; size_t num_clocks; + struct reset_control *reset; struct dpu_irq_controller irq_controller; }; @@ -197,10 +199,18 @@ static void dpu_mdss_destroy(struct msm_mdss *mdss) dpu_mdss->mmio = NULL; } +static int dpu_mdss_reset(struct msm_mdss *mdss) +{ + struct dpu_mdss *dpu_mdss = to_dpu_mdss(mdss); + + return reset_control_reset(dpu_mdss->reset); +} + static const struct msm_mdss_funcs mdss_funcs = { .enable = dpu_mdss_enable, .disable = dpu_mdss_disable, .destroy = dpu_mdss_destroy, + .reset = dpu_mdss_reset, }; int dpu_mdss_init(struct platform_device *pdev) @@ -227,6 +237,13 @@ int dpu_mdss_init(struct platform_device *pdev) } dpu_mdss->num_clocks = ret; + dpu_mdss->reset = devm_reset_control_get_optional_exclusive(&pdev->dev, NULL); + if (IS_ERR(dpu_mdss->reset)) { + ret = PTR_ERR(dpu_mdss->reset); + DPU_ERROR("failed to acquire mdss reset, ret=%d", ret); + goto reset_parse_err; + } + dpu_mdss->base.dev = &pdev->dev; dpu_mdss->base.funcs = &mdss_funcs; @@ -252,6 +269,7 @@ int dpu_mdss_init(struct platform_device *pdev) irq_error: _dpu_mdss_irq_domain_fini(dpu_mdss); irq_domain_error: +reset_parse_err: clk_parse_err: if (dpu_mdss->mmio) devm_iounmap(&pdev->dev, dpu_mdss->mmio); diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 129fa841ac22..7595f83da3f1 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -388,6 +388,10 @@ static int msm_drm_init(struct device *dev, const struct drm_driver *drv) if (ret) return ret; + /* Issue a reset of the entire MDSS */ + if (priv->mdss && priv->mdss->funcs->reset) + priv->mdss->funcs->reset(priv->mdss); + /* Bind all our sub-components: */ ret = component_bind_all(dev, ddev); if (ret) diff --git a/drivers/gpu/drm/msm/msm_kms.h b/drivers/gpu/drm/msm/msm_kms.h index 2a4f0526cb98..716a34fca1cd 100644 --- a/drivers/gpu/drm/msm/msm_kms.h +++ b/drivers/gpu/drm/msm/msm_kms.h @@ -205,6 +205,7 @@ struct msm_mdss_funcs { int (*enable)(struct msm_mdss *mdss); int (*disable)(struct msm_mdss *mdss); void (*destroy)(struct msm_mdss *mdss); + int (*reset)(struct msm_mdss *mdss); }; struct msm_mdss {