From patchwork Tue Dec 4 07:24:28 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 152796 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp7762666ljp; Mon, 3 Dec 2018 23:24:47 -0800 (PST) X-Google-Smtp-Source: AFSGD/V4o1LrN5YolrSSS4IV7HMPoITj94/4Vg+3quIRuKVmasPVY0z0YtOkWUi33fiAn84fxO0V X-Received: by 2002:a62:c101:: with SMTP id i1mr19017973pfg.80.1543908287582; Mon, 03 Dec 2018 23:24:47 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543908287; cv=none; d=google.com; s=arc-20160816; b=hmibRzHo7Vgaw6vSchUiUep7j/gi6PEeYFg+A6/mIaf1dxPBPx/uaB2uaMaYfqico7 UiFASbByw/HBbwuKfiHitWZfMl92FjU1evni6gOjsdfG2MXMSIMAczO84ay4361rS+g1 aMKAWMYtdUR+w0iw5WxSemrBAAQ58aWy9rTle0BNVMTWwQHZpXEpFJ9CzbecLLDhP1zX o5RQpxPhz9ak8qJhKbVL3eLY6jNPwdpILrZ+UE5q16+5vnSK2tFzTgKm6vLjxDlX2wJ5 V1ieZGUIP+3xVo4TIZuJFoiaoFj6OrI+qtY/2r/HnOUhDE+1fFviGGLvAg9XwnpN+wZR zESw== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=j1zCZgXi/XKYT/+/SSecVSrn6u7kBTAh7f/boLUDo0A=; b=kWfNkjvACzlySFPvzjxZot7vwBCPO/y1kRJYaxxS+Ea80iRmG5SLauu6BZxSbdFLn3 350VpL63LHZqkX70/D06lST5OlYL+QJkaJp7zeEv9UPN39+gld+F7swVARZraNG1CnDG 0vhmAjujyGTE/dVytZqv7HnGa1zE2+1AqHNVwDNSuINxUZavRvekGNSv9V5KkE3kN4GH Ug6ngmacgNCUOBrYWYUZB3SQuSb/OxXZbgmVtO3sI55AXfURf+BH2LWjsp1v4c5+aUiD asnIX9SttxMKYWiaQrs9ZKe0NO4HD5LCtNRseqMVo8iKL6GpPnxsIo1ljKQcSX7t3DAn drEA== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CFVAQcwz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id i198si17467656pfe.289.2018.12.03.23.24.47; Mon, 03 Dec 2018 23:24:47 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=CFVAQcwz; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726084AbeLDHYq (ORCPT + 31 others); Tue, 4 Dec 2018 02:24:46 -0500 Received: from mail-pf1-f196.google.com ([209.85.210.196]:45496 "EHLO mail-pf1-f196.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725976AbeLDHYn (ORCPT ); Tue, 4 Dec 2018 02:24:43 -0500 Received: by mail-pf1-f196.google.com with SMTP id g62so7752852pfd.12 for ; Mon, 03 Dec 2018 23:24:43 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=j1zCZgXi/XKYT/+/SSecVSrn6u7kBTAh7f/boLUDo0A=; b=CFVAQcwzpaTCHZBZsPWE7RvrrZIM+csPWponA4Icm7Cm0/C0JWTl8PtFS5h+RRXgim /8e+BtjezhNyVExGtt/nxRE6DGYLcFmT3Y0P+27grEZ1CL4hN1c8TLQlGLyAt1h+p25/ 0/pXjtDa8ZpPHbiq+D1tj3Pc/jtCvcr9n1YBg= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=j1zCZgXi/XKYT/+/SSecVSrn6u7kBTAh7f/boLUDo0A=; b=LlWdKR1UoBcTk2w89cSs3Ijm7ZKQNEKt1/YsXNhKB0+iZOrnQkXuLrWHr/g5NWcrv8 IiuHwpNvzhGxYT4je+J1UA14QKdT7uebE0xvTEL4RqKOEYiUqxxDFgNPYah8Vk1fDEqy Pzaz7PnDeLod2uMDlqoCQTNN8Rv3ZvE/6UmowchRN0L4wsUb5bMNmpIws9n2fZw19oPk EEI0afQDEDpGNCzhG/g83l/c4HK3z2HxC+TsYbJTkgmBBzNYO/Hn/abHGY3+W30hYGZU wcWnhsYlpsV64wbCyGwIguw9MJjI2RVCHGRktaUWZfB8KfuL3tdVMJ1vl8aUcUhRU0iy JX6w== X-Gm-Message-State: AA+aEWb/X22WKhW6qXzmY5MhbBXVc2pIUZpYYDY/MKZU3vgUmJdHiF96 VWIkMMsVXvkRYGVrrJg96eMQkw== X-Received: by 2002:a63:295:: with SMTP id 143mr15410585pgc.362.1543908283125; Mon, 03 Dec 2018 23:24:43 -0800 (PST) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id g136sm22705943pfb.154.2018.12.03.23.24.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 03 Dec 2018 23:24:42 -0800 (PST) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter , Faiz Abbas Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Mark Brown , Kishon Vijay Abraham I , Sekhar Nori , Chunyan Zhang Subject: [PATCH V3 1/3] mmc: sdhci: add support for using external DMA devices Date: Tue, 4 Dec 2018 15:24:28 +0800 Message-Id: <1543908270-13953-2-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1543908270-13953-1-git-send-email-zhang.chunyan@linaro.org> References: <1543908270-13953-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org Some standard SD host controllers can support both external dma controllers as well as ADMA/SDMA in which the SD host controller acts as DMA master. TI's omap controller is the case as an example. Currently the generic SDHCI code supports ADMA/SDMA integrated in the host controller but does not have any support for external DMA controllers implemented using dmaengine, meaning that custom code is needed for any systems that use an external DMA controller with SDHCI. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/Kconfig | 3 + drivers/mmc/host/sdhci.c | 185 ++++++++++++++++++++++++++++++++++++++++++++++- drivers/mmc/host/sdhci.h | 8 ++ 3 files changed, 195 insertions(+), 1 deletion(-) -- 2.7.4 diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 1b58739..3101da6 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -977,3 +977,6 @@ config MMC_SDHCI_OMAP If you have a controller with this interface, say Y or M here. If unsure, say N. + +config MMC_SDHCI_EXTERNAL_DMA + bool diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c index 99bdae5..04b029c 100644 --- a/drivers/mmc/host/sdhci.c +++ b/drivers/mmc/host/sdhci.c @@ -14,6 +14,7 @@ */ #include +#include #include #include #include @@ -1309,6 +1310,162 @@ static void sdhci_del_timer(struct sdhci_host *host, struct mmc_request *mrq) del_timer(&host->timer); } +#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTERNAL_DMA) +static int sdhci_external_dma_init(struct sdhci_host *host) +{ + int ret = 0; + struct mmc_host *mmc = host->mmc; + + host->tx_chan = dma_request_chan(mmc->parent, "tx"); + if (IS_ERR(host->tx_chan)) { + ret = PTR_ERR(host->tx_chan); + if (ret != -EPROBE_DEFER) + pr_warn("Failed to request TX DMA channel.\n"); + host->tx_chan = NULL; + return ret; + } + + host->rx_chan = dma_request_chan(mmc->parent, "rx"); + if (IS_ERR(host->rx_chan)) { + if (host->tx_chan) { + dma_release_channel(host->tx_chan); + host->tx_chan = NULL; + } + + ret = PTR_ERR(host->rx_chan); + if (ret != -EPROBE_DEFER) + pr_warn("Failed to request RX DMA channel.\n"); + host->rx_chan = NULL; + } + + return ret; +} + +static inline struct dma_chan * +sdhci_external_dma_channel(struct sdhci_host *host, struct mmc_data *data) +{ + return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; +} + +static int sdhci_external_dma_setup(struct sdhci_host *host, + struct mmc_command *cmd) +{ + int ret, i; + struct dma_async_tx_descriptor *desc; + struct mmc_data *data = cmd->data; + struct dma_chan *chan; + struct dma_slave_config cfg; + dma_cookie_t cookie; + + if (!data) + return 0; + + if (!host->mapbase) + return -EINVAL; + + cfg.src_addr = host->mapbase + SDHCI_BUFFER; + cfg.dst_addr = host->mapbase + SDHCI_BUFFER; + cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; + cfg.src_maxburst = data->blksz / 4; + cfg.dst_maxburst = data->blksz / 4; + + /* Sanity check: all the SG entries must be aligned by block size. */ + for (i = 0; i < data->sg_len; i++) { + if ((data->sg + i)->length % data->blksz) + return -EINVAL; + } + + chan = sdhci_external_dma_channel(host, data); + + ret = dmaengine_slave_config(chan, &cfg); + if (ret) + return ret; + + desc = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, + mmc_get_dma_dir(data), + DMA_PREP_INTERRUPT | DMA_CTRL_ACK); + if (!desc) + return -EINVAL; + + desc->callback = NULL; + desc->callback_param = NULL; + + cookie = dmaengine_submit(desc); + if (cookie < 0) + ret = cookie; + + return ret; +} + +static void sdhci_external_dma_release(struct sdhci_host *host) +{ + if (host->tx_chan) { + dma_release_channel(host->tx_chan); + host->tx_chan = NULL; + } + + if (host->rx_chan) { + dma_release_channel(host->rx_chan); + host->rx_chan = NULL; + } + + sdhci_switch_external_dma(host, false); +} + +static void sdhci_external_dma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + if (sdhci_external_dma_setup(host, cmd)) { + sdhci_external_dma_release(host); + pr_err("%s: Failed to setup external DMA, switch to the DMA/PIO which standard SDHCI provides.\n", + mmc_hostname(host->mmc)); + } else { + /* Prepare for using external dma */ + host->flags |= SDHCI_REQ_USE_DMA; + } + + sdhci_prepare_data(host, cmd); +} + +static void sdhci_external_dma_pre_transfer(struct sdhci_host *host, + struct mmc_command *cmd) +{ + struct dma_chan *chan; + + if (cmd->data) { + sdhci_set_timeout(host, cmd); + chan = sdhci_external_dma_channel(host, cmd->data); + dma_async_issue_pending(chan); + } +} +#else +static int sdhci_external_dma_init(struct sdhci_host *host) +{ + return -EOPNOTSUPP; +} + +static void sdhci_external_dma_release(struct sdhci_host *host) +{} + +static void sdhci_external_dma_prepare_data(struct sdhci_host *host, + struct mmc_command *cmd) +{ + /* If MMC_SDHCI_EXTERNAL_DMA not supported, PIO will be used */ + sdhci_prepare_data(host, cmd); +} + +static void sdhci_external_dma_pre_transfer(struct sdhci_host *host, + struct mmc_command *cmd) +{} +#endif + +void sdhci_switch_external_dma(struct sdhci_host *host, bool en) +{ + host->use_external_dma = en; +} +EXPORT_SYMBOL_GPL(sdhci_switch_external_dma); + void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) { int flags; @@ -1355,7 +1512,10 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) host->data_cmd = cmd; } - sdhci_prepare_data(host, cmd); + if (host->use_external_dma) + sdhci_external_dma_prepare_data(host, cmd); + else + sdhci_prepare_data(host, cmd); sdhci_writel(host, cmd->arg, SDHCI_ARGUMENT); @@ -1397,6 +1557,9 @@ void sdhci_send_command(struct sdhci_host *host, struct mmc_command *cmd) timeout += 10 * HZ; sdhci_mod_timer(host, cmd->mrq, timeout); + if (host->use_external_dma) + sdhci_external_dma_pre_transfer(host, cmd); + sdhci_writew(host, SDHCI_MAKE_CMD(cmd->opcode, flags), SDHCI_COMMAND); } EXPORT_SYMBOL_GPL(sdhci_send_command); @@ -4133,6 +4296,19 @@ int sdhci_setup_host(struct sdhci_host *host) return ret; } + if (host->use_external_dma) { + ret = sdhci_external_dma_init(host); + if (ret == -EPROBE_DEFER) + goto unreg; + + /* + * Fall back to use the DMA/PIO integrated in standard SDHCI + * instead of external DMA devices. + */ + if (ret) + sdhci_switch_external_dma(host, false); + } + return 0; unreg: @@ -4161,6 +4337,10 @@ void sdhci_cleanup_host(struct sdhci_host *host) dma_free_coherent(mmc_dev(mmc), host->align_buffer_sz + host->adma_table_sz, host->align_buffer, host->align_addr); + + if (host->use_external_dma) + sdhci_external_dma_release(host); + host->adma_table = NULL; host->align_buffer = NULL; } @@ -4295,6 +4475,9 @@ void sdhci_remove_host(struct sdhci_host *host, int dead) host->adma_table_sz, host->align_buffer, host->align_addr); + if (host->use_external_dma) + sdhci_external_dma_release(host); + host->adma_table = NULL; host->align_buffer = NULL; } diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index b001cf4..8e50a97 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h @@ -475,6 +475,7 @@ struct sdhci_host { int irq; /* Device IRQ */ void __iomem *ioaddr; /* Mapped address */ + phys_addr_t mapbase; /* physical address base */ char *bounce_buffer; /* For packing SDMA reads/writes */ dma_addr_t bounce_addr; unsigned int bounce_buffer_size; @@ -524,6 +525,7 @@ struct sdhci_host { bool pending_reset; /* Cmd/data reset is pending */ bool irq_wake_enabled; /* IRQ wakeup is enabled */ bool v4_mode; /* Host Version 4 Enable */ + bool use_external_dma; struct mmc_request *mrqs_done[SDHCI_MAX_MRQS]; /* Requests done */ struct mmc_command *cmd; /* Current command */ @@ -552,6 +554,11 @@ struct sdhci_host { struct timer_list timer; /* Timer for timeouts */ struct timer_list data_timer; /* Timer for data timeouts */ +#if IS_ENABLED(CONFIG_MMC_SDHCI_EXTERNAL_DMA) + struct dma_chan *rx_chan; + struct dma_chan *tx_chan; +#endif + u32 caps; /* CAPABILITY_0 */ u32 caps1; /* CAPABILITY_1 */ bool read_caps; /* Capability flags have been read */ @@ -785,5 +792,6 @@ void sdhci_start_tuning(struct sdhci_host *host); void sdhci_end_tuning(struct sdhci_host *host); void sdhci_reset_tuning(struct sdhci_host *host); void sdhci_send_tuning(struct sdhci_host *host, u32 opcode); +void sdhci_switch_external_dma(struct sdhci_host *host, bool en); #endif /* __SDHCI_HW_H */ From patchwork Tue Dec 4 07:24:29 2018 Content-Type: text/plain; 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[209.132.180.67]) by mx.google.com with ESMTP id 4si2207693pgl.192.2018.12.03.23.24.50; Mon, 03 Dec 2018 23:24:51 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=k0TSNWXA; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726105AbeLDHYt (ORCPT + 31 others); Tue, 4 Dec 2018 02:24:49 -0500 Received: from mail-pg1-f195.google.com ([209.85.215.195]:43901 "EHLO mail-pg1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726011AbeLDHYr (ORCPT ); Tue, 4 Dec 2018 02:24:47 -0500 Received: by mail-pg1-f195.google.com with SMTP id v28so6958685pgk.10 for ; Mon, 03 Dec 2018 23:24:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9T3V3dRQcYZgkMYQsaWnQOC7H3nxxKjjTTP7EfZrByg=; b=k0TSNWXA1pKNHh104J00rWYmpAj4FKrnGnLun6XCF1eOaQatkGs90ue1mlDa2cJyuI 7dnCnn9jTc8Mnsy1wZ85q3AGOcNUWn9Xo73xywZ8thNVoXqJTFZ8mMw2F5YWQUklAis8 o6ITSE4VScLdhstGOATI+ozbdwOg72Yfm/7lU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9T3V3dRQcYZgkMYQsaWnQOC7H3nxxKjjTTP7EfZrByg=; b=lyJn5weyl1BJNlfzfz4FcBKWCbEB9R9g3toE5XOnUpTor3ZjY0xv7J+cSTDi2CnN7Y +OWoJyBWr8s1r8bxy8+FSd2hLQI9SbYekHxobLjojDbuLlSv0EkSYdjo1oE7k6uIJmbA kV6noa/N+NfOKX72ds03IAIYDbRnAjQzq6nWcJxLA+fX3jYhlvokPrfAXEu1x2xPP5Gy AQw+de2Tnrf/X+LRj32dbg8K1/t7X1SNrBhxvQWJqXaYiMuJCUdv+tvV0kuljU9JX3Yq bn+YxcaIpnl/6L5+I2PwOstYjV688607oijOmQVwyxs4GF5wIIKHfs5i6cdL+cAH2ntn Z13w== X-Gm-Message-State: AA+aEWZd2D/XZfsmXWiC2gJ5NqujgXDs7athkjd0EjxmBz3dA/kmGZXx QaEqt2kklgoOsQL73Ya9EYNyew== X-Received: by 2002:a63:dd55:: with SMTP id g21mr15647484pgj.86.1543908286818; Mon, 03 Dec 2018 23:24:46 -0800 (PST) Received: from ubt.spreadtrum.com ([117.18.48.82]) by smtp.gmail.com with ESMTPSA id g136sm22705943pfb.154.2018.12.03.23.24.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Mon, 03 Dec 2018 23:24:46 -0800 (PST) From: Chunyan Zhang To: Ulf Hansson , Adrian Hunter , Faiz Abbas Cc: linux-mmc@vger.kernel.org, linux-kernel@vger.kernel.org, Arnd Bergmann , Mark Brown , Kishon Vijay Abraham I , Sekhar Nori , Chunyan Zhang Subject: [PATCH V3 2/3] mmc: sdhci-omap: Add using external dma Date: Tue, 4 Dec 2018 15:24:29 +0800 Message-Id: <1543908270-13953-3-git-send-email-zhang.chunyan@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1543908270-13953-1-git-send-email-zhang.chunyan@linaro.org> References: <1543908270-13953-1-git-send-email-zhang.chunyan@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org sdhci-omap can support both external dma controller via dmaengine framework as well as ADMA which standard SD host controller provides. Signed-off-by: Chunyan Zhang --- drivers/mmc/host/Kconfig | 1 + drivers/mmc/host/sdhci-omap.c | 10 ++++++++++ 2 files changed, 11 insertions(+) -- 2.7.4 diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 3101da6..7846754 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -969,6 +969,7 @@ config MMC_SDHCI_XENON config MMC_SDHCI_OMAP tristate "TI SDHCI Controller Support" depends on MMC_SDHCI_PLTFM && OF + select MMC_SDHCI_EXTERNAL_DMA if DMA_ENGINE help This selects the Secure Digital Host Controller Interface (SDHCI) support present in TI's DRA7 SOCs. The controller supports diff --git a/drivers/mmc/host/sdhci-omap.c b/drivers/mmc/host/sdhci-omap.c index 88347ce..b164fcc 100644 --- a/drivers/mmc/host/sdhci-omap.c +++ b/drivers/mmc/host/sdhci-omap.c @@ -896,6 +896,7 @@ static int sdhci_omap_probe(struct platform_device *pdev) const struct of_device_id *match; struct sdhci_omap_data *data; const struct soc_device_attribute *soc; + struct resource *regs; match = of_match_device(omap_sdhci_match, dev); if (!match) @@ -908,6 +909,10 @@ static int sdhci_omap_probe(struct platform_device *pdev) } offset = data->offset; + regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (!regs) + return -ENXIO; + host = sdhci_pltfm_init(pdev, &sdhci_omap_pdata, sizeof(*omap_host)); if (IS_ERR(host)) { @@ -924,6 +929,7 @@ static int sdhci_omap_probe(struct platform_device *pdev) omap_host->timing = MMC_TIMING_LEGACY; omap_host->flags = data->flags; host->ioaddr += offset; + host->mapbase = regs->start; mmc = host->mmc; sdhci_get_of_property(pdev); @@ -991,6 +997,10 @@ static int sdhci_omap_probe(struct platform_device *pdev) host->mmc_host_ops.execute_tuning = sdhci_omap_execute_tuning; host->mmc_host_ops.enable_sdio_irq = sdhci_omap_enable_sdio_irq; + /* Switch to external DMA only if there is the "dmas" property */ + if (of_find_property(dev->of_node, "dmas", NULL)) + sdhci_switch_external_dma(host, true); + ret = sdhci_setup_host(host); if (ret) goto err_put_sync; From patchwork Tue Dec 4 07:24:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunyan Zhang X-Patchwork-Id: 152798 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp7762733ljp; Mon, 3 Dec 2018 23:24:54 -0800 (PST) X-Google-Smtp-Source: AFSGD/Ua7usWWPK1UUqKtyE4PCZhEuazvzadO1GpJ/rF/PHa0BQ5Gt5Pb3aBDvduHz9e/Z3rhAxQ X-Received: by 2002:a17:902:42e4:: with SMTP id h91mr19385151pld.18.1543908294452; Mon, 03 Dec 2018 23:24:54 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1543908294; cv=none; d=google.com; s=arc-20160816; b=VlauTSSNpth+0RGNkz/xjmGE2dJC9WI3YiciX6W1YW5HCtBUC4SDV4SCW4oyYLGMR1 fsx9Kyy58IF9Tf5+Qij2h9hMpCShUnx5ZEx8HY7wIA88suc3TLcN9/89yUK0OIAtuC0S 1xl5YSpWw7wxHYO/ZCjvyI6qvqslq79hGM0qJ2z9XRxfTWI4Ev9n6snRCPGG9m3fn21v wmiVtJ1RyEKR+aF9fGPajZQp6tkfzPJEe8QkDjBCgajB/vzaBgIa/RBcErcce1+PWmZ7 qLcjgR1ftjV1ER9xnq2pZOs+kJ5Ntm0BlUmm7tRohw6aSdWEmjgkRD5GYOFdd2IN4K6v U4Ug== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:dkim-signature; bh=LQZrLz1FZpjiBQ4p0of1aJNeNKSIKiMbtxR/pc+1xGM=; b=kzkUOGtmAnAxf8SKD9M7GpUV7rEpT1suXebx5TGABIuWZ+NhEns6vsFX7yM6Mpee1v xjO5sK+sFJc9nRXAQMQTnKeJFUMcDNZTha2s+a9LmUOgJxsik5C1FKKJe7Qsi25hX123 Np6YVMYnidxAvL3RzzDRPWbWmxJ5xE2GiYhJD82xSyU/RTBcV1rpv/CicJiZik+Hkg5Q PXsSp9U3UThjQbguObSNosBEWXqx7RLjyWFrKg3zUcRmcUwTl2kbAMbO5o3s1PODc50G MfMtQ9dG/oDTIL+A6yiF7NJDIU404EueKb39CsK5jK8W8d89GUb5bm2ZqEKxx7vtIe09 qgGg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b="Cfx/OrHJ"; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. 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Signed-off-by: Chunyan Zhang --- Documentation/devicetree/bindings/mmc/sdhci-omap.txt | 7 +++++++ 1 file changed, 7 insertions(+) -- 2.7.4 diff --git a/Documentation/devicetree/bindings/mmc/sdhci-omap.txt b/Documentation/devicetree/bindings/mmc/sdhci-omap.txt index 393848c..c73fd47 100644 --- a/Documentation/devicetree/bindings/mmc/sdhci-omap.txt +++ b/Documentation/devicetree/bindings/mmc/sdhci-omap.txt @@ -12,6 +12,11 @@ Required properties: "ddr_1_8v-rev11", "ddr_1_8v" or "ddr_3_3v", "hs200_1_8v-rev11", "hs200_1_8v", - pinctrl- : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt +- dmas: List of DMA specifiers with the controller specific format as described + in the generic DMA client binding. A tx and rx specifier is required. +- dma-names: List of DMA request names. These strings correspond 1:1 with the + DMA specifiers listed in dmas. The string naming is to be "rx" + and "tx" for RX and TX DMA requests, respectively. Example: mmc1: mmc@4809c000 { @@ -20,4 +25,6 @@ Example: ti,hwmods = "mmc1"; bus-width = <4>; vmmc-supply = <&vmmc>; /* phandle to regulator node */ + dmas = <&sdma 61 &sdma 62>; + dma-names = "tx", "rx"; };