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[79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:15 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 01/18] ARM: dts: qcom: add multiple missing pin definition for ipq8064 Date: Wed, 9 Mar 2022 20:01:35 +0100 Message-Id: <20220309190152.7998-2-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add missing definition for mdio0 pins used for gpio-bitbang driver,i2c4 pins and rgmii2 pins for ipq8064. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 34 +++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 11481313bdb6..cc6ca9013ab1 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -382,6 +382,15 @@ mux { }; }; + i2c4_pins: i2c4_pinmux { + mux { + pins = "gpio12", "gpio13"; + function = "gsbi4"; + drive-strength = <12>; + bias-disable; + }; + }; + spi_pins: spi_pins { mux { pins = "gpio18", "gpio19", "gpio21"; @@ -424,6 +433,8 @@ mux { pullups { pins = "gpio39"; + function = "nand"; + drive-strength = <10>; bias-pull-up; }; @@ -431,9 +442,32 @@ hold { pins = "gpio40", "gpio41", "gpio42", "gpio43", "gpio44", "gpio45", "gpio46", "gpio47"; + function = "nand"; + drive-strength = <10>; bias-bus-hold; }; }; + + mdio0_pins: mdio0_pins { + mux { + pins = "gpio0", "gpio1"; + function = "mdio"; + drive-strength = <8>; + bias-disable; + }; + }; + + rgmii2_pins: rgmii2_pins { + mux { + pins = "gpio27", "gpio28", "gpio29", + "gpio30", "gpio31", "gpio32", + "gpio51", "gpio52", "gpio59", + "gpio60", "gpio61", "gpio62"; + function = "rgmii2"; + drive-strength = <8>; + bias-disable; + }; + }; }; intc: interrupt-controller@2000000 { From patchwork Wed Mar 9 19:01:37 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 549835 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 96E54C4167B for ; Wed, 9 Mar 2022 19:15:23 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S232427AbiCITQU (ORCPT ); Wed, 9 Mar 2022 14:16:20 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41324 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237364AbiCITQT (ORCPT ); Wed, 9 Mar 2022 14:16:19 -0500 Received: from mail-wr1-x432.google.com (mail-wr1-x432.google.com [IPv6:2a00:1450:4864:20::432]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 8D67910EC58; Wed, 9 Mar 2022 11:15:20 -0800 (PST) Received: by mail-wr1-x432.google.com with SMTP id x15so4533830wru.13; Wed, 09 Mar 2022 11:15:20 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=D+rLs9tzqVI3gBUs7BM99DY73Xg0WBVGdTXSmZY7KpY=; b=Vz5Rr8lr9II3batw1H25VUHCkqNuREl857dWo+OL9XBQIE+mtKEBKHGAOVxGLZ6CY0 VRprLAHhv9RfAd3GubfBBmzdn6af7BiZh8Vii/q957dyt4w2sUEf5MduNIs8Iw4w2gy/ 0ybtCD23MFsfPvxh4grRZJO0a/JAMxWjabJRvrEM8CQ0JYg15zCMM4lBAM7hhYTn8Y8I Y8ji4w2P/pjte/6q/hM8q45Bxgf1hsdhreu/i8x+KFOwe8kpp2UaHGDzGwiWOGPebU1P teHyvQSntZ65n6IHWf9J+xyV79ERwL/vmJQGztKcuF4Cn9xtD1+l3G9xQj/BekkTB26P 0tNw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=D+rLs9tzqVI3gBUs7BM99DY73Xg0WBVGdTXSmZY7KpY=; b=AI4G+4a3O0p7QxzG3rihuVE9NR4tEzYLFqp0yeSmivWsQvknj4w/yyidQzvH532R2J 8u7GlZcNLPMKhohnba8DR1/Z2BDF1r1Cw07TsmRQZMdD5vpDpjrnbbd+izYofbPaTU2j MNgh/OM8JPYzRJlMwF5SzaRLB0BCKF0WvB3Dpf2GNHQuk9Z9xJkD+5D1koU4teSCxsdu IS+vhUx6sz5i01qijgiUS857El04llvkHKpnSf9LkyR/gXXfiMYcc72tBbXE1mWKov5s 9t1uUwjiMwmYO4cDsi8moqk8TjYQbxfMD2to+x3mLP/d9N20YEK98vC5NPcBiEpwDa7g 3Wdw== X-Gm-Message-State: AOAM531qUjXgKbF2Ga5U3GbTIjMIfbobBCNdfr2o5iGjxrIFcILTMs7t GPKhJJoYOa5QPGxKMm4HLWE= X-Google-Smtp-Source: ABdhPJw5GAvVIPpyl970bhVQm3Zg02EHB4hlYetFHoqX/PoCPdmoNRWJXjiv5oBrRxu00VzpBZ0yww== X-Received: by 2002:a5d:5687:0:b0:1f0:9663:c80e with SMTP id f7-20020a5d5687000000b001f09663c80emr854243wrv.343.1646853318996; Wed, 09 Mar 2022 11:15:18 -0800 (PST) Received: from Ansuel-xps.localdomain (host-79-47-249-147.retail.telecomitalia.it. [79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:18 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 03/18] ARM: dts: qcom: add missing rpm regulators and cells for ipq8064 Date: Wed, 9 Mar 2022 20:01:37 +0100 Message-Id: <20220309190152.7998-4-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add cells definition for rpm node and add missing regulators for the 4 regulator present on ipq8064. There regulators are controlled by rpm and to correctly works gsbi4_i2c require to be NEVER disabled or rpm will reject any regulator change request. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 36 +++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index b309bc0fbbcd..0938838a4af8 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -842,10 +842,46 @@ rpm: rpm@108000 { clocks = <&gcc RPM_MSG_RAM_H_CLK>; clock-names = "ram"; + #address-cells = <1>; + #size-cells = <0>; + rpmcc: clock-controller { compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc"; #clock-cells = <1>; }; + + smb208_regulators: regulators { + compatible = "qcom,rpm-smb208-regulators"; + status = "okay"; + + smb208_s1a: s1a { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1150000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s1b: s1b { + regulator-min-microvolt = <1050000>; + regulator-max-microvolt = <1150000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s2a: s2a { + regulator-min-microvolt = < 800000>; + regulator-max-microvolt = <1250000>; + + qcom,switch-mode-frequency = <1200000>; + }; + + smb208_s2b: s2b { + regulator-min-microvolt = < 800000>; + regulator-max-microvolt = <1250000>; + + qcom,switch-mode-frequency = <1200000>; + }; + }; }; tcsr: syscon@1a400000 { From patchwork Wed Mar 9 19:01:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 549834 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id DE7C1C4332F for ; Wed, 9 Mar 2022 19:15:26 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237405AbiCITQX (ORCPT ); Wed, 9 Mar 2022 14:16:23 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237393AbiCITQW (ORCPT ); Wed, 9 Mar 2022 14:16:22 -0500 Received: from mail-wr1-x42f.google.com (mail-wr1-x42f.google.com [IPv6:2a00:1450:4864:20::42f]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 5519E811B9; Wed, 9 Mar 2022 11:15:23 -0800 (PST) Received: by mail-wr1-x42f.google.com with SMTP id p9so4556303wra.12; Wed, 09 Mar 2022 11:15:23 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=giCcBvx2lbo0mKnfguv6SI99GvdvBJesRoU/g/VVqrU=; b=gefApEAROwKIXh7Vq4cHqfGjEZSrhtaQj5MoA4W8BVVxFnwe1xiPNqxRW50Kzy9jC1 rg9+nkfTSQI3bAo/U4fRgPrpcF+KIqxWG9YXOSCds/OrRivRg+UZ1bwfX7BkKMNbpXY/ WkIdQ90N2SzgcdeJuR84oIj7oDPMQxb2T2KSrrTCsDwbkW3tygIQ5ZkVq2Bs8tj/BQwg 2VawBXXsRJ65vHBVOkWx5uiFLgukp/O/zyTfHFEsJjkKC4hQaPLeR8CufJlx2cNJFQPd +MPA97przQVEyMnbWZO+Yrl0P1dmkRUI9j7nXstfnaid0G4PH9vip97WW+IjQTDU6IMV dTow== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=giCcBvx2lbo0mKnfguv6SI99GvdvBJesRoU/g/VVqrU=; b=F9O1axCrvNQnOZ9h0A8lbKo+m+qCsl/1CBmQ/ObVDOvaYrJ48yikPMpjWpC79Bf1B0 VFLsgkMszKiTNZjIcetoWhH51ofrDijqKAVsKFT6crCMDMNpQcKgFpC73n10if1+eemx ldq3vWeoCxe/e51qvsXVNihbeJIBsm9DpQqifrr1CPG2wGL3hnF6th3jjErFH44CbRjY O4PudhyTu2wVQ7unQ03FWQ+USiWP8ZbTPcxuC1fh7ANntNZ5rl5tVkzBUPQsfIlSsIN2 Sx4VrFstXZQ/X+hdbf/kWEKdj43WDSHRgfeQNv74nvA+pxmJZ1bVnS3sRGfL0VqDuJqm RO0A== X-Gm-Message-State: AOAM530Vfv8vS8l2yuwPI7qSBewbhmrPcSUHuGX5mMzYM5hWr2L3l0Wg vo+NaxVWdqC1gFNC6X1+7CTLCrvYT9k= X-Google-Smtp-Source: ABdhPJxeSe+cfj5KlBD+hoLRLVnxYGkeHUTTkh6zMEtwL0RdE/AAE+GuNhZFVxsLreqY4RvFR3/qMg== X-Received: by 2002:a5d:47c8:0:b0:1ef:8e97:2b8c with SMTP id o8-20020a5d47c8000000b001ef8e972b8cmr849521wrc.545.1646853321798; Wed, 09 Mar 2022 11:15:21 -0800 (PST) Received: from Ansuel-xps.localdomain (host-79-47-249-147.retail.telecomitalia.it. [79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.20 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:21 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 05/18] ARM: dts: qcom: add missing snps,dwmac compatible for gmac ipq8064 Date: Wed, 9 Mar 2022 20:01:39 +0100 Message-Id: <20220309190152.7998-6-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add missing snps,dwmac compatible for gmac ipq8064 dtsi. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 0938838a4af8..9d658fcc1f12 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -1075,7 +1075,7 @@ stmmac_axi_setup: stmmac-axi-config { gmac0: ethernet@37000000 { device_type = "network"; - compatible = "qcom,ipq806x-gmac"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; reg = <0x37000000 0x200000>; interrupts = ; interrupt-names = "macirq"; @@ -1099,7 +1099,7 @@ gmac0: ethernet@37000000 { gmac1: ethernet@37200000 { device_type = "network"; - compatible = "qcom,ipq806x-gmac"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; reg = <0x37200000 0x200000>; interrupts = ; interrupt-names = "macirq"; @@ -1123,7 +1123,7 @@ gmac1: ethernet@37200000 { gmac2: ethernet@37400000 { device_type = "network"; - compatible = "qcom,ipq806x-gmac"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; reg = <0x37400000 0x200000>; interrupts = ; interrupt-names = "macirq"; @@ -1147,7 +1147,7 @@ gmac2: ethernet@37400000 { gmac3: ethernet@37600000 { device_type = "network"; - compatible = "qcom,ipq806x-gmac"; + compatible = "qcom,ipq806x-gmac", "snps,dwmac"; reg = <0x37600000 0x200000>; interrupts = ; interrupt-names = "macirq"; From patchwork Wed Mar 9 19:01:42 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 549833 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E0CE5C433F5 for ; Wed, 9 Mar 2022 19:15:38 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237388AbiCITQf (ORCPT ); Wed, 9 Mar 2022 14:16:35 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42002 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237442AbiCITQ1 (ORCPT ); Wed, 9 Mar 2022 14:16:27 -0500 Received: from mail-wm1-x335.google.com (mail-wm1-x335.google.com [IPv6:2a00:1450:4864:20::335]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id DD3E91107C7; Wed, 9 Mar 2022 11:15:27 -0800 (PST) Received: by mail-wm1-x335.google.com with SMTP id l10so1981625wmb.0; Wed, 09 Mar 2022 11:15:27 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=UcuHyzhzP+5hjdfYei3RsVypThNPnUA0SB8MNR6XsKE=; b=e4sdgLDLdmEvY8wERiRJZydfE2M+FUi5X2dLkYr1ThNmeQx3Vbz61/wf+xEBXInuxw V1DBmuRgeEaZXw4P4FUTnNRESBxUzoXtWg22V6aW9qB93M0xv0AioPNfjlh1cmbl9oIT yR5sdM63eMGPhdCEpFNaKbJn0zczVHelyZgkhaI+CCgB8jYhoc9OUgieYL95DEHnmf9h MSdwVwIGxndPpHn81diBhT2+OYeWDftXysOm+SgT4q1hz+DM4/l0E3zE4QmUYJdFam1U Xe5D663GJNxz49fLQ6+iHlNDbvR566UbP3E/R/HS5FhH2VAh6eHiNPljAvJecayEnz1r N3/w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=UcuHyzhzP+5hjdfYei3RsVypThNPnUA0SB8MNR6XsKE=; b=stCEtcmqQU6vTxsN712xEkTC7hOsYpkkbBmAsOL6r0ygCs90Tfc+A7OcjytfCwox0w R9h89YNRbdZ+rEUgsF/1CphH6d0+ylesZS1HgL8DzA7zrISxZsGvrIChxPLNmJMdmOaB wihHF7U+waCED279R6E/Y+EO6yWTbvtsEHgMC6KpOIUS0KoH70Xb4WALv2oaDMk00gPw 4gtv/9SFjO96glNjsv1VUAg1EALCJzr5S8QHEeCCpSCtSJFhZRrJw/NlqAjigYd0xiVY OsSnsVksqFxhXL6OTD3rdlCjbRQJ0vJ63i7mDxaUloxZQQsOm3BHg+XNAM3ZYoxOg9lR NKSQ== X-Gm-Message-State: AOAM533pcd5VsdtNGqGu+r/0dGTAahsqSIlMidichXgDVCpM3ICgsy+Z EVaqfAhvs8Sqb37cpYSLtHk= X-Google-Smtp-Source: ABdhPJzEaSUFxljUe16ZnMooiH7xXlssMXfvEbHhs89wExTIR3YHt+STHesVAx97wG4ata5o80TlvA== X-Received: by 2002:a1c:f018:0:b0:37b:c13c:3128 with SMTP id a24-20020a1cf018000000b0037bc13c3128mr8728223wmb.157.1646853326244; Wed, 09 Mar 2022 11:15:26 -0800 (PST) Received: from Ansuel-xps.localdomain (host-79-47-249-147.retail.telecomitalia.it. [79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:25 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 08/18] ARM: dts: qcom: fix dtc warning for missing #address-cells for ipq8064 Date: Wed, 9 Mar 2022 20:01:42 +0100 Message-Id: <20220309190152.7998-9-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Fix dtc warning for missing #address-cells for ipq8064. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 2 ++ 1 file changed, 2 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 36bdfc8db3f0..6768f7ba0d04 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -352,6 +352,7 @@ qcom_pinmux: pinmux@800000 { gpio-ranges = <&qcom_pinmux 0 0 69>; #gpio-cells = <2>; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <2>; interrupts = ; @@ -473,6 +474,7 @@ mux { intc: interrupt-controller@2000000 { compatible = "qcom,msm-qgic2"; interrupt-controller; + #address-cells = <0>; #interrupt-cells = <3>; reg = <0x02000000 0x1000>, <0x02002000 0x1000>; From patchwork Wed Mar 9 19:01:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 549829 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 5E4C1C433F5 for ; Wed, 9 Mar 2022 19:15:55 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237560AbiCITQw (ORCPT ); Wed, 9 Mar 2022 14:16:52 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41838 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237480AbiCITQb (ORCPT ); Wed, 9 Mar 2022 14:16:31 -0500 Received: from mail-wm1-x333.google.com (mail-wm1-x333.google.com [IPv6:2a00:1450:4864:20::333]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 49A271107E2; Wed, 9 Mar 2022 11:15:29 -0800 (PST) Received: by mail-wm1-x333.google.com with SMTP id i66so1939505wma.5; Wed, 09 Mar 2022 11:15:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=hldPsR9u6qgwtLMZcTNitQaUGyr4m6295BrOOfQZurE=; b=fz41RZyU+tFO6Amyy88pjHELi3GGmsiEe3L9ZnC1HRHHQggBcogVlCxfP6z+TJkrO5 6G+mzbrFvQL8Huf7tmWxvm8Fy1O3Gl5tEs0M1VTa3xhOm9Pjzs5PMOjTAmiTlIbJTYga OU3CQpyEhwlpSTmgrmRnL2iphCPrBH6sPhsPkiFi2dzyjbs6cQqBE3SVDSuolEPmtZae 1NuyEd5vlwYNuIXM2HEIqgbgoC17q0NKyeTOaS6jymCHVcXp0Gubi93iGSP3la1x/xzo qqpsQNHbxbZdjdTVBXjREbqYIaKMOneu4bK0jKgR45j7oYHHp+pIvniLPjyH0QC1sYkW 0+tQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=hldPsR9u6qgwtLMZcTNitQaUGyr4m6295BrOOfQZurE=; b=ghK5Up3hlZXowy7f2Ah4HYljZR/Jlo9ttpTZYnysX4hHuKjcFI1jc9CqSbqtU2i+tT nvYqIT8SeNXxMtkjmrWnOBXJBrGSiq/kvMOHCcU/NaFOLJQK1sN/ATzMsyTh2ANkeeMn mHKE0Z8zdgD/Q/Eetppqv02rtjyrVAC6LLuMd7aSRu0rnrLCbkETsvzry2uWZhPruJfQ Umb6O+n+DN562Rl5a+yaU07422YgDPZZWXYslL5pAZ/4qYBLAN9LG9tejzU54LV9FvQh Ofebnyf8yGson+PfkzS5bEA4tSq/H/MAH6jqVYpDc1aN/hPX273fKElAEcqZQE7sT3zv pZLg== X-Gm-Message-State: AOAM530m4lwhXJUPdrrpJ89YSBuGpjyqPpUKxyzeTtb9XKJOCEQJFJhk FtyaVo0QvApHBX2USqx79qRrBvLygu8= X-Google-Smtp-Source: ABdhPJzA3jmM4mchAGe0tHfk7/7el4ZBHGpYEM0ttQVivdDl/LWIaYk8vD2V4o5ICOfIy/8HP6WbBw== X-Received: by 2002:a7b:c114:0:b0:381:f7ee:e263 with SMTP id w20-20020a7bc114000000b00381f7eee263mr8852329wmi.30.1646853327670; Wed, 09 Mar 2022 11:15:27 -0800 (PST) Received: from Ansuel-xps.localdomain (host-79-47-249-147.retail.telecomitalia.it. [79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:27 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 09/18] ARM: dts: qcom: add smem node for ipq8064 Date: Wed, 9 Mar 2022 20:01:43 +0100 Message-Id: <20220309190152.7998-10-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add missing smem node for ipq8064. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 18 ++++++++++++++++++ 1 file changed, 18 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 6768f7ba0d04..c579fb09e768 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -906,6 +906,11 @@ lcc: clock-controller@28000000 { #reset-cells = <1>; }; + sfpb_mutex_block: syscon@1200600 { + compatible = "syscon"; + reg = <0x01200600 0x100>; + }; + pcie0: pci@1b500000 { compatible = "qcom,pcie-ipq8064"; reg = <0x1b500000 0x1000 @@ -1330,4 +1335,17 @@ sdcc3: mmc@12180000 { }; }; }; + + sfpb_mutex: sfpb-mutex { + compatible = "qcom,sfpb-mutex"; + syscon = <&sfpb_mutex_block 4 4>; + + #hwlock-cells = <1>; + }; + + smem { + compatible = "qcom,smem"; + memory-region = <&smem>; + hwlocks = <&sfpb_mutex 3>; + }; }; From patchwork Wed Mar 9 19:01:45 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 549830 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id EC6DAC433FE for ; Wed, 9 Mar 2022 19:15:51 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237433AbiCITQr (ORCPT ); Wed, 9 Mar 2022 14:16:47 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41522 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237510AbiCITQc (ORCPT ); Wed, 9 Mar 2022 14:16:32 -0500 Received: from mail-wr1-x436.google.com (mail-wr1-x436.google.com [IPv6:2a00:1450:4864:20::436]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 1842211108F; Wed, 9 Mar 2022 11:15:32 -0800 (PST) Received: by mail-wr1-x436.google.com with SMTP id e24so4562604wrc.10; Wed, 09 Mar 2022 11:15:32 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=xUoBX2KeGcpl8zGZBWHWBmV655aJNbl/ybN21igwOc8=; b=kl9Lwq80X/wp/M7q5+753qmc4cyWHdRzk1vs1QfhoX+Duux0eilNAKN3V1sQPk2FeX 4FfP+seZXLnfIx0/v6nqr/h9zsX3FjoUY6aLSbpAb5xWTGt1azyNkr9u7kxmYLyNJGfb XQZ9tLRHz1Mld+q2z/dC94rroReOSXP8CoEi9iSYVN4bR1uhke8zE9AVQTPczQ0ExTs5 kVVtU5Gllnc6L6MvyFa9xM4dRBC14MPFQ2C0s/BRBCiv0Czd9YarpcnPoRNjYM5oIY8D /30aHtH0kIrpeVsISRwjdnuQyqvNT/vF2Csm8vh4AvxQku9g/mL7NhQstnWpqbMalOps +EXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=xUoBX2KeGcpl8zGZBWHWBmV655aJNbl/ybN21igwOc8=; b=xJ+dK/Eo6+qIc9hktezrBegW+7BZh301WLX4Evm9VHXWA9G+KCoZb2Q88++YqJk61y vRctExYHGIAsHm9EB00VET1owdtGKZgVV4RDiriWsdKYBFMj3gBja94fZmU79nJ0UGbE O1PVyFD+jFNGIawe8pxx+rMknzGtXJ+TbJCEB1+nkl6UFOf61IZGZsReJOgaga3gR4vR UGNLc778p4UtDdxoeOiCnODx3YcHoujdU4XZkEl/jn22N8GoP9wx5HUgttfNIxDQSUW1 eYwQHDVh1z/QGjAUw+S5yhjgNEgO/Jdrk+AplrxWEkCiVdLTUFheSYxXXOWXvZRh+ugv 0jGA== X-Gm-Message-State: AOAM532OhiD857KjA71001G+i+tquxp017eH9ew0r2TKswlG7zQz4gO8 uRl+I3U/W3xqkXWI4gGPY3g= X-Google-Smtp-Source: ABdhPJzjtAypnki+gMVlpzQUGPRy9wvZh8+g286WejxtMWDy+PJ1zX3HgfqljbeNtM0+hwQmYYGIgA== X-Received: by 2002:a5d:59ac:0:b0:1e4:9b6e:eac7 with SMTP id p12-20020a5d59ac000000b001e49b6eeac7mr874420wrr.172.1646853330513; Wed, 09 Mar 2022 11:15:30 -0800 (PST) Received: from Ansuel-xps.localdomain (host-79-47-249-147.retail.telecomitalia.it. [79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:29 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 11/18] ARM: dts: qcom: add sic non secure node for ipq8064 Date: Wed, 9 Mar 2022 20:01:45 +0100 Message-Id: <20220309190152.7998-12-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add missing sic non secure node for ipq8064. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 7df1c1482220..df2702e6136d 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -563,6 +563,11 @@ saw_l2: regulator@02012000 { regulator; }; + sic_non_secure: sic-non-secure@12100000 { + compatible = "syscon"; + reg = <0x12100000 0x10000>; + }; + gsbi2: gsbi@12480000 { compatible = "qcom,gsbi-v1.0.0"; cell-index = <2>; From patchwork Wed Mar 9 19:01:47 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 549832 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id A4430C433EF for ; Wed, 9 Mar 2022 19:15:43 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237519AbiCITQk (ORCPT ); Wed, 9 Mar 2022 14:16:40 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42432 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237526AbiCITQh (ORCPT ); Wed, 9 Mar 2022 14:16:37 -0500 Received: from mail-wr1-x435.google.com (mail-wr1-x435.google.com [IPv6:2a00:1450:4864:20::435]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 618D01107C7; Wed, 9 Mar 2022 11:15:35 -0800 (PST) Received: by mail-wr1-x435.google.com with SMTP id h15so4578953wrc.6; Wed, 09 Mar 2022 11:15:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=v+iY+TRExJIc70bBVgk3nQfXctI6G7hPCCrLkPdhNl0=; b=QPQuv5n46kKpwoNTjdEiO37RwlOn6o1ecymwktJF82FRbsffq5IoNicaHFKbhF+rFu t/qX9cFH/Fg3kYlBCDWylKZ+LswvxIs3ZRorpygeV8y0/uv3tDE/lfbHhIhyvTDlpFMt P5ntL8YwJ70C0XV7oPsMt5JsJL4DpgkI9ycK3HJccrCRPPj/hyExxccOkoQN0YKyYQ4y FmRCY9XOuBt7ELplG2HPPN7dQimFccWnUlRic96tBcD2luZu5wwxHwktL9i5eTryPDVw ai5IG/Ojk/kIejpOhksm/LAkQB5oRv5tPNC3wmlWnmgrMt2SQ/AMbxPChfEtS9DTFc4a 6Q6Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=v+iY+TRExJIc70bBVgk3nQfXctI6G7hPCCrLkPdhNl0=; b=ZaFh8Qe0/iVXm805p2XxrIHwOYEiEI4uYo1Vg1kS6xKhct3ukEQtzG1qKpLNNbTMjo dnbYeDQsO/FJA8PWWQ7xZIvVldvh7nXrWysM47tIgUerbcq+VGrXO2/6raEoY6zk42Kx VqpajIrtWPuVhDwdMSiQg8UwfmWUGLIRPA2b1AKYtoGmxGmxRDRcX3OysZjauJr3F0Rd DA7zw5SaTvkEcAsiuVZvP0y0DJBklsRLgfzF465yycfQUdIhxgc0xvCjW7NsT9DkfTbv YY5SCtvYYb/ShMX06bz37z/VMrL/8dVnkGh59DakwTA4l33x0IFthq7Elj9nufI3DBBn TYfg== X-Gm-Message-State: AOAM533GhYSjIo1VX1EyrE6UyLZquwaPDZHzITbXzWcVQhCjnQGhiI8y RL8j6hDCPqBh4U05KlJXLYo= X-Google-Smtp-Source: ABdhPJxFmHBCHHHap1aYKXVs9bhz/jOXciGyyLUyEOhB6hN5EuavuOEwuSvT5zi6z3fK5wFYmXphCw== X-Received: by 2002:a5d:52c5:0:b0:1f2:1a3:465a with SMTP id r5-20020a5d52c5000000b001f201a3465amr860258wrv.206.1646853333396; Wed, 09 Mar 2022 11:15:33 -0800 (PST) Received: from Ansuel-xps.localdomain (host-79-47-249-147.retail.telecomitalia.it. [79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.32 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:32 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 13/18] ARM: dts: qcom: add opp table for cpu and l2 for ipq8064 Date: Wed, 9 Mar 2022 20:01:47 +0100 Message-Id: <20220309190152.7998-14-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add opp table for cpu and l2 cache. While the current cpufreq is the generic one that doesn't scale the L2 cache, we add the l2 cache opp anyway for the sake of completeness. This will be handy in the future when a dedicated cpufreq driver is introduced for krait cores that will correctly scale l2 cache with the core freq. Opp-level is set based on the logic of 0: idle level 1: normal level 2: turbo level Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 99 +++++++++++++++++++++++++++++ 1 file changed, 99 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index 7dd0b901cd30..a1079583def9 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -48,6 +48,105 @@ L2: l2-cache { }; }; + opp_table_l2: opp_table_l2 { + compatible = "operating-points-v2"; + + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <100000>; + opp-level = <0>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt = <1100000>; + clock-latency-ns = <100000>; + opp-level = <1>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt = <1150000>; + clock-latency-ns = <100000>; + opp-level = <2>; + }; + }; + + opp_table0: opp_table0 { + compatible = "operating-points-v2-kryo-cpu"; + nvmem-cells = <&speedbin_efuse>; + + /* + * Voltage thresholds are + */ + opp-384000000 { + opp-hz = /bits/ 64 <384000000>; + opp-microvolt-speed0-pvs0-v0 = <1000000 950000 1050000>; + opp-microvolt-speed0-pvs1-v0 = <925000 878750 971250>; + opp-microvolt-speed0-pvs2-v0 = <875000 831250 918750>; + opp-microvolt-speed0-pvs3-v0 = <800000 760000 840000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <0>; + }; + + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-microvolt-speed0-pvs0-v0 = <1050000 997500 1102500>; + opp-microvolt-speed0-pvs1-v0 = <975000 926250 1023750>; + opp-microvolt-speed0-pvs2-v0 = <925000 878750 971250>; + opp-microvolt-speed0-pvs3-v0 = <850000 807500 892500>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <1>; + }; + + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-microvolt-speed0-pvs0-v0 = <1100000 1045000 1155000>; + opp-microvolt-speed0-pvs1-v0 = <1025000 973750 1076250>; + opp-microvolt-speed0-pvs2-v0 = <995000 945250 1044750>; + opp-microvolt-speed0-pvs3-v0 = <900000 855000 945000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <1>; + }; + + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-microvolt-speed0-pvs0-v0 = <1150000 1092500 1207500>; + opp-microvolt-speed0-pvs1-v0 = <1075000 1021250 1128750>; + opp-microvolt-speed0-pvs2-v0 = <1025000 973750 1076250>; + opp-microvolt-speed0-pvs3-v0 = <950000 902500 997500>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <1>; + }; + + opp-1200000000 { + opp-hz = /bits/ 64 <1200000000>; + opp-microvolt-speed0-pvs0-v0 = <1200000 1140000 1260000>; + opp-microvolt-speed0-pvs1-v0 = <1125000 1068750 1181250>; + opp-microvolt-speed0-pvs2-v0 = <1075000 1021250 1128750>; + opp-microvolt-speed0-pvs3-v0 = <1000000 950000 1050000>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <2>; + }; + + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-microvolt-speed0-pvs0-v0 = <1250000 1187500 1312500>; + opp-microvolt-speed0-pvs1-v0 = <1175000 1116250 1233750>; + opp-microvolt-speed0-pvs2-v0 = <1125000 1068750 1181250>; + opp-microvolt-speed0-pvs3-v0 = <1050000 997500 1102500>; + opp-supported-hw = <0x1>; + clock-latency-ns = <100000>; + opp-level = <2>; + }; + }; + thermal-zones { sensor0-thermal { polling-delay-passive = <0>; From patchwork Wed Mar 9 19:01:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 549831 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 6AAABC4332F for ; Wed, 9 Mar 2022 19:15:48 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235313AbiCITQp (ORCPT ); Wed, 9 Mar 2022 14:16:45 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:41510 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237548AbiCITQh (ORCPT ); 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[79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.33 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:34 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 14/18] ARM: dts: qcom: add speedbin efuse nvmem binding Date: Wed, 9 Mar 2022 20:01:48 +0100 Message-Id: <20220309190152.7998-15-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Add speedbin efuse nvmem binding needed for the opp table for the CPU freqs. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064.dtsi | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/arm/boot/dts/qcom-ipq8064.dtsi b/arch/arm/boot/dts/qcom-ipq8064.dtsi index a1079583def9..629e22236f5b 100644 --- a/arch/arm/boot/dts/qcom-ipq8064.dtsi +++ b/arch/arm/boot/dts/qcom-ipq8064.dtsi @@ -981,6 +981,9 @@ tsens_calib: calib@400 { tsens_calib_backup: calib_backup@410 { reg = <0x410 0xb>; }; + speedbin_efuse: speedbin@0c0 { + reg = <0x0c0 0x4>; + }; }; gcc: clock-controller@900000 { From patchwork Wed Mar 9 19:01:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Christian Marangi X-Patchwork-Id: 549828 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id 48AC8C43217 for ; Wed, 9 Mar 2022 19:15:56 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S237470AbiCITQx (ORCPT ); Wed, 9 Mar 2022 14:16:53 -0500 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:42440 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S237463AbiCITQk (ORCPT ); Wed, 9 Mar 2022 14:16:40 -0500 Received: from mail-wm1-x336.google.com (mail-wm1-x336.google.com [IPv6:2a00:1450:4864:20::336]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id 0989A1107EA; Wed, 9 Mar 2022 11:15:41 -0800 (PST) Received: by mail-wm1-x336.google.com with SMTP id q20so1959843wmq.1; Wed, 09 Mar 2022 11:15:40 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=rRu2fVfjqxFslFwqFKYpAJD6XGUCMfHi7upTim4v3aA=; b=eNLHSZpQCbWRVgfrrQ6UKvljItS8PHo5ZE3j1rxa+c1fLPptZfw748/fXP2E00VZcL GbRm4+8sG4A7mtdaEaD97ZtSHP/e7t3W0umbVP4gmUR9Z79/V8Xw1bee0BLtbj07SUx2 +gerlCESid0a1WUR9S8cl8xsSpnoAy88j12lELxvcEpjVRfnTZfN/TFjCvr2vXVwKo6D /psOOzBrbGT3C90+5OcNljYqIWFju5mRTgWjVIIINkfJUmWobaWaG1YGWR+cPObiWu5w 4o2jOMlrP/LxgsHSZ1yiifIsm1eqz88gl1DbI4ANNCNf08RBeLe8pWLVBdL5sfOVARVJ /aIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=rRu2fVfjqxFslFwqFKYpAJD6XGUCMfHi7upTim4v3aA=; b=eG4Rtb90KUFs8CAUcDRauQYlMldIK3ukMcWBtG3OTClnfK90iFAl2tU17wP4r0PGUV mcpOSuY9j8ll+LBKV2FkwQ1/Jxpq2fzCn2Pn7Vb8NcJn6QogySvSrFfZo0aNNaipn9a7 VRUdta41QLxS2S3AzbyTiOxmI6eTx8SeB4WotYaySNYAE13+sBJz6sHClSnlJ6/SusCb A0P5FAneQFtQmTz6ldGrSUPEVyzAIfKH0CX5VIaoDyyJ8MmWgn3lN4gG4LDbwIH/4EQ5 KFJh1aaBb9U/rXugVskuvCMovvwuvmIwX3cICaHAOHg9fgpZFOLZq3iyV86f3CYUbAUJ +ziA== X-Gm-Message-State: AOAM532+w4lPVbX6Dpf8fVTCbqYGUAp0aGfgsXf9Or6VnxQSX9l9oXp3 q9iP9wqLcvnqgsKdvcRRFW4= X-Google-Smtp-Source: ABdhPJwSoTDStTr4MQLoBDnr+kXg1mP+rEQvsvtnHqmnx0tTQeIPvfjY4qqICJk08i/LLVFPqS+f5w== X-Received: by 2002:a05:600c:4f86:b0:389:d5bf:a7f3 with SMTP id n6-20020a05600c4f8600b00389d5bfa7f3mr707822wmq.49.1646853339420; Wed, 09 Mar 2022 11:15:39 -0800 (PST) Received: from Ansuel-xps.localdomain (host-79-47-249-147.retail.telecomitalia.it. [79.47.249.147]) by smtp.googlemail.com with ESMTPSA id w6-20020a5d6806000000b002036515dda7sm2396699wru.33.2022.03.09.11.15.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 09 Mar 2022 11:15:38 -0800 (PST) From: Ansuel Smith To: Andy Gross , Bjorn Andersson , Rob Herring , linux-arm-msm@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Ansuel Smith , Jonathan McDowell Subject: [PATCH v3 17/18] ARM: dts: qcom: add ipq8064-v2.0 dtsi Date: Wed, 9 Mar 2022 20:01:51 +0100 Message-Id: <20220309190152.7998-18-ansuelsmth@gmail.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220309190152.7998-1-ansuelsmth@gmail.com> References: <20220309190152.7998-1-ansuelsmth@gmail.com> MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org Many devices are based on the v2.0 of the ipq8064 SoC. Main difference is a change in the pci compatible and different way to configre the usb phy. Signed-off-by: Ansuel Smith Tested-by: Jonathan McDowell --- arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi | 70 ++++++++++++++++++++++++ 1 file changed, 70 insertions(+) create mode 100644 arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi diff --git a/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi b/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi new file mode 100644 index 000000000000..c082c3cd1a19 --- /dev/null +++ b/arch/arm/boot/dts/qcom-ipq8064-v2.0.dtsi @@ -0,0 +1,70 @@ +// SPDX-License-Identifier: GPL-2.0 +#include "qcom-ipq8064.dtsi" + +/ { + aliases { + serial0 = &gsbi4_serial; + }; + + chosen { + stdout-path = "serial0:115200n8"; + }; + + reserved-memory { + #address-cells = <1>; + #size-cells = <1>; + ranges; + + rsvd@41200000 { + reg = <0x41200000 0x300000>; + no-map; + }; + }; +}; + +&gsbi4 { + qcom,mode = ; + status = "okay"; + + serial@16340000 { + status = "okay"; + }; + /* + * The i2c device on gsbi4 should not be enabled. + * On ipq806x designs gsbi4 i2c is meant for exclusive + * RPM usage. Turning this on in kernel manifests as + * i2c failure for the RPM. + */ +}; + +&CPU_SPC { + status = "okay"; +}; + +&pcie0 { + compatible = "qcom,pcie-ipq8064-v2"; +}; + +&pcie1 { + compatible = "qcom,pcie-ipq8064-v2"; +}; + +&pcie2 { + compatible = "qcom,pcie-ipq8064-v2"; +}; + +&sata { + ports-implemented = <0x1>; +}; + +&ss_phy_0 { + qcom,rx-eq = <2>; + qcom,tx-deamp_3_5db = <32>; + qcom,mpll = <5>; +}; + +&ss_phy_1 { + qcom,rx-eq = <2>; + qcom,tx-deamp_3_5db = <32>; + qcom,mpll = <5>; +};